[all-commits] [llvm/llvm-project] e90ab3: [RISCV] Add coverage for select between simm12 con...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e90ab31024a7ad906db45e229fdb0f2fda7b2107
      https://github.com/llvm/llvm-project/commit/e90ab31024a7ad906db45e229fdb0f2fda7b2107
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2025-09-04 (Thu, 04 Sep 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/select-const.ll

  Log Message:
  -----------
  [RISCV] Add coverage for select between simm12 constant and zero [nfc]

The zicond codegen for this involves an extra register for basically
no purpose; to be addressed in an upcoming change.



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