[all-commits] [llvm/llvm-project] 8a2dd2: [NVPTX] Add support for tcgen05 instructions for s...

[masahi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8a2dd2bc49055a176501e3720073ba58bbb47a70
      https://github.com/llvm/llvm-project/commit/8a2dd2bc49055a176501e3720073ba58bbb47a70
  Author: masahi <masahi129 at gmail.com>
  Date:   2025-09-04 (Thu, 04 Sep 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
    M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-st.ll

  Log Message:
  -----------
  [NVPTX] Add support for tcgen05 instructions for sm103 target (#156613)

Currently, NVPTX fails to lower some tcgen05 ops for the
sm103 target. It was observed in a downstream project, Triton, in
https://github.com/triton-lang/triton/pull/8045.

So, this patch adds sm103 targets to the hasTcgen05Instructions() method.

All the Lit tests for tcgen05-* are updated as well.



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