[all-commits] [llvm/llvm-project] c33ccf: [VPlan] Reassociate (x & y) & z -> x & (y & z) (#1...

Luke Lau via All-commits all-commits at lists.llvm.org
Tue Sep 2 18:09:40 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c33ccfa52b2db90bae72ac11ee50639231e93310
      https://github.com/llvm/llvm-project/commit/c33ccfa52b2db90bae72ac11ee50639231e93310
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-09-03 (Wed, 03 Sep 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
    M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll

  Log Message:
  -----------
  [VPlan] Reassociate (x & y) & z -> x & (y & z) (#155383)

This PR reassociates logical ands in order to enable more
simplifications.

The driving motivation for this is that with tail folding all blocks
inside the loop body will end up using the header mask. However this can
end up nestled deep within a chain of logical ands from other edges.

Typically the header mask will be a leaf nested in the LHS, e.g.
(headermask & y) & z. So pulling it out allows it to be simplified
further, e.g. allows it to be optimised away to VP intrinsics with EVL
tail folding.



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