[all-commits] [llvm/llvm-project] 3e5f49: [CIR][NFC] Reorder GenExprComplex and add errors f...
Steven Wu via All-commits
all-commits at lists.llvm.org
Tue Sep 2 12:31:11 PDT 2025
Branch: refs/heads/users/cachemeifyoucan/spr/support-add-vfsoutputbackend-and-outputfile-to-virtualize-compiler-outputs
Home: https://github.com/llvm/llvm-project
Commit: 3e5f49af266e3c277a794b724cd6d115a0d5766c
https://github.com/llvm/llvm-project/commit/3e5f49af266e3c277a794b724cd6d115a0d5766c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
R clang/test/CIR/CodeGen/complex-arithmetic.cpp
A clang/test/CIR/CodeGen/complex-plus-minus.cpp
Log Message:
-----------
[CIR][NFC] Reorder GenExprComplex and add errors for unhandled visitors (#156241)
- Reorder the CIRGenExprComplex functions to be similar to OCG.
- Add errors for unhandled visitors.
- Rename the test file to be similar to `complex-mul-div`.
Issue: https://github.com/llvm/llvm-project/issues/141365
Commit: 6c3db644eda97cf8461b03728ccd361e920da52b
https://github.com/llvm/llvm-project/commit/6c3db644eda97cf8461b03728ccd361e920da52b
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/redundant-vfmvsf.ll
Log Message:
-----------
[RISCV] Use slideup to lower build_vector when all operand are (extract_element X, 0) (#154450)
The general lowering of build_vector starts with splatting the first
operand before sliding down other operands one-by-one. However, if the
every operands is an extract_element from the first vector element, we
could use the original _vector_ (source of extraction) from the last
build_vec operand as start value before sliding up other operands (in
reverse order) one-by-one. By doing so we can avoid the initial splat
and eliminate the vector to scalar movement later, which is something we
cannot do with vslidedown/vslide1down.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 62fd3320850c7632109b1f282d2db1fb89d9b453
https://github.com/llvm/llvm-project/commit/62fd3320850c7632109b1f282d2db1fb89d9b453
Author: Nimit Sachdeva <31580737+nimit25 at users.noreply.github.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
A llvm/test/Transforms/InstCombine/usub_sat_to_msb_mask.ll
Log Message:
-----------
[InstCombine] Optimize usub.sat pattern (#151044)
Fixes #79690
Generalized proof: https://alive2.llvm.org/ce/z/22ybrr
---------
Co-authored-by: Nimit Sachdeva <nimsach at amazon.com>
Commit: c1ae38145399cbe49a03e0661e44cf574a044bbe
https://github.com/llvm/llvm-project/commit/c1ae38145399cbe49a03e0661e44cf574a044bbe
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV][VLOPT][NFC] Remove outdated FIXME comments related to supported instructions (#156126)
Remove several FIXME comments in `isSupportedInstr` for opcodes that
were already implemented. Also moved switch cases for
add-carry/sub-borrow instructions together.
NFC.
Commit: 036b33d4d9ecf00bab7a803d26e4c9361136aa63
https://github.com/llvm/llvm-project/commit/036b33d4d9ecf00bab7a803d26e4c9361136aa63
Author: JaydeepChauhan14 <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/test/CodeGen/X86/fpenv.ll
A llvm/test/CodeGen/X86/isel-llvm.set.rounding.ll
Log Message:
-----------
[X86][NFC] Moved/Updated llvm.set.rounding testcases (#155434)
- Moved llvm.set.rounding testcases from llvm/test/CodeGen/X86/fpenv.ll to
llvm/test/CodeGen/X86/isel-llvm.set.rounding.ll.
- Added GlobalIsel RUNs as precommit test and will add llvm.set.rounding
GISEL implementation PR after this merge.
Commit: 51a1aab6438aa33b15ff7e85bc8609b5ff003764
https://github.com/llvm/llvm-project/commit/51a1aab6438aa33b15ff7e85bc8609b5ff003764
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Math/Transforms/ExpandOps.cpp
R mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/Math/ops.mlir
M mlir/test/lib/Dialect/Math/CMakeLists.txt
R mlir/test/lib/Dialect/Math/TestExpandMath.cpp
M mlir/test/mlir-runner/test-expand-math-approx.mlir
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir][math] Add `clampf` and clean math `ExpandOps` API (#151153)
This patch adds the `clampf` operation to the math dialect. The
semantics op are defined as:
```
clampf(x, min_v, max_v) = max(min(x, min_v), max_v)
```
The reasoning behind adding this operation is that some GPU vendors
offer specialized intrinsics for this operation, or subsets of this
operation. For example,
[__saturatef](https://docs.nvidia.com/cuda/cuda-math-api/cuda_math_api/group__CUDA__MATH__INTRINSIC__SINGLE.html#group__cuda__math__intrinsic__single_1ga2c84f08e0db7117a14509d21c3aec04e)
in NVIDIA GPUs, or `__builtin_amdgcn_fmed3f` in AMD GPUs.
This patch also removes `test-expand-math` in favor of
`math-expand-ops`.
Finally, it removes individual expansion population API calls like
`populateExpandCoshPattern` in favor of:
```C++
void populateExpansionPatterns(RewritePatternSet &patterns,
ArrayRef<StringRef> opMnemonics = {});
```
Commit: 7c96eacbc7cbf319d743b3eb1491e1a48e4ec984
https://github.com/llvm/llvm-project/commit/7c96eacbc7cbf319d743b3eb1491e1a48e4ec984
Author: Erich Keane <ekeane at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
Log Message:
-----------
[OpenACC] Add NYI for pointer/VLA arguments to recipes (#156465)
As mentioned in a previous review, we aren't properly generating
init/destroy/copy (combiner will need to be done correctly too!) regions
for recipe generation. In the case where these have 'bounds', we can do
a much better job of figuring out the type and how much needs to be
done, but that is going to be its own engineering effort.
For now, add an NYI as a note to come back to this.
Commit: f99b0f3de4f627dac0092a9bea4faa8d3cf0b2e1
https://github.com/llvm/llvm-project/commit/f99b0f3de4f627dac0092a9bea4faa8d3cf0b2e1
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/unittests/IR/RuntimeLibcallsTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
[NFC] RuntimeLibcalls: Prefix the impls with 'Impl_' (#153850)
As noted in #153256, TableGen is generating reserved names for
RuntimeLibcalls, which resulted in a build failure for Arm64EC since
`vcruntime.h` defines `__security_check_cookie` as a macro.
To avoid using reserved names, all impl names will now be prefixed with
`Impl_`.
`NumLibcallImpls` was lifted out as a `constexpr size_t` instead of
being an enum field.
While I was churning the dependent code, I also removed the TODO to move
the impl enum into its own namespace and use an `enum class`: I
experimented with using an `enum class` and adding a namespace, but we
decided it was too verbose so it was dropped.
Commit: f0c819868dddc844f7539c532acfc4b7ab956bbe
https://github.com/llvm/llvm-project/commit/f0c819868dddc844f7539c532acfc4b7ab956bbe
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M lldb/source/Host/windows/Host.cpp
Log Message:
-----------
[lldb][windows] use OutputDebugStringA instead of c to log events (#156474)
In https://github.com/llvm/llvm-project/pull/150213 we made use of the
Event Viewer on Windows (equivalent of system logging on Darwin) rather
than piping to the standard output. This turned out to be too verbose in
practice, as the Event Viewer is developer oriented and not user
oriented.
This patch swaps the use of `ReportEventW` for `OutputDebugStringA`,
allowing to use tools such as `DebugView` to record logs when we are
interested in receiving them, rather than continuously writing to the
buffer. Please see an example below:
<img width="1253" height="215" alt="Screenshot 2025-09-02 at 16 07 03"
src="https://github.com/user-attachments/assets/4a326e46-d8a4-4c99-8c96-1bee62da8d55"
/>
Commit: 772cb84b9f03e1f630d237183acf37ba4c7a3bcf
https://github.com/llvm/llvm-project/commit/772cb84b9f03e1f630d237183acf37ba4c7a3bcf
Author: lntue <lntue at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
Log Message:
-----------
[libc][NFC] Remove unused add_redirector_object and add_redirector_library in cmake. (#156485)
Commit: abb62b6ede461ac384d169fa9d9122328dc11809
https://github.com/llvm/llvm-project/commit/abb62b6ede461ac384d169fa9d9122328dc11809
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
A clang/test/CodeGenHLSL/resources/res-array-global-subarray-many.hlsl
A clang/test/CodeGenHLSL/resources/res-array-global-subarray-one.hlsl
Log Message:
-----------
[HLSL] Codegen for indexing of sub-arrays of multi-dimensional resource arrays (#154248)
Adds support for accessing sub-arrays from fixed-size multi-dimensional global resource arrays.
Enables indexing into globally scoped, fixed-size resource arrays that have multiple dimensions when the result is a smaller resource array.
For example:
```
RWBuffer<float> GlobalArray[4][2];
void main() {
RWBuffer<float> SubArray[2] = GlobalArray[3];
...
}
```
The initialization logic is handled during codegen when the ArraySubscriptExpr AST node is processed. When a global resource array is indexed and the result type is a sub-array of the larger array, a local array of the resource type is created and all elements in the array are initialized with a constructor call for the corresponding resource record type and binding.
Closes #145426
Commit: 1cc84bcc08f723a6ba9d845c3fed1777547f45f9
https://github.com/llvm/llvm-project/commit/1cc84bcc08f723a6ba9d845c3fed1777547f45f9
Author: Thurston Dang <thurston at google.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint8-intrinsics.ll
Log Message:
-----------
[msan] Fix multiply-add-accumulate (#153927) to use ReductionFactor (#155748)
https://github.com/llvm/llvm-project/pull/153927 incorrectly cast using
a hardcoded reduction factor of two, rather than using the parameter.
This caused false negatives but not false positives. (The only incorrect
case was a reduction factor of four; if four values {A,B,C,D} are being
reduced, the result is fully zero iff {A,B} and {C,D} are both zero
after pairwise reduction. If only one of those reduced pairs is zero,
then the quadwise reduction is non-zero.)
Commit: d6a72cb300f1d4131eee4fdb101741fb2be1f780
https://github.com/llvm/llvm-project/commit/d6a72cb300f1d4131eee4fdb101741fb2be1f780
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
AMDGPU: Fix fixme for out of bounds indexing in usesConstantBus check (#155603)
This loop over all the operands in the MachineInstr will eventually
go past the end of the MCInstrDesc's explicit operands. We don't
need the instr desc to compute the constant bus usage, just the
register and whether it's implicit or not. The check here is slightly
conservative. e.g. a random vcc implicit use appended to an instruction
will falsely report a constant bus use.
Commit: 9b2c6052a8668711fb18844f557e229adb0306a1
https://github.com/llvm/llvm-project/commit/9b2c6052a8668711fb18844f557e229adb0306a1
Author: Yatao Wang <ningxinr at live.cn>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
Reland "[AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants" (#155696)
Reland #154039
Per suggestion by @davemgreen, add mask on the shift amount to prevent
shifting more than the bitwidth. This change is confirmed to fix the
tests failures on x86 sanitizer bots and aarch64 sanitizer bots
failures.
Fixes: https://github.com/llvm/llvm-project/issues/153159
Commit: 3ed91d880996976303e31b1900fb1fba9cd3ab44
https://github.com/llvm/llvm-project/commit/3ed91d880996976303e31b1900fb1fba9cd3ab44
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
Log Message:
-----------
[CIR][NFC] Fix build issue after AST modification (#156493)
Fix the build issue after AST modification
Commit: 4d2e1e1c74c1e437b23fccd4ea545d2f7d43d1d2
https://github.com/llvm/llvm-project/commit/4d2e1e1c74c1e437b23fccd4ea545d2f7d43d1d2
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
M llvm/test/CodeGen/NVPTX/addrspacecast.ll
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
M llvm/test/CodeGen/NVPTX/async-copy.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bmsk.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/calling-conv.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/combine-min-max.ll
M llvm/test/CodeGen/NVPTX/common-linkage.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/discard.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-ex2.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fence-cluster.ll
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-disable.ll
M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
M llvm/test/CodeGen/NVPTX/fns.ll
M llvm/test/CodeGen/NVPTX/fold-movs.ll
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
M llvm/test/CodeGen/NVPTX/global-addrspace.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/match.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M llvm/test/CodeGen/NVPTX/nofunc.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/packed-aggr.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/redux-sync.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync.ll
M llvm/test/CodeGen/NVPTX/short-ptr.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/st_bulk.ll
M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/symbol-naming.ll
M llvm/test/CodeGen/NVPTX/szext.ll
M llvm/test/CodeGen/NVPTX/tanhf.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-compare.ll
M llvm/test/CodeGen/NVPTX/vector-select.ll
M llvm/test/CodeGen/NVPTX/vote.ll
M llvm/test/CodeGen/NVPTX/weak-global.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
M llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/lit.cfg.py
Log Message:
-----------
Reland "[lit] Refactor available `ptxas` features" (#155923)
Reland #154439. Reverted with #155914.
Account for:
- Windows `ptxas` outputting error messages to `stdout` instead of
`stderr`
- Tests in `llvm/test/DebugInfo/NVPTX`
Commit: 2e96cd6562f64e11b4b3359f867bab8d45a79672
https://github.com/llvm/llvm-project/commit/2e96cd6562f64e11b4b3359f867bab8d45a79672
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
A clang/test/Analysis/model-file-missing.cpp
Log Message:
-----------
[clang][analyzer] Delay checking the model-path (#150133)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays checking that `model-path` is an existing directory.
Commit: 3ab1e0f888d46708c0c2308b072d84d8ceb43f93
https://github.com/llvm/llvm-project/commit/3ab1e0f888d46708c0c2308b072d84d8ceb43f93
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
R clang/test/AST/ast-dump-labeled-break-continue-json.c
Log Message:
-----------
[Clang] Remove broken AST dump test for now (#156498)
The name mangling on Mac OS is causing one of the AST dump tests added
by #152870 to fail, and it seems that there are some other issues with it; remove
it entirely so it stops breaking CI; I’ll add it back in a separate pr after I’ve managed
to fix it.
Commit: 2364736d6b55a4c92a53e33ee2be2679d36d26b5
https://github.com/llvm/llvm-project/commit/2364736d6b55a4c92a53e33ee2be2679d36d26b5
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/reduce01.f90
Log Message:
-----------
[flang] Fixed a crash in CheckReduce() (#156382)
Added extra checks to fix the crash.
Fixes #156167
Commit: 08001cf340185877665ee381513bf22a0fca3533
https://github.com/llvm/llvm-project/commit/08001cf340185877665ee381513bf22a0fca3533
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
Log Message:
-----------
[LAA,Loads] Use loop guards and max BTC if needed when checking deref. (#155672)
Remove the fall-back to constant max BTC if the backedge-taken-count
cannot be computed.
The constant max backedge-taken count is computed considering loop
guards, so to avoid regressions we need to apply loop guards as needed.
Also remove the special handling for Mul in willNotOverflow, as this
should not longer be needed after 914374624f
(https://github.com/llvm/llvm-project/pull/155300).
PR: https://github.com/llvm/llvm-project/pull/155672
Commit: 95d3ecee828528d4b019aae71c4f5581224ddbe2
https://github.com/llvm/llvm-project/commit/95d3ecee828528d4b019aae71c4f5581224ddbe2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/volatile.cpp
Log Message:
-----------
[CIR] Add handling for volatile loads and stores (#156124)
This fills in the missing pieces to handle volatile loads and stores in
CIR.
This addresses https://github.com/llvm/llvm-project/issues/153280
Commit: 1fc090f7f1dba97bf0c53d3b158ef4934804d3d9
https://github.com/llvm/llvm-project/commit/1fc090f7f1dba97bf0c53d3b158ef4934804d3d9
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang][analyzer] Delay checking the ctu-dir (#150139)
This PR is part of an effort to remove file system usage from the
command line parsing code. The reason for that is that it's impossible
to do file system access correctly without a configured VFS, and the VFS
can only be configured after the command line is parsed. I don't want to
intertwine command line parsing and VFS configuration, so I decided to
perform the file system access after the command line is parsed and the
VFS is configured - ideally right before the file system entity is used
for the first time.
This patch delays checking that `ctu-dir` is an existing directory.
Commit: e7474a578c60346b468ba1dc3d9febfbb92f9396
https://github.com/llvm/llvm-project/commit/e7474a578c60346b468ba1dc3d9febfbb92f9396
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-09-02 (Tue, 02 Sep 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/StaticAnalyzer/Frontend/ModelInjector.cpp
R clang/test/AST/ast-dump-labeled-break-continue-json.c
A clang/test/Analysis/model-file-missing.cpp
R clang/test/CIR/CodeGen/complex-arithmetic.cpp
A clang/test/CIR/CodeGen/complex-plus-minus.cpp
A clang/test/CIR/CodeGen/volatile.cpp
A clang/test/CodeGenHLSL/resources/res-array-global-subarray-many.hlsl
A clang/test/CodeGenHLSL/resources/res-array-global-subarray-one.hlsl
M flang/lib/Semantics/check-call.cpp
M flang/test/Semantics/reduce01.f90
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M lldb/source/Host/windows/Host.cpp
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Support/VirtualOutputError.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/Mips16ISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/CodeGen/NVPTX/access-non-generic.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
M llvm/test/CodeGen/NVPTX/addrspacecast.ll
M llvm/test/CodeGen/NVPTX/alias.ll
M llvm/test/CodeGen/NVPTX/annotations.ll
M llvm/test/CodeGen/NVPTX/applypriority.ll
M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
M llvm/test/CodeGen/NVPTX/async-copy.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/atomics-b128.ll
M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
M llvm/test/CodeGen/NVPTX/b52037.ll
M llvm/test/CodeGen/NVPTX/barrier.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bmsk.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/calling-conv.ll
M llvm/test/CodeGen/NVPTX/cluster-dim.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/combine-min-max.ll
M llvm/test/CodeGen/NVPTX/common-linkage.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/convert-fp.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/convert-sm100.ll
M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
M llvm/test/CodeGen/NVPTX/convert-sm80.ll
M llvm/test/CodeGen/NVPTX/convert-sm89.ll
M llvm/test/CodeGen/NVPTX/convert-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
M llvm/test/CodeGen/NVPTX/discard.ll
M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/f16-abs.ll
M llvm/test/CodeGen/NVPTX/f16-ex2.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32-ex2.ll
M llvm/test/CodeGen/NVPTX/f32-lg2.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
M llvm/test/CodeGen/NVPTX/fence-cluster.ll
M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
M llvm/test/CodeGen/NVPTX/fexp2.ll
M llvm/test/CodeGen/NVPTX/flog2.ll
M llvm/test/CodeGen/NVPTX/fma-disable.ll
M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
M llvm/test/CodeGen/NVPTX/fns.ll
M llvm/test/CodeGen/NVPTX/fold-movs.ll
M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
M llvm/test/CodeGen/NVPTX/global-addrspace.ll
M llvm/test/CodeGen/NVPTX/global-ordering.ll
M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
M llvm/test/CodeGen/NVPTX/intrinsics.ll
M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
M llvm/test/CodeGen/NVPTX/ld-generic.ll
M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/match.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mbarrier.ll
M llvm/test/CodeGen/NVPTX/nanosleep.ll
M llvm/test/CodeGen/NVPTX/nofunc.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
M llvm/test/CodeGen/NVPTX/packed-aggr.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
M llvm/test/CodeGen/NVPTX/redux-sync.ll
M llvm/test/CodeGen/NVPTX/reg-types.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
M llvm/test/CodeGen/NVPTX/shfl-sync.ll
M llvm/test/CodeGen/NVPTX/short-ptr.ll
M llvm/test/CodeGen/NVPTX/simple-call.ll
M llvm/test/CodeGen/NVPTX/st-addrspace.ll
M llvm/test/CodeGen/NVPTX/st-generic.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/st_bulk.ll
M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
M llvm/test/CodeGen/NVPTX/surf-tex.py
M llvm/test/CodeGen/NVPTX/symbol-naming.ll
M llvm/test/CodeGen/NVPTX/szext.ll
M llvm/test/CodeGen/NVPTX/tanhf.ll
M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
M llvm/test/CodeGen/NVPTX/unreachable.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-compare.ll
M llvm/test/CodeGen/NVPTX/vector-select.ll
M llvm/test/CodeGen/NVPTX/vote.ll
M llvm/test/CodeGen/NVPTX/weak-global.ll
M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/redundant-vfmvsf.ll
M llvm/test/CodeGen/X86/fpenv.ll
A llvm/test/CodeGen/X86/isel-llvm.set.rounding.ll
M llvm/test/DebugInfo/NVPTX/dbg-value-const-byref.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
M llvm/test/DebugInfo/NVPTX/debug-name-table.ll
M llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2_512ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx10_2ni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx_vnni-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avxvnniint8-intrinsics.ll
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter-conflict-warning.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
A llvm/test/Transforms/InstCombine/usub_sat_to_msb_mask.ll
M llvm/test/Transforms/LoopVectorize/vect.stats.ll
M llvm/test/lit.cfg.py
M llvm/unittests/IR/RuntimeLibcallsTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M mlir/include/mlir/Dialect/Math/IR/MathOps.td
M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Math/Transforms/ExpandOps.cpp
R mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/Math/ops.mlir
M mlir/test/lib/Dialect/Math/CMakeLists.txt
R mlir/test/lib/Dialect/Math/TestExpandMath.cpp
M mlir/test/mlir-runner/test-expand-math-approx.mlir
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
address review feedback
Created using spr 1.3.6
Compare: https://github.com/llvm/llvm-project/compare/a5fe23be3fc2...e7474a578c60
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