[all-commits] [llvm/llvm-project] 4a5b05: [MLIR][NVVM] Update TMA Store Op (#155435)

[Durgadoss R via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4a5b051d53ec0fcbce6b86f6d735fa343a99b3f3
      https://github.com/llvm/llvm-project/commit/4a5b051d53ec0fcbce6b86f6d735fa343a99b3f3
  Author: Durgadoss R <durgadossr at nvidia.com>
  Date:   2025-08-29 (Fri, 29 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
    A mlir/test/Target/LLVMIR/nvvm/tma_store.mlir
    A mlir/test/Target/LLVMIR/nvvm/tma_store_invalid.mlir
    A mlir/test/Target/LLVMIR/nvvm/tma_store_reduce_invalid.mlir
    M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Update TMA Store Op (#155435)

This patch includes im2col and scatter mode
support to the TMA Store Op. The lowering is
also updated to intrinsics except when Predicate
is given. This completes the Blackwell additions
on this Op.

* lit tests are added for all combinations.
* Move the TMA reduce invalid tests to their own file.

Signed-off-by: Durgadoss R <durgadossr at nvidia.com>



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