[all-commits] [llvm/llvm-project] ddf8cd: [HLSL][DirectX] Remove uniformity bit from resourc...

[Krzysztof Parzyszek via All-commits]

  Branch: refs/heads/users/kparzysz/b02-no-block-construct
  Home:   https://github.com/llvm/llvm-project
  Commit: ddf8cd3c6c949aa1ce0751d7a16966f612fb3ea4
      https://github.com/llvm/llvm-project/commit/ddf8cd3c6c949aa1ce0751d7a16966f612fb3ea4
  Author: Helena Kotas <hekotas at microsoft.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
    M clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
    M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
    M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
    M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/lib/Analysis/DXILResource.cpp
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    M llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
    M llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
    M llvm/test/CodeGen/DirectX/BufferLoad.ll
    M llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
    M llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
    M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
    M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
    M llvm/test/CodeGen/DirectX/BufferStore.ll
    M llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
    M llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
    M llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
    M llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
    M llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
    M llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
    M llvm/test/CodeGen/DirectX/CreateHandle.ll
    M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
    M llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
    M llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
    M llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
    M llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
    M llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoad.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
    M llvm/test/CodeGen/DirectX/RawBufferStore.ll
    M llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
    M llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
    M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
    M llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
    M llvm/test/CodeGen/DirectX/resource_counter_error.ll
    M llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
    M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
    M llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
    M llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp

  Log Message:
  -----------
  [HLSL][DirectX] Remove uniformity bit from resource initialization intrinsics (#155332)

Removes uniformity bit from resource initialization intrinsics `llvm.{dx|spv}.resource.handlefrombinding` and `llvm.{dx|spv}.resource.handlefromimplicitbinding`. The flag currently always set to `false`. It should be derived from resource analysis and not provided by codegen.

Closes #135452


  Commit: 4f6032fc45caaccb6bef876f438f7ab0e545b2c7
      https://github.com/llvm/llvm-project/commit/4f6032fc45caaccb6bef876f438f7ab0e545b2c7
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M .ci/cache_lit_timing_files.py

  Log Message:
  -----------
  [CI] Support using blob prefix for downloading

So that uploading and downloading use the same file paths. Also refactor
everything so that _get_blob_prefix is the common implementation.


  Commit: 21e1ab334085fee55db79efebb403e94b0a5bb50
      https://github.com/llvm/llvm-project/commit/21e1ab334085fee55db79efebb403e94b0a5bb50
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M flang/include/flang/Evaluate/match.h
    M flang/lib/Semantics/check-omp-atomic.cpp
    A flang/test/Lower/OpenMP/atomic-update-reassoc-fp.f90

  Log Message:
  -----------
  [flang][OpenMP] Reassociate floating-point ATOMIC update expressions (#155840)

This is a follow-up to PR153488, this time the reassociation is enabled
for floating-point expressions, but only when associative-nath is
enabled in the language options. This can be done via -ffast-math on the
command line.


  Commit: ca5d19516b3c292751f68e9ab48c0d25efe28be5
      https://github.com/llvm/llvm-project/commit/ca5d19516b3c292751f68e9ab48c0d25efe28be5
  Author: Sergei Barannikov <barannikov88 at gmail.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/utils/TableGen/DecoderEmitter.cpp

  Log Message:
  -----------
  [TableGen][DecoderEmitter] Simplify emitSoftFailTableEntry (NFC) (#155863)


  Commit: 492089e097d14e1605f76bf2c912cb7e0256b005
      https://github.com/llvm/llvm-project/commit/492089e097d14e1605f76bf2c912cb7e0256b005
  Author: gbMattN <matthew.nagy at sony.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M compiler-rt/lib/asan/asan_errors.h

  Log Message:
  -----------
  Provide ErrorBadParamsToCopyContiguousContainerAnnotations a more cor… (#139870)

…rect 'reason' when constructing ErrorBase

Co-authored-by: Tacet <advenam.tacet at gmail.com>


  Commit: f2e6ca805dbb8e55de480ddd2bc932c7e0fccf89
      https://github.com/llvm/llvm-project/commit/f2e6ca805dbb8e55de480ddd2bc932c7e0fccf89
  Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir

  Log Message:
  -----------
  [MLIR][Vector] Add warp distribution for `vector.step` op (#155425)

This PR adds a distribution pattern for
[`vector.step`](https://mlir.llvm.org/docs/Dialects/Vector/#vectorstep-vectorstepop)
op.

The result of the step op is a vector containing a sequence
`[0,1,...,N-1]`. For the warp distribution, we consider a vector with `N
== warp_size` (think SIMD). Distributing it to SIMT, means that each
lane is represented by a thread/lane id scalar.

More complex cases with the support for warp size multiples (e.g.,
`[0,1,...,2*N-1]`) require additional layout information to be handled
properly. Such support may be added later.

The lane id scalar is wrapped into a `vector<1xindex>` to emulate the
sequence distribution result.
Other than that, the distribution is similar to that of
`arith.constant`.


  Commit: 14485ac524552ae9840ee14890170a499919c138
      https://github.com/llvm/llvm-project/commit/14485ac524552ae9840ee14890170a499919c138
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp

  Log Message:
  -----------
  [AMDGPU] Determine MCFixupKind in a more general way. NFCI. (#155864)


  Commit: d3520a637674fe558eacafb9d102734fdb65e0d0
      https://github.com/llvm/llvm-project/commit/d3520a637674fe558eacafb9d102734fdb65e0d0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M clang/test/CodeGen/X86/mmx-builtins.c
    M clang/test/CodeGen/X86/sse-builtins.c
    M clang/test/CodeGen/X86/sse2-builtins.c
    M clang/test/CodeGen/X86/sse3-builtins.c
    M clang/test/CodeGen/X86/sse41-builtins.c
    M clang/test/CodeGen/X86/sse42-builtins.c
    M clang/test/CodeGen/X86/ssse3-builtins.c

  Log Message:
  -----------
  [X86] Add -fexperimental-new-constant-interpreter test coverage to the MMX/SSE constexpr test files (#155857)

Partial fix for #155814


  Commit: d77cf579d8c2e25099b39debd20bd6b5ade53672
      https://github.com/llvm/llvm-project/commit/d77cf579d8c2e25099b39debd20bd6b5ade53672
  Author: Justin Fargnoli <jfargnoli at nvidia.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/test/CodeGen/NVPTX/access-non-generic.ll
    M llvm/test/CodeGen/NVPTX/activemask.ll
    M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
    M llvm/test/CodeGen/NVPTX/addrspacecast.ll
    M llvm/test/CodeGen/NVPTX/alias.ll
    M llvm/test/CodeGen/NVPTX/annotations.ll
    M llvm/test/CodeGen/NVPTX/applypriority.ll
    M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
    M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
    M llvm/test/CodeGen/NVPTX/async-copy.ll
    M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
    M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
    M llvm/test/CodeGen/NVPTX/b52037.ll
    M llvm/test/CodeGen/NVPTX/barrier.ll
    M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/bmsk.ll
    M llvm/test/CodeGen/NVPTX/bswap.ll
    M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
    M llvm/test/CodeGen/NVPTX/byval-const-global.ll
    M llvm/test/CodeGen/NVPTX/calling-conv.ll
    M llvm/test/CodeGen/NVPTX/cluster-dim.ll
    M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
    M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg.ll
    M llvm/test/CodeGen/NVPTX/combine-mad.ll
    M llvm/test/CodeGen/NVPTX/combine-min-max.ll
    M llvm/test/CodeGen/NVPTX/common-linkage.ll
    M llvm/test/CodeGen/NVPTX/compare-int.ll
    M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
    M llvm/test/CodeGen/NVPTX/convert-fp.ll
    M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
    M llvm/test/CodeGen/NVPTX/convert-sm100.ll
    M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
    M llvm/test/CodeGen/NVPTX/convert-sm80.ll
    M llvm/test/CodeGen/NVPTX/convert-sm89.ll
    M llvm/test/CodeGen/NVPTX/convert-sm90.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
    M llvm/test/CodeGen/NVPTX/discard.ll
    M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
    M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
    M llvm/test/CodeGen/NVPTX/elect.ll
    M llvm/test/CodeGen/NVPTX/f16-abs.ll
    M llvm/test/CodeGen/NVPTX/f16-ex2.ll
    M llvm/test/CodeGen/NVPTX/f16-instructions.ll
    M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/f32-ex2.ll
    M llvm/test/CodeGen/NVPTX/f32-lg2.ll
    M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
    M llvm/test/CodeGen/NVPTX/fence-cluster.ll
    M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
    M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
    M llvm/test/CodeGen/NVPTX/fexp2.ll
    M llvm/test/CodeGen/NVPTX/flog2.ll
    M llvm/test/CodeGen/NVPTX/fma-disable.ll
    M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
    M llvm/test/CodeGen/NVPTX/fns.ll
    M llvm/test/CodeGen/NVPTX/fold-movs.ll
    M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
    M llvm/test/CodeGen/NVPTX/global-addrspace.ll
    M llvm/test/CodeGen/NVPTX/global-ordering.ll
    M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
    M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/idioms.ll
    M llvm/test/CodeGen/NVPTX/indirect_byval.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
    M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
    M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
    M llvm/test/CodeGen/NVPTX/intrinsics.ll
    M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
    M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
    M llvm/test/CodeGen/NVPTX/ld-generic.ll
    M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
    M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
    M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
    M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
    M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
    M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
    M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
    M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
    M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
    M llvm/test/CodeGen/NVPTX/managed.ll
    M llvm/test/CodeGen/NVPTX/match.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll
    M llvm/test/CodeGen/NVPTX/mbarrier.ll
    M llvm/test/CodeGen/NVPTX/nanosleep.ll
    M llvm/test/CodeGen/NVPTX/nofunc.ll
    M llvm/test/CodeGen/NVPTX/noreturn.ll
    M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
    M llvm/test/CodeGen/NVPTX/packed-aggr.ll
    M llvm/test/CodeGen/NVPTX/param-overalign.ll
    M llvm/test/CodeGen/NVPTX/pr126337.ll
    M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
    M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
    M llvm/test/CodeGen/NVPTX/prefetch.ll
    M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
    M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
    M llvm/test/CodeGen/NVPTX/redux-sync.ll
    M llvm/test/CodeGen/NVPTX/reg-types.ll
    M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
    M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
    M llvm/test/CodeGen/NVPTX/sext-setcc.ll
    M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
    M llvm/test/CodeGen/NVPTX/shfl-sync.ll
    M llvm/test/CodeGen/NVPTX/short-ptr.ll
    M llvm/test/CodeGen/NVPTX/simple-call.ll
    M llvm/test/CodeGen/NVPTX/st-addrspace.ll
    M llvm/test/CodeGen/NVPTX/st-generic.ll
    M llvm/test/CodeGen/NVPTX/st-param-imm.ll
    M llvm/test/CodeGen/NVPTX/st_bulk.ll
    M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
    M llvm/test/CodeGen/NVPTX/surf-tex.py
    M llvm/test/CodeGen/NVPTX/symbol-naming.ll
    M llvm/test/CodeGen/NVPTX/szext.ll
    M llvm/test/CodeGen/NVPTX/tanhf.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
    M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
    M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
    M llvm/test/CodeGen/NVPTX/unreachable.ll
    M llvm/test/CodeGen/NVPTX/vaargs.ll
    M llvm/test/CodeGen/NVPTX/variadics-backend.ll
    M llvm/test/CodeGen/NVPTX/vector-compare.ll
    M llvm/test/CodeGen/NVPTX/vector-select.ll
    M llvm/test/CodeGen/NVPTX/vote.ll
    M llvm/test/CodeGen/NVPTX/weak-global.ll
    M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
    M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
    M llvm/test/lit.cfg.py

  Log Message:
  -----------
  [lit] Refactor available `ptxas` features (#154439)

ToT `lit` currently assumes that a given `ptxas` version supports all
capabilities of prior `ptxas` releases. This approach was flexible
enough to support the removal of 32-bit address compilation from `ptxas`
in CUDA 12.1, but it struggles with the removal of Volta and prior
compilation in CUDA 13.0.

To deal with this, this PR refactors how `lit` defines the set of
features available for a given `ptxas` version. It invokes `ptxas` not
just to get its version, but also to get the list of supported SMs,
supported PTX ISA versions, and support for 32-bit compilation.

This approach should be flexible enough to deal with the changing
support matrix of `ptxas` as it goes forward. One obvious downside is
that this relies on parsing the `stdout` of `ptxas`, something that's
inherently unstable. But, IMO, this is something that we can fix as
needed.


  Commit: 8f482d52719e38360275629b836a5d3c34c4a303
      https://github.com/llvm/llvm-project/commit/8f482d52719e38360275629b836a5d3c34c4a303
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M lld/test/ELF/loongarch-call36.s
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
    M llvm/tools/sancov/sancov.cpp

  Log Message:
  -----------
  Revert "[sancov][LoongArch] Resolve pcaddu18i+jirl in evaluateBranch and teach sancov" (#155879)

Reverts llvm/llvm-project#155371

Breaks ubsan bots.


  Commit: 403986e000630d9172a8abe5402c158dda70962e
      https://github.com/llvm/llvm-project/commit/403986e000630d9172a8abe5402c158dda70962e
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h

  Log Message:
  -----------
  [AMDGPU] Common up code from AMDGPUInstPrinter::printImmediate64. NFC. (#155882)

Introduce a new helper function printLiteral64.


  Commit: 4a7205f892761bedf5208f30c8d30144c84fdd9f
      https://github.com/llvm/llvm-project/commit/4a7205f892761bedf5208f30c8d30144c84fdd9f
  Author: Romaric Jodin <rjodin at google.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M libclc/CMakeLists.txt

  Log Message:
  -----------
  libclc: CMake: include GetClangResourceDir (#155836)

`get_clang_resource_dir` is not guarantee to be there. Make sure of it
by including `GetClangResourceDir`.


  Commit: 85c7a7f3b8d9856e6d1e3c63e3a7e387367ed072
      https://github.com/llvm/llvm-project/commit/85c7a7f3b8d9856e6d1e3c63e3a7e387367ed072
  Author: Finn Plummer <mail at inbelic.dev>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/lib/MC/DXContainerRootSignature.cpp

  Log Message:
  -----------
  [DirectX] Don't byte-swap returned byte-offset (#155860)

- The returned byte offset from `rewriteOffsetToCurrentByte` should not
be byte-swapped as it will be compared and interpreted as a uint32_t in
its uses

This commit corrects build failures that hit an assert on big-endian
builds


  Commit: 30002f22b95ca084e3e2cc23734ccda24ca5502c
      https://github.com/llvm/llvm-project/commit/30002f22b95ca084e3e2cc23734ccda24ca5502c
  Author: Keith Smiley <keithbsmiley at gmail.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/test/tools/llvm-lipo/create-archive-input.test
    M llvm/tools/llvm-lipo/llvm-lipo.cpp

  Log Message:
  -----------
  [llvm-lipo] Add support for -info with archive files (#155309)

Previously trying to print the info of an archive caused a crash. Now we
correctly report the architecture of the contained object files.

Fixes https://github.com/llvm/llvm-project/issues/41655


  Commit: ffbe9cf99b72326ba703940759218cbffc360f1f
      https://github.com/llvm/llvm-project/commit/ffbe9cf99b72326ba703940759218cbffc360f1f
  Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
    M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
    M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
    A mlir/test/Dialect/SPIRV/IR/invalid.mlir

  Log Message:
  -----------
  [mlir][spirv] Propagate alignment requirements from vector to spirv (#155278)

Propagates the alignment attribute from `vector.{load,store}` to
`spirv.{load,store}`.

---------

Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>


  Commit: 5dfc4f79655d6e36088aaac5c702b5034731a754
      https://github.com/llvm/llvm-project/commit/5dfc4f79655d6e36088aaac5c702b5034731a754
  Author: Kevin Sala Penades <salapenades1 at llnl.gov>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M clang/docs/OpenMPSupport.rst

  Log Message:
  -----------
  [docs][OpenMP] Add docs section for OpenMP 6.1 implementation status (#155651)

Add section for OpenMP 6.1 (experimental) implementation status in the
documentation. OpenMP 6.1 has not been released yet.


  Commit: 37cd595c1ccb1fd84ebdfeb0d959744a4d13726c
      https://github.com/llvm/llvm-project/commit/37cd595c1ccb1fd84ebdfeb0d959744a4d13726c
  Author: Jason Molenda <jmolenda at apple.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M lldb/tools/debugserver/source/MacOSX/MachTask.mm
    M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp

  Log Message:
  -----------
  [lldb][debugserver] Upstream to debugserver changes (#155733)

Review of diffs from lldb's internal debugserver and llvm.org main found
two orphaned changes that should be upstreamed.

First is in MachTask::ExceptionThread where we want to confirm that a
mach exception messages is from the correct process before we process
it.

Second is that we want to run the arm64 register context through
thread_convert_thread_state() after thread_get_state, and before
thread_set_state, to re-sign fp/sp/lr/pc appropriately for ptrauth
(arm64e) processes.


  Commit: 73cf62b25497b594312146a11cd9790e6c6e1384
      https://github.com/llvm/llvm-project/commit/73cf62b25497b594312146a11cd9790e6c6e1384
  Author: moorabbit <moorabbit at proton.me>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.td
    M clang/lib/CodeGen/TargetBuiltins/X86.cpp
    M clang/lib/Headers/avx512cdintrin.h
    M clang/lib/Headers/avx512vlcdintrin.h
    M clang/test/CodeGen/X86/avx512cd-builtins.c
    M clang/test/CodeGen/X86/avx512vlcd-builtins.c

  Log Message:
  -----------
  [Headers][X86] Use `__builtin_elementwise_ctlz` instead of avx512cd intrinsics. (#155089)

The following avx512 intrinsics were removed:
- `__builtin_ia32_vplzcntd_128`
- `__builtin_ia32_vplzcntd_256`
- `__builtin_ia32_vplzcntd_512`
- `__builtin_ia32_vplzcntq_128`
- `__builtin_ia32_vplzcntq_256`
- `__builtin_ia32_vplzcntq_512`

Users of the removed intrinsics (e.g. `_mm512_lzcnt_epi64`,
`_mm_lzcnt_epi32`) are now relying on `__builtin_elementwise_ctlz` and
are marked as `constexpr`.

Fixes: #154279


  Commit: 8db7571179140c26f537aa329571aab3ebc58170
      https://github.com/llvm/llvm-project/commit/8db7571179140c26f537aa329571aab3ebc58170
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp

  Log Message:
  -----------
  [flang][OpenMP] Simplify getLocation in FlangOmpReportVisitor, NFC (#155871)

Use a utility function to get the construct source.


  Commit: 9472225fa6c375ad9964c465c046059dcc386793
      https://github.com/llvm/llvm-project/commit/9472225fa6c375ad9964c465c046059dcc386793
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/include/llvm/Support/KnownBits.h
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Support/KnownBits.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

  Log Message:
  -----------
  [KnownBits] Add operator<<=(unsigned) and operator>>=(unsigned). NFC (#155751)

Add operators to shift left or right and insert unknown bits.


  Commit: 2af8178035b21ab5cd80451e5324fb442a5b7aec
      https://github.com/llvm/llvm-project/commit/2af8178035b21ab5cd80451e5324fb442a5b7aec
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M mlir/lib/Query/Query.cpp

  Log Message:
  -----------
  [MLIR] Apply clang-tidy fixes for llvm-qualified-auto in Query.cpp (NFC)


  Commit: 38fd2992dc75ddee7879d0af1dae98164f9d47d3
      https://github.com/llvm/llvm-project/commit/38fd2992dc75ddee7879d0af1dae98164f9d47d3
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M .ci/cache_lit_timing_files.py
    M clang/docs/OpenMPSupport.rst
    M clang/include/clang/Basic/BuiltinsX86.td
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.cpp
    M clang/lib/CodeGen/TargetBuiltins/X86.cpp
    M clang/lib/Headers/avx512cdintrin.h
    M clang/lib/Headers/avx512vlcdintrin.h
    M clang/test/CodeGen/X86/avx512cd-builtins.c
    M clang/test/CodeGen/X86/avx512vlcd-builtins.c
    M clang/test/CodeGen/X86/mmx-builtins.c
    M clang/test/CodeGen/X86/sse-builtins.c
    M clang/test/CodeGen/X86/sse2-builtins.c
    M clang/test/CodeGen/X86/sse3-builtins.c
    M clang/test/CodeGen/X86/sse41-builtins.c
    M clang/test/CodeGen/X86/sse42-builtins.c
    M clang/test/CodeGen/X86/ssse3-builtins.c
    M clang/test/CodeGenHLSL/resources/ByteAddressBuffers-constructors.hlsl
    M clang/test/CodeGenHLSL/resources/RWBuffer-constructor.hlsl
    M clang/test/CodeGenHLSL/resources/StructuredBuffers-constructors.hlsl
    M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
    M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
    M clang/test/CodeGenHLSL/resources/resource-bindings.hlsl
    M compiler-rt/lib/asan/asan_errors.h
    M flang/include/flang/Evaluate/match.h
    M flang/lib/Semantics/check-omp-atomic.cpp
    A flang/test/Lower/OpenMP/atomic-update-reassoc-fp.f90
    M libclc/CMakeLists.txt
    M lld/test/ELF/loongarch-call36.s
    M lldb/tools/debugserver/source/MacOSX/MachTask.mm
    M lldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/include/llvm/Support/KnownBits.h
    M llvm/lib/Analysis/DXILResource.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/MC/DXContainerRootSignature.cpp
    M llvm/lib/Support/KnownBits.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    M llvm/lib/Target/DirectX/DXILResourceImplicitBinding.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-1.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-2.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-3.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-4.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-5.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-6.ll
    M llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
    M llvm/test/CodeGen/DirectX/BufferLoad-sm61.ll
    M llvm/test/CodeGen/DirectX/BufferLoad.ll
    M llvm/test/CodeGen/DirectX/BufferLoadDouble.ll
    M llvm/test/CodeGen/DirectX/BufferLoadInt64.ll
    M llvm/test/CodeGen/DirectX/BufferStore-errors.ll
    M llvm/test/CodeGen/DirectX/BufferStore-sm61.ll
    M llvm/test/CodeGen/DirectX/BufferStore.ll
    M llvm/test/CodeGen/DirectX/BufferStoreDouble.ll
    M llvm/test/CodeGen/DirectX/BufferStoreInt64.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/array-typedgep.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/arrays.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/memcpy.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/scalars.ll
    M llvm/test/CodeGen/DirectX/CBufferAccess/vectors.ll
    M llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
    M llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
    M llvm/test/CodeGen/DirectX/ContainerData/PSVResources-order.ll
    M llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
    M llvm/test/CodeGen/DirectX/CreateHandle.ll
    M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/alloca.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/ambiguous.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/buffer-O0.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/cbuffer-access.ll
    M llvm/test/CodeGen/DirectX/ForwardHandleAccesses/undominated.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/arrays.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/multiple-spaces.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/simple.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays-error.ll
    M llvm/test/CodeGen/DirectX/ImplicitBinding/unbounded-arrays.ll
    M llvm/test/CodeGen/DirectX/Metadata/cbuffer-only.ll
    M llvm/test/CodeGen/DirectX/Metadata/cbuffer_metadata.ll
    M llvm/test/CodeGen/DirectX/Metadata/resource-symbols.ll
    M llvm/test/CodeGen/DirectX/Metadata/srv_metadata.ll
    M llvm/test/CodeGen/DirectX/Metadata/uav_metadata.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoad.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoadDouble.ll
    M llvm/test/CodeGen/DirectX/RawBufferLoadInt64.ll
    M llvm/test/CodeGen/DirectX/RawBufferStore.ll
    M llvm/test/CodeGen/DirectX/RawBufferStoreDouble.ll
    M llvm/test/CodeGen/DirectX/RawBufferStoreInt64.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/load_rawbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/load_typedbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/store_rawbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceAccess/store_typedbuffer.ll
    M llvm/test/CodeGen/DirectX/ResourceGlobalElimination.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.5.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs-array-valver1.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/max-64-uavs.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/raw-and-structured-buffers.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-doubles.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-int64.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/rawbuffer-low-precision.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-0.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-alias-1.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.6.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-sm6.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/res-may-not-alias-valver1.8.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.7.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-lib-valver1.8.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/uavs-at-every-stage-vs.ll
    M llvm/test/CodeGen/DirectX/bufferUpdateCounter.ll
    M llvm/test/CodeGen/DirectX/forward_handle_on_alloca.ll
    M llvm/test/CodeGen/DirectX/resource_counter_error.ll
    M llvm/test/CodeGen/NVPTX/access-non-generic.ll
    M llvm/test/CodeGen/NVPTX/activemask.ll
    M llvm/test/CodeGen/NVPTX/addrspacecast-ptx64.ll
    M llvm/test/CodeGen/NVPTX/addrspacecast.ll
    M llvm/test/CodeGen/NVPTX/alias.ll
    M llvm/test/CodeGen/NVPTX/annotations.ll
    M llvm/test/CodeGen/NVPTX/applypriority.ll
    M llvm/test/CodeGen/NVPTX/arithmetic-fp-sm20.ll
    M llvm/test/CodeGen/NVPTX/arithmetic-int.ll
    M llvm/test/CodeGen/NVPTX/async-copy.ll
    M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm60.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
    M llvm/test/CodeGen/NVPTX/atomics-with-scope.ll
    M llvm/test/CodeGen/NVPTX/b52037.ll
    M llvm/test/CodeGen/NVPTX/barrier.ll
    M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/bmsk.ll
    M llvm/test/CodeGen/NVPTX/bswap.ll
    M llvm/test/CodeGen/NVPTX/byval-arg-vectorize.ll
    M llvm/test/CodeGen/NVPTX/byval-const-global.ll
    M llvm/test/CodeGen/NVPTX/calling-conv.ll
    M llvm/test/CodeGen/NVPTX/cluster-dim.ll
    M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol-multicast.ll
    M llvm/test/CodeGen/NVPTX/clusterlaunchcontrol.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg.ll
    M llvm/test/CodeGen/NVPTX/combine-mad.ll
    M llvm/test/CodeGen/NVPTX/combine-min-max.ll
    M llvm/test/CodeGen/NVPTX/common-linkage.ll
    M llvm/test/CodeGen/NVPTX/compare-int.ll
    M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
    M llvm/test/CodeGen/NVPTX/convert-fp.ll
    M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
    M llvm/test/CodeGen/NVPTX/convert-sm100.ll
    M llvm/test/CodeGen/NVPTX/convert-sm100a.ll
    M llvm/test/CodeGen/NVPTX/convert-sm80.ll
    M llvm/test/CodeGen/NVPTX/convert-sm89.ll
    M llvm/test/CodeGen/NVPTX/convert-sm90.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-s2g-sm100.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-1cta.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-2cta.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
    M llvm/test/CodeGen/NVPTX/cp-async-bulk.ll
    M llvm/test/CodeGen/NVPTX/discard.ll
    M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
    M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
    M llvm/test/CodeGen/NVPTX/elect.ll
    M llvm/test/CodeGen/NVPTX/f16-abs.ll
    M llvm/test/CodeGen/NVPTX/f16-ex2.ll
    M llvm/test/CodeGen/NVPTX/f16-instructions.ll
    M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/f32-ex2.ll
    M llvm/test/CodeGen/NVPTX/f32-lg2.ll
    M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/fabs-intrinsics.ll
    M llvm/test/CodeGen/NVPTX/fence-cluster.ll
    M llvm/test/CodeGen/NVPTX/fence-nocluster.ll
    M llvm/test/CodeGen/NVPTX/fence-proxy-tensormap.ll
    M llvm/test/CodeGen/NVPTX/fexp2.ll
    M llvm/test/CodeGen/NVPTX/flog2.ll
    M llvm/test/CodeGen/NVPTX/fma-disable.ll
    M llvm/test/CodeGen/NVPTX/fminimum-fmaximum.ll
    M llvm/test/CodeGen/NVPTX/fns.ll
    M llvm/test/CodeGen/NVPTX/fold-movs.ll
    M llvm/test/CodeGen/NVPTX/fp-contract-f32x2.ll
    M llvm/test/CodeGen/NVPTX/global-addrspace.ll
    M llvm/test/CodeGen/NVPTX/global-ordering.ll
    M llvm/test/CodeGen/NVPTX/griddepcontrol.ll
    M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/idioms.ll
    M llvm/test/CodeGen/NVPTX/indirect_byval.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test2.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
    M llvm/test/CodeGen/NVPTX/intrinsic-old.ll
    M llvm/test/CodeGen/NVPTX/intrinsics-sm90.ll
    M llvm/test/CodeGen/NVPTX/intrinsics.ll
    M llvm/test/CodeGen/NVPTX/kernel-param-align.ll
    M llvm/test/CodeGen/NVPTX/ld-addrspace.ll
    M llvm/test/CodeGen/NVPTX/ld-generic.ll
    M llvm/test/CodeGen/NVPTX/ld-st-addrrspace.py
    M llvm/test/CodeGen/NVPTX/ldg-invariant-256.ll
    M llvm/test/CodeGen/NVPTX/load-store-256-addressing-invariant.ll
    M llvm/test/CodeGen/NVPTX/load-store-256-addressing.ll
    M llvm/test/CodeGen/NVPTX/load-store-scalars.ll
    M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
    M llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
    M llvm/test/CodeGen/NVPTX/load-store-vectors-256.ll
    M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
    M llvm/test/CodeGen/NVPTX/managed.ll
    M llvm/test/CodeGen/NVPTX/match.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm53-ptx42.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70-autoupgrade.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm80-ptx70.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72-autoupgrade.ll
    M llvm/test/CodeGen/NVPTX/math-intrins-sm86-ptx72.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll
    M llvm/test/CodeGen/NVPTX/mbarrier.ll
    M llvm/test/CodeGen/NVPTX/nanosleep.ll
    M llvm/test/CodeGen/NVPTX/nofunc.ll
    M llvm/test/CodeGen/NVPTX/noreturn.ll
    M llvm/test/CodeGen/NVPTX/nvcl-param-align.ll
    M llvm/test/CodeGen/NVPTX/packed-aggr.ll
    M llvm/test/CodeGen/NVPTX/param-overalign.ll
    M llvm/test/CodeGen/NVPTX/pr126337.ll
    M llvm/test/CodeGen/NVPTX/pr13291-i1-store.ll
    M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
    M llvm/test/CodeGen/NVPTX/prefetch.ll
    M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
    M llvm/test/CodeGen/NVPTX/redux-sync-f32.ll
    M llvm/test/CodeGen/NVPTX/redux-sync.ll
    M llvm/test/CodeGen/NVPTX/reg-types.ll
    M llvm/test/CodeGen/NVPTX/setmaxnreg-sm100a.ll
    M llvm/test/CodeGen/NVPTX/setmaxnreg.ll
    M llvm/test/CodeGen/NVPTX/sext-setcc.ll
    M llvm/test/CodeGen/NVPTX/shfl-sync-p.ll
    M llvm/test/CodeGen/NVPTX/shfl-sync.ll
    M llvm/test/CodeGen/NVPTX/short-ptr.ll
    M llvm/test/CodeGen/NVPTX/simple-call.ll
    M llvm/test/CodeGen/NVPTX/st-addrspace.ll
    M llvm/test/CodeGen/NVPTX/st-generic.ll
    M llvm/test/CodeGen/NVPTX/st-param-imm.ll
    M llvm/test/CodeGen/NVPTX/st_bulk.ll
    M llvm/test/CodeGen/NVPTX/stacksaverestore.ll
    M llvm/test/CodeGen/NVPTX/surf-tex.py
    M llvm/test/CodeGen/NVPTX/symbol-naming.ll
    M llvm/test/CodeGen/NVPTX/szext.ll
    M llvm/test/CodeGen/NVPTX/tanhf.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-alloc.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-cp.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-fence.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-ld.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-shift.ll
    M llvm/test/CodeGen/NVPTX/tcgen05-st.ll
    M llvm/test/CodeGen/NVPTX/trunc-setcc.ll
    M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
    M llvm/test/CodeGen/NVPTX/unreachable.ll
    M llvm/test/CodeGen/NVPTX/vaargs.ll
    M llvm/test/CodeGen/NVPTX/variadics-backend.ll
    M llvm/test/CodeGen/NVPTX/vector-compare.ll
    M llvm/test/CodeGen/NVPTX/vector-select.ll
    M llvm/test/CodeGen/NVPTX/vote.ll
    M llvm/test/CodeGen/NVPTX/weak-global.ll
    M llvm/test/CodeGen/NVPTX/wgmma-sm90a-fence.ll
    M llvm/test/CodeGen/NVPTX/wmma-ptx60-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx61-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm72.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx63-sm75.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx64-sm70.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx65-sm75.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx71-sm80.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
    M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
    M llvm/test/CodeGen/SPIRV/ExecutionMode_Fragment.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoad.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/MixedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/Packed.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/SignedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/StructuredBuffer.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferLoad.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/UnsignedBufferLoadStore.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
    M llvm/test/CodeGen/SPIRV/hlsl-resources/spirv.layout.type.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast-2.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-addrspacecast.ll
    M llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-1.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access-constant-index-2.ll
    M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
    M llvm/test/CodeGen/SPIRV/spirv-explicit-layout.ll
    M llvm/test/lit.cfg.py
    M llvm/test/tools/llvm-lipo/create-archive-input.test
    M llvm/tools/llvm-lipo/llvm-lipo.cpp
    M llvm/tools/sancov/sancov.cpp
    M llvm/unittests/Target/DirectX/ResourceBindingAnalysisTests.cpp
    M llvm/unittests/Target/DirectX/UniqueResourceFromUseTests.cpp
    M llvm/utils/TableGen/DecoderEmitter.cpp
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
    M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
    M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
    M mlir/lib/Query/Query.cpp
    M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
    A mlir/test/Dialect/SPIRV/IR/invalid.mlir
    M mlir/test/Dialect/Vector/vector-warp-distribute.mlir

  Log Message:
  -----------
  Merge branch 'main' into users/kparzysz/b02-no-block-construct


Compare: https://github.com/llvm/llvm-project/compare/1084211472f0...38fd2992dc75

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