[all-commits] [llvm/llvm-project] 7f9d72: [AArch64] Lower FPR register moves to zero cycle N...

[Tomer Shafir via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7f9d72a8101e01c1964376611809b03d5bd3ac11
      https://github.com/llvm/llvm-project/commit/7f9d72a8101e01c1964376611809b03d5bd3ac11
  Author: Tomer Shafir <tomer.shafir8 at gmail.com>
  Date:   2025-08-28 (Thu, 28 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64Features.td
    M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
    M llvm/lib/Target/AArch64/AArch64Processors.td
    M llvm/test/CodeGen/AArch64/arm64-zero-cycle-regmov-fpr.ll

  Log Message:
  -----------
  [AArch64] Lower FPR register moves to zero cycle NEON (#153158)

[AArch64] Lower FPR register moves to zero cycle NEON
    
Lower FPR64, FPR32, FPR16, FPR8 register moves into NEON moves if the
target supports zero cycle move for NEON but not for the narrower
classes.
    
Adds a subtarget feature called FeatureZCRegMoveFPR128 that enables to
query wether the target supports zero cycle reg move for FPR128 NEON
registers, and embeds it into the appropriate processors.
    
Includes lowering test cases, and specializes check prefixes.



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