[all-commits] [llvm/llvm-project] d66b53: [clang][PAC] Fix builtins that claim address discr...
Stanislav Mekhanoshin via All-commits
all-commits at lists.llvm.org
Wed Aug 27 00:34:30 PDT 2025
Branch: refs/heads/users/rampitec/08-25-_amdgpu_more_radical_feature_initialization_refactoring
Home: https://github.com/llvm/llvm-project
Commit: d66b53738a29fb3a0551167efcb8d35320a539b7
https://github.com/llvm/llvm-project/commit/d66b53738a29fb3a0551167efcb8d35320a539b7
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/SemaCXX/ptrauth-triviality.cpp
A clang/test/SemaCXX/ptrauth-type-traits.cpp
M clang/test/SemaCXX/trivially-relocatable-ptrauth.cpp
Log Message:
-----------
[clang][PAC] Fix builtins that claim address discriminated types are bitwise compatible (#154490)
A number of builtins report some variation of "this type is compatibile
with some bitwise equivalent operation", but this is not true for
address discriminated values. We had address a number of cases, but not
all of them. This PR corrects the remaining builtins.
Fixes #154394
Commit: 2263210d9e2b56bf910bde57a2bfc013450e131a
https://github.com/llvm/llvm-project/commit/2263210d9e2b56bf910bde57a2bfc013450e131a
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/test/Dialect/OpenACC/ops.mlir
Log Message:
-----------
[mlir][acc] Add destroy region to reduction recipes (#155480)
Reduction recipes capture how a private copy is created. In some
languages, like C++ class variables with destructors - that private copy
also must be properly destroyed. Thus update the reduction recipe to
contain a `destroy` region similarly to the private recipes.
Commit: 511210db434ee67c4ae3242858af36c7492af236
https://github.com/llvm/llvm-project/commit/511210db434ee67c4ae3242858af36c7492af236
Author: Vadim Marchenko <jakosvadim at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/globals.ll
Log Message:
-----------
[hwasan] Add hwasan-static-linking option (#154529)
Discarding the `.note.hwasan.globals` section in ldscript causes a
linker error, since `hwasan_globals` refers to the discarded section.
The issue comes from `hwasan.dummy.global` being associated via metadata
with `.note.hwasan.globals`.
Add a new `-hwasan-static-linking` option to skip inserting
`.note.hwasan.globals` for static binaries, as it is only needed for
instrumenting globals from dynamic libraries. In static binaries, the
global variables section can be accessed directly via the
`__start_hwasan_globals` and `__stop_hwasan_globals` symbols inserted by
the linker.
Commit: 8b544f3639bb51ebccdd212e2acc1847726d7dca
https://github.com/llvm/llvm-project/commit/8b544f3639bb51ebccdd212e2acc1847726d7dca
Author: Alex Langford <alangford at apple.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
[lldb] Do not use LC_FUNCTION_STARTS data to determine symbol size as symbols are created (#155282)
Note: This is a resubmission of #106791. I had to revert this a year ago
for a failing test that I could not understand. I have time now to try
and get this in again.
Summary:
This improves the performance of ObjectFileMacho::ParseSymtab by
removing eager and expensive work in favor of doing it later in a
less-expensive fashion.
Experiment:
My goal was to understand LLDB's startup time.
First, I produced a Debug build of LLDB (no dSYM) and a
Release+NoAsserts build of LLDB. The Release build debugged the Debug
build as it debugged a small C++ program. I found that
ObjectFileMachO::ParseSymtab accounted for somewhere between 1.2 and 1.3
seconds consistently. After applying this change, I consistently
measured a reduction of approximately 100ms, putting the time closer to
1.1s and 1.2s on average.
Background:
ObjectFileMachO::ParseSymtab will incrementally create symbols by
parsing nlist entries from the symtab section of a MachO binary. As it
does this, it eagerly tries to determine the size of symbols (e.g. how
long a function is) using LC_FUNCTION_STARTS data (or eh_frame if
LC_FUNCTION_STARTS is unavailable). Concretely, this is done by
performing a binary search on the function starts array and calculating
the distance to the next function or the end of the section (whichever
is smaller).
However, this work is unnecessary for 2 reasons:
1. If you have debug symbol entries (i.e. STABs), the size of a function
is usually stored right after the function's entry. Performing this work
right before parsing the next entry is unnecessary work.
2. Calculating symbol sizes for symbols of size 0 is already performed
in `Symtab::InitAddressIndexes` after all the symbols are added to the
Symtab. It also does this more efficiently by walking over a list of
symbols sorted by address, so the work to calculate the size per symbol
is constant instead of O(log n).
Commit: acaa925cb22b8559c491fff069b4b885cb4433f6
https://github.com/llvm/llvm-project/commit/acaa925cb22b8559c491fff069b4b885cb4433f6
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA][RISCV] Recognize interleaving stores that could lower to strided segmented stores (#154647)
This is a sibling patch to #151612: passing gap masks to the renewal TLI
hooks for lowering interleaved stores that use shufflevector to do the
interleaving.
Commit: be2f0205b697ce299f08aff024a09ce24498ed8c
https://github.com/llvm/llvm-project/commit/be2f0205b697ce299f08aff024a09ce24498ed8c
Author: Jeremy Kun <jkun at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M mlir/lib/Dialect/SparseTensor/IR/Detail/DimLvlMapParser.cpp
M mlir/lib/Transforms/InlinerPass.cpp
Log Message:
-----------
NFC: remove some instances of deprecated capture (#154884)
```
warning: implicit capture of 'this' with a capture default of '=' is deprecated [-Wdeprecated-this-capture]
```
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: ffd0f5fd217e66b6843bc420f7c37042e562810d
https://github.com/llvm/llvm-project/commit/ffd0f5fd217e66b6843bc420f7c37042e562810d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove unneeded ILV::LoopScalarPreHeader (NFC).
Follow-up suggested in https://github.com/llvm/llvm-project/pull/153643.
Remove some more global state by directly returning the scalar
preheader from createScalarPreheader.
Commit: d42f5eb5e73b8ae683da042ad16dc6047bc18348
https://github.com/llvm/llvm-project/commit/d42f5eb5e73b8ae683da042ad16dc6047bc18348
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/switch-cases-to-branch-and.ll
Log Message:
-----------
[AArch64] Add another switch clustering test with power-of-2 constants.
Adds more test coverage for
https://github.com/llvm/llvm-project/pull/139736.
Commit: 2c920a11e3af22f4b999020b084ce677da71888f
https://github.com/llvm/llvm-project/commit/2c920a11e3af22f4b999020b084ce677da71888f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/AMDGPU/wmma-f8f6f4.ll
Log Message:
-----------
[AMDGPU] wmma_scale* IR verification (#155493)
Commit: 0a8acd2eb2aff0edd610fc3ec14b32bee446656f
https://github.com/llvm/llvm-project/commit/0a8acd2eb2aff0edd610fc3ec14b32bee446656f
Author: Miguel Saldivar <miguel.saldivar at hpe.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/AMDGPU/pr155452.ll
Log Message:
-----------
[DAG] ComputeNumSignBits - ISD::EXTRACT_ELEMENT needs to return at least 1 (#155455)
When going through the ISD::EXTRACT_ELEMENT case, `KnownSign - rIndex *
BitWidth`
could produce a negative. When a negative is produced, the lower bound
of the `std::clamp` is returned. Change that lower bound to one to avoid
potential underflows, because the expectation is that
`ComputeNumSignBits`
should always return at least 1.
Fixes #155452.
Commit: 6bccd967b117176192b821c178a55ea31192b45a
https://github.com/llvm/llvm-project/commit/6bccd967b117176192b821c178a55ea31192b45a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
Log Message:
-----------
[AMDGPU] Do not assert on non-zero COMPUTE_PGM_RSRC3 on gfx1250. NFCI (#155498)
COMPUTE_PGM_RSRC3 does exist on gfx1250, we are just not using it yet.
Commit: a997d45af91ad7b812fce906888f2428ce05455d
https://github.com/llvm/llvm-project/commit/a997d45af91ad7b812fce906888f2428ce05455d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M compiler-rt/lib/asan/tests/asan_test.cpp
Log Message:
-----------
[NFC][Asan] Remove volatile from test
After #155447.
It's not needed, but does not compile on PowerPC.
Commit: 7624197dacfde71d21e3c88c308696ebb6f49f94
https://github.com/llvm/llvm-project/commit/7624197dacfde71d21e3c88c308696ebb6f49f94
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/coverage-missing.cpp
M compiler-rt/test/asan/TestCases/Linux/local_alias.cpp
M compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp
M compiler-rt/test/asan/TestCases/Linux/odr-vtable.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_c_test.c
M compiler-rt/test/asan/TestCases/Linux/preinit_test.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage-module-unloaded.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage-reset.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage.cpp
M compiler-rt/test/asan/TestCases/Posix/interception-in-shared-lib-test.cpp
M compiler-rt/test/asan/TestCases/suppressions-library.cpp
M compiler-rt/test/cfi/cross-dso-diagnostic.cpp
M compiler-rt/test/cfi/cross-dso/icall/diag.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall-from-dso.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall.cpp
M compiler-rt/test/cfi/cross-dso/simple-fail.cpp
M compiler-rt/test/cfi/cross-dso/simple-pass.cpp
M compiler-rt/test/cfi/target_uninstrumented.cpp
M compiler-rt/test/fuzzer/coverage.test
M compiler-rt/test/fuzzer/dso.test
M compiler-rt/test/fuzzer/full-coverage.test
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/tsan/on_initialize_finalize_hooks.cpp
M compiler-rt/test/ubsan/TestCases/TypeCheck/Function/function.cpp
M compiler-rt/test/ubsan/TestCases/TypeCheck/vptr-non-unique-typeinfo.cpp
Log Message:
-----------
Reapply "[compiler-rt] Remove %T from shared object substitutions (#155302)"
This reverts commit 1d3c302171692293f74f92236b446b9240774d4d.
There were three test failures:
odr-violation.cpp - Attempted to fix by keeping everything in the same
folder.
interception-in-shared-lib-test.cpp - Tried folding comments to preserve
line numberings. Almost seems like a debug info issue on PPC.
odr_c_test.c - Attempted to fix by keeping everything in the same
folder.
Commit: aadc708e78568f1ec5713dd4ba768e77044b651d
https://github.com/llvm/llvm-project/commit/aadc708e78568f1ec5713dd4ba768e77044b651d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
M lldb/test/Shell/Symtab/symtab-wasm.test
Log Message:
-----------
[lldb] Corretly parse Wasm segments (#154727)
My original implementation for parsing Wasm segments was wrong in two
related ways. I had a bug in calculating the file vm address and I
didn't fully understand the difference between active and passive
segments and how that impacted their file vm address.
With this PR, we now support parsing init expressions for active
segments, rather than just skipping over them. This is necessary to
determine where they get loaded.
Similar to llvm-objdump, we currently only support simple opcodes (i.e.
constants). We also currently do not support active segments that use a
non-zero memory index. However this covers all segments for a
non-trivial Swift binary compiled to Wasm.
Commit: f80c05cc7e4bf4ea906afcab0077db714ae9e76c
https://github.com/llvm/llvm-project/commit/f80c05cc7e4bf4ea906afcab0077db714ae9e76c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M flang/lib/Lower/Runtime.cpp
A flang/test/Lower/OpenACC/acc-terminator.f90
Log Message:
-----------
[flang][openacc] Only generate acc.terminator in compute construct (#155504)
When the end of a block is inside a data region (not a compute region),
generating an `acc.terminator` will lead to a missing terminator when
translating to LLVM.
Only generate acc.terminator instead of fir.unreachable when nested in
acc compute region.
Commit: 79554783e60e86e21c41b67f436f179f0fd134d0
https://github.com/llvm/llvm-project/commit/79554783e60e86e21c41b67f436f179f0fd134d0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRTypes.cpp
Log Message:
-----------
[MLIR] Apply clang-tidy fixes for performance-unnecessary-value-param in IRTypes.cpp (NFC)
Commit: 7d26150c2a1ce481d0dad25460b4cadcd8945af9
https://github.com/llvm/llvm-project/commit/7d26150c2a1ce481d0dad25460b4cadcd8945af9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
Revert "[AArch64] AArch64TargetLowering::computeKnownBitsForTargetNode - add support for AArch64ISD::MOV/MVN constants" (#155503)
Reverts llvm/llvm-project#154039, as it breaks bots.
Commit: a67257bbfb5bce5a21f21d7e78049cfcbb283e33
https://github.com/llvm/llvm-project/commit/a67257bbfb5bce5a21f21d7e78049cfcbb283e33
Author: John Harrison <harjohn at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M lldb/include/lldb/Protocol/MCP/Protocol.h
M lldb/include/lldb/Protocol/MCP/Resource.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Tool.h
M lldb/source/Plugins/Protocol/MCP/Resource.cpp
M lldb/source/Plugins/Protocol/MCP/Resource.h
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
M lldb/source/Plugins/Protocol/MCP/Tool.h
M lldb/source/Protocol/MCP/Protocol.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Protocol/ProtocolMCPTest.cpp
A lldb/unittests/Protocol/ProtocolMCPTestUtilities.h
Log Message:
-----------
[lldb] Adding structured types for existing MCP calls. (#155460)
This adds or renames existing types to match the names of the types on
https://modelcontextprotocol.io/specification/2025-06-18/schema for the
existing calls.
The new types are used in the unit tests and server implementation to
remove the need for crafting various `llvm::json::Object` values by
hand.
Commit: e42333423948605cc25230a22277b92364d1d4d6
https://github.com/llvm/llvm-project/commit/e42333423948605cc25230a22277b92364d1d4d6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude new LoopVectorize Test (#155502)
Commit: 4b84223aad4fb5f277aa524b6ff518f4e1cd0df7
https://github.com/llvm/llvm-project/commit/4b84223aad4fb5f277aa524b6ff518f4e1cd0df7
Author: Rolf Morel <rolf.morel at intel.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.h
M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.td
A mlir/include/mlir/Target/LLVMIR/Transforms/TargetUtils.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Target/LLVMIR/Transforms/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Transforms/TargetToDataLayout.cpp
A mlir/lib/Target/LLVMIR/Transforms/TargetToTargetFeatures.cpp
A mlir/lib/Target/LLVMIR/Transforms/TargetUtils.cpp
R mlir/test/Dialect/LLVMIR/target-to-data-layout-invalid.mlir
R mlir/test/Dialect/LLVMIR/target-to-data-layout-no-init.mlir
R mlir/test/Dialect/LLVMIR/target-to-data-layout.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-and-target-features.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-invalid.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-no-init.mlir
A mlir/test/Target/LLVMIR/target-to-target-features-dlti-query.mlir
Log Message:
-----------
[MLIR][LLVMIR][DLTI] Pass to update #llvm.target's features per relevant backend (#154938)
Modifies `#llvm.target<..., features = $FEATURES>` so that `$FEATURES`
is now an `#llvm.target_features<[...]>` attribute (rather than a
`StringAttr`). This enables the attribute to respond to DLTI queries for
the different target features.
The pass updates the `$FEATURES` attribute of the target attr at name
`llvm.target` in accordance with the (Sub)Target's features that the
relevant LLVM backend knows about.
---
DEMO:
```mlir
module attributes {llvm.target = #llvm.target<triple = "x86_64-unknown-linux",
chip = "skylake"> } {
}
```
by way of `-llvm-target-to-target-features` turns into:
```mlir
module attributes {llvm.target = #llvm.target<triple = "x86_64-unknown-linux",
chip = "skylake",
features = <["+64bit", "+64bit-mode", "+adx", "+aes", "+allow-light-256-bit", "+avx", "+avx2", "+bmi", "+bmi2", "+clflushopt", "+cmov", "+crc32", "+cx16", "+cx8", "+ermsb", "+f16c", "+false-deps-popcnt", "+fast-15bytenop", "+fast-gather", "+fast-scalar-fsqrt", "+fast-shld-rotate", "+fast-variable-crosslane-shuffle", "+fast-variable-perlane-shuffle", "+fast-vector-fsqrt", "+fma", "+fsgsbase", "+fxsr", "+idivq-to-divl", "+invpcid", "+lzcnt", "+macrofusion", "+mmx", "+movbe", "+no-bypass-delay-blend", "+no-bypass-delay-mov", "+no-bypass-delay-shuffle", "+nopl", "+pclmul", "+popcnt", "+prfchw", "+rdrnd", "+rdseed", "+sahf", "+slow-3ops-lea", "+sse", "+sse2", "+sse3", "+sse4.1", "+sse4.2", "+ssse3", "+vzeroupper", "+x87", "+xsave", "+xsavec", "+xsaveopt", "+xsaves"]>>} {
}
```
Commit: 4b6a4aa5228a45c3ab2add631f9dd49777b5bf24
https://github.com/llvm/llvm-project/commit/4b6a4aa5228a45c3ab2add631f9dd49777b5bf24
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Lower/force-temp.f90
Log Message:
-----------
[flang] Consolidate copy-in/copy-out determination in evaluate framework (#151408)
New implementation of `MayNeedCopy()` is used to consolidate
copy-in/copy-out checks.
`IsAssumedShape()` and `IsAssumedRank()` were simplified and are both
now in `Fortran::semantics` workspace.
`preparePresentUserCallActualArgument()` in lowering was modified to use
`MayNeedCopyInOut()`
Fixes https://github.com/llvm/llvm-project/issues/138471
Commit: 5313d6895cd1153109f35cfdb60fbb6348f68cb9
https://github.com/llvm/llvm-project/commit/5313d6895cd1153109f35cfdb60fbb6348f68cb9
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Fix clang module build by declaring new textual header (#155510)
Add `clang/Basic/ABIVersions.def` introduced in #151995 to textual
header
to fix clang module build.
Commit: 316004764fe39fd1a273ebec050c749e2176b098
https://github.com/llvm/llvm-project/commit/316004764fe39fd1a273ebec050c749e2176b098
Author: PiJoules <6019989+PiJoules at users.noreply.github.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
Log Message:
-----------
[fuzzer][Fuchsia] Forward fix for undefined StartRssThread (#155514)
The declaration was static when it shouldn't be since it can be defined
in FuzzerUtilFuchsia.cpp
Commit: 90670b5ca890ebe1ee3397be6b82a49883dd4406
https://github.com/llvm/llvm-project/commit/90670b5ca890ebe1ee3397be6b82a49883dd4406
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
A llvm/include/llvm/Support/raw_ostream_proxy.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/raw_ostream_proxy.cpp
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/raw_ostream_proxy_test.cpp
Log Message:
-----------
Support: Add proxies for raw_ostream and raw_pwrite_stream (#113362)
Add proxies classes for `raw_ostream` and `raw_pwrite_stream` called
`raw_ostream_proxy` and `raw_pwrite_stream_proxy`. Add adaptor classes,
`raw_ostream_proxy_adaptor<>` and `raw_pwrite_stream_proxy_adaptor<>`,
to allow subclasses to use a different parent class than `raw_ostream`
or `raw_pwrite_stream`.
The adaptors are used by a future patch to help a subclass of
`llvm::vfs::OutputFile`, an abstract subclass of `raw_pwrite_stream`, to
proxy a `raw_fd_ostream`.
Patched by dexonsmith.
Commit: defbd5b60c6c80431cc3fc2a53b5838bb633dea0
https://github.com/llvm/llvm-project/commit/defbd5b60c6c80431cc3fc2a53b5838bb633dea0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Log Message:
-----------
[gn build] Port 90670b5ca890
Commit: b6a0802deacb977b806fc8b21f7d3af219546456
https://github.com/llvm/llvm-project/commit/b6a0802deacb977b806fc8b21f7d3af219546456
Author: Michael Jones <michaelrj at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M libc/src/sys/time/linux/utimes.cpp
M libc/src/unistd/linux/setsid.cpp
Log Message:
-----------
[libc][NFC] Clean up utimes and setsid (#155495)
Simplify utims a bit and add proper error handling to setsid as
described in the standard
Commit: 8361d7e1248f1df0b15621cc98e095e4866fc6eb
https://github.com/llvm/llvm-project/commit/8361d7e1248f1df0b15621cc98e095e4866fc6eb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
Log Message:
-----------
[NFC][MC][XCore] Eliminate forward decls by rearranging functions (#155456)
Commit: 36ca6748bc9150f8c56df6ba15deb118ff700e4a
https://github.com/llvm/llvm-project/commit/36ca6748bc9150f8c56df6ba15deb118ff700e4a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/coverage-missing.cpp
M compiler-rt/test/asan/TestCases/Linux/local_alias.cpp
M compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp
M compiler-rt/test/asan/TestCases/Linux/odr-vtable.cpp
M compiler-rt/test/asan/TestCases/Linux/odr_c_test.c
M compiler-rt/test/asan/TestCases/Linux/preinit_test.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage-module-unloaded.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage-reset.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage.cpp
M compiler-rt/test/asan/TestCases/Posix/interception-in-shared-lib-test.cpp
M compiler-rt/test/asan/TestCases/suppressions-library.cpp
M compiler-rt/test/cfi/cross-dso-diagnostic.cpp
M compiler-rt/test/cfi/cross-dso/icall/diag.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall-from-dso.cpp
M compiler-rt/test/cfi/cross-dso/icall/icall.cpp
M compiler-rt/test/cfi/cross-dso/simple-fail.cpp
M compiler-rt/test/cfi/cross-dso/simple-pass.cpp
M compiler-rt/test/cfi/target_uninstrumented.cpp
M compiler-rt/test/fuzzer/coverage.test
M compiler-rt/test/fuzzer/dso.test
M compiler-rt/test/fuzzer/full-coverage.test
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/tsan/on_initialize_finalize_hooks.cpp
M compiler-rt/test/ubsan/TestCases/TypeCheck/Function/function.cpp
M compiler-rt/test/ubsan/TestCases/TypeCheck/vptr-non-unique-typeinfo.cpp
Log Message:
-----------
Revert "Reapply "[compiler-rt] Remove %T from shared object substitutions (#155302)""
This reverts commit 7624197dacfde71d21e3c88c308696ebb6f49f94.
This is causing more buildbot failures that probably need some offline
investigation:
1. https://lab.llvm.org/buildbot/#/builders/186/builds/11923
Commit: 329e706f8a0ece74d1d1a5918116a82ee2d89150
https://github.com/llvm/llvm-project/commit/329e706f8a0ece74d1d1a5918116a82ee2d89150
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
Log Message:
-----------
[NFC][WPD] Pass the module analysis manager instead of lambdas (#155338)
Easier to evolve - if we need more analyses, it becomes clumsy to keep passing around lambdas.
Commit: 71ce07924887b991bbf7d260a4c03d5f386e4df4
https://github.com/llvm/llvm-project/commit/71ce07924887b991bbf7d260a4c03d5f386e4df4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
Log Message:
-----------
Reapply "[AMDGPU] gfx1250 trans instructions bf16 codegen tests update. NFC (#155310)" (#155515)
Commit: 5d54d348f2387737196d8a6ab234cba23a156641
https://github.com/llvm/llvm-project/commit/5d54d348f2387737196d8a6ab234cba23a156641
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/multi-vtable.cpp
Log Message:
-----------
[CIR] Add support for initializing classes with multiple vtables (#155275)
This adds support for initializing the vptr members in a class that
requires multiple vtables because of multiple inheritence. This still
does not handle virtual bases.
Commit: 3ef16900095d205270f9415f8b5b817599fcd15e
https://github.com/llvm/llvm-project/commit/3ef16900095d205270f9415f8b5b817599fcd15e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M .ci/compute_projects.py
Log Message:
-----------
[CI] Strip strings from filenames in compute_projects.py (#155519)
This can otherwise mess up some of the path detection logic,
particularly around ensuring the premerge checks are run when the
workflow YAML file is changed.
Commit: dfd38336743ab94c8354826261d8e908e1396719
https://github.com/llvm/llvm-project/commit/dfd38336743ab94c8354826261d8e908e1396719
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/pr154103.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
Log Message:
-----------
[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI. (#149955)
This patch implements the `getAddressComputationCost()` in RISCV TTI
which
make the gather/scatter with address calculation more expansive that
stride cost.
Note that the only user of `getAddressComputationCost()` with vector
type is in `VPWidenMemoryRecipe::computeCost()`. So this patch make some
LV tests changes.
I've checked the tests changes in LV and seems those changes can be
divided into two groups.
* gather/scatter with uniform vector ptr, seems can be optimized to
masked.load.
* can optimize to stride load/store.
Commit: 101ad14f535461236ba0a656554d884d6d0b25a0
https://github.com/llvm/llvm-project/commit/101ad14f535461236ba0a656554d884d6d0b25a0
Author: Piyush Jaiswal <piyushjais98 at gmail.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
Log Message:
-----------
[lldb-dap] Improving lldbdap_testcase.py error diagnosability (#155352)
Improved response Message handling in lldbdap_testcase.py to handle
various formats. Allows for more descriptive error messaging (Provides
useful info even when error details are malformed)
---------
Co-authored-by: Piyush Jaiswal <piyushjais at meta.com>
Commit: a088dbd5b6666d6a35975776df19bca9166dc708
https://github.com/llvm/llvm-project/commit/a088dbd5b6666d6a35975776df19bca9166dc708
Author: Lang Hames <lhames at gmail.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M orc-rt/unittests/bit-test.cpp
M orc-rt/unittests/span-test.cpp
Log Message:
-----------
[orc-rt] Fix comment typos in unit tests. NFC.
Commit: e3823a625aa55ea93dbe50d76a845aed5ac66e31
https://github.com/llvm/llvm-project/commit/e3823a625aa55ea93dbe50d76a845aed5ac66e31
Author: Sam Clegg <sbc at chromium.org>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M lld/test/wasm/libsearch.s
M lld/wasm/Driver.cpp
Log Message:
-----------
[lld][WebAssembly] -r: force -Bstatic (#108264)
This is a port of a recent ELF linker change: 8cc6a2469.
Commit: 7fff93db50bad40548fa08895844629f1d40e715
https://github.com/llvm/llvm-project/commit/7fff93db50bad40548fa08895844629f1d40e715
Author: Shoreshen <372660931 at qq.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
A llvm/test/CodeGen/AMDGPU/gfx10plus-wavefront-sgpr-count.ll
Log Message:
-----------
[AMDGPU] Set GRANULATED_WAVEFRONT_SGPR_COUNT of compute_pgm_rsrc1 to 0 for gfx10+ (#154666)
According to `llvm-project/llvm/docs/AMDGPUUsage.rst::L5212` the
`GRANULATED_WAVEFRONT_SGPR_COUNT`, which is `compute_pgm_rsrc1[6:9]` has
to be 0 for gfx10+ arch
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: 69db050839d1bdc47d750287689c46b5417d235e
https://github.com/llvm/llvm-project/commit/69db050839d1bdc47d750287689c46b5417d235e
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/pr154103.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
Log Message:
-----------
Revert "[RISCV][TTI] Implement getAddressComputationCost() in RISCV TTI." (#155535)
Reverts llvm/llvm-project#149955
Commit: 143f5e19650f547b8859a2ab8919d4f00781f691
https://github.com/llvm/llvm-project/commit/143f5e19650f547b8859a2ab8919d4f00781f691
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
Reapply "[CI] Save sccache logs (#155444)" (#155520)
This reverts commit b90f4ff3020c6fe018ec22b22a7faa5541ed5372.
Relands the change after making the relevant fixes (not missing the
`artifacts` directory).
Commit: 9091108c668f6d4867a113ae88aea1ba6eb0cfaa
https://github.com/llvm/llvm-project/commit/9091108c668f6d4867a113ae88aea1ba6eb0cfaa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
Log Message:
-----------
AMDGPU: Fold mov imm to copy to av_32 class (#155428)
Previously we had special case folding into copies to AGPR_32,
ignoring AV_32. Try folding into the pseudos.
Not sure why the true16 case regressed.
Commit: fe78a9a75d726e253b45923f5d4000e0c17e15da
https://github.com/llvm/llvm-project/commit/fe78a9a75d726e253b45923f5d4000e0c17e15da
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M clang-tools-extra/clangd/ScanningProjectModules.cpp
Log Message:
-----------
[NFC] [clangd] [C++20 Modules] Add a warning if clangd detected multiple
source declares the same module
Now clangd assumes no duplicated module declared by different source
file in a sinlge project. But in practice, it may not be the case.
Although we can't fix it now, emitting a warning is helpful for users to
understand what's going on.
Commit: 5d111a20c566d16f80faaa8eed1a382aacd045de
https://github.com/llvm/llvm-project/commit/5d111a20c566d16f80faaa8eed1a382aacd045de
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/freeze.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
Log Message:
-----------
[DAGCombiner] Avoid double deletion when replacing multiple frozen/unfrozen uses (#155427)
Closes https://github.com/llvm/llvm-project/issues/155345.
In the original case, we have one frozen use and two unfrozen uses:
```
t73: i8 = select t81, Constant:i8<0>, t18
t75: i8 = select t10, t18, t73
t59: i8 = freeze t18 (combining)
t80: i8 = freeze t59 (another user of t59)
```
In `DAGCombiner::visitFREEZE`, we replace all uses of `t18` with `t59`.
After updating the uses, `t59: i8 = freeze t18` will be updated to `t59:
i8 = freeze t59` (`AddModifiedNodeToCSEMaps`) and CSEed into `t80: i8 =
freeze t59` (`ReplaceAllUsesWith`). As the previous call to
`AddModifiedNodeToCSEMaps` already removed `t59` from the CSE map,
`ReplaceAllUsesWith` cannot remove `t59` again.
For clarity, see the following call graph:
```
ReplaceAllUsesOfValueWith(t18, t59)
ReplaceAllUsesWith(t18, t59)
RemoveNodeFromCSEMaps(t73)
update t73
AddModifiedNodeToCSEMaps(t73)
RemoveNodeFromCSEMaps(t75)
update t75
AddModifiedNodeToCSEMaps(t75)
RemoveNodeFromCSEMaps(t59) <- first delection
update t59
AddModifiedNodeToCSEMaps(t59)
ReplaceAllUsesWith(t59, t80)
RemoveNodeFromCSEMaps(t59) <- second delection
Boom!
```
This patch unfreezes all the uses first to avoid triggering CSE when
introducing cycles.
Commit: f44eaf47dc1357959d14cbf5f278c82e554689b2
https://github.com/llvm/llvm-project/commit/f44eaf47dc1357959d14cbf5f278c82e554689b2
Author: Mythreya Kuricheti <git at mythreya.dev>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][HeuristicResolver] Resolve explicit object parameter to enclosing record type (#155143)
Heuristically resolve the type of a `this auto` parameter to the record type
in the declaration.
```cpp
struct Foo {
int member {};
auto&& getter1(this auto&& self) { // assume `self` is is `Foo`
return self.member;
};
```
Fixes https://github.com/clangd/clangd/issues/2323
Commit: 9a81d853cee219af05ee58959ea9c5e9ac69980e
https://github.com/llvm/llvm-project/commit/9a81d853cee219af05ee58959ea9c5e9ac69980e
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-reduction-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
Log Message:
-----------
[flang][acc] Fix the indexing of the reduction combiner for multidimensional static arrays (#155536)
In the following example of reducing a static 2D array, we have
incorrect coordinates for array access in the reduction combiner. This
PR reverses the order of the induction variables used for such array
indexing. For other cases of static arrays, we reverse the loop order as
well so that the innermost loop can handle the innermost dimension.
```Fortran
program main
implicit none
integer, parameter :: m = 2
integer, parameter :: n = 10
integer :: r(n,m), i
r = 0
!$acc parallel loop reduction(+:r(:n,:m))
do i = 1, n
r(i, 1) = i
enddo
print *, r
end program main
```
Currently, we have:
```mlir
fir.do_loop %arg2 = %c0 to %c1 step %c1 {
fir.do_loop %arg3 = %c0 to %c9 step %c1 {
%0 = fir.coordinate_of %arg0, %arg2, %arg3 : (!fir.ref<!fir.array<10x2xi32>>, index, index) -> !fir.ref<i32>
%1 = fir.coordinate_of %arg1, %arg2, %arg3 : (!fir.ref<!fir.array<10x2xi32>>, index, index) -> !fir.ref<i32>
```
We'll obtain:
```mlir
fir.do_loop %arg2 = %c0 to %c1 step %c1 {
fir.do_loop %arg3 = %c0 to %c9 step %c1 {
%0 = fir.coordinate_of %arg0, %arg3, %arg2 : (!fir.ref<!fir.array<10x2xi32>>, index, index) -> !fir.ref<i32>
%1 = fir.coordinate_of %arg1, %arg3, %arg2 : (!fir.ref<!fir.array<10x2xi32>>, index, index) -> !fir.ref<i32>
```
Commit: 21351482bd8d54bc9965cda962e14fc03f4d9bda
https://github.com/llvm/llvm-project/commit/21351482bd8d54bc9965cda962e14fc03f4d9bda
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github][CI] Install the correct binary of sccache on aarch64 (#155328)
Commit: 523c00649c199155b5927e43b8487f389ebb6318
https://github.com/llvm/llvm-project/commit/523c00649c199155b5927e43b8487f389ebb6318
Author: hev <wangrui at loongson.cn>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/bittest.ll
M llvm/test/CodeGen/LoongArch/select-const.ll
Log Message:
-----------
[LoongArch][NFC] Pre-commit for BR_CC and SELECT_CC optimization (#151788)
Commit: de99aabed6664b16e5bc30edd27680a9b7ae0dd3
https://github.com/llvm/llvm-project/commit/de99aabed6664b16e5bc30edd27680a9b7ae0dd3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
AMDGPU: Remove unused argument from adjustAllocatableRegClass (#155554)
Commit: 5e587b1b15feccf70a950d17ad37e3c361a9f198
https://github.com/llvm/llvm-project/commit/5e587b1b15feccf70a950d17ad37e3c361a9f198
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/i32-icmp.ll
M llvm/test/CodeGen/RISCV/i64-icmp.ll
Log Message:
-----------
[RISCV] Lower (setugt X, 2047) as (setne (srl X, 11), 0) (#155541)
This matches 4095 and other pow2-1 constants larger simm12. We normally
do this through a DAGCombine controlled by isLegalICmpImmediate. 2047 is
considered a legal immediate because we have a setult instruction. In
this case we have setugt which isn't natively supported.
I added tests for 4095 for comparison.
Commit: 61526f57b4443d66592044639676af35c7a923c8
https://github.com/llvm/llvm-project/commit/61526f57b4443d66592044639676af35c7a923c8
Author: Lang Hames <lhames at gmail.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/bind.h
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/CommonTestUtils.cpp
A orc-rt/unittests/CommonTestUtils.h
A orc-rt/unittests/bind-test.cpp
Log Message:
-----------
[orc-rt] Add bind_front, a pre-c++-20 std::bind_front substitute. (#155557)
This can be used until the ORC runtime is able to move to c++-20.
Also adds a CommonTestUtils header with a utility class, OpCounter, that
counts the number of default constructions, copy constructions and
assignments, move constructions and assignments, and destructions. This
is used to test that orc_rt::bind_front doesn't introduce unnecessary
copies / moves.
Commit: a0c472d50f29d47223d3fc362ae11d9bff966dac
https://github.com/llvm/llvm-project/commit/a0c472d50f29d47223d3fc362ae11d9bff966dac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
AMDGPU: Remove special case of SGPR_LO class in imm folding (#155518)
Previous change accidentally broke this which shows it's not
doing anything.
Commit: f005e2cb7aea4ed74a62bfbb1dce51e063cd52a0
https://github.com/llvm/llvm-project/commit/f005e2cb7aea4ed74a62bfbb1dce51e063cd52a0
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/modfbf16.cpp
A libc/src/math/generic/remainderbf16.cpp
A libc/src/math/generic/remquobf16.cpp
A libc/src/math/modfbf16.h
A libc/src/math/remainderbf16.h
A libc/src/math/remquobf16.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/ModfTest.h
A libc/test/src/math/smoke/modfbf16_test.cpp
A libc/test/src/math/smoke/remquobf16_test.cpp
Log Message:
-----------
[libc][math][c++23] Add {modf,remainder,remquo}bf16 math functions (#154652)
This PR adds the following basic math functions for BFloat16 type along
with the tests:
- modfbf16
- remainderbf16
- remquobf16
---------
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 640dc21242b69b63f9c130b8dc62bad32c4db4a3
https://github.com/llvm/llvm-project/commit/640dc21242b69b63f9c130b8dc62bad32c4db4a3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-08-26 (Tue, 26 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
Log Message:
-----------
[RISCV] Group Zcf and Zcd instructions and CompressPats together. NFC (#155555)
Instead of repeatedly changing Predicates for each instruction.
Commit: 58f3b0dd8d7b2e09d82dae95908cf34ef50468af
https://github.com/llvm/llvm-project/commit/58f3b0dd8d7b2e09d82dae95908cf34ef50468af
Author: Björn Pettersson <bjorn.a.pettersson at ericsson.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/MachineInstrBundle.cpp
Log Message:
-----------
[CodeGen] Optimize/simplify finalizeBundle. NFC (#155448)
When tracking defs in finalizeBundle two sets are used. LocalDefs is
used to track defined virtual and physical registers, while LocalDefsP
is used to track defined register units for the physical registers.
This patch moves the updates of LocalDefsP to only iterate over regunits
when a new physical register is added to LocalDefs. When the physical
register already is present in LocalDefs, then the corresponding
register units are present in LocalDefsP. So it was a waste of time to
add them to the set again.
Commit: a16211c0321f3b8000836b5b3742ce4444745f69
https://github.com/llvm/llvm-project/commit/a16211c0321f3b8000836b5b3742ce4444745f69
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
A mlir/test/Conversion/VectorToAMX/transfer-to-amx.mlir
Log Message:
-----------
[mlir][amx] Direct AMX data transfers (#154114)
Extends Vector to AMX conversion to attempt populating AMX tiles
directly from memory.
When possible, contraction producers and consumers are replaced by AMX
tile data transfer operations. This shortens data path by skipping
intermediate register loads and stores.
Commit: e6f5aa9e2b69d1e84bd281c2525004800828b30d
https://github.com/llvm/llvm-project/commit/e6f5aa9e2b69d1e84bd281c2525004800828b30d
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
Add tools needed by build_symbolizer.sh to runtime deps when internal symbolizer enabled. (#153723)
Commit: 337707a5417dbdc8751c2a11eda920e250417b5a
https://github.com/llvm/llvm-project/commit/337707a5417dbdc8751c2a11eda920e250417b5a
Author: Matthias Springer <me at m-sp.org>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
A mlir/test/Transforms/test-context-aware-type-converter.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Context-aware type conversions (#140434)
This commit adds support for context-aware type conversions: type
conversion rules that can return different types depending on the IR.
There is no change for existing (context-unaware) type conversion rules:
```c++
// Example: Conversion any integer type to f32.
converter.addConversion([](IntegerType t) {
return Float32Type::get(t.getContext());
}
```
There is now an additional overload to register context-aware type
conversion rules:
```c++
// Example: Type conversion rule for integers, depending on the context:
// Get the defining op of `v`, read its "increment" attribute and return an
// integer with a bitwidth that is increased by "increment".
converter.addConversion([](Value v) -> std::optional<Type> {
auto intType = dyn_cast<IntegerType>(v.getType());
if (!intType)
return std::nullopt;
Operation *op = v.getDefiningOp();
if (!op)
return std::nullopt;
auto incrementAttr = op->getAttrOfType<IntegerAttr>("increment");
if (!incrementAttr)
return std::nullopt;
return IntegerType::get(v.getContext(),
intType.getWidth() + incrementAttr.getInt());
});
```
For performance reasons, the type converter caches the result of type
conversions. This is no longer possible when there context-aware type
conversions because each conversion could compute a different type
depending on the context. There is no performance degradation when there
are only context-unaware type conversions.
Note: This commit just adds context-aware type conversions to the
dialect conversion framework. There are many existing patterns that
still call `converter.convertType(someValue.getType())`. These should be
gradually updated in subsequent commits to call
`converter.convertType(someValue)`.
Co-authored-by: Markus Böck <markus.boeck02 at gmail.com>
Commit: a9c1ae8672613ca479724dc37c8732aeca7d9bf8
https://github.com/llvm/llvm-project/commit/a9c1ae8672613ca479724dc37c8732aeca7d9bf8
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/validate-secondary-entry-point.s
Log Message:
-----------
[BOLT][AArch64] Fix another cause of extra entry point misidentification (#155055)
Commit: 6aed01a2a7e36b2ff4823a557f10a975626046b3
https://github.com/llvm/llvm-project/commit/6aed01a2a7e36b2ff4823a557f10a975626046b3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
Log Message:
-----------
[PowerPC] ppc64-P9-vabsd.ll - update v16i8 abdu test now that it vectorizes in the middle-end (#154712)
The scalarized IR was written before improvements to SLP / cost models
ensured that the abs intrinsic was easily vectorizable
opt -O3 : https://zig.godbolt.org/z/39T65vh8M
Now that it is we need a more useful llc test
Commit: 8c6b7af50ec0a6a3c773da1a4fba26eeb568fe38
https://github.com/llvm/llvm-project/commit/8c6b7af50ec0a6a3c773da1a4fba26eeb568fe38
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
M llvm/lib/TargetParser/TargetParser.cpp
Log Message:
-----------
[AMDGPU] Refactor insertWaveSizeFeature (#154850)
If a wavefrontsize32 or wavefrontsize64 is the only possible value
insert it into feature list by default and use that value as an
indication that another wavefront size is not legal.
Commit: 8a9e3333ddcf6b13d6a944b1380a828df6f08a6d
https://github.com/llvm/llvm-project/commit/8a9e3333ddcf6b13d6a944b1380a828df6f08a6d
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/shift-17.ll
Log Message:
-----------
s390x: optimize 128-bit fshl and fshr by high values (#154919)
Turn a funnel shift by N in the range `121..128` into a funnel shift in
the opposite direction by `128 - N`. Because there are dedicated
instructions for funnel shifts by values smaller than 8, this emits
fewer instructions.
This additional rule is useful because LLVM appears to canonicalize
`fshr` into `fshl`, meaning that the rules for `fshr` on values less
than 8 would not match on organic input.
Commit: c80ff82f83886502bd4c13e92cc3303e8eb20d4f
https://github.com/llvm/llvm-project/commit/c80ff82f83886502bd4c13e92cc3303e8eb20d4f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-27 (Wed, 27 Aug 2025)
Changed paths:
M .ci/compute_projects.py
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/validate-secondary-entry-point.s
M clang-tools-extra/clangd/ScanningProjectModules.cpp
M clang-tools-extra/clangd/unittests/RenameTests.cpp
M clang/include/clang/AST/ASTContext.h
M clang/include/module.modulemap
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/SemaCXX/ptrauth-triviality.cpp
A clang/test/SemaCXX/ptrauth-type-traits.cpp
M clang/test/SemaCXX/trivially-relocatable-ptrauth.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
M compiler-rt/lib/asan/tests/asan_test.cpp
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M flang/include/flang/Evaluate/characteristics.h
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-integer.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Semantics/check-allocate.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/tools.cpp
M flang/test/Lower/OpenACC/acc-reduction-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
A flang/test/Lower/OpenACC/acc-terminator.f90
A flang/test/Lower/force-temp.f90
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/modfbf16.cpp
A libc/src/math/generic/remainderbf16.cpp
A libc/src/math/generic/remquobf16.cpp
A libc/src/math/modfbf16.h
A libc/src/math/remainderbf16.h
A libc/src/math/remquobf16.h
M libc/src/sys/time/linux/utimes.cpp
M libc/src/unistd/linux/setsid.cpp
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/ModfTest.h
A libc/test/src/math/smoke/modfbf16_test.cpp
A libc/test/src/math/smoke/remquobf16_test.cpp
M lld/test/wasm/libsearch.s
M lld/wasm/Driver.cpp
M lldb/include/lldb/Protocol/MCP/Protocol.h
M lldb/include/lldb/Protocol/MCP/Resource.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Protocol/MCP/Tool.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
M lldb/source/Plugins/Protocol/MCP/Resource.cpp
M lldb/source/Plugins/Protocol/MCP/Resource.h
M lldb/source/Plugins/Protocol/MCP/Tool.cpp
M lldb/source/Plugins/Protocol/MCP/Tool.h
M lldb/source/Protocol/MCP/Protocol.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/test/Shell/Symtab/symtab-wasm.test
M lldb/unittests/Protocol/ProtocolMCPServerTest.cpp
M lldb/unittests/Protocol/ProtocolMCPTest.cpp
A lldb/unittests/Protocol/ProtocolMCPTestUtilities.h
M llvm/include/llvm/CodeGen/TargetLowering.h
A llvm/include/llvm/Support/raw_ostream_proxy.h
M llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/Parallel.cpp
A llvm/lib/Support/raw_ostream_proxy.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/CodeGen/AArch64/switch-cases-to-branch-and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
A llvm/test/CodeGen/AMDGPU/gfx10plus-wavefront-sgpr-count.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
A llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
A llvm/test/CodeGen/LoongArch/bittest.ll
M llvm/test/CodeGen/LoongArch/select-const.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/RISCV/i32-icmp.ll
M llvm/test/CodeGen/RISCV/i64-icmp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/SystemZ/shift-17.ll
M llvm/test/CodeGen/X86/freeze.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/Instrumentation/HWAddressSanitizer/globals.ll
M llvm/test/Verifier/AMDGPU/wmma-f8f6f4.ll
M llvm/unittests/Support/CMakeLists.txt
A llvm/unittests/Support/raw_ostream_proxy_test.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
M llvm/utils/profcheck-xfail.txt
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.h
M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.td
A mlir/include/mlir/Target/LLVMIR/Transforms/TargetUtils.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SparseTensor/IR/Detail/DimLvlMapParser.cpp
M mlir/lib/Target/LLVMIR/Transforms/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Transforms/TargetToDataLayout.cpp
A mlir/lib/Target/LLVMIR/Transforms/TargetToTargetFeatures.cpp
A mlir/lib/Target/LLVMIR/Transforms/TargetUtils.cpp
M mlir/lib/Transforms/InlinerPass.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
A mlir/test/Conversion/VectorToAMX/transfer-to-amx.mlir
R mlir/test/Dialect/LLVMIR/target-to-data-layout-invalid.mlir
R mlir/test/Dialect/LLVMIR/target-to-data-layout-no-init.mlir
R mlir/test/Dialect/LLVMIR/target-to-data-layout.mlir
M mlir/test/Dialect/OpenACC/ops.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-and-target-features.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-invalid.mlir
A mlir/test/Target/LLVMIR/target-to-data-layout-no-init.mlir
A mlir/test/Target/LLVMIR/target-to-target-features-dlti-query.mlir
A mlir/test/Transforms/test-context-aware-type-converter.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/bind.h
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/CommonTestUtils.cpp
A orc-rt/unittests/CommonTestUtils.h
A orc-rt/unittests/bind-test.cpp
M orc-rt/unittests/bit-test.cpp
M orc-rt/unittests/span-test.cpp
Log Message:
-----------
Merge branch 'main' into users/rampitec/08-25-_amdgpu_more_radical_feature_initialization_refactoring
Compare: https://github.com/llvm/llvm-project/compare/a1fd6c228a71...c80ff82f8388
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