[all-commits] [llvm/llvm-project] 4b8422: [MLIR][LLVMIR][DLTI] Pass to update #llvm.target's...

[Rolf Morel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4b84223aad4fb5f277aa524b6ff518f4e1cd0df7
      https://github.com/llvm/llvm-project/commit/4b84223aad4fb5f277aa524b6ff518f4e1cd0df7
  Author: Rolf Morel <rolf.morel at intel.com>
  Date:   2025-08-26 (Tue, 26 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
    M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.h
    M mlir/include/mlir/Target/LLVMIR/Transforms/Passes.td
    A mlir/include/mlir/Target/LLVMIR/Transforms/TargetUtils.h
    M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
    M mlir/lib/Target/LLVMIR/Transforms/CMakeLists.txt
    M mlir/lib/Target/LLVMIR/Transforms/TargetToDataLayout.cpp
    A mlir/lib/Target/LLVMIR/Transforms/TargetToTargetFeatures.cpp
    A mlir/lib/Target/LLVMIR/Transforms/TargetUtils.cpp
    R mlir/test/Dialect/LLVMIR/target-to-data-layout-invalid.mlir
    R mlir/test/Dialect/LLVMIR/target-to-data-layout-no-init.mlir
    R mlir/test/Dialect/LLVMIR/target-to-data-layout.mlir
    A mlir/test/Target/LLVMIR/target-to-data-layout-and-target-features.mlir
    A mlir/test/Target/LLVMIR/target-to-data-layout-invalid.mlir
    A mlir/test/Target/LLVMIR/target-to-data-layout-no-init.mlir
    A mlir/test/Target/LLVMIR/target-to-target-features-dlti-query.mlir

  Log Message:
  -----------
  [MLIR][LLVMIR][DLTI] Pass to update #llvm.target's features per relevant backend (#154938)

Modifies `#llvm.target<..., features = $FEATURES>` so that `$FEATURES`
is now an `#llvm.target_features<[...]>` attribute (rather than a
`StringAttr`). This enables the attribute to respond to DLTI queries for
the different target features.

The pass updates the `$FEATURES` attribute of the target attr at name
`llvm.target` in accordance with the (Sub)Target's features that the
relevant LLVM backend knows about.

---

DEMO:
```mlir
module attributes {llvm.target = #llvm.target<triple = "x86_64-unknown-linux",
                                              chip = "skylake"> } {
}
```
by way of `-llvm-target-to-target-features` turns into:
```mlir
module attributes {llvm.target = #llvm.target<triple = "x86_64-unknown-linux",
                                              chip = "skylake", 
                                              features = <["+64bit", "+64bit-mode", "+adx", "+aes", "+allow-light-256-bit", "+avx", "+avx2", "+bmi", "+bmi2", "+clflushopt", "+cmov", "+crc32", "+cx16", "+cx8", "+ermsb", "+f16c", "+false-deps-popcnt", "+fast-15bytenop", "+fast-gather", "+fast-scalar-fsqrt", "+fast-shld-rotate", "+fast-variable-crosslane-shuffle", "+fast-variable-perlane-shuffle", "+fast-vector-fsqrt", "+fma", "+fsgsbase", "+fxsr", "+idivq-to-divl", "+invpcid", "+lzcnt", "+macrofusion", "+mmx", "+movbe", "+no-bypass-delay-blend", "+no-bypass-delay-mov", "+no-bypass-delay-shuffle", "+nopl", "+pclmul", "+popcnt", "+prfchw", "+rdrnd", "+rdseed", "+sahf", "+slow-3ops-lea", "+sse", "+sse2", "+sse3", "+sse4.1", "+sse4.2", "+ssse3", "+vzeroupper", "+x87", "+xsave", "+xsavec", "+xsaveopt", "+xsaves"]>>} {
}
```



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