[all-commits] [llvm/llvm-project] 069ad2: [NVPTXLowerArgs] Add align attribute to return val...

[Drew Kersnar via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 069ad2353c4bd32b883e2d5ce4a7f191bf6098e1
      https://github.com/llvm/llvm-project/commit/069ad2353c4bd32b883e2d5ce4a7f191bf6098e1
  Author: Drew Kersnar <dkersnar at nvidia.com>
  Date:   2025-08-19 (Tue, 19 Aug 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
    A llvm/test/CodeGen/NVPTX/lower-args-alignment.ll
    M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
    M llvm/test/CodeGen/NVPTX/lower-args.ll
    M llvm/test/CodeGen/NVPTX/lower-byval-args.ll

  Log Message:
  -----------
  [NVPTXLowerArgs] Add align attribute to return value of addrspace.wrap intrinsic (#153889)

If alignment inference happens after NVPTXLowerArgs these addrspace wrap
intrinsics can prevent computeKnownBits from deriving alignment of
loads/stores from parameters. To solve this, we can insert an alignment
annotation on the generated intrinsic so that computeKnownBits does not
need to traverse through it to find the alignment.



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