[all-commits] [llvm/llvm-project] 7d9121: [bazel][MLIR] Fix for MemRefToEmitC for #151206 (#...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Thu Aug 14 17:12:43 PDT 2025


  Branch: refs/heads/users/arsenm/runtime-libcalls/return-stringref-libcall-names
  Home:   https://github.com/llvm/llvm-project
  Commit: 7d91213559e1c4d8bc4ddaad717c860d9741d4da
      https://github.com/llvm/llvm-project/commit/7d91213559e1c4d8bc4ddaad717c860d9741d4da
  Author: DeanSturtevant1 <dsturtevant at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [bazel][MLIR] Fix for MemRefToEmitC for #151206 (#153590)


  Commit: 0ff92fe2f08d376b45f4c84fd1e8392c79f7feca
      https://github.com/llvm/llvm-project/commit/0ff92fe2f08d376b45f4c84fd1e8392c79f7feca
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Conversion/LLVMCommon/MemRefBuilder.h
    M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
    M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
    M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp

  Log Message:
  -----------
  [mlir][LLVM][NFC] Simplify `computeSizes` function (#153588)

Rename `computeSizes` to `computeSize` and make it compute just a single
size. This is in preparation of adding 1:N support to the Func->LLVM
lowering patterns.


  Commit: d0e40ff705cd746f118a118bd882af422bc026f8
      https://github.com/llvm/llvm-project/commit/d0e40ff705cd746f118a118bd882af422bc026f8
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
    M lldb/test/Shell/Symtab/Inputs/simple.wasm.yaml
    M lldb/test/Shell/Symtab/symtab-wasm.test

  Log Message:
  -----------
  [lldb] Support parsing data symbols from the Wasm name section (#153494)

This PR adds support for parsing the data symbols from the WebAssembly
name section, which consists of a name and address range for the
segments in the Wasm data section. Unlike other object file formats,
Wasm has no symbols for referencing items within those segments (i.e.
symbols the user has defined).


  Commit: 768eae72cde5f39f2302e197c079a7ecc55941df
      https://github.com/llvm/llvm-project/commit/768eae72cde5f39f2302e197c079a7ecc55941df
  Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/test/AST/ByteCode/vectors.cpp
    M clang/test/CodeGen/2007-01-20-VectorICE.c
    M clang/test/CodeGen/palignr.c

  Log Message:
  -----------
  [Clang] Honor -flax-vector-conversions=none on some tests (#153433)

As in title. This is done as a step towards enabling the
`-flax-vector-conversions=none` globally as a default


  Commit: 8cc22ee674d51d3a8ef5fba7b0938b1f6042ab77
      https://github.com/llvm/llvm-project/commit/8cc22ee674d51d3a8ef5fba7b0938b1f6042ab77
  Author: Renato Golin <rengolin at systemcall.eu>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/Maintainers.md

  Log Message:
  -----------
  [MLIR][Maintainers] Add maintainer list for core sub-categories (#152136)

Ref: https://discourse.llvm.org/t/mlir-project-maintainers/87189

See also:
 * #151721 
 * #150945

Compared to the original proposal, one change is included:
* The `ub` dialect has @Hardcode84 as maintainer.

Please accept to validate your nomination, let's keep new nominations
for follow up PRs.


  Commit: 16ad20291dad174e441076c4c10d899b333fc0e7
      https://github.com/llvm/llvm-project/commit/16ad20291dad174e441076c4c10d899b333fc0e7
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

  Log Message:
  -----------
  [TargetLowering] Store Context in variable (NFC)

Avoid repeating CLI.RetTy->getContext() many times.


  Commit: 177f27d22092cb64e871e6cd2f8981d24e823186
      https://github.com/llvm/llvm-project/commit/177f27d22092cb64e871e6cd2f8981d24e823186
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp

  Log Message:
  -----------
  [VPlan] Add incoming_[blocks,values] iterators to VPPhiAccessors (NFC)  (#138472)

Add 3 new iterator ranges to VPPhiAccessors

* incoming_values(): returns a range over the incoming
  values of a phi 
* incoming_blocks(): returns a range over the incoming 
  blocks of a phi
* incoming_values_and_blocks: returns a range over pairs of
   incoming values and blocks.

Depends on https://github.com/llvm/llvm-project/pull/124838.

PR: https://github.com/llvm/llvm-project/pull/138472


  Commit: d57ab276b659c960fda8c0bb349648c4d266796e
      https://github.com/llvm/llvm-project/commit/d57ab276b659c960fda8c0bb349648c4d266796e
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/control-deps-schedule-data-recalculate.ll

  Log Message:
  -----------
  [SLP] Recalculate cleared deps for potential control schedule data nodes

Need to recalculate the dependencies for all potential control data
schedule nodes to prevent compiler crash.

Fixes #153571


  Commit: ec237da212a4d2a18ddb82486a8b4cb170e98319
      https://github.com/llvm/llvm-project/commit/ec237da212a4d2a18ddb82486a8b4cb170e98319
  Author: Brox Chen <guochen2 at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    A llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll

  Log Message:
  -----------
  [AMDGPU][True16][CodeGen] insert proper register for 16bit data type in vop3p insts (#153143)

In true16 flow, we cannot simply replace v2f16 to its Lo16 when Lo == Hi
in a vop3p packed inst, since the register size is mismatched. This
trigger functional errors in the downstream branch and this is caused by
illegal `VGPR_32 = COPY VGPR_16` created by ISel and hit the rewrite
virtual reg and coalescer pass

Correctly insert reg_sequence/s_mov in true16 flow


  Commit: 1945753700dc9e1ba526cc2078296518b7c93e8c
      https://github.com/llvm/llvm-project/commit/1945753700dc9e1ba526cc2078296518b7c93e8c
  Author: Boyana Norris <brnorris03 at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/test/Dialect/Linalg/roundtrip.mlir

  Log Message:
  -----------
  [mlir][linalg] Fix incorrect linalg short form printing (#153219)

Both `linalg.map` and `linalg.reduce` are sometimes printed in short
form incorrectly, resulting in a round-trip output with different
semantics. This patch adds additional `yield` operand checks to ensure
that all criteria for short-form printing are satisfied. Updated/added
comments and renamed the `findPayloadOp` function to `canUseShortForm`,
which more accurately reflects its purpose. A couple of new lit tests
check for the proper use of long form when short-form conditions are not
met.

Fixes #117528


  Commit: e2ae634cc1cf0c52993478053f248fa82aade3ec
      https://github.com/llvm/llvm-project/commit/e2ae634cc1cf0c52993478053f248fa82aade3ec
  Author: Matthias Springer <me at m-sp.org>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
    M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
    M mlir/lib/Conversion/LLVMCommon/Pattern.cpp

  Log Message:
  -----------
  [mlir][LLVM][NFC] Simplify `copyUnrankedDescriptors` (#153597)

Split the function into two: one that copies a single unranked
descriptor and one that copies multiple unranked descriptors. This is in
preparation of adding 1:N support to the Func->LLVM lowering patterns.


  Commit: ca4ebf95172d24f8c47655709b2c9eb85bda5cb2
      https://github.com/llvm/llvm-project/commit/ca4ebf95172d24f8c47655709b2c9eb85bda5cb2
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll

  Log Message:
  -----------
  [SLP]Support LShr as base for copyable elements

Added support for LShr instructions as base for copyable elements. Also,
added simple analysis for best base instruction selection, if multiple
candidates are available.

Reviewers: hiraditya, RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/153393


  Commit: a5ba6067d619b0dd5f7b660ff4658f9af43db556
      https://github.com/llvm/llvm-project/commit/a5ba6067d619b0dd5f7b660ff4658f9af43db556
  Author: Pawan Nirpal <pawan.anil.nirpal at intel.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M compiler-rt/lib/builtins/cpu_model/x86.c
    M llvm/lib/TargetParser/Host.cpp

  Log Message:
  -----------
  [Clang][NFC] Use Hex Encoding for Intel CPU CPUID family (#153004)

Use Hex Encoding for CPUID family to match number format with Intel ISE
rev.58:
https://cdrdv2.intel.com/v1/dl/getContent/671368


  Commit: 28d5bc5649a9d004d7a91f4a3639aa6aa3b130b2
      https://github.com/llvm/llvm-project/commit/28d5bc5649a9d004d7a91f4a3639aa6aa3b130b2
  Author: Ian McInerney <mcianster at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/lib/Frontend/CompilerInvocation.cpp
    A flang/test/Preprocessing/defines_pic_frontend.F90

  Log Message:
  -----------
  [Flang][Driver] Predefine pic/pie macros based on configured level (#153449)

Predefine the `__pic__/__pie__/__PIC__/__PIE__` macros based on the
configured relocation level. This logic mirrors that of the clang
driver, where `__pic__/__PIC__` are defined for both PIC and PIE modes,
but `__pie__/__PIE__` are only defined for PIE mode.

Fixes https://github.com/llvm/llvm-project/issues/135275


  Commit: 6961139ce9154d03c88b8d46c8742a1eaa569cd9
      https://github.com/llvm/llvm-project/commit/6961139ce9154d03c88b8d46c8742a1eaa569cd9
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __sinf and __tanf (#153609)


  Commit: 45066c293702657426d2b1754b6c92efeb022d72
      https://github.com/llvm/llvm-project/commit/45066c293702657426d2b1754b6c92efeb022d72
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
    M clang/test/CIR/CodeGen/virtual-function-calls.cpp

  Log Message:
  -----------
  [CIR] Add lowering for the cir.vtable.address_point operation (#153243)

This adds support for lowering the cir.vtable.address_point operation to
the LLVM dialect, as well as type converter support for the cir.vptr
type.


  Commit: 44df9826f312ee615567a7b41aaebfc0e3af9286
      https://github.com/llvm/llvm-project/commit/44df9826f312ee615567a7b41aaebfc0e3af9286
  Author: Vedant Paranjape <vedantvinaya at nvidia.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
    A llvm/test/Transforms/InstCombine/invariant-metadata-propagation.ll

  Log Message:
  -----------
  [InstCombine] Propagate invariant.load metadata across unpacked loads (#152186)

For loads that operate on aggregate type, instcombine unpacks the loads.
It does not preserve the invariant.load metadata. This patch fixes that,
it looks for the metadata in the parent load and attaches the metadata
to the unpacked loads.

```
%struct.double2 = type { double, double }
%struct.double1 = type { double }

define %struct.double2 @func1(ptr %a) {
  %1 = load %struct.double2, ptr %a, align 16, !invariant.load !1
  ret %struct.double2 %1
}

!1 = !{}
```
Reproducer: https://godbolt.org/z/hcY8MMvYh


  Commit: 86482dffbafaf1ec61d9d01868837b05b5d88c6f
      https://github.com/llvm/llvm-project/commit/86482dffbafaf1ec61d9d01868837b05b5d88c6f
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

  Log Message:
  -----------
  [VPlan] Use m_Broadcast to improve a match (NFC) (#153607)


  Commit: a8f1f1b41f3b8ed75155a5df6c85d88a5b1e3bdb
      https://github.com/llvm/llvm-project/commit/a8f1f1b41f3b8ed75155a5df6c85d88a5b1e3bdb
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __logf, __log2f and __log10f (#153611)


  Commit: ada191136b17daac3d53e7919eaa9a570de06798
      https://github.com/llvm/llvm-project/commit/ada191136b17daac3d53e7919eaa9a570de06798
  Author: Boyana Norris <brnorris03 at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/cmake/modules/AddMLIR.cmake

  Log Message:
  -----------
  [mlir][cmake] Fix mlir target export (#153341)

In https://github.com/llvm/llvm-project/pull/152195, target export was
accidentally moved inside a conditional, but it should have been left
outside. This patch undoes that change.


  Commit: efce767a8803bb610bdb712562016c517fc7159a
      https://github.com/llvm/llvm-project/commit/efce767a8803bb610bdb712562016c517fc7159a
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __ull2float_rX functions (#153613)


  Commit: 9a28783f5d6234571ffe7d4286b7d273d6e137f4
      https://github.com/llvm/llvm-project/commit/9a28783f5d6234571ffe7d4286b7d273d6e137f4
  Author: Iris Shi <0.0 at owo.li>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    A clang/test/CIR/IR/inline-asm.cir

  Log Message:
  -----------
  [CIR] Add `InlineAsmOp` (#153362)

- Part of #153267

---------

Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Co-authored-by: Morris Hafner <mmha at users.noreply.github.com>


  Commit: 91418ecbdef0e259f83e6ddac5ddfc22a8b6eced
      https://github.com/llvm/llvm-project/commit/91418ecbdef0e259f83e6ddac5ddfc22a8b6eced
  Author: Leandro Lupori <leandro.lupori at linaro.org>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M lldb/source/Plugins/Platform/Android/AdbClient.cpp
    M lldb/source/Plugins/Platform/Android/AdbClient.h
    M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
    M lldb/source/Plugins/Platform/Android/PlatformAndroid.h
    M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
    M lldb/unittests/Platform/Android/AdbClientTest.cpp
    M lldb/unittests/Platform/Android/PlatformAndroidTest.cpp

  Log Message:
  -----------
  Revert "[lldb] refactor PlatformAndroid and make threadsafe" (#153626)

Reverts llvm/llvm-project#145382

This broke a couple of buildbots.


  Commit: ac0ad5093ab451a36ea9ed34b0d3d461e759f4ea
      https://github.com/llvm/llvm-project/commit/ac0ad5093ab451a36ea9ed34b0d3d461e759f4ea
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp

  Log Message:
  -----------
  [lldb] Use PyThread_get_thread_ident instead of accessing PyThreadState (#153460)

Use `PyThread_get_thread_ident`, which is part of the Stable API,
instead of accessing a member of the PyThreadState, which is opaque when
using the Stable API.


  Commit: dc0becc4d09bba0fad07ae5e8b98219297432496
      https://github.com/llvm/llvm-project/commit/dc0becc4d09bba0fad07ae5e8b98219297432496
  Author: Iris Shi <0.0 at owo.li>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
    A clang/test/CIR/Lowering/inline-asm.cir

  Log Message:
  -----------
  [CIR] Add InlineAsmOp lowering to LLVM (#153387)

- Part of #153267

Added support for lowering `InlineAsmOp` directly to LLVM IR

---------
Co-authored-by: Morris Hafner <mhafner at nvidia.com>


  Commit: e27e4f3a99911675215ca79eb95290a3ab77fe74
      https://github.com/llvm/llvm-project/commit/e27e4f3a99911675215ca79eb95290a3ab77fe74
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __uint2float_rX functions (#153620)

Also add bind name for __uint2double_rn


  Commit: ff0ce74be84bb1300dc5790842c85ad1f3d88174
      https://github.com/llvm/llvm-project/commit/ff0ce74be84bb1300dc5790842c85ad1f3d88174
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  [VPlan] Replace scalar preheader with VPIRBB at single place (NFC).

Replace the scalar preheader VPBB with an VPIRBB wrapping the IR basic
block created by createVectorizedLoopSkeleton.


  Commit: c202d2f5157256208dcd2e46d910e633f52b74ad
      https://github.com/llvm/llvm-project/commit/c202d2f5157256208dcd2e46d910e633f52b74ad
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/CodeGen/InterleavedAccessPass.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll

  Log Message:
  -----------
  [IA][RISCV] Recognizing gap masks assembled from bitwise AND (#153324)

For a deinterleaved masked.load / vp.load, if it's mask, `%c`, is
synthesized by the following snippet:
```
%m = shufflevector %s, poison, <0, 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3>
%g = <1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0>
%c = and %m, %g
```
Then we can know that `%g` is the gap mask and `%s` is the mask for each
field / component. This patch teaches InterleaveAccess pass to recognize
such patterns


  Commit: f5d284309fe4f4e83f879f08356d149000bbc762
      https://github.com/llvm/llvm-project/commit/f5d284309fe4f4e83f879f08356d149000bbc762
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
    M llvm/test/Transforms/JumpTableToSwitch/basic.ll

  Log Message:
  -----------
  [JTS] Propagate profile info (#153305)

If the indirect call target being recognized as a jump table has profile info, we can accurately synthesize the branch weights of the switch that replaces the indirect call.

Otherwise we insert the "unknown" `MD_prof` to indicate this is the best we can do here.

Part of Issue #147390


  Commit: 37cc010b91e0aaeced53d9261c1f4b511f603871
      https://github.com/llvm/llvm-project/commit/37cc010b91e0aaeced53d9261c1f4b511f603871
  Author: Thurston Dang <thurston at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M compiler-rt/test/asan/TestCases/Posix/fakestack_alignment.cpp

  Log Message:
  -----------
  [asan] Fix-forward undefined type in test from #153142 (#153636)

Fix Mac build breakage (reported by aeubanks in
https://github.com/llvm/llvm-project/pull/153142#issuecomment-3189202274)
by including stdint.h and using uintptr_t


  Commit: 98728d9dc8f38703bc3ebbbf32d45567acaa75cc
      https://github.com/llvm/llvm-project/commit/98728d9dc8f38703bc3ebbbf32d45567acaa75cc
  Author: Jianhui Li <jian.hui.li at intel.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
    M mlir/lib/Conversion/VectorToXeGPU/CMakeLists.txt
    M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/lib/Dialect/XeGPU/Utils/CMakeLists.txt
    M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
    M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
    M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
    M mlir/test/Dialect/XeGPU/invalid.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Add lowering from transfer_read/transfer_write to load_gather/store_scatter  (#152429)

Lowering transfer_read/transfer_write to load_gather/store_scatter in
case the target uArch doesn't support load_nd/store_nd. The high level
steps:
  1. compute Strides;
  2. compute Offsets;
  3. collapseMemrefTo1D;
  4. create Load gather or store_scatter op


  Commit: db98ac43ec13805e1876c389933eb7155ee1f073
      https://github.com/llvm/llvm-project/commit/db98ac43ec13805e1876c389933eb7155ee1f073
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
    M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
    M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
    M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
    M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
    M llvm/test/Transforms/LoopVectorize/scalable-predication.ll
    M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
    M llvm/test/Transforms/LoopVectorize/vectorize-force-tail-with-evl.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll

  Log Message:
  -----------
  [LV] Use shl for ((VF * Step) * vscale) in createStepForVF. (#153495)

Directly emit shl instead of a multiply if VF * Step is a power-of-2. The
main motivation here is to prepare the code and test for directly
generating and expanding a SCEV expression of the minimum iteration
count. SCEVExpander will directly emit shl for multiplies with
powers-of-2.

InstCombine will also performs this combine, so end-to-end this should
effectively by NFC.

PR: https://github.com/llvm/llvm-project/pull/153495


  Commit: 20a829937cc8cd69170b75c0bb7f31ad9ba19677
      https://github.com/llvm/llvm-project/commit/20a829937cc8cd69170b75c0bb7f31ad9ba19677
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __expf and __exp10f (#153633)


  Commit: b62b65a95f2b5e79e90f3f957e7a52ec50c5fe31
      https://github.com/llvm/llvm-project/commit/b62b65a95f2b5e79e90f3f957e7a52ec50c5fe31
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp

  Log Message:
  -----------
  [lldb] Use (only) PyImport_AppendInittab to patch readline (#153329)

The current implementation tries to (1) patch the existing readline
module definition if it's already present in the inittab and (2) append
our patched readline module to the inittab. The former (1) uses the
non-stable Python API and I can't find a situation where this is
necessary. 

We do this work before initialization, so for the readline
module to exist, it either needs to be added by Python itself (which
doesn't seem to be the case), or someone would have had to have added it
without initializing.


  Commit: 016c301d30fc9e5d8a3e42fb9a5cd990bf2b164f
      https://github.com/llvm/llvm-project/commit/016c301d30fc9e5d8a3e42fb9a5cd990bf2b164f
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp

  Log Message:
  -----------
  [NFC] Use `[[maybe_unused]]` for variable used in assertion (#153639)


  Commit: cbfc22c06b88d1f0176559a5f41ddc1f003b4c6f
      https://github.com/llvm/llvm-project/commit/cbfc22c06b88d1f0176559a5f41ddc1f003b4c6f
  Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h

  Log Message:
  -----------
  Fix typo in `step` intrinsic comment (#153642)

`y` should be the first argument and `x` should be the second, otherwise
the formula is wrong. This also matches the documentation
[here](https://learn.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-step).


  Commit: 4f007041a87b1b0c2686d1871ea6e35394545865
      https://github.com/llvm/llvm-project/commit/4f007041a87b1b0c2686d1871ea6e35394545865
  Author: Erick Velez <erickvelez7 at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
    M clang-tools-extra/clang-doc/JSONGenerator.cpp
    M clang-tools-extra/test/clang-doc/basic-project.mustache.test
    M clang-tools-extra/test/clang-doc/json/class-requires.cpp
    M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
    M clang-tools-extra/test/clang-doc/json/class-template.cpp
    M clang-tools-extra/test/clang-doc/json/class.cpp
    M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
    M clang-tools-extra/test/clang-doc/json/concept.cpp
    M clang-tools-extra/test/clang-doc/json/function-requires.cpp
    M clang-tools-extra/test/clang-doc/json/function-specifiers.cpp
    M clang-tools-extra/test/clang-doc/json/method-template.cpp
    M clang-tools-extra/test/clang-doc/json/namespace.cpp
    M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
    M clang-tools-extra/test/clang-doc/mustache-index.cpp
    M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp

  Log Message:
  -----------
  [clang-doc] place HTML/JSON output inside their own directories (#150655)

Instead of just outputting everything into the designated root folder,
HTML and JSON output will be placed in html/ and json/ directories.


  Commit: 2912c9c249350bae3178ba7fad605e1f269c32e7
      https://github.com/llvm/llvm-project/commit/2912c9c249350bae3178ba7fad605e1f269c32e7
  Author: Abhinav Gaba <abhinav.gaba at intel.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M offload/test/mapping/data_member_ref.cpp
    M offload/test/mapping/declare_mapper_nested_default_mappers.cpp
    M offload/test/mapping/declare_mapper_nested_mappers.cpp
    M offload/test/mapping/ptr_and_obj_motion.c
    M offload/test/mapping/target_derefence_array_pointrs.cpp
    M offload/test/mapping/target_has_device_addr.c

  Log Message:
  -----------
  [NFC][Offload] Add missing maps to OpenMP offloading tests. (#153103)

A few tests were only mapping a pointee, like: `map(pp[0][0])`, on an
`int** pp`, but expecting the pointers, like `pp`, `pp[0]` to also be
mapped, which is incorrect.

This change fixes six such tests.


  Commit: a508ea2ad7d9ab8bad0ec8fa3db3397985d57841
      https://github.com/llvm/llvm-project/commit/a508ea2ad7d9ab8bad0ec8fa3db3397985d57841
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Scalar/CMakeLists.txt
    M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp

  Log Message:
  -----------
  Add dependency on `ProfileData` from ScalarOpts (#153651)

Fixing buildbot failures after PR #153305, e.g.
https://lab.llvm.org/buildbot/#/builders/203/builds/19861

Analysis already depends on `ProfileData`, so the transitive closure of
the dependencies of `ScalarOpts` doesn't change.

Also avoided an extra dependency (and very unnecessary) on
`Instrumentation`. The API previously used doesn't need to live in
Instrumentation to begin with, but that's something to address in a
follow-up.


  Commit: eeada0d30f41b2d680073e49246ac0388e6c5ec7
      https://github.com/llvm/llvm-project/commit/eeada0d30f41b2d680073e49246ac0388e6c5ec7
  Author: Matheus Izvekov <mizvekov at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/include/clang/AST/TypeLoc.h
    M clang/test/AST/ast-dump-templates.cpp

  Log Message:
  -----------
  [clang] fix source range computation for DeducedTemplateSpecializationType (#153646)

This was a regression introduced in
https://github.com/llvm/llvm-project/pull/147835

Since this regression was never released, there are no release notes.

Fixes https://github.com/llvm/llvm-project/issues/153540


  Commit: 334a046a3cd31aaec00c4e4bb8866242c6e38c98
      https://github.com/llvm/llvm-project/commit/334a046a3cd31aaec00c4e4bb8866242c6e38c98
  Author: Michael Berg <93234525+mcberg2021 at users.noreply.github.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
    A llvm/test/Transforms/LoopDistribute/cross-partition-access.ll

  Log Message:
  -----------
  [LoopDist] Consider reads and writes together for runtime checks (#145623)

Emit safety guards for ptr accesses when cross partition loads exist
which have a corresponding store to the same address in a different
partition. This will emit the necessary ptr checks for these accesses.

The test case was obtained from SuperTest, which SiFive runs regularly.
We enabled LoopDistribution by default in our downstream compiler, this
change was part of that enablement.


  Commit: 49f20934776cccbed82ccdca657d9111bf550286
      https://github.com/llvm/llvm-project/commit/49f20934776cccbed82ccdca657d9111bf550286
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
    A llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics-gfx1250.ll
    A llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx1250.ll
    A llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx1250.ll

  Log Message:
  -----------
  [AMDGPU] Increase LDS to 320K on gfx1250 (#153645)


  Commit: 5479b7ed4200a85de3aa9335110883a86715811d
      https://github.com/llvm/llvm-project/commit/5479b7ed4200a85de3aa9335110883a86715811d
  Author: CatherineMoore <catmoore at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M openmp/runtime/src/kmp_settings.cpp

  Log Message:
  -----------
  [OpenMP] Update printf stmt in  kmp_settings.cpp (#152800)

Remove extraneous argument from printf statement

---------

Co-authored-by: Joachim <protze at rz.rwth-aachen.de>


  Commit: aa4805a09052c1b6298718eeb6d30c33dd0d695f
      https://github.com/llvm/llvm-project/commit/aa4805a09052c1b6298718eeb6d30c33dd0d695f
  Author: Bill Wendling <morbo at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/include/clang/AST/Type.h
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/CodeGen/CodeGenModule.h
    M clang/lib/Sema/SemaType.cpp
    A clang/test/CodeGen/cfi-salt.c
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    A clang/test/Sema/attr-cfi-salt.c

  Log Message:
  -----------
  [Clang][attr] Add 'cfi_salt' attribute (#141846)

The 'cfi_salt' attribute specifies a string literal that is used as a
"salt" for Control-Flow Integrity (CFI) checks to distinguish between
functions with the same type signature. This attribute can be applied
to function declarations, function definitions, and function pointer
typedefs.

This attribute prevents function pointers from being replaced with
pointers to functions that have a compatible type, which can be a CFI
bypass vector.

The attribute affects type compatibility during compilation and CFI
hash generation during code generation.

  Attribute syntax: [[clang::cfi_salt("<salt_string>")]]
  GNU-style syntax: __attribute__((cfi_salt("<salt_string>")))

- The attribute takes a single string of non-NULL ASCII characters.
- It only applies to function types; using it on a non-function type
  will generate an error.
- All function declarations and the function definition must include
  the attribute and use identical salt values.

Example usage:

  // Header file:
  #define __cfi_salt(S) __attribute__((cfi_salt(S)))

  // Convenient typedefs to avoid nested declarator syntax.
  typedef int (*fp_unsalted_t)(void);
  typedef int (*fp_salted_t)(void) __cfi_salt("pepper");

  struct widget_ops {
    fp_unsalted_t init;     // Regular CFI.
    fp_salted_t exec;       // Salted CFI.
    fp_unsalted_t teardown; // Regular CFI.
  };

  // bar.c file:
  static int bar_init(void) { ... }
  static int bar_salted_exec(void) __cfi_salt("pepper") { ... }
  static int bar_teardown(void) { ... }

  static struct widget_generator _generator = {
    .init = bar_init,
    .exec = bar_salted_exec,
    .teardown = bar_teardown,
  };

  struct widget_generator *widget_gen = _generator;

  // 2nd .c file:
  int generate_a_widget(void) {
    int ret;

    // Called with non-salted CFI.
    ret = widget_gen.init();
    if (ret)
      return ret;

    // Called with salted CFI.
    ret = widget_gen.exec();
    if (ret)
      return ret;

    // Called with non-salted CFI.
    return widget_gen.teardown();
  }

Link: https://github.com/ClangBuiltLinux/linux/issues/1736
Link: https://github.com/KSPP/linux/issues/365

---------

Signed-off-by: Bill Wendling <morbo at google.com>
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>


  Commit: e5e3e4bdb57efbfc0b2709d198d4ced752794bcd
      https://github.com/llvm/llvm-project/commit/e5e3e4bdb57efbfc0b2709d198d4ced752794bcd
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

  Log Message:
  -----------
  [OpenACC] Add firstprivate recipe helper methods to ACC dialect (#153604)

Like we did for the 'private' clause, this adds an easier to use helper
function to add the 'firstprivate' clause + recipe to the Parallel and
Serial ops.


  Commit: 6b316ecb5f843926bbd62b18fd8e0c5cf1cee622
      https://github.com/llvm/llvm-project/commit/6b316ecb5f843926bbd62b18fd8e0c5cf1cee622
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrFormats.td

  Log Message:
  -----------
  [AMDGPU] Encode NV bit in VIMAGE/VSAMPLE. NFC (#153654)

This is NFC as this target does not have it.


  Commit: 8a0c7e9b3266051803e3919954866e23498ca4d0
      https://github.com/llvm/llvm-project/commit/8a0c7e9b3266051803e3919954866e23498ca4d0
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
    M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
    M llvm/test/Transforms/LoopVectorize/pr45525.ll
    M llvm/test/Transforms/LoopVectorize/runtime-check-readonly.ll

  Log Message:
  -----------
  [LV] Regenerate some more tests.


  Commit: 52c9489d1d9bd80454a5b9647393ca41c65e2b57
      https://github.com/llvm/llvm-project/commit/52c9489d1d9bd80454a5b9647393ca41c65e2b57
  Author: Jonas Devlieghere <jonas at devlieghere.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M lldb/cmake/modules/LLDBConfig.cmake

  Log Message:
  -----------
  [lldb] Use the Python limited API with SWIG 4.2 or later (#153119) (#153472)

Use the Python limited API when building with SWIG 4.2 or later.


  Commit: bad3df476457db2fd7dd36729c47fb1d2bddad3a
      https://github.com/llvm/llvm-project/commit/bad3df476457db2fd7dd36729c47fb1d2bddad3a
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add bind names for __double2ll_rX interfaces (#153660)


  Commit: 76dd742f7b32e4d3acf50fab1dbbd897f215837e
      https://github.com/llvm/llvm-project/commit/76dd742f7b32e4d3acf50fab1dbbd897f215837e
  Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/include/llvm/CGData/CodeGenData.h
    M llvm/include/llvm/CGData/CodeGenData.inc
    M llvm/include/llvm/CGData/StableFunctionMap.h
    M llvm/include/llvm/CGData/StableFunctionMapRecord.h
    M llvm/lib/CGData/CodeGenData.cpp
    M llvm/lib/CGData/CodeGenDataReader.cpp
    M llvm/lib/CGData/StableFunctionMap.cpp
    M llvm/lib/CGData/StableFunctionMapRecord.cpp
    M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
    M llvm/test/ThinLTO/AArch64/cgdata-merge-write.ll
    M llvm/test/tools/llvm-cgdata/empty.test
    M llvm/test/tools/llvm-cgdata/error.test
    M llvm/test/tools/llvm-cgdata/merge-combined-funcmap-hashtree.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-archive.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-concat.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-double.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-single.test
    M llvm/tools/llvm-cgdata/Opts.td
    M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
    M llvm/unittests/CGData/StableFunctionMapTest.cpp

  Log Message:
  -----------
  [CGData] Lazy loading support for stable function map (#151660)

The stable function map could be huge for a large application. Fully
loading it is slow and consumes a significant amount of memory, which is
unnecessary and drastically slows down compilation especially for
non-LTO and distributed-ThinLTO setups. This patch introduces an opt-in
lazy loading support for the stable function map. The detailed changes
are:

- `StableFunctionMap`
- The map now stores entries in an `EntryStorage` struct, which includes
offsets for serialized entries and a `std::once_flag` for thread-safe
lazy loading.
- The underlying map type is changed from `DenseMap` to
`std::unordered_map` for compatibility with `std::once_flag`.
- `contains()`, `size()` and `at()` are implemented to only load
requested entries on demand.

- Lazy Loading Mechanism
- When reading indexed codegen data, if the newly-introduced
`-indexed-codegen-data-lazy-loading` flag is set, the stable function
map is not fully deserialized up front. The binary format for the stable
function map now includes offsets and sizes to support lazy loading.
- The safety of lazy loading is guarded by the once flag per function
hash. This guarantees that even in a multi-threaded environment, the
deserialization for a given function hash will happen exactly once. The
first thread to request it performs the load, and subsequent threads
will wait for it to complete before using the data. For single-threaded
builds, the overhead is negligible (a single check on the once flag).
For multi-threaded scenarios, users can omit the flag to retain the
previous eager-loading behavior.


  Commit: 1e9fc8edd03781ef4836d601e6ff672df3901d88
      https://github.com/llvm/llvm-project/commit/1e9fc8edd03781ef4836d601e6ff672df3901d88
  Author: Bill Wendling <morbo at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/test/Sema/attr-cfi-salt.c

  Log Message:
  -----------
  [Clang][attr] Add '-std=c11' to allow for typedef redefinition


  Commit: e56ae9651b2e51cbf18e33627165c76b31ccc86b
      https://github.com/llvm/llvm-project/commit/e56ae9651b2e51cbf18e33627165c76b31ccc86b
  Author: Morris Hafner <mmha at users.noreply.github.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/include/clang/CIR/MissingFeatures.h
    M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.h
    M clang/lib/CIR/CodeGen/CIRGenStmt.cpp

  Log Message:
  -----------
  [CIR][NFC] Add Symbol Table to CIRGenFunction (#153625)

This patchs adds a symbol table to CIRGenFunction plus scopes and
insertions to the table where we were missing them previously.


  Commit: 5836bae463ce68e834e83231e443007d324ed89a
      https://github.com/llvm/llvm-project/commit/5836bae463ce68e834e83231e443007d324ed89a
  Author: David Green <david.green at arm.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll

  Log Message:
  -----------
  [AArch64] Change the cost of fma and fmuladd to match fmul. (#152963)

As fmul and fmadd are so similar, their performance characteristics tend
to be the same on most platforms, at least in terms of reciprocal
throughputs. Processors capable of performing a given number of fmul per
cycle can usually perform the same number of fma, with the extra add
being relatively simple on top. This patch makes the scores of the two
operations the same, which brings the throughput cost of a fma/fmuladd
to 2, and the latency to 3, which are the defaults for fmul.

Note that we might also want to change the throughput cost of a fmul to
1, as most processors have ample bandwidth for them, but they should
still stay in-line with one another.


  Commit: 06590444f53ee855a6b321895594382f79d6b1d8
      https://github.com/llvm/llvm-project/commit/06590444f53ee855a6b321895594382f79d6b1d8
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add bind names for __double2ull_rX interfaces (#153678)


  Commit: db5f7dc374fdd70d39857d3402d42878139cbb4e
      https://github.com/llvm/llvm-project/commit/db5f7dc374fdd70d39857d3402d42878139cbb4e
  Author: Alex Bradbury <asb at igalia.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/AArch64/alternate-vectorization-split-node.ll
    M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll

  Log Message:
  -----------
  Revert "[SLP]Support LShr as base for copyable elements"

This reverts commit ca4ebf95172d24f8c47655709b2c9eb85bda5cb2.

Causes compile-time crashes for some inputs with RVV zvl512b/zvl1024b
configurations. See here for a minimal reproducer:
https://github.com/llvm/llvm-project/pull/153393#issuecomment-3189898813


  Commit: 4e63d704e8f8bbceffeb19ffd62e0b5ed926dbe6
      https://github.com/llvm/llvm-project/commit/4e63d704e8f8bbceffeb19ffd62e0b5ed926dbe6
  Author: DeanSturtevant1 <dsturtevant at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Fix mlir/BUILD.bazel for XeGPUUtils. (#153689)


  Commit: b989c7c2e099211b549b2866cc4e6c6775775510
      https://github.com/llvm/llvm-project/commit/b989c7c2e099211b549b2866cc4e6c6775775510
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __drcp_rX (#153681)


  Commit: defbbf0129d5c1ac360c6ffd9eaa2f07ab07d622
      https://github.com/llvm/llvm-project/commit/defbbf0129d5c1ac360c6ffd9eaa2f07ab07d622
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
    A llvm/test/CodeGen/RISCV/pr153598.mir

  Log Message:
  -----------
  [RISCV][MoveMerge] Don't copy kill flag when moving past an instruction that reads the register. (#153644)

If we're moving the second copy before another instruction that reads
the copied register, we need to clear the kill flag on the combined
move.

Fixes #153598.


  Commit: cb2f0d0a5f14c183e7182aba0f0e54a518de9e3f
      https://github.com/llvm/llvm-project/commit/cb2f0d0a5f14c183e7182aba0f0e54a518de9e3f
  Author: DeanSturtevant1 <dsturtevant at google.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [bazel] Fix mlir/BUILD.bazel for VectorToXeGPU. (#153696)


  Commit: df15c0d716fa0d84104b05937854becacbda6629
      https://github.com/llvm/llvm-project/commit/df15c0d716fa0d84104b05937854becacbda6629
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-device-proc.cuf
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __dsqrt_rn and __dsqrt_rz (#153624)


  Commit: a1529cd85a9f99a263de72e16ed2f7567c519456
      https://github.com/llvm/llvm-project/commit/a1529cd85a9f99a263de72e16ed2f7567c519456
  Author: Andy Kaylor <akaylor at nvidia.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
    M clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
    M clang/lib/CIR/CodeGen/CIRGenBuilder.h
    M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
    M clang/lib/CIR/Dialect/IR/CIRDataLayout.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/CodeGen/globals.cpp

  Log Message:
  -----------
  [CIR] Add index support for global_view (#153254)

The #cir.global_view attribute was initially added without support for
the optional index list. This change adds index list support. This is
used when the address of an array or structure member is used as an
initializer.

This patch does not include support for taking the address of a
structure or class member. That will be added later.


  Commit: 57c1e01e484019084cfa975a4f41643d05ae327f
      https://github.com/llvm/llvm-project/commit/57c1e01e484019084cfa975a4f41643d05ae327f
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/test/CodeGenHIP/hip-cumode.hip
    M clang/test/Driver/hip-macros.hip
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/MC/AMDGPU/hsa-diag-v4.s

  Log Message:
  -----------
  [AMDGPU] Don't allow wgp mode on gfx1250 (#153680)

- gfx1250 only supports cu mode


  Commit: fc4df2c9173a110102005af937a26df7f29d24e1
      https://github.com/llvm/llvm-project/commit/fc4df2c9173a110102005af937a26df7f29d24e1
  Author: Daniel Paoliello <danpao at microsoft.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M clang/test/Headers/mm3dnow.c
    M clang/test/Headers/pmmintrin.c
    M clang/test/Headers/x86-intrinsics-headers.c
    M clang/test/Headers/x86intrin.c
    M clang/test/Headers/x86intrin.cpp

  Log Message:
  -----------
  [win][arm64ec] XFAIL x64 intrinsic tests on Arm64EC (#153474)

Clang defines the x64 preprocessor macro (`__x86_64__`) when building
Arm64EC, however the tests for x64 built-ins and intrinsics are
currently failing since the relevant functions don't exist, resulting in
errors like:

```
Line 165: invalid conversion between vector type '__v2di' (vector of 2 'long long' values) and integer type 'int' of different size
```

(Clang doesn't know the intrinsics being called, and so treats it like
an undefined function, which makes it assume the return type is `int`)

For now, expect these tests to fail until someone decides to implement
these intrinsics.


  Commit: ca9ddd54b77020322a94a8032276b46cc1046522
      https://github.com/llvm/llvm-project/commit/ca9ddd54b77020322a94a8032276b46cc1046522
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __ll2float_rX (#153694)


  Commit: d56fa965243bcdc115b8f262ce79cf2547500c6d
      https://github.com/llvm/llvm-project/commit/d56fa965243bcdc115b8f262ce79cf2547500c6d
  Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/Support/DXILABI.h
    M llvm/lib/Analysis/DXILResource.cpp
    M llvm/lib/BinaryFormat/DXContainer.cpp
    M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
    M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/DXILABI.cpp
    M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
    M llvm/lib/Target/DirectX/DXILRootSignature.h
    M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
    M llvm/test/CodeGen/DirectX/llc-pipeline.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbuffer-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-descriptor-table-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-root-descriptor-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation.ll

  Log Message:
  -----------
  [DirectX] Add Range Overlap validation (#152229)

As part of the Root Signature Spec, we need to validate if Root
Signatures are not defining overlapping ranges.
Closes: https://github.com/llvm/llvm-project/issues/126645

---------

Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Co-authored-by: Joao Saffran <{ID}+{username}@users.noreply.github.com>
Co-authored-by: Joao Saffran <jderezende at microsoft.com>


  Commit: 2775c79c4fd06b4654a664c5182d9eb86f3e72c1
      https://github.com/llvm/llvm-project/commit/2775c79c4fd06b4654a664c5182d9eb86f3e72c1
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __float2ll_rX (#153702)


  Commit: a629119c7544e62fa031c85f87f507f9a90a070f
      https://github.com/llvm/llvm-project/commit/a629119c7544e62fa031c85f87f507f9a90a070f
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
    A llvm/test/CodeGen/AMDGPU/remove-incompatible-wave64-feature.ll

  Log Message:
  -----------
  [AMDGPU] Remove wave64 functions (#153690)

gfx1250 only supports wave32.


  Commit: 602f308d4fcc84d90d49fb708f757589bca68d4e
      https://github.com/llvm/llvm-project/commit/602f308d4fcc84d90d49fb708f757589bca68d4e
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interface for __saturatef (#153705)


  Commit: 47bc6acf861e9b97b13ecbc4313001ee5d50adc1
      https://github.com/llvm/llvm-project/commit/47bc6acf861e9b97b13ecbc4313001ee5d50adc1
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn

  Log Message:
  -----------
  [gn build] Port d56fa965243b


  Commit: ffe48704721ec0710c7622d7f4170a9d03e77dbd
      https://github.com/llvm/llvm-project/commit/ffe48704721ec0710c7622d7f4170a9d03e77dbd
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __float2int_rX and __float2unit_rX (#153691)


  Commit: 8bce10ac6d3358d67d8ce3d111b455aca6b35654
      https://github.com/llvm/llvm-project/commit/8bce10ac6d3358d67d8ce3d111b455aca6b35654
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
    M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
    M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll

  Log Message:
  -----------
  [AMDGPU] Enable kernarg preload on gfx1250 (#153686)


  Commit: abe92a50005a2a4998e4a006417fdfe6ff36eb6b
      https://github.com/llvm/llvm-project/commit/abe92a50005a2a4998e4a006417fdfe6ff36eb6b
  Author: Min-Yih Hsu <min.hsu at sifive.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll

  Log Message:
  -----------
  [DAGCombine] Fix an incorrect folding of extract_subvector (#153709)

Reported from
https://github.com/llvm/llvm-project/pull/153393#issuecomment-3189898813

During DAGCombine, an intermediate extract_subvector sequence was
generated:
```
  t8: v9i16 = extract_subvector t3, Constant:i64<9>
t24: v8i16 = extract_subvector t8, Constant:i64<0>
```
And one of the DAGCombine rule which turns `(extract_subvector
(extract_subvector X, C), 0)` into `(extract_subvector X, C)` kicked in
and turn that into `v8i16 = extract_subvector t3, Constant:i64<9>`. But
it forgot to check if the extracted index is a multiple of the minimum
vector length of the result type, hence the crash.

This patch fixes this by adding an additional check.


  Commit: 3bc4d660823e72ef4c78d96a473818efc06c9e32
      https://github.com/llvm/llvm-project/commit/3bc4d660823e72ef4c78d96a473818efc06c9e32
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-libdevice.cuf

  Log Message:
  -----------
  [flang][cuda] Add interfaces for __int2float_rX (#153708)


  Commit: 07d3a73d70cac6e58ca9002c98e31423c26cc735
      https://github.com/llvm/llvm-project/commit/07d3a73d70cac6e58ca9002c98e31423c26cc735
  Author: Kyungwoo Lee <kyulee at meta.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/include/llvm/CGData/CodeGenData.h
    M llvm/include/llvm/CGData/CodeGenData.inc
    M llvm/include/llvm/CGData/StableFunctionMap.h
    M llvm/include/llvm/CGData/StableFunctionMapRecord.h
    M llvm/lib/CGData/CodeGenData.cpp
    M llvm/lib/CGData/CodeGenDataReader.cpp
    M llvm/lib/CGData/StableFunctionMap.cpp
    M llvm/lib/CGData/StableFunctionMapRecord.cpp
    M llvm/lib/CodeGen/GlobalMergeFunctions.cpp
    M llvm/test/ThinLTO/AArch64/cgdata-merge-write.ll
    M llvm/test/tools/llvm-cgdata/empty.test
    M llvm/test/tools/llvm-cgdata/error.test
    M llvm/test/tools/llvm-cgdata/merge-combined-funcmap-hashtree.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-archive.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-concat.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-double.test
    M llvm/test/tools/llvm-cgdata/merge-funcmap-single.test
    M llvm/tools/llvm-cgdata/Opts.td
    M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
    M llvm/unittests/CGData/StableFunctionMapTest.cpp

  Log Message:
  -----------
  Revert "[CGData] Lazy loading support for stable function map (#151660)"

This reverts commit 76dd742f7b32e4d3acf50fab1dbbd897f215837e.


  Commit: 769a9058c8d04fc920994f6a5bbb03c8a4fbcd05
      https://github.com/llvm/llvm-project/commit/769a9058c8d04fc920994f6a5bbb03c8a4fbcd05
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-08-15 (Fri, 15 Aug 2025)

  Changed paths:
    M llvm/benchmarks/CMakeLists.txt
    A llvm/benchmarks/RuntimeLibcalls.cpp
    M llvm/include/llvm/IR/RuntimeLibcalls.h
    M llvm/lib/IR/RuntimeLibcalls.cpp
    M llvm/lib/Object/IRSymtab.cpp
    M llvm/test/TableGen/RuntimeLibcallEmitter.td
    M llvm/unittests/IR/CMakeLists.txt
    A llvm/unittests/IR/RuntimeLibcallsTest.cpp
    M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp

  Log Message:
  -----------
  TableGen: Emit statically generated hash table for runtime libcalls (#150192)

a96121089b9c94e08c6632f91f2dffc73c0ffa28 reverted a change
to use a binary search on the string name table because it
was too slow. This replaces it with a static string hash
table based on the known set of libcall names. Microbenchmarking
shows this is similarly fast to using DenseMap. It's possibly
slightly slower than using StringSet, though these aren't an
exact comparison. This also saves on the one time use construction
of the map, so it could be better in practice.

This search isn't simple set check, since it does find the
range of possible matches with the same name. There's also
an additional check for whether the current target supports
the name. The runtime constructed set doesn't require this,
since it only adds the symbols live for the target.

Followed algorithm from this post
http://0x80.pl/notesen/2023-04-30-lookup-in-strings.html

I'm also thinking the 2 special case global symbols should
just be added to RuntimeLibcalls. There are also other global
references emitted in the backend that aren't tracked; we probably
should just use this as a centralized database for all compiler
selected symbols.


  Commit: 7e46f5db21d40dd386aced6586e5e1fa6892092f
      https://github.com/llvm/llvm-project/commit/7e46f5db21d40dd386aced6586e5e1fa6892092f
  Author: Steven Wu <stevenwu at apple.com>
  Date:   2025-08-14 (Thu, 14 Aug 2025)

  Changed paths:
    M llvm/include/llvm/Support/FileSystem.h
    M llvm/lib/Support/Unix/Path.inc
    M llvm/lib/Support/Windows/Path.inc
    M llvm/unittests/Support/Path.cpp

  Log Message:
  -----------
  [Support] Add mapped_file_region::sync(), equivalent to msync (#153632)


  Commit: d58e5df537386e6804be1599271b42c113cb5ba7
      https://github.com/llvm/llvm-project/commit/d58e5df537386e6804be1599271b42c113cb5ba7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-08-15 (Fri, 15 Aug 2025)

  Changed paths:
    M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
    M clang-tools-extra/clang-doc/JSONGenerator.cpp
    M clang-tools-extra/test/clang-doc/basic-project.mustache.test
    M clang-tools-extra/test/clang-doc/json/class-requires.cpp
    M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
    M clang-tools-extra/test/clang-doc/json/class-template.cpp
    M clang-tools-extra/test/clang-doc/json/class.cpp
    M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
    M clang-tools-extra/test/clang-doc/json/concept.cpp
    M clang-tools-extra/test/clang-doc/json/function-requires.cpp
    M clang-tools-extra/test/clang-doc/json/function-specifiers.cpp
    M clang-tools-extra/test/clang-doc/json/method-template.cpp
    M clang-tools-extra/test/clang-doc/json/namespace.cpp
    M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
    M clang-tools-extra/test/clang-doc/mustache-index.cpp
    M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
    M clang/include/clang/AST/Type.h
    M clang/include/clang/AST/TypeLoc.h
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDataLayout.h
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/include/clang/CIR/MissingFeatures.h
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
    M clang/lib/CIR/CodeGen/CIRGenBuilder.h
    M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
    M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
    M clang/lib/CIR/CodeGen/CIRGenFunction.h
    M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
    M clang/lib/CIR/Dialect/IR/CIRDataLayout.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
    M clang/lib/CodeGen/CodeGenFunction.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/lib/CodeGen/CodeGenModule.h
    M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
    M clang/lib/Sema/SemaType.cpp
    M clang/test/AST/ByteCode/vectors.cpp
    M clang/test/AST/ast-dump-templates.cpp
    M clang/test/CIR/CodeGen/globals.cpp
    M clang/test/CIR/CodeGen/virtual-function-calls.cpp
    A clang/test/CIR/IR/inline-asm.cir
    A clang/test/CIR/Lowering/inline-asm.cir
    M clang/test/CodeGen/2007-01-20-VectorICE.c
    A clang/test/CodeGen/cfi-salt.c
    M clang/test/CodeGen/palignr.c
    M clang/test/CodeGenHIP/hip-cumode.hip
    M clang/test/Driver/hip-macros.hip
    M clang/test/Headers/mm3dnow.c
    M clang/test/Headers/pmmintrin.c
    M clang/test/Headers/x86-intrinsics-headers.c
    M clang/test/Headers/x86intrin.c
    M clang/test/Headers/x86intrin.cpp
    M clang/test/Misc/pragma-attribute-supported-attributes-list.test
    A clang/test/Sema/attr-cfi-salt.c
    M compiler-rt/lib/builtins/cpu_model/x86.c
    M compiler-rt/test/asan/TestCases/Posix/fakestack_alignment.cpp
    M flang/lib/Frontend/CompilerInvocation.cpp
    M flang/module/cudadevice.f90
    M flang/test/Lower/CUDA/cuda-device-proc.cuf
    M flang/test/Lower/CUDA/cuda-libdevice.cuf
    A flang/test/Preprocessing/defines_pic_frontend.F90
    M lldb/cmake/modules/LLDBConfig.cmake
    M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
    M lldb/source/Plugins/Platform/Android/AdbClient.cpp
    M lldb/source/Plugins/Platform/Android/AdbClient.h
    M lldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
    M lldb/source/Plugins/Platform/Android/PlatformAndroid.h
    M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
    M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
    M lldb/test/Shell/Symtab/Inputs/simple.wasm.yaml
    M lldb/test/Shell/Symtab/symtab-wasm.test
    M lldb/unittests/Platform/Android/AdbClientTest.cpp
    M lldb/unittests/Platform/Android/PlatformAndroidTest.cpp
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/BinaryFormat/DXContainer.h
    M llvm/include/llvm/ProfileData/InstrProf.h
    M llvm/include/llvm/Support/DXILABI.h
    M llvm/include/llvm/Support/FileSystem.h
    M llvm/lib/Analysis/DXILResource.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/BinaryFormat/DXContainer.cpp
    M llvm/lib/CodeGen/InterleavedAccessPass.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
    M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/DXILABI.cpp
    M llvm/lib/Support/Unix/Path.inc
    M llvm/lib/Support/Windows/Path.inc
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPreloadKernArgProlog.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
    M llvm/lib/Target/AMDGPU/SIInstrFormats.td
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    M llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
    M llvm/lib/Target/DirectX/DXILRootSignature.h
    M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
    M llvm/lib/TargetParser/Host.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
    M llvm/lib/Transforms/Scalar/CMakeLists.txt
    M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
    M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
    M llvm/test/Analysis/DXILResource/buffer-frombinding.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
    A llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
    M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
    A llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics-gfx1250.ll
    A llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx1250.ll
    A llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
    M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
    A llvm/test/CodeGen/AMDGPU/remove-incompatible-wave64-feature.ll
    M llvm/test/CodeGen/DirectX/llc-pipeline.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-cbuffer-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-descriptor-table-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-root-descriptor-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-sampler.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation-fail-static-sampler-range.ll
    A llvm/test/CodeGen/DirectX/rootsignature-validation.ll
    A llvm/test/CodeGen/RISCV/pr153598.mir
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
    A llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
    M llvm/test/MC/AMDGPU/hsa-diag-v4.s
    A llvm/test/Transforms/InstCombine/invariant-metadata-propagation.ll
    M llvm/test/Transforms/JumpTableToSwitch/basic.ll
    A llvm/test/Transforms/LoopDistribute/cross-partition-access.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-mixed.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-avoid-scalarization.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-fneg.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-store.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-forced.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
    M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
    M llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
    M llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
    M llvm/test/Transforms/LoopVectorize/pr45525.ll
    M llvm/test/Transforms/LoopVectorize/runtime-check-readonly.ll
    M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
    M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
    M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
    M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
    M llvm/test/Transforms/LoopVectorize/scalable-predication.ll
    M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
    M llvm/test/Transforms/LoopVectorize/vectorize-force-tail-with-evl.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/sve-interleave-vectorization.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    A llvm/test/Transforms/SLPVectorizer/X86/control-deps-schedule-data-recalculate.ll
    M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
    M llvm/unittests/Support/Path.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
    M mlir/Maintainers.md
    M mlir/cmake/modules/AddMLIR.cmake
    M mlir/include/mlir/Conversion/LLVMCommon/MemRefBuilder.h
    M mlir/include/mlir/Conversion/LLVMCommon/Pattern.h
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
    M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
    M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
    M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
    M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
    M mlir/lib/Conversion/VectorToXeGPU/CMakeLists.txt
    M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
    M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
    M mlir/lib/Dialect/XeGPU/Utils/CMakeLists.txt
    M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
    M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
    M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
    M mlir/test/Dialect/Linalg/roundtrip.mlir
    M mlir/test/Dialect/XeGPU/invalid.mlir
    M offload/test/mapping/data_member_ref.cpp
    M offload/test/mapping/declare_mapper_nested_default_mappers.cpp
    M offload/test/mapping/declare_mapper_nested_mappers.cpp
    M offload/test/mapping/ptr_and_obj_motion.c
    M offload/test/mapping/target_derefence_array_pointrs.cpp
    M offload/test/mapping/target_has_device_addr.c
    M openmp/runtime/src/kmp_settings.cpp
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  Merge branch 'main' into users/arsenm/runtime-libcalls/return-stringref-libcall-names


Compare: https://github.com/llvm/llvm-project/compare/93d86a580fdb...d58e5df53738

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