[all-commits] [llvm/llvm-project] bdddff: [RISCV][RVV] Prohibit conversion of scalar store t...

[Sergey Kachkov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bdddff24888e9ad83acc602588292a8ecd95e60f
      https://github.com/llvm/llvm-project/commit/bdddff24888e9ad83acc602588292a8ecd95e60f
  Author: Sergey Kachkov <109674256+skachkov-sc at users.noreply.github.com>
  Date:   2025-08-13 (Wed, 13 Aug 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll

  Log Message:
  -----------
  [RISCV][RVV] Prohibit conversion of scalar store to single-element vse if vmv.x.s has multiple uses (#152112)

Godbolt example: https://godbolt.org/z/ThdfP475a

In the example single-element vse is used to store reduction result
instead of scalar store ([this optimization was introduced by this
patch](https://reviews.llvm.org/D109482)). However, vmv.x.s can't be
eliminated here because it has other uses (e.g. CopyToReg), so it seems
more profitable to use scalar store (we already have store value in a
scalar register, and can save one vsetvli which is likely to be required
for single-element vse). The proposed solution is to this transform only
if vmv.x.s has one use (in store instruction)



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