[all-commits] [llvm/llvm-project] 2ad1d7: [AArch64] Match constants in SelectSMETileSlice (#...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2ad1d77b17c393fd9e7d7f1e62ed65dc22f17aab
      https://github.com/llvm/llvm-project/commit/2ad1d77b17c393fd9e7d7f1e62ed65dc22f17aab
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2025-08-11 (Mon, 11 Aug 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    A llvm/test/CodeGen/AArch64/sme-tileslice-addrmodes.ll

  Log Message:
  -----------
  [AArch64] Match constants in SelectSMETileSlice (#151494)

If the slice is a constant then it should try to use `WZR + <imm>`
addressing mode if the constant fits the range.



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