[all-commits] [llvm/llvm-project] 4784ce: [SLP][NFC]Check an external user before trying to ...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Thu Aug 7 13:21:45 PDT 2025
Branch: refs/heads/users/boomanaiden154/ci-tee-ninja-output-to-log-files
Home: https://github.com/llvm/llvm-project
Commit: 4784ce9ebcf60274985b8fe9bf4d4eb8c734ce38
https://github.com/llvm/llvm-project/commit/4784ce9ebcf60274985b8fe9bf4d4eb8c734ce38
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Check an external user before trying to address it in debug dump, NFC
Commit: 056608a2821e34752b1e47f73a8d544b5c9ad787
https://github.com/llvm/llvm-project/commit/056608a2821e34752b1e47f73a8d544b5c9ad787
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC][NFC] Remove temporary assert from CIndex OpenACCBindClause
This was left over from implementation and shouldn't have been left in,
but in the end 'bind' doesn't require any additional work here, so this
patch removes the assert.
Commit: 3686e5b52f2a02c1c19050479d1dd0fd9d1dd4f8
https://github.com/llvm/llvm-project/commit/3686e5b52f2a02c1c19050479d1dd0fd9d1dd4f8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
Log Message:
-----------
[lldb] Eliminate (_)Py_IsFinalizing (NFC) (#152226)
Looking at the implementation of `pylifecycle.c` in cpython, finalizing
and initialized are set at the same time. Therefore we can eliminate the
call to `Py_IsFinalizing` and only check `Py_IsInitialized`, which is
part of the stable API.
I converted the check to an assert and confirmed that during my test
suite runs, we never got into the if block. Because we check before
taking the lock, there is an opportunity for a race, but that exact same
race exists with the original code.
Commit: 8e57689c34f0b0af70f9aaf009c3be0e85d90dda
https://github.com/llvm/llvm-project/commit/8e57689c34f0b0af70f9aaf009c3be0e85d90dda
Author: Daniel Henrique Barboza <dbarboza at ventanamicro.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
A llvm/test/CodeGen/RISCV/misched-store-clustering.ll
Log Message:
-----------
[RISCV] add load/store misched/PostRA subtarget features (#149409)
Some processors benefit more from store clustering than load clustering,
and vice-versa, depending on factors that are exclusive to each one
(e.g. macrofusions implemented).
Likewise, certain optimizations benefits more from misched clustering
than postRA clustering. Macrofusions are again an example: in a
processor with store pair macrofusions, like the veyron-v1, it is
observed that misched clustering increases the amount of macrofusions
more than postRA clustering. This of course isn't necessarily true for
other processors, but it shows that processors can benefit from a more
fine grained control of clustering mutations, and each one is able to do
it differently.
Add 4 new subtarget features that deprecates the existing
riscv-misched-load-store-clustering and
riscv-postmisched-load-store-clustering
options:
- disable-misched-load-clustering and disable-misched-store-clustering:
disable load/store clustering during misched;
- disable-postmisched-load-clustering and
disable-postmisched-store-clustering:
disable load/store clustering during PostRA.
Note that the new subtarget features disables specific stages of the
default
clustering settings. The default per se (load and store clustering for
both
misched and PostRA) is left untouched.
Disable all clustering but misched-store-clustering for the veyron-v1
processor
using the new features.
Commit: ef9834c5e846f794ddee4c0a530e280da0c8ad67
https://github.com/llvm/llvm-project/commit/ef9834c5e846f794ddee4c0a530e280da0c8ad67
Author: Daniel Rodríguez Troitiño <danielrodriguez at meta.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/test/tools/llvm-objdump/MachO/bad-trie.test
Log Message:
-----------
[llvm-objdump] Fix typo in error messages (#152234)
Some error messages were spelling "children" as "childern".
Commit: e232f05dfd0e2bc0eb060c8a7e6f5c946395358d
https://github.com/llvm/llvm-project/commit/e232f05dfd0e2bc0eb060c8a7e6f5c946395358d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
Log Message:
-----------
[RISCV] Add packw+packh isel pattern for unaligned loads on RV64. (#152159)
This is similar to an existing pattern from RV32 with the
simpliflication proposed by #152045. Instead of pack we need to use
packw and we need to know that the upper 32 bits are being ignored since
packw sign extends from bit 31.
The use of allBinOpWUsers prevents tablegen from automatically
reassociating the pattern so we need to do it manually. Tablegen is
still able to commute operands though.
Commit: 57045a137f97fe4e05d5d9581c0b2e4fd6c729e1
https://github.com/llvm/llvm-project/commit/57045a137f97fe4e05d5d9581c0b2e4fd6c729e1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] Avoid repeated calls to WideVT.getScalarSizeInBits() in DAGCombiner::mergeTruncStores. NFC (#152231)
We already have a variable, WideNumBits, that contains the same
information. Use it and delay the creation of WideVT until we really
need it.
Commit: 09146a21a5a7bbea19b5203d585682de519a213c
https://github.com/llvm/llvm-project/commit/09146a21a5a7bbea19b5203d585682de519a213c
Author: Steven Wu <stevenwu at apple.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/LTO/LTOModule.cpp
Log Message:
-----------
[LegacyLTO] Emit the error message that was silently dropped (#152172)
Using LLVMContext to emit the error from `TargetRegistry::lookupTarget`
that was silently ignored and not propagated. This allows user to better
identify the kind of error occured.
rdar://157542119
Commit: 4c9bb656393559437d72ac6d0b17c421dd5463bb
https://github.com/llvm/llvm-project/commit/4c9bb656393559437d72ac6d0b17c421dd5463bb
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/complex-arithmetic.cpp
A clang/test/CIR/CodeGen/complex-compound-assignment.cpp
Log Message:
-----------
[CIR] Plus & Minus CompoundAssignment support for ComplexType (#150759)
This change adds support for Plus & Minus CompoundAssignment for
ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: ab4090981012d4be142d0291aae7ed31ecf3ca9b
https://github.com/llvm/llvm-project/commit/ab4090981012d4be142d0291aae7ed31ecf3ca9b
Author: Sean Fertile <sd.fertile at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/aix-nest-param.ll
M llvm/test/CodeGen/PowerPC/aix-trampoline.ll
Log Message:
-----------
Implement the trampoline intrinsics and nest parameter for AIX. (#149388)
We can expand the init intrinsic to create a descriptor for the nested
procedure by combining the entry point and TOC pointer from the global
descriptor with the nest argument. The normal indirect call sequence
then calls the nested procedure through the descriptor like all other
calls. Patch also implements support for a nest parameter by mapping it
to gpr 11.
Commit: 180d162ca2b08f24702235cb6ce4b8be714efad8
https://github.com/llvm/llvm-project/commit/180d162ca2b08f24702235cb6ce4b8be714efad8
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
Log Message:
-----------
[analyzer] Remove impossible BugType from CStringChecker (#152163)
CStringChecker had an AdditionOverflow bug type which was intended for a
situation where the analyzer concludes that the addition of two
size/length values overflows `size_t`.
I strongly suspect that the analyzer could emit bugs of this type in
certain complex corner cases (e.g. due to inaccurate cast modeling), but
these reports would be all false positives because in the real world the
sum of two size/length values is always far below SIZE_MAX. (Although
note that there was no test where the analyzer emitted a bug with this
type.)
To simplify the code (and perhaps eliminate false positives), I
eliminated this bug type and replaced code that emits it by a simple
`addSink()` call (because we still want to get rid of the execution
paths where the analyzer has invalid assumptions).
Commit: 01b0fe3104d633d67d33a963142a54cd500e6b3c
https://github.com/llvm/llvm-project/commit/01b0fe3104d633d67d33a963142a54cd500e6b3c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI][NFC] Explicitly add libcxx/libcxxabi/libunwind to excludes (#152210)
This patch adds libcxx/libcxxabi/libunwind to the excludes list in
compute_projects.py for both Windows and MacOS. Neither of these
platforms have ever built the runtimes as the scripts do not have
support for it. Explicitly disable them so that compute_projects_test.py
is more consistent.
Commit: c548c47476ee3f4578db2ca4f82e097a728b5bff
https://github.com/llvm/llvm-project/commit/c548c47476ee3f4578db2ca4f82e097a728b5bff
Author: Oliver Hunt <oliver at apple.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact-disabled.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
Log Message:
-----------
[clang] Fix crash in dynamic_cast final class optimization (#152076)
This corrects the codegen for the final class optimization to
correct handle the case where there is no path to perform the
cast, and also corrects the codegen to handle ptrauth protected
vtable pointers.
As part of this fix we separate out the path computation as
that makes it easier to reason about the failure code paths
and more importantly means we can know what the type of the
this object is during the cast.
The allows us to use the GetVTablePointer interface which
correctly performs the authentication operations required when
pointer authentication is enabled. This still leaves incorrect
authentication behavior in the multiple inheritance case but
currently the optimization is disabled entirely if pointer
authentication is enabled.
Fixes #137518
Commit: f538f1ad972bd472104873869fd986469a53c57e
https://github.com/llvm/llvm-project/commit/f538f1ad972bd472104873869fd986469a53c57e
Author: Michael Jones <michaelrj at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCObjectRules.cmake
Log Message:
-----------
[libc] warn when depending on public entrypoints (#146163)
Add a cmake warning when an entrypoint or object library depends on a
public entrypoint.
Commit: 25bf86fedeb0dd46f4d3b6a434ef02e4e37c89f5
https://github.com/llvm/llvm-project/commit/25bf86fedeb0dd46f4d3b6a434ef02e4e37c89f5
Author: Steven Perron <stevenperron at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
Log Message:
-----------
[SPIRV] Add pass to replace gethandlefromimplicitbinding (#146756)
The HLSL frontend generates call to the intrinsic
@llvm.spv.resource.handlefromimplicitbinding to be able to access a
resource where the set and binding were not explicitly given in the
source code. Determining the correct set and binding cannot be done
during Clang's codegen or earlier because in DXIL, they must first
remove resource that are not accessed before assigning binding locations
to the resource without an explicit binding.
We will follow their lead.
This is a change from DXC, where implicit binding for SPIR-V are
assigned before optimizations.
See https://github.com/llvm/wg-hlsl/pull/309
Commit: b291d02a93bcd24c34cdc0febc327270dc9ceb0c
https://github.com/llvm/llvm-project/commit/b291d02a93bcd24c34cdc0febc327270dc9ceb0c
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC][NFCI] Add extra data to firstprivate recipe AST node
During implementation I found that I need some additional data in the
AST node for codegen, so this patch adds the second declaration
reference.
Commit: bb2642fab70fb4d59e431e01e319dcf6b90d88d8
https://github.com/llvm/llvm-project/commit/bb2642fab70fb4d59e431e01e319dcf6b90d88d8
Author: royitaqi <royitaqi at users.noreply.github.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
Log Message:
-----------
[vscode-lldb] Fix race condition when changing lldb-dap arguments (#151828)
# Problem
When the user changes lldb-dap's arguments (e.g. path), there is a race
condition, where the new lldb-dap process could be started first and
have set the extension's `serverProcess` and `serverInfo` according to
the new process, while the old lldb-dap process exits later and wipes
out these two fields.
Consequences:
1. This causes `getServerProcess()` to return `undefined` when it should
return the new process.
2. This also causes wrong behavior when starting the next debug session
that a new lldb-dap process will be started and the old not reused nor
killed.
# Fix
When wiping the two fields, check if `serverProcess` equals to the
process captured by the handler. If they equal, wipe the fields. If not,
then the fields have already been updated (either new process has
started, or the fields were already wiped out by another handler), and
so the wiping should be skipped.
Commit: ec138c7fa71d8b6d3894bc6d1c384a4cc3fa506e
https://github.com/llvm/llvm-project/commit/ec138c7fa71d8b6d3894bc6d1c384a4cc3fa506e
Author: Douglas <Douglas.Gliner at sony.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/test/SemaOpenACC/private_firstprivate_reduction_required_ops.cpp
Log Message:
-----------
[OpenACC] Improve C++20 compatibility of private/firstprivate test (#152233)
Under C++17, `DeletedCopy` and `DefaultedCopy` in the test
`clang/test/SemaOpenACC/private_firstprivate_reduction_required_ops.cpp`
are eligible for aggregate initialization. Under C++20 and up, that is
no longer the case. Therefore, an explicit constructor must be declared
to avoid additional diagnostics which the test does not expect.
This test was failing in our downstream testing where our toolchain uses
C++20 as the default dialect.
See this reduced example for more details:
https://godbolt.org/z/46oErYT43
Commit: 3f0c180ca07faf536d2ae0d69ec044fcd5a78716
https://github.com/llvm/llvm-project/commit/3f0c180ca07faf536d2ae0d69ec044fcd5a78716
Author: Jann Horn <jannh at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
A llvm/test/DebugInfo/X86/DW_AT_alloc_type.ll
Log Message:
-----------
[DebugInfo][DWARF] Add heapallocsite information (#132073)
LLVM currently stores heapallocsite information in CodeView debuginfo,
but not in DWARF debuginfo. Plumb it into DWARF as an LLVM-specific
extension.
heapallocsite debug information is useful when it is combined with
allocator instrumentation that stores caller addresses; I've used a
previous version of this patch for:
- analyzing memory usage by object type
- analyzing the distributions of values of class members
Other possible uses might be:
- attributing memory access profiles (for example, on Intel CPUs, from
PEBS records with Linear Data Address) to object types or specific
object members
- adding type information to crash/ASAN reports
Commit: 51e825dbfbe67ebad88c1912452db8fac0489439
https://github.com/llvm/llvm-project/commit/51e825dbfbe67ebad88c1912452db8fac0489439
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M lldb/source/Target/StackFrameRecognizer.cpp
Log Message:
-----------
[lldb] Use const ref for looping over frame recognizers (NFC) (#152334)
Commit: 0a23b22d1d43b2816e67aa8c328365b9bf114c74
https://github.com/llvm/llvm-project/commit/0a23b22d1d43b2816e67aa8c328365b9bf114c74
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[APFloat] Properly implement DoubleAPFloat::roundToIntegral
The previous implementation did not correctly handle double-doubles like
0x1p100 + 0x1p1 as the low order component would need more than a
106-bit significand to represent.
Commit: 477a65a051ce151895193f8dede1262fdc251132
https://github.com/llvm/llvm-project/commit/477a65a051ce151895193f8dede1262fdc251132
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/include/llvm/TextAPI/Architecture.h
M llvm/lib/TextAPI/Architecture.cpp
M llvm/lib/TextAPI/TextStubCommon.cpp
Log Message:
-----------
[TextAPI] Seperate out Arch name from enum label, NFCI (#152332)
The enum label e.g. `AK_arm64` is often the same as the architecture
name, but doesn't have to be. Seperate it out.
Commit: 503c0908c3450d228debd64baecf41df8f58476e
https://github.com/llvm/llvm-project/commit/503c0908c3450d228debd64baecf41df8f58476e
Author: Michael Jones <michaelrj at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/src/wctype/iswalpha.cpp
M libc/src/wctype/iswalpha.h
M libc/test/src/wctype/iswalpha_test.cpp
Log Message:
-----------
[libc] fix iswalpha signiture and test (#152343)
The iswalpha function is only working for characters in the ascii range
right now, which isn't ideal. Also it was returning a bool when the
function is supposed to return an int.
Commit: 266a1a819a4ed8b2a12cb47f088197e4dd038a54
https://github.com/llvm/llvm-project/commit/266a1a819a4ed8b2a12cb47f088197e4dd038a54
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/infrastructure/diagnostic.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/export-relpath.cpp
Log Message:
-----------
[clang-tools-extra][test] Fix missed %T removals from #151538 (#152345)
These tests are failing on our bots presumably due to these missing %T
replacements.
Commit: a1209d868632b8aea10450cd2323848ab0b6776a
https://github.com/llvm/llvm-project/commit/a1209d868632b8aea10450cd2323848ab0b6776a
Author: Andrew Lazarev <alazarev at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
A compiler-rt/test/ubsan_minimal/TestCases/misalignment.cpp
A compiler-rt/test/ubsan_minimal/TestCases/null.cpp
Log Message:
-----------
[ubsan_minimal] Allow UBSan handler from Minimal runtime to accept arguments (#152192)
+ Changed type_mismatch minimal handler to accept and print pointer.
This will allow to distinguish null pointer use, misallignment and
incorrect object size.
The change increases binary size by ~1% and has almost no performance
impact.
Fixes #149943
Commit: a418fa7cdcf4f334a1955389fcec483ea2c77c44
https://github.com/llvm/llvm-project/commit/a418fa7cdcf4f334a1955389fcec483ea2c77c44
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/include/llvm/TargetParser/Host.h
M llvm/lib/TargetParser/Host.cpp
M llvm/unittests/TargetParser/Host.cpp
Log Message:
-----------
[win][aarch64] Add support for detecting the Host CPU on Arm64 Windows (#151596)
Uses the `CP 4000` registry keys under
`HKLM\HARDWARE\DESCRIPTION\System\CentralProcessor\*` to get the
Implementer and Part, which is then provided to a modified form of
`getHostCPUNameForARM` to map to a CPU.
On my local Surface Pro 11 `llc --version` reports:
```
> .\build\bin\llc.exe --version
LLVM (http://llvm.org/):
LLVM version 22.0.0git
Optimized build with assertions.
Default target: aarch64-pc-windows-msvc
Host CPU: oryon-1
```
Commit: 0e0ea714f3079341b9e11eb478eb85400423ee7c
https://github.com/llvm/llvm-project/commit/0e0ea714f3079341b9e11eb478eb85400423ee7c
Author: royitaqi <royitaqi at users.noreply.github.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M lldb/docs/resources/lldbdap.md
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
Log Message:
-----------
[vscode-lldb] Add VS Code commands for high level debug workflow (#151827)
This allows other debugger extensions to leverage the `lldb-dap`
extension's settings and logic (e.g. "Server Mode").
Other debugger extensions can invoke these commands to resolve
configuration, create adapter descriptor, and get the `lldb-dap` process
for state tracking, additional interaction, and telemetry.
VS Code commands added:
* `lldb-dap.resolveDebugConfiguration`
* `lldb-dap.resolveDebugConfigurationWithSubstitutedVariables`
* `lldb-dap.createDebugAdapterDescriptor`
* `lldb-dap.getServerProcess`
Commit: 35bd40d321ccb2e646c112418ef32318dd0e040b
https://github.com/llvm/llvm-project/commit/35bd40d321ccb2e646c112418ef32318dd0e040b
Author: Daniel Henrique Barboza <dbarboza at ventanamicro.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/macro-fusions.mir
Log Message:
-----------
[RISCV] add more generic macrofusions (#151140)
These are some macrofusions that are used internally in Ventana in an
yet not upstreamed processor. Figured it would be good to contribute
them ahead of the processor to allow the community to also use them in
their own processors, while also alleaviting our own downstream upkeep.
The macrofusions being added are, considering load =
lb,lh,lw,ld,lbu,lhu,lwu:
- bfext (slli+srli)
- auipc+load
- lui+load
- add(.uw)+load
- addi+load
- shXadd(.uw)+load, where X=1,2,3
Commit: 32161e9de36a747dde22a06c1c99a6091eb2920b
https://github.com/llvm/llvm-project/commit/32161e9de36a747dde22a06c1c99a6091eb2920b
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
A llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
Log Message:
-----------
[AMDGPU] Do not fold an immediate into instructions with frame indexes (#151263)
Do not fold an immediate into an instruction that already has a frame
index operand. A frame index could possibly turn out to be another immediate.
Fixes: SWDEV-536263
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 3404c0b01302f1c4df0f9e7e61d22dc6f44674db
https://github.com/llvm/llvm-project/commit/3404c0b01302f1c4df0f9e7e61d22dc6f44674db
Author: Mikhail Gudim <mgudim at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
Log Message:
-----------
Slp basic test (#152355)
Add a basic test for SLPVectorizer to make sure that upcoming
refactoring patches don't break anything. Also, record a test for a
missed opportunity.
Commit: 80cf436a27be535b93fa453faa11c983ea59d444
https://github.com/llvm/llvm-project/commit/80cf436a27be535b93fa453faa11c983ea59d444
Author: lntue <lntue at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/test/src/stdfix/BitsFxTest.h
Log Message:
-----------
[libc] Fix undefined behavior in BitsFxTest.h (#152347)
Commit: 25d1285eecbab731eaf418c8aab44e4eb5f9e538
https://github.com/llvm/llvm-project/commit/25d1285eecbab731eaf418c8aab44e4eb5f9e538
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/scalable-predication.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[VPlan] Replace single-entry VPPhis with their incoming values.
Replace trivial, single-entry VPPhis with their incoming values,
Commit: 092388171f3f6c40b9244cc2ffbc89ce266680fd
https://github.com/llvm/llvm-project/commit/092388171f3f6c40b9244cc2ffbc89ce266680fd
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Introduce m_[Specific]ICmp matcher (#151540)
Commit: 3692c73ce415618351640497232cc07a8780d4c2
https://github.com/llvm/llvm-project/commit/3692c73ce415618351640497232cc07a8780d4c2
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg] Enable scalable vectorization of linalg.unpack (#149293)
This patch updates `vectorizeAsTensorUnpackOp` to support scalable
vectorization by requiring user-specified vector sizes for the _read_ operation
(rather than the _write_ operation) in `linalg.unpack`.
Conceptually, `linalg.unpack` consists of these high-level steps:
* **Read** from the source tensor using `vector.transfer_read`.
* **Transpose** the read value according to the permutation in the
`linalg.unpack` op (via `vector.transpose`).
* **Re-associate** dimensions of the transposed value, as specified by the op
(via `vector.shape_cast`)
* **Write** the result into the destination tensor via
`vector.transfer_write`.
Previously, the vector sizes provided by the user were interpreted as
write-vector sizes. These were used to:
* Infer read-vector sizes using the `inner_tiles` attribute of the unpack op.
* Deduce vector sizes for the transpose and shape cast operations.
* Ultimately determine the vector shape for the write.
However, this logic breaks when one or more tile sizes are dynamic. In such
cases, `vectorizeUnPackOpPrecondition` fails, and vectorization is rejected.
This patch switches the contract: users now directly specify the
"read-vector-sizes", which inherently encode all inner tile sizes - including
dynamic ones. It becomes the user's responsibility to provide valid sizes.
In practice, since `linalg.unpack` is typically constructed, tiled, and
vectorized by the same transformation pipeline, the necessary
"read-vector-sizes" should be recoverable.
Commit: 59231115b084474287fa85c8fc20697646373cc3
https://github.com/llvm/llvm-project/commit/59231115b084474287fa85c8fc20697646373cc3
Author: Anna Thomas <anna at azul.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
Log Message:
-----------
[Loads] Precommit tests for #149551. NFC
Add these tests that currently require predicated loads due to variable
start SCEV.
Commit: 0491d8bda73f88f5faff8523613f3dce19080b15
https://github.com/llvm/llvm-project/commit/0491d8bda73f88f5faff8523613f3dce19080b15
Author: David Green <david.green at arm.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-ext.ll
Log Message:
-----------
[AArch64] Treat single-vector ext as legal shuffle masks. (#151909)
We can generate ext from shuffles like <2, 3, 0, 1> from a single vector
source. Add handling to isShuffleMaskLegal to allow DAG combines to
optimize to it.
Commit: cae7bebcaa41e4c459e973b9688215f5a57bcb56
https://github.com/llvm/llvm-project/commit/cae7bebcaa41e4c459e973b9688215f5a57bcb56
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M flang-rt/lib/runtime/extensions.cpp
M flang/include/flang/Runtime/extensions.h
Log Message:
-----------
[flang-rt] Runtime implementation of extended intrinsic function SECNDS() (#152021)
Until the compiler part is fully hooked up via
https://github.com/llvm/llvm-project/pull/151878, tested this using
`external`:
```
external secnds
real s1, s2
s1 = secnds(0.0)
print *, "Seconds from midnight:", s1
call sleep(2)
s2 = secnds(s1)
print *, "Seconds from s1", s2
print *, "Seconds from midnight:", secnds(0.0)
end
```
Commit: 334d0be2d496af6c511d2efb183b862e7d911329
https://github.com/llvm/llvm-project/commit/334d0be2d496af6c511d2efb183b862e7d911329
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
Log Message:
-----------
[AMDGPU] Support 64-bit LDS atomic fadd on gfx1250 (#152368)
Commit: c2eddec4ff42eca8a93e3f8a0531dfb6e60a61ca
https://github.com/llvm/llvm-project/commit/c2eddec4ff42eca8a93e3f8a0531dfb6e60a61ca
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
Log Message:
-----------
[AMDGPU] System scope atomics are emulated over PCIe in gfx1250 (#152369)
HW will emulate unsupported PCIe atomics via CAS loop, we do not need to
expand these anymore.
Commit: 26dde15ed4f1310fa5df3baf03d802ea1cf009b8
https://github.com/llvm/llvm-project/commit/26dde15ed4f1310fa5df3baf03d802ea1cf009b8
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenACC.cpp
M clang/test/SemaOpenACC/private_firstprivate_reduction_required_ops.cpp
M clang/test/SemaOpenACC/sub-array.cpp
Log Message:
-----------
[OpenACC] Add warning for VLAs in a private/firstprivate clause
private/firstprivate typically do copy operations, however copying a VLA
isn't really possible. This patch introduces a warning to alert the
person that this copy isn't happening correctly.
As a future direction, we MIGHT consider doing additional work to make
sure they are initialized/copied/deleted/etc correctly.
Commit: 5a47a1828abeefe72c82f732b446cc319ef65a31
https://github.com/llvm/llvm-project/commit/5a47a1828abeefe72c82f732b446cc319ef65a31
Author: cmtice <cmtice at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libcxx/docs/Contributing.rst
Log Message:
-----------
[libcxx] Update testing documentation about CI container images. (#149192)
Add information to the libcxx testing documentation, about the names of
the new CI libcxx runner sets, their current values, and how to change
the values or the runner set being used.
Commit: d1b6ce50dffcc70cd1610515527b4645b1136d1c
https://github.com/llvm/llvm-project/commit/d1b6ce50dffcc70cd1610515527b4645b1136d1c
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
Log Message:
-----------
[AMDGPU] gfx1250 has fixed GETPC bug and also extended VA to 57 bits (#152373)
Commit: 381623eb11cefd3ac21a36d028ba4832643010ef
https://github.com/llvm/llvm-project/commit/381623eb11cefd3ac21a36d028ba4832643010ef
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port #151228: BFloat16 (#152377)
Commit: 351b38f266718d862aa122e56667d6582625c918
https://github.com/llvm/llvm-project/commit/351b38f266718d862aa122e56667d6582625c918
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/addrspacecast.mir
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/addrspacecast.ll
Log Message:
-----------
[AMDGPU] Mark address space cast from private to flat as divergent if target supports globally addressable scratch (#152376)
Globally addressable scratch is a new feature introduced in gfx1250.
However, this feature changes how scratch space is mapped into the flat
aperture, making address space casts from private to flat no longer
uniform.
Commit: 184821b63d769e48d8b89f70e8f7a5adbe429fae
https://github.com/llvm/llvm-project/commit/184821b63d769e48d8b89f70e8f7a5adbe429fae
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_ds.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_ds.txt
Log Message:
-----------
[AMDGPU] Add gfx1250 DS MC tests. NFC. (#152378)
Commit: 87404eaf0445c7e67091e4e71d6c1cfa6fd0edd4
https://github.com/llvm/llvm-project/commit/87404eaf0445c7e67091e4e71d6c1cfa6fd0edd4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Fix undefined behavior in DWARFExpressionTest
RegisterInfo is a trivial class and doesn't default initialize its
members. Thanks Alex for getting to the bottom of this.
Commit: c3103068b713dbed8d8ac75b165086a1a19c89e9
https://github.com/llvm/llvm-project/commit/c3103068b713dbed8d8ac75b165086a1a19c89e9
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
A llvm/test/MC/AMDGPU/gfx1250_asm_features.s
M llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop2_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3cx.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp8.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vsample_err.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp8.txt
Log Message:
-----------
[AMDGPU] Add more gfx1250 MC tests. NFC. (#152388)
These are already working, but left downstream.
Commit: 83e5a99ff6a5662b6e7fd6a0f9f21d70458022c2
https://github.com/llvm/llvm-project/commit/83e5a99ff6a5662b6e7fd6a0f9f21d70458022c2
Author: hidekisaito <hidekido at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/lit.cfg
M offload/test/sanitizer/use_after_free_2.c
A offload/test/sanitizer/use_after_free_3.c
Log Message:
-----------
[AMDGPU][Offload] Enable memory manager use for up to ~3GB allocation size in omp_target_alloc (#151882)
Enables AMD data center class GPUs to use memory manager memory pooling
up to 3GB allocation by default, up from the "1 << 13" threshold that
all plugin-nextgen devices use.
Commit: 66392a8d8d81e66ec09452d35c85147dafb07571
https://github.com/llvm/llvm-project/commit/66392a8d8d81e66ec09452d35c85147dafb07571
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_operands.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_operands.txt
Log Message:
-----------
[AMDGPU] Add XNACK_STATE_PRIV and _MASK gfx1250 registers (#152374)
Co-authored-by: Pierre Vanhoutryve <pierre.vanhoutryve at amd.com>
Co-authored-by: Pierre Vanhoutryve <pierre.vanhoutryve at amd.com>
Commit: 281e6d2cc498d05f3ca601e3b1d595420e7ed827
https://github.com/llvm/llvm-project/commit/281e6d2cc498d05f3ca601e3b1d595420e7ed827
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M mlir/CMakeLists.txt
R mlir/cmake/modules/FindLevelZero.cmake
A mlir/cmake/modules/FindLevelZeroRuntime.cmake
M mlir/lib/ExecutionEngine/CMakeLists.txt
A mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
M mlir/test/CMakeLists.txt
A mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/lit.local.cfg
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
Log Message:
-----------
[mlir][ExecutionEngine] Add LevelZeroRuntimeWrapper. (#151038)
Adds LevelZeroRuntime wrapper and tests.
Co-authored-by: Artem Kroviakov <artem.kroviakov at intel.com>
Co-authored-by: Nishant Patel <nishant.b.patel at intel.com>
---------
Co-authored-by: Artem Kroviakov <artem.kroviakov at intel.com>
Co-authored-by: Nishant Patel <nishant.b.patel at intel.com>
Commit: d54aa36146297ddfb764394c4f70b0758b75becd
https://github.com/llvm/llvm-project/commit/d54aa36146297ddfb764394c4f70b0758b75becd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/utils.sh
Log Message:
-----------
[CI] Refactor monolithic-* scripts to use common utils.sh
This patch refactors big chunks of the common functionality shared
between monolithic-linux.sh and monolithic-windows.sh to a separate
script, utils.sh, that is then sourced in both of the files. This makes
it a bit easier to maintain the scripts.
Platform differences should not be a large deal for the setup here as we
are using bash as the shell on both Linux and Windows.
Reviewers:
lnihlen, gburgessiv, Keenuts, DavidSpickett, dschuff, cmtice, Endilll
Reviewed By: DavidSpickett, cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/152199
Commit: 885ddf4a3a4948b67ce5e792a97bf5148e8b479e
https://github.com/llvm/llvm-project/commit/885ddf4a3a4948b67ce5e792a97bf5148e8b479e
Author: lntue <lntue at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/src/__support/FPUtil/rounding_mode.h
Log Message:
-----------
[libc] Fix constexpr FPUtils rounding_mode.h functions. (#152342)
Commit: d897355876287e410d35f1f0ac74d79955d50dd4
https://github.com/llvm/llvm-project/commit/d897355876287e410d35f1f0ac74d79955d50dd4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
A flang/include/flang/Lower/CUDA.h
R flang/include/flang/Lower/Cuda.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
A flang/lib/Lower/CUDA.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
Log Message:
-----------
[flang][cuda] Set the allocator of derived type component after allocation (#152379)
- Move the allocator index set up after the allocate statement otherwise
the derived type descriptor is not allocated.
- Support array of derived-type with device component
Commit: f61526971f9c62118090443c8b97fab07ae9499f
https://github.com/llvm/llvm-project/commit/f61526971f9c62118090443c8b97fab07ae9499f
Author: Andrew Lazarev <alazarev at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
R llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly/dot.ll
Log Message:
-----------
Revert "[WebAssembly] Constant fold wasm.dot" (#152382)
Reverts llvm/llvm-project#149619
It breaks ubsan bot:
https://lab.llvm.org/buildbot/#/builders/25/builds/10523
Earlier today the failure was hidden by another breakage that is fixed
now.
Commit: b296ea9c14af60f9b4faa26a39ecc52c1762c794
https://github.com/llvm/llvm-project/commit/b296ea9c14af60f9b4faa26a39ecc52c1762c794
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sop1.txt
Log Message:
-----------
[AMDGPU] s_get_shader_cycles_u64 gfx1250 instruction (#152390)
It is the same as reading SHADER_CYCLES_LO and SHADER_CYCLES_HI
but with a single instruction.
Commit: 09dbdf651470bb4c9e5b81986a47f7c495285fbe
https://github.com/llvm/llvm-project/commit/09dbdf651470bb4c9e5b81986a47f7c495285fbe
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[clang][Dependency Scanning] Move Module Timestamp Update After Compilation Finishes (#151774)
When two threads are accessing the same `pcm`, it is possible that the
reading thread sees the timestamp update, while the file on disk is not
updated.
This PR moves timestamp update from `writeAST` to
`compileModuleAndReadASTImpl`, so we only update the timestamp after the
file has been committed to disk.
rdar://152097193
Commit: e83abd774a4f7c09db26b886f8c686cdb373d1f7
https://github.com/llvm/llvm-project/commit/e83abd774a4f7c09db26b886f8c686cdb373d1f7
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/character_converter.h
M libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/__support/wchar/string_converter.h
M libc/src/__support/wchar/wcsnrtombs.h
M libc/test/src/__support/wchar/string_converter_test.cpp
Log Message:
-----------
[libc] Template StringConverter pop function to avoid duplicate code (#152204)
Addressed TODO to template the StringConverter pop functions to have a
single implementation (combine popUTF8 and popUTF32 into a single
templated pop function)
Commit: 7d3134f6cc59f47460646a13abcf824bae05d772
https://github.com/llvm/llvm-project/commit/7d3134f6cc59f47460646a13abcf824bae05d772
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
R flang/include/flang/Lower/CUDA.h
A flang/include/flang/Lower/Cuda.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
R flang/lib/Lower/CUDA.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
Log Message:
-----------
Revert "[flang][cuda] Set the allocator of derived type component after allocation" (#152402)
Reverts llvm/llvm-project#152379
Buildbot failure
https://lab.llvm.org/buildbot/#/builders/207/builds/4905
Commit: a7f1702f2c5d4601de962cde14af35c313c16902
https://github.com/llvm/llvm-project/commit/a7f1702f2c5d4601de962cde14af35c313c16902
Author: Florian Mayer <fmayer at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M clang/test/CodeGen/cfi-icall-generalize.c
Log Message:
-----------
[NFC] [CFI] correct comment in test (#152399)
It incorrectly stated that `const char*` gets normalized to ptr, while
it should say that `char*` does.
Commit: c4846d29cdefc5fb6858ccf0378a8103b659016b
https://github.com/llvm/llvm-project/commit/c4846d29cdefc5fb6858ccf0378a8103b659016b
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/character_converter.h
Log Message:
-----------
[libc] Move CharacterConverter template specialization to cpp file (#152405)
Fixes build errors caused by #152204
Commit: acb5d0c211f72ba370bfeea7e5bf3b108f84895a
https://github.com/llvm/llvm-project/commit/acb5d0c211f72ba370bfeea7e5bf3b108f84895a
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
Log Message:
-----------
[NFC][HLSL] Replace uses of `getResourceName`/`printEnum` (#152211)
Introduce the `enumToStringRef` enum into `ScopedPrinter.h` that
replicates `enumToString` behaviour, expect that instead of returning a
hex value string, it just returns an empty string. This allows us to
return a StringRef and easily check if an invalid enum was provided
based on the StringRef size
This then uses `enumToStringRef` to remove the redundant
`getResourceName` and `printEnum` functions.
Resolves: https://github.com/llvm/llvm-project/issues/151200.
Commit: 7694856fddbb3fed10076aefec75c9b512cc352e
https://github.com/llvm/llvm-project/commit/7694856fddbb3fed10076aefec75c9b512cc352e
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Fix TargetParserTests for big-endian hosts (#152407)
The new `sys::detail::getHostCPUNameForARM` for Windows (#151596) was
implemented using a C++ bit-field, which caused the associated unit
tests to fail on big-endian machines as it assumed a little-endian
layout.
This change switches from the C++ bit-field to LLVM's `BitField` type
instead.
Commit: 3d1c1a5277835baa3d71c23b396d2cbe594505d1
https://github.com/llvm/llvm-project/commit/3d1c1a5277835baa3d71c23b396d2cbe594505d1
Author: Wenju He <wenju.he at intel.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Set TARGET_FILE property for prepare-${obj_suffix} target (#152245)
The target's output bitcode `libclc_builtins_lib` is located in a
sub-directory in clang resource directory since df7473673214. Setting
TARGET_FILE property can allow targets in non-libclc project to obtain
the path to `libclc_builtins_lib`.
Commit: 886b2133e372108da7b19bd2634c28bdbdf8d04a
https://github.com/llvm/llvm-project/commit/886b2133e372108da7b19bd2634c28bdbdf8d04a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
Log Message:
-----------
[RISCV] Relax one of the zexti8 in the PACKH+PACK(W)/SLLI patterns. (#152384)
For RV32 we don't need the byte shifted by 24 to be zero extend
since the extended bits are shifted out.
For RV64, we don't need the byte shifted by 24 to be zero extended
if the upper 32 bits of the result aren't demanded.
Commit: 01472d8e357caa10964241ab50b3449014d1be12
https://github.com/llvm/llvm-project/commit/01472d8e357caa10964241ab50b3449014d1be12
Author: Thurston Dang <thurston at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M compiler-rt/lib/asan/asan_mapping.h
Log Message:
-----------
[NFC][asan] Update shadow mapping comments for AArch64 non-Android Linux (#152412)
This adds commentary to explain why ASan does not work for AArch64
non-Android Linux with 39-bit and 42-bit VMAs (e.g.,
https://github.com/llvm/llvm-project/issues/145259).
Additionally, it updates the 42-bit VMA shadow map comment, which has
been outdated for the last 10 years
(18b2258c92df93c83bc7fce94c20baff3c06e2c6 changed 39-bit and 42-bit to
use the same offset), and adds a comment for the 48-bit VMA shadow map.
Commit: 04672e20d43679db4b13b8f9d19e3a2b748bca4f
https://github.com/llvm/llvm-project/commit/04672e20d43679db4b13b8f9d19e3a2b748bca4f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILForwardHandleAccesses.cpp
A llvm/test/CodeGen/DirectX/issue-140819_allow_forward_handle_on_alloca.ll
Log Message:
-----------
[DirectX] ForwardHandle needs to check if globals were stored on allocas (#151751)
fixes #140819
SROA pass is making it so that some globals get loaded into stack
allocations. This means we find an alloca where we use to expect a load
and now need to walk an alloca -> store -> maybe load chain before we
find the global. Doing so fixes All but two instances of #137715 And
fixes every instance of `Load of "8.sroa.0" is not a global resource
handle we are currently seeing in the DML shaders.
Commit: 8381f95dec6d63158c034f7e173e37d97937b896
https://github.com/llvm/llvm-project/commit/8381f95dec6d63158c034f7e173e37d97937b896
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Fix mlir/tests after 281e6d2cc498d05f3ca601e3b1d595420e7ed827 (#152413)
Commit: 2696e8c1499682f0b1f357d9035ed59f544892f8
https://github.com/llvm/llvm-project/commit/2696e8c1499682f0b1f357d9035ed59f544892f8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Remove too restrictive assert for data transfer (#152398)
When the rhs is a an array element, the assert was triggered but this is
still a valid transfer. Remove the assert. The operation has a verifier
to check its validity.
Commit: a196281896de208fca1dde315e377a46ec9a2e66
https://github.com/llvm/llvm-project/commit/a196281896de208fca1dde315e377a46ec9a2e66
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M flang/include/flang/Support/Fortran.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Support/Fortran.cpp
R flang/test/Semantics/cuf17.cuf
Log Message:
-----------
[flang][cuda] Remove meaningless warning on CUDA shared arguments (#152404)
The warning in issued during the compatibility check makes little sense.
Just remove it as it is confusing.
Commit: df8da2ff8370fda479b5c118704af4f50e0d3536
https://github.com/llvm/llvm-project/commit/df8da2ff8370fda479b5c118704af4f50e0d3536
Author: Luke Lau <luke at igalia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
Log Message:
-----------
[VPlan] Support VPWidenPointerInductionRecipes with EVL tail folding (#152110)
Now that VPWidenPointerInductionRecipes are modelled in VPlan in
#148274, we can support them in EVL tail folding.
We need to replace their VFxUF operand with EVL as the increment is not
guaranteed to always be VF on the penultimate iteration, and UF is
always 1 with EVL tail folding.
We also need to move the creation of the backedge value to the latch so
that EVL dominates it.
With this we will no longer fail to convert a VPlan to EVL tail folding,
so adjust tryAddExplicitVectorLength to account for this. This brings us
to 99.4% of all vector loops vectorized on SPEC CPU 2017 with tail
folding vs no tail folding.
The test in only-compute-cost-for-vplan-vfs.ll previously relied on
widened pointer inductions with EVL tail folding to end up in a scenario
with no vector VPlans, so this also replaces it with an unvectorizable
fixed-order recurrence test from
first-order-recurrence-multiply-recurrences.ll that also gets discarded.
Commit: 0168324523a2f6f804b2c2a2190d659b28456230
https://github.com/llvm/llvm-project/commit/0168324523a2f6f804b2c2a2190d659b28456230
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Test compiler-rt when it's changed (#152425)
Commit: 44af26ea2e0b0fedb74276f9678eba4df5f83aab
https://github.com/llvm/llvm-project/commit/44af26ea2e0b0fedb74276f9678eba4df5f83aab
Author: Luke Lau <luke at igalia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
Log Message:
-----------
[LV] Fix EVL test after merge. NFC
Test was modified in both 25d1285eecbab731eaf418c8aab44e4eb5f9e538 and
df8da2ff8370fda479b5c118704af4f50e0d3536
Commit: d9f9064cfae6929db3f55f6146ee23447b4f9f80
https://github.com/llvm/llvm-project/commit/d9f9064cfae6929db3f55f6146ee23447b4f9f80
Author: Sharjeel Khan <sharjeelkhan at google.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
Log Message:
-----------
[ubsan_minimal] Add address argument to Android's abort message function (#152419)
https://github.com/llvm/llvm-project/pull/152192 forgot to make the
argument changes to Android code in UBsan minimal causing a build error
for Android LLVM:
```
/b/f/w/src/git/out/llvm-project/compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp:102:3: error: no matching function for call to 'format_msg'
102 | format_msg(kind, caller, msg_buf, msg_buf + sizeof(msg_buf));
| ^~~~~~~~~~
/b/f/w/src/git/out/llvm-project/compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp:37:13:
note: candidate function not viable: requires 5 arguments, but 4 were
provided
37 | static void format_msg(const char *kind, uintptr_t caller,
| ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
38 | const uintptr_t *address, char *buf,
const char *end) {
```
This change adds the address argument to abort_with_message just like
__ubsan_report_error_fatal so it can be passed to format_msg.
Commit: a04142f11f926d09059614a6170eff35a4ea6ff6
https://github.com/llvm/llvm-project/commit/a04142f11f926d09059614a6170eff35a4ea6ff6
Author: Luke Lau <luke at igalia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll
Log Message:
-----------
[LV][RISCV] Add check lines for scalable interleave costs. NFC
Previously we could only scalably vectorize interleave groups with
factor 2, but after 7ef77eb9984d1fb537a409cf4be89560fbb681fe we now
support all factors (available on RISC-V). So this adds the remaining
check lines for the scalable VFs.
Commit: 9a592d9a849dacf02ff571c81f2b3a805e9d13e5
https://github.com/llvm/llvm-project/commit/9a592d9a849dacf02ff571c81f2b3a805e9d13e5
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
Log Message:
-----------
[NVPTX] lower VECREDUCE min/max to 3-input on sm_100+ (#136253)
Add support for 3-input fmaxnum/fminnum/fmaximum/fminimum introduced in
PTX 8.8 for sm_100+:
- Use a tree reduction when 3-input operations are supported and the
reduction has the `reassoc` flag.
- If not on sm_100+/PTX 8.8, fallback to 2-input operations and use the
default shuffle reduction.
Commit: eb0ddba26b6a265b44b442ae666db43b9f28b26a
https://github.com/llvm/llvm-project/commit/eb0ddba26b6a265b44b442ae666db43b9f28b26a
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
A flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/ConvertVariable.h
R flang/include/flang/Lower/Cuda.h
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
A flang/lib/Lower/CUDA.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
Log Message:
-----------
Reland "[flang][cuda] Set the allocator of derived type component after allocation" (#152418)
Reviewed in #152379
- Move the allocator index set up after the allocate statement otherwise
the derived type descriptor is not allocated.
- Support array of derived-type with device component
Commit: 35f003d13bce7f1a991d6a059c9c25e72009022c
https://github.com/llvm/llvm-project/commit/35f003d13bce7f1a991d6a059c9c25e72009022c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-08-06 (Wed, 06 Aug 2025)
Changed paths:
M flang/lib/Lower/CUDA.cpp
Log Message:
-----------
[flang][cuda] Fix buildbot after #152418 (#152437)
Commit: 13daf3b70c6e8991c846e8384de47c5e84a94480
https://github.com/llvm/llvm-project/commit/13daf3b70c6e8991c846e8384de47c5e84a94480
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
M llvm/test/Transforms/GVN/PRE/phi-translate-add.ll
M llvm/test/Transforms/GVN/PRE/phi-translate.ll
M llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
M llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
M llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
M llvm/test/Transforms/GVN/PRE/pre-load-dbg.ll
M llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/pre-load.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
M llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
M llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
M llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
M llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
Log Message:
-----------
[GVN-PRE][Tests] Add MSSA coverage to some more tests [4/N] (#151919)
This should be the final PR for tests under PRE.
Commit: 0abf4975bbf176d393869d290d55748794e220c4
https://github.com/llvm/llvm-project/commit/0abf4975bbf176d393869d290d55748794e220c4
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Do not warn about class methods with libc function names (#151270)
This commit fixes the false positive that C++ class methods with libc
function names would be false warned about. For example,
```
struct T {void strcpy() const;};
void test(const T& t) { str.strcpy(); // no warn }
```
rdar://156264388
Commit: 0a72e6ddac0f9154b806c40992d1616fa86957d8
https://github.com/llvm/llvm-project/commit/0a72e6ddac0f9154b806c40992d1616fa86957d8
Author: Matthias Springer <me at m-sp.org>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] `ConversionPatternRewriter`: Add `config` getter (#152310)
Add a helper function to `ConversionPatternRewriter` that returns the
dialect conversion configuration. This flag is useful when migrating
conversion patterns to the new One-Shot Conversion Driver: patterns can
check if they are running in rollback mode or not. They can then work
around API changes and makes sure that the pattern keeps working with
both the old and new driver.
Also remove the `config` field from `OperationLegalizer`. That field was
never needed.
Commit: 71832a3139b454f8e714ff54e8bb0ea12dc095f5
https://github.com/llvm/llvm-project/commit/71832a3139b454f8e714ff54e8bb0ea12dc095f5
Author: Matthias Springer <me at m-sp.org>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/docs/DialectConversion.md
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Make lookup without type converter unambiguous (#151747)
When a conversion pattern is initialized without a type converter, the
driver implementation currently looks up the most recently mapped value.
This is undesirable because the most recently mapped value could be a
materialization. I.e., the type of the value being looked up could
depend on which other patterns have run before. Such an implementation
makes the type conversion infrastructure fragile and unpredictable.
The current implementation also contradicts the documentation in the
markdown file. According to that documentation, the values provided by
the adaptor should match the types of the operands of the match
operation when running without a type converter. This mechanism is not
desirable, either, for two reasons:
1. Some patterns have started to rely on receiving the most recently
mapped value. Changing the behavior to the documented behavior will
cause regressions. (And there would be no easy way to fix those without
forcing the use of a type converter or extending the `getRemappedValue`
API.)
2. It is more useful to receive the most recently mapped value. A value
of the original operand type can be retrieved by using the operand of
the matched operation. The adaptor is not needed at all in that case.
To implement the new behavior, materializations are now annotated with a
marker attribute. The marker is needed because not all
`unrealized_conversion_cast` ops are materializations that act as "pure
type conversions". E.g., when erasing an operation, its results are
mapped to newly-created "out-of-thin-air values", which are
materializations (with no input) that should be treated like regular
replacement values during a lookup. This marker-based lookup strategy is
also compatible with the One-Shot Dialect Conversion implementation
strategy, which does not utilize the mapping infrastructure anymore and
queries all necessary information by examining the IR.
Commit: a485e0eae01beaf68a94d1f050838866e849bd48
https://github.com/llvm/llvm-project/commit/a485e0eae01beaf68a94d1f050838866e849bd48
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Retrieve vector TC for epilogue from resume phi (NFC).
Instead of relying on getOrCreateVectorTripCount to initialize
EPI.VectorTripCount, delay initialization after we retrieved the resume
phi and get the trip count from there. This makes the code independent
of legacy vector trip count creation.
Commit: edad89e4e052b0b7d0fe4943669b3b7c55d837a4
https://github.com/llvm/llvm-project/commit/edad89e4e052b0b7d0fe4943669b3b7c55d837a4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/mmintrin.h
M clang/test/CodeGen/X86/mmx-builtins.c
Log Message:
-----------
[Headers][X86] Update MMX arithmetic intrinsics to be used in constexpr (#152296)
Update the easy add/sub/mul/logic/cmp/scalar_to_vector intrinsics to be
constexpr compatible.
I'm not expecting anyone to be very interested in using MMX intrinsics,
but they're smaller than the other types and are useful to test the
constexpr handling and test methods before we start applying them to
SSE/AVX2/AVX512 intrinsics.
Commit: 406d9b1dd6522cf18e61c4c4af66db765de8afed
https://github.com/llvm/llvm-project/commit/406d9b1dd6522cf18e61c4c4af66db765de8afed
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/TargetCallingConv.h
M llvm/include/llvm/Target/TargetCallingConv.td
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/lib/Target/Mips/MipsCCState.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/PowerPC/PPCCCState.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
Log Message:
-----------
[CodeGen] Move IsFixed into ArgFlags (NFCI) (#152319)
The information whether a specific argument is vararg or fixed is
currently stored separately from all the other argument information in
ArgFlags. This means that it is not accessible from CCAssign, and
backends have developed all kinds of workarounds for how they can access
it after all.
Move this information to ArgFlags to make it directly available in all
relevant places.
I've opted to invert this and store it as IsVarArg, as I think that both
makes the meaning more obvious and provides for a better default (which
is IsVarArg=false).
Commit: 1110e2ff9f8d055af0b81267bf01d720421b4b70
https://github.com/llvm/llvm-project/commit/1110e2ff9f8d055af0b81267bf01d720421b4b70
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
InlineFunction: Split inlining into predicate and apply functions (#134213)
This is to support a new inline function reduction in llvm-reduce,
which should pre-filter callsites that are not eligible for inlining.
This code was mostly structured as a match and apply, with a few
exceptions. The ugliest piece is for propagating and verifying
compatible
getGC and personalities. Also collection of EHPad and the convergence
token
to use are now cached in InlineFunctionInfo.
I was initially confused by the split between the checks performed here
and isInlineViable, so better document how this system is supposed to
work.
It turns out this split does make sense, in that isInlineViable checks
if it's possible based on the callee content and the ultimate inline
depended on the callsite context. I think more renames of these
functions
would help, and isInlineViable should probably move out of InlineCost to
be
with these transfoms.
Commit: a3e068552923c0047f8a9c27c6558697b9371ed7
https://github.com/llvm/llvm-project/commit/a3e068552923c0047f8a9c27c6558697b9371ed7
Author: Matthias Springer <me at m-sp.org>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] More detailed error message when new IR cannot be legalized (#152297)
Print a more detailed error message when new/modified IR could not be
legalized with `allowPatternRollback = false`. This is useful to
understand why a pattern is incompatible with the new One-Shot Dialect
Conversion driver.
---------
Co-authored-by: Jeremy Kun <jkun at google.com>
Commit: f44d8d583c646baee12646f1609683c9afe48e33
https://github.com/llvm/llvm-project/commit/f44d8d583c646baee12646f1609683c9afe48e33
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
Log Message:
-----------
AMDGPU: Add a few missing mfma rewrite tests (#152434)
Test other splitting situations that appear in greedy.
This includes ensuring we have a case that hits a local split
and instruction split (most of the tests hit the region split path).
Also test a few cases where the final result isn't fully used, resulting
in partial copy bundles instead of a simple full copy. Test physreg
and virtreg agpr interference with a reassignment candidate.
I'm accumulating too many failure cases, and MIR tests are very prone
to painful merge conflicts, so I've added a few more tests and extracted
new tests from #147975.
Closes #149026
Commit: b83f7f195c64ab1c87ceea9cda9b54eaae893cdb
https://github.com/llvm/llvm-project/commit/b83f7f195c64ab1c87ceea9cda9b54eaae893cdb
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[Headers][X86] Update SSE/AVX and/andnot/or/xor intrinsics to be used in constexpr (#152305)
Commit: 6abf4f376efe9a708587e8f35d30ab850545d92f
https://github.com/llvm/llvm-project/commit/6abf4f376efe9a708587e8f35d30ab850545d92f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avxintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
Log Message:
-----------
[Headers][X86] Allow AVX movddup/movsldup/movshdup intrinsics to be used in constexpr (#152340)
Matches SSE3 handling
Commit: 6897ca460e6e28bcf76ae941438dd1313426e0bb
https://github.com/llvm/llvm-project/commit/6897ca460e6e28bcf76ae941438dd1313426e0bb
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
R libcxx/include/__fwd/map.h
R libcxx/include/__fwd/set.h
M libcxx/include/__tree
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/set
Log Message:
-----------
[libc++] Remove unnecessary friend declarations from <__tree> (#152133)
Removing the unnecessary friend declarations from `<__tree>` also
removes the need for forward declaration headers for `map` and `set`,
which this patch also removes.
Commit: 7402cd6ded243972ab9a70da83845bce66e502c6
https://github.com/llvm/llvm-project/commit/7402cd6ded243972ab9a70da83845bce66e502c6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
Log Message:
-----------
AMDGPU: Disable AGPR selection in mfma rewrite test
This makes the test actually test the intended rewrite
pass. Also add some tests with inline immediates in src2.
Switch the target to gfx942 for future test functions.
Commit: 0b3ee2093954dd3c5a201eba4b7641adadd9b2c6
https://github.com/llvm/llvm-project/commit/0b3ee2093954dd3c5a201eba4b7641adadd9b2c6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 6897ca460e6e
Commit: 6ce68d3a12fb70a8a1247823e2c90a5a1dd4531d
https://github.com/llvm/llvm-project/commit/6ce68d3a12fb70a8a1247823e2c90a5a1dd4531d
Author: Chaitanya Koparkar <ckoparkar at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
Log Message:
-----------
[DAG] canCreateUndefOrPoison - add FP_EXTEND (#152249)
Fixes https://github.com/llvm/llvm-project/issues/152141
Commit: 4da745a0f4fad9026dd4a84d4a9f169166575b80
https://github.com/llvm/llvm-project/commit/4da745a0f4fad9026dd4a84d4a9f169166575b80
Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Profile/CMakeLists.txt
Log Message:
-----------
[BOLT] Fix unit test failures with LLVM_LINK_LLVM_DYLIB=ON (#152190)
When LLVM_LINK_LLVM_DYLIB is ON, `check-bolt` target reports unit test
failures:
BOLT-Unit :: Core/./CoreTests/failed_to_discover_tests_from_gtest
BOLT-Unit :: Profile/./ProfileTests/failed_to_discover_tests_from_gtest
The reason is that when llvm-lit runs a unit-test executable:
/path/to/CoreTests --gtest_list_tests '--gtest_filter=-*DISABLED_*'
an assertion is triggered with the following message:
LLVM ERROR: Option 'default' already exists!
This assertion triggers when the initializer of defaultListDAGScheduler
defined at SelectionDAGISel.cpp:219 is called as a statically-linked
function after already being called during the initialization of
libLLVM.
The issue can be traced down to LLVMTestingSupport library which depends
on libLLVM as neither COMPONENT_LIB nor DISABLE_LLVM_LINK_LLVM_DYLIB is
specified in a call to `add_llvm_library(LLVMTestingSupport ...)`.
Specifying DISABLE_LLVM_LINK_LLVM_DYLIB for LLVMTestingSupport makes
Clang unit test fail and COMPONENT_LIB is probably inappropriate for a
testing-specific library, thus as a workaround, added Error.cpp source
from LLVMTestingSupport directly to the list of source files of
CoreTests target (as it depends on
`llvm::detail::TakeError(llvm::Error)`) and removed LLVMTestingSupport
from the list of dependencies of ProfileTests.
Commit: d618c36cb7a8c7951fb7532c07ea313b2d7ec1a7
https://github.com/llvm/llvm-project/commit/d618c36cb7a8c7951fb7532c07ea313b2d7ec1a7
Author: Wenju He <wenju.he at intel.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Add missing clc/lib/ptx-nvidiacl/SOURCES to CMAKE_CONFIGURE_DEPENDS (#152431)
Commit: b9e133d5b6e41b652ba579bcb8850c00f72d0f01
https://github.com/llvm/llvm-project/commit/b9e133d5b6e41b652ba579bcb8850c00f72d0f01
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
Log Message:
-----------
[AArch64][SVE] Use FeatureUseFixedOverScalableIfEqualCost for A320 (#152156)
With this new A320 in-order core, we follow adding the
FeatureUseFixedOverScalableIfEqualCost feature to A510 and A520
(#132246), which reaps the same code generation benefits of preferring
fixed over scalable when the cost is equal.
So when we have:
```
void foo(float* a, float* b, float* dst, unsigned n) {
for (unsigned i = 0; i < n; ++i)
dst[i] = a[i] + b[i];
}
```
When compiling without the feature enabled, we get:
```
...
ld1b { z0.b }, p0/z, [x0, x10]
ld1b { z2.b }, p0/z, [x1, x10]
add x12, x0, x10
ldr z1, [x12, #1, mul vl]
add x12, x1, x10
ldr z3, [x12, #1, mul vl]
fadd z0.s, z2.s, z0.s
add x12, x2, x10
fadd z1.s, z3.s, z1.s
dech x11
st1b { z0.b }, p0, [x2, x10]
incb x10, all, mul #2
str z1, [x12, #1, mul vl]
...
```
When compiling with, we get:
```
...
ldp q0, q1, [x12, #-16]
ldp q2, q3, [x11, #-16]
subs x13, x13, #8
fadd v0.4s, v2.4s, v0.4s
fadd v1.4s, v3.4s, v1.4s
add x11, x11, #32
add x12, x12, #32
stp q0, q1, [x10, #-16]
add x10, x10, #32
...
```
Commit: a44532544bd96c68ce2bc885d0cc0c4c9116f8b1
https://github.com/llvm/llvm-project/commit/a44532544bd96c68ce2bc885d0cc0c4c9116f8b1
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[Offload] Don't create events for empty queues (#152304)
Add a device function to check if a device queue is empty. If liboffload
tries to create an event for an empty queue, we create an "empty" event
that is already complete.
This allows `olCreateEvent`, `olSyncEvent` and `olWaitEvent` to run
quickly for empty queues.
Commit: c869ef6ebc4882978252c3a98279928b31b58135
https://github.com/llvm/llvm-project/commit/c869ef6ebc4882978252c3a98279928b31b58135
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Refactor Check* functions (#152300)
... so we don't have to create Pointer instances when we don't need
them.
Commit: 6cd6de5bc0c8b09b3a252bfb8a62870c1cdede4c
https://github.com/llvm/llvm-project/commit/6cd6de5bc0c8b09b3a252bfb8a62870c1cdede4c
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[llvm][cmake] Remove version number from runtimes in PROJECTS warnings (#152457)
Judging from the reaction to
https://github.com/llvm/llvm-project/pull/152302, we are not ready to
make this a fatal error.
Remove the specific version number, and update the libc message to match
the others' wording.
Commit: aeeb9b507750553f0e85584bda20b8d2373b3bda
https://github.com/llvm/llvm-project/commit/aeeb9b507750553f0e85584bda20b8d2373b3bda
Author: Ayke <aykevanlaethem at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/test/CodeGen/AVR/cmp.ll
Log Message:
-----------
[AVR] Fix codegen after getConstant assertions got enabled (#152269)
This fixes https://github.com/llvm/llvm-project/issues/152097
This commit fixes two instances of a (somewhat) recently enabled
assertion. One with a test, the other I can't reproduce (might be dead
code) but certainly looks like an instance of the same problem.
The PR that introduced the regression:
https://github.com/llvm/llvm-project/pull/117558
With this patch, the AVR backend is usable again for TinyGo.
Commit: 565f707beb176c81b3c18651f280304484378f2a
https://github.com/llvm/llvm-project/commit/565f707beb176c81b3c18651f280304484378f2a
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
R llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
A llvm/test/CodeGen/AArch64/aarch64-split-logic-bitmask-immediate.ll
Log Message:
-----------
[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)
This patch extends #149095 for EOR and ORR.
It uses a simple partition scheme to try to find two suitable disjoint
bitmasks that can be used with EOR/ORR to reconstruct the original mask.
Fixes: #148987.
Commit: 04196ba01a4d2ea1649836d769e5651e89c05a82
https://github.com/llvm/llvm-project/commit/04196ba01a4d2ea1649836d769e5651e89c05a82
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/lib/Analysis/DependenceAnalysis.cpp
Log Message:
-----------
[DA][NFC] clang-format DependenceAnalysis (#151505)
To avoid noise in PRs such as in #146383.
Commit: 95c32bf2d46ddd2c10dae426c75aa4dddcb146df
https://github.com/llvm/llvm-project/commit/95c32bf2d46ddd2c10dae426c75aa4dddcb146df
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
Log Message:
-----------
[VPlan] Return invalid cost if any skeleton block has invalid costs. (#151940)
We need to reject plans that contain recipes with invalid costs. LICM
can move recipes with invalid costs out of the loop region, which then
get missed by the main cost computation.
Extend the logic to check recipes for invalid cost currently only
covering the middle block to include all skeleton blocks.
Fixes https://github.com/llvm/llvm-project/issues/144358
Fixes https://github.com/llvm/llvm-project/issues/151664
PR: https://github.com/llvm/llvm-project/pull/151940
Commit: 5805e887458801f2756d0466b84b712472507f2f
https://github.com/llvm/llvm-project/commit/5805e887458801f2756d0466b84b712472507f2f
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/avx512fintrin.h
M clang/test/CodeGen/X86/avx512-reduceIntrin.c
M clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
Log Message:
-----------
[Headers][X86] Allow AVX512 reduction intrinsics to be used in constexpr (#152363)
Closes #152324.
Part of #30794.
This PR adds `constexpr` support for the following AVX512 integer
reduction intrinsics:
- `_mm512_reduce_add_epi32`
- `_mm512_reduce_add_epi64`
- `_mm512_reduce_mul_epi32`
- `_mm512_reduce_mul_epi64`
- `_mm512_reduce_and_epi32`
- `_mm512_reduce_and_epi64`
- `_mm512_reduce_or_epi32`
- `_mm512_reduce_or_epi64`
- `_mm512_reduce_max_epi32`
- `_mm512_reduce_max_epi64`
- `_mm512_reduce_min_epi32`
- `_mm512_reduce_min_epi64`
- `_mm512_reduce_max_epu32`
- `_mm512_reduce_max_epu64`
- `_mm512_reduce_min_epu32`
- `_mm512_reduce_min_epu64`
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 47944d071f27c04c1cccf51926eb14062471f6cc
https://github.com/llvm/llvm-project/commit/47944d071f27c04c1cccf51926eb14062471f6cc
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
Log Message:
-----------
[LV] Auto-generate checks for sve-low-trip-count.ll.
Auto-generate checks for
https://github.com/llvm/llvm-project/pull/151925. Also update some
naming to make more consistent with other tests.
Commit: 46a8c094894e22d553cc527f9536b05db53250e8
https://github.com/llvm/llvm-project/commit/46a8c094894e22d553cc527f9536b05db53250e8
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.h
Log Message:
-----------
[NFC][analyzer] Conversion to CheckerFamily: RetainCountChecker (#152138)
This commit converts RetainCountChecker to the new checker family
framework that was introduced in the commit
6833076a5d9f5719539a24e900037da5a3979289
This commit also performs some minor cleanup around the parts that had
to be changed, but lots of technical debt still remains in this old
codebase.
Commit: 109040acec00e5beaef35e51df3d73d5ba4212a4
https://github.com/llvm/llvm-project/commit/109040acec00e5beaef35e51df3d73d5ba4212a4
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
A clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/LangOptions.h
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[Clang][NFC] Enumerate Clang ABI versions in a separate header file (#151995)
Make it easier for us to add ABI versions.
Close #144332
Commit: 246990dc029620619f41b6bd3bd7ba67ada1a384
https://github.com/llvm/llvm-project/commit/246990dc029620619f41b6bd3bd7ba67ada1a384
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/MC/ELF/many-instructions.s
Log Message:
-----------
[llvm][MC][test] Disable many-instructons.s on 32-bit systems
Added by https://github.com/llvm/llvm-project/pull/150846.
Checks the size of a structure, which is only correct for 64-bit
systems.
Commit: e1d67530065efb64dba2f716a355a40535f4a19d
https://github.com/llvm/llvm-project/commit/e1d67530065efb64dba2f716a355a40535f4a19d
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avxintrin.h
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
Log Message:
-----------
[Headers][X86] Update AVX/AVX512 float/double add/sub/mul/div/unpck intrinsics to be used in constexpr (#152435)
Fixed #152313
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 474bbc17831e45ae855b7385512d97c519c640fb
https://github.com/llvm/llvm-project/commit/474bbc17831e45ae855b7385512d97c519c640fb
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/Support/GraphWriter.h
Log Message:
-----------
[Support] Enable CRTP for GraphWriter (NFC) (#152322)
Previously, specializing the GraphWriter class required a full class
specialization.
This change introduces CRTP for GraphWriter, allowing for partial
specialization.
This change is in support of printing the module dependency graph as
part of the RFC for driver-managed module builds, for which we want to
print the graph nodes in a more human-readable format by:
- Printing descriptive IDs instead of pointer addresses as node labels.
- Printing the full node labels separately from the node relations to
avoid clutter.
With this approach, only GraphWriter::writeNodes() needs to be
specialized (, aside from DOTGraphTraits).
RFC for driver-managed module builds:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
Commit: 4784585747423a8ed6e3acbe3c8fbe97ba362cc5
https://github.com/llvm/llvm-project/commit/4784585747423a8ed6e3acbe3c8fbe97ba362cc5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpState.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unnecessary local variable (#152468)
Desc is only used once and we can get that information from the Block as
well.
Commit: fee6e539d0a052ca1f20adf55521856bfc5d5b26
https://github.com/llvm/llvm-project/commit/fee6e539d0a052ca1f20adf55521856bfc5d5b26
Author: Abhilash Majumder <30946547+abhilash1910 at users.noreply.github.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
A llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
Log Message:
-----------
[NVPTX] Add prefetch tensormap variant (#146203)
[NVPTX] Add Prefetch tensormap intrinsics
This PR adds prefetch intrinsics with the relevant tensormap_space.
* Lit tests are added as part of prefetch.ll
* The generated PTX is verified with a 12.3 ptxas executable.
* Added docs for these intrinsics in NVPTXUsage.rst.
For more information, refer to the PTX ISA for prefetch intrinsic :
[Prefetch
Tensormap](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-prefetch-prefetchu)
@durga4github @schwarzschild-radius
Commit: edeee824f044b834ec0bc8380afc345bb1a58f35
https://github.com/llvm/llvm-project/commit/edeee824f044b834ec0bc8380afc345bb1a58f35
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/exp.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fround.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
Log Message:
-----------
Reland [VectorUtils] Trivially vectorize ldexp, [l]lround (#152476)
Changes: The original patch, landed as 1336675, was reverted due to a
bug in LoopVectorize resulting in a crash. The bug has now been fixed by
95c32bf ([VPlan] Return invalid cost if any skeleton block has invalid
costs), and this reland is identical to the original patch.
Commit: f24c50a635cbdbd214e02866a8cb22232862c3ff
https://github.com/llvm/llvm-project/commit/f24c50a635cbdbd214e02866a8cb22232862c3ff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/test/CodeGen/X86/avx512dq-builtins.c
Log Message:
-----------
[X86] avx512dq-builtins.c - add C/C++ and 32/64-bit test coverage
Inspired by #152478
Commit: ceda56be7f03a790ea777e8b98b419209c3bfa49
https://github.com/llvm/llvm-project/commit/ceda56be7f03a790ea777e8b98b419209c3bfa49
Author: Javed Absar <javed.absar at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
A mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
A mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
A mlir/test/Dialect/Linalg/linalg-morph-category-ops.mlir
A mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
Log Message:
-----------
[mlir][linalg] Morphism across linalg -- named, category and generic ops. (#148424)
Adds `linalg-morph-ops` pass to convert an op from one representation to another:
named-op <--> category_op (elementwise, contraction, ..) <--> generic
e.g.
```mlir
%exp = linalg.exp ins(%A : tensor<16x8xf32>) outs(%B : tensor<16x8xf32>) -> tensor<16x8xf32>
```
After `mlir-opt -linalg-morph-ops=named-to-category ..`
```mlir
%0 = linalg.elementwise kind=#linalg.elementwise_kind<exp> ins(%arg0 : tensor<16x8xf32> ..
Note: this is generalization of
`--linalg-generalize-named-ops` is the path `named-op --> generic-op`
`--linalg-specialize-generic-ops` is the path `named-op <-- generic-op`
email: quic_mabsar at quicinc.com
Commit: f73a3028c2d46928280d69d9e953ff79d2eb0fbb
https://github.com/llvm/llvm-project/commit/f73a3028c2d46928280d69d9e953ff79d2eb0fbb
Author: David Truby <david.truby at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/unittests/CMakeLists.txt
Log Message:
-----------
[flang-rt] Use correct flang-rt build for flang-rt unit tests on Windows (#152318)
Currrently flang-rt assumes that LLVM was always built with the dynamic
MSVC runtime. This may not be the case, if the user has specified a
different runtime with -DCMAKE_MSVC_RUNTIME_LIBRARY. Since this flag is
implied by -DLLVM_ENABLE_RPMALLOC=On, which is used by the Windows
release script, this is causing that script to fail.
Fixes #151920
Commit: dbfc3ed69088a88bffc20b16ce315746dd30fa28
https://github.com/llvm/llvm-project/commit/dbfc3ed69088a88bffc20b16ce315746dd30fa28
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/test/Instrumentation/TypeSanitizer/alloca.ll
Log Message:
-----------
[TypeSanitizer] Use alloca size for lifetime markers (#152154)
Split out from https://github.com/llvm/llvm-project/pull/150248:
Use the size of the alloca instead of the size passed to the lifetime
intrinsic.
As a bonus, this handles dynamic allocas correctly (see the added test)
instead of doing a memset with size -1...
Commit: f3bf8e01668bfbb32cd17be45507983557b979df
https://github.com/llvm/llvm-project/commit/f3bf8e01668bfbb32cd17be45507983557b979df
Author: Pedro Lobo <pedro.lobo at tecnico.ulisboa.pt>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/test/CodeGen/X86/avx512-reduceIntrin.c
M clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c
M clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c
Log Message:
-----------
[clang][x86] Add C/C++ and 32/64-bit test coverage to constexpr tests (#152478)
Adds missing C++ run lines to test files containing `constexpr` tests.
Also adds missing 32/64-bit test coverage to the following tests:
- `clang/test/CodeGen/X86/avx512-reduceIntrin.c`
- `clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c`
- `clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c`
- `clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c`
Additionally, fixes a `_mm512_popcnt_epi64` `constexpr` test that
incorrectly assumed 32-bit integers, leading to incorrect bit counts.
This change updates the test result to assume 64-bit integers.
Commit: cfa00d4dafbc7ffa112ea341c794b7cff7fca713
https://github.com/llvm/llvm-project/commit/cfa00d4dafbc7ffa112ea341c794b7cff7fca713
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Add --succinct to lit args (#152335)
We currently log every single test that we run in premerge. This leads
to gigantic logs (200k+ lines on Linux) that can be difficult to parse
through. Having an indicator of progress is nice, especially for the
LLVM tests, but is not strictly necessary and not often used (I
imagine). Having a progress indicator from lit that works in CI cases is
on my TODO list.
For the rare cases where someone does need to see the list of tests that
run, the JUnit XML emitted by lit is available in the artifacts.
Commit: e368b5343d037c89051097c2a87a6fb76548014e
https://github.com/llvm/llvm-project/commit/e368b5343d037c89051097c2a87a6fb76548014e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
A flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-metadirective.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
R flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/test/Parser/OpenMP/critical-unparse-with-symbols.f90
M flang/test/Semantics/OpenMP/sync-critical01.f90
M flang/test/Semantics/OpenMP/sync-critical02.f90
Log Message:
-----------
[flang][OpenMP] Make OpenMPCriticalConstruct follow block structure (#152007)
This allows not having the END CRITICAL directive in certain situations.
Update semantic checks and symbol resolution.
Commit: 900d20d0dc7b228cba9df98ed3ec713098c79342
https://github.com/llvm/llvm-project/commit/900d20d0dc7b228cba9df98ed3ec713098c79342
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M offload/unittests/CMakeLists.txt
M offload/unittests/Conformance/tests/CMakeLists.txt
Log Message:
-----------
[NFC][Offload] Move conformance test warning outside of function (#152466)
`add_conformance_test` checks for libc and prints a warning if it is not
found. However, this warning ends up being printed once for each test,
spamming the cmake log. Moving it up to the folder cmake allows it to
be reported only once.
Commit: fac7453d2ca7ebe33dec3d60211c0374a2bb69cd
https://github.com/llvm/llvm-project/commit/fac7453d2ca7ebe33dec3d60211c0374a2bb69cd
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lldb/source/Core/DemangledNameInfo.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
M lldb/unittests/Core/MangledTest.cpp
Log Message:
-----------
[lldb][Mangled] Move SuffixRange computation into TrackingOutputBuffer (#152483)
This way all the tracking is self-contained in `TrackingOutputBuffer`
and we can test the `SuffixRange` properly.
Commit: 0bcf45ea3458ba79eb4257afcfd6af954292c9ce
https://github.com/llvm/llvm-project/commit/0bcf45ea3458ba79eb4257afcfd6af954292c9ce
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
Log Message:
-----------
[SLP]Initial FMAD support (#149102)
Added initial check for potential fmad conversion in reductions and
operands vectorization.
Commit: 69d0bd56ad064df569cd065902fb7036f0311c0a
https://github.com/llvm/llvm-project/commit/69d0bd56ad064df569cd065902fb7036f0311c0a
Author: Boyana Norris <brnorris03 at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/cmake/modules/AddMLIR.cmake
Log Message:
-----------
[mlir][cmake] Fix MLIR shared library installation (#152195)
When `LLVM_INSTALL_TOOLCHAIN_ONLY=ON`, the MLIR shared library
(`libMLIR*`) is not installed even though it is built with the
`INSTALL_WITH_TOOLCHAIN` argument to the `add_mlir_library` cmake
function. This patch ensures that `libMLIR*` is installed when
`LLVM_INSTALL_TOOLCHAIN_ONLY=ON`.
Patch verified
[here](https://github.com/llvm/llvm-project/issues/151247#issuecomment-3156387055).
fixes #151247
Commit: 5dff1ad3a3570f0f5a154590ce43b107dc6c3994
https://github.com/llvm/llvm-project/commit/5dff1ad3a3570f0f5a154590ce43b107dc6c3994
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Use a range-based for loop in DenseMap.h (NFC) (#152438)
This patch teaches moveFromOldBuckets to take an iterator_range so
that it can use a range-based for loop.
Commit: 4be22dabc58046ddcab449368132754892242250
https://github.com/llvm/llvm-project/commit/4be22dabc58046ddcab449368132754892242250
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
[CodeGen] Remove an unnecessary cast (NFC) (#152441)
getActiveBits() already returns unsigned.
Commit: 02fbb6a290779af31f24d6fffd104675fc10d986
https://github.com/llvm/llvm-project/commit/02fbb6a290779af31f24d6fffd104675fc10d986
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Support/regcomp.c
Log Message:
-----------
[Support] Remove an unnecessary cast (NFC) (#152442)
pattern is already of const char *.
Commit: ebaaf4d2fbf389ac3f171245e38c7a63812b43b8
https://github.com/llvm/llvm-project/commit/ebaaf4d2fbf389ac3f171245e38c7a63812b43b8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/tools/llvm-objdump/MachODump.cpp
Log Message:
-----------
[llvm-objdump] Remove unnecessary casts (NFC) (#152443)
data() alaready returns const char *.
Commit: e10fdb989b8c59a8291f1f6931f3adfd374ad840
https://github.com/llvm/llvm-project/commit/e10fdb989b8c59a8291f1f6931f3adfd374ad840
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/docs/MergeFunctions.rst
Log Message:
-----------
[llvm] Proofread MergeFunctions.rst (#152444)
Commit: 82f5bd68d03c2ef963f5e53843b1c47989dcd5d7
https://github.com/llvm/llvm-project/commit/82f5bd68d03c2ef963f5e53843b1c47989dcd5d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
Log Message:
-----------
[Sema] Remove an unnecessary cast (NFC) (#152440)
getScopeRep already returns NestedNameSpecifier *.
Commit: f3db0cb4d8326c4955472742872cb691d17e76c6
https://github.com/llvm/llvm-project/commit/f3db0cb4d8326c4955472742872cb691d17e76c6
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
Log Message:
-----------
Reland "[RISCV] Refactor X60 scheduling model helper classes. NFC." (#152336)
This PR fixes the issue that caused an ub in PR #151472.
The issue was a shl call taking a negative shift amount (posDiff). The
result was never used, but tablegen would perform the calculation
anyway. The fix was to replace the shl call with just multiplications
with constants.
Original PR description:
This patch improves the helper classes in the SpacemiT-X60 vector
scheduling model and will be used in follow-up PRs:
There are now two functions to map LMUL to values:
* ConstValueUntilLMULThenDoubleBase: returns BaseValue for LMUL values
before startLMUL, Value for startLMUL, then doubles Value for each
subsequent LMUL. Useful for cases where fractional LMULs have constant
cycles, and integer LMULs double as they increase.
* GetLMULValue: takes an ordered list of LMUL cycles and LMUL and
returns the corresponding cycle. Useful for cases we can't easily cover
with ConstValueUntilLMULThenDoubleBase.
This PR also adds some useful simplified versions of
ConstValueUntilLMULThenDoubleBase, e.g.: ConstValueUntilLMULThenDouble
(when BaseValue == Value), or ConstOneUntilMF4ThenDouble (when cycles
start to double after MF2)
Commit: c088b5ffca4c4b81a8fa0e7f006e9391eba1f191
https://github.com/llvm/llvm-project/commit/c088b5ffca4c4b81a8fa0e7f006e9391eba1f191
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M compiler-rt/lib/builtins/aarch64/lse.S
M compiler-rt/lib/builtins/aarch64/sme-abi.S
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/hwasan/hwasan_interceptors_vfork.S
M compiler-rt/lib/hwasan/hwasan_setjmp_aarch64.S
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_aarch64.S
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_vfork_aarch64.inc.S
M compiler-rt/lib/tsan/rtl/tsan_rtl_aarch64.S
Log Message:
-----------
[compiler-rt][AArch64] Add GCS property in assembly files (#152502)
Only BTI and PAC properties were added previously.
Fixes https://github.com/llvm/llvm-project/issues/152427.
Commit: e1171e6a98f9c1a5cd465a47210b2678631a9c3c
https://github.com/llvm/llvm-project/commit/e1171e6a98f9c1a5cd465a47210b2678631a9c3c
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M libc/src/dlfcn/CMakeLists.txt
Log Message:
-----------
[libc][dlfcn] Remove unused errno dep (#152222)
This removes the errno dep for the stub libdl functions, since there is
no need for it.
Commit: 3fa34f17e822fbe652e694b7b421ce7108f902df
https://github.com/llvm/llvm-project/commit/3fa34f17e822fbe652e694b7b421ce7108f902df
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
A .github/workflows/mlir-spirv-tests.yml
Log Message:
-----------
[mlir][spirv] Add mlir-spirv-tests CI to run for mlir-spv target tests (#152124)
This should execute also the MLIR SPIRV Target tests which require the
SPIRV-Tools validator
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 3b5cc2dc6374a5785741aedb28ad80b7e941b70c
https://github.com/llvm/llvm-project/commit/3b5cc2dc6374a5785741aedb28ad80b7e941b70c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/InterpState.cpp
Log Message:
-----------
[clang][bytecode][NFC] Refactor DynamicAllocator a bit (#152510)
Use empty()-style functions instead of exposing the size if we don't
need it.
Commit: 44fbeb3215f31ace95ea2a7e88121920e813db5d
https://github.com/llvm/llvm-project/commit/44fbeb3215f31ace95ea2a7e88121920e813db5d
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
Log Message:
-----------
[mlir][vector] Use `llvm::Align` when constructing vector load and stores. (#152207)
This patchset uses `llvm::Align` when constructing `vector.{load,store}`
operations. The use of `llvm::Align` allows us to specify the unit of
alignment and strongly type alignment as opposed to having just unsigned
integers.
Commit: 0cb98c721bb540febab0fc0094388480940c49b0
https://github.com/llvm/llvm-project/commit/0cb98c721bb540febab0fc0094388480940c49b0
Author: James Newling <james.newling at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
Log Message:
-----------
[mlir][vector] Replace vector.splat with vector.broadcast in some tests (#152230)
Splat is deprecated, and being prepared for removal in a future release.
https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/5
The command I used, catches almost every splat op:
```
perl -i -pe
's/vector\.splat\s+(\S+)\s*:\s*vector<((?:\[?\d+\]?x)*)\s*([^>]+)>/vector.broadcast
$1 : $3 to vector<$2$3>/g' filename
```
Commit: f9b68838f61972fadfbe70787befc3abeb2efcb5
https://github.com/llvm/llvm-project/commit/f9b68838f61972fadfbe70787befc3abeb2efcb5
Author: Fangrui Song <i at maskray.me>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
ELF: -r: Call assignAddresses only once
The fixed-point layout algorithm handles linker scripts, thunks, and
relaxOnce (to suppress out-of-range GOT-indirect-to-PC-relative
optimization). These passes are not needed for relocatable links because
they require address information that is not yet available.
Since we don't scan relocations for relocatable links, the
`createThunks` and `relaxOnce` functions are no-ops anyway, making these
passes redundant.
To prevent cluttering the line history, I place the `if (...) break;`
inside the for loop.
Pull Request: https://github.com/llvm/llvm-project/pull/152240
Commit: ff616a192bb486915200675d7be33dc042deca24
https://github.com/llvm/llvm-project/commit/ff616a192bb486915200675d7be33dc042deca24
Author: Amir Bishara <139038766+amirBish at users.noreply.github.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
Log Message:
-----------
[mlir][linalg]-Fix wrong assertion in the getMatchingYieldValue inter… (#89590)
…face
In order to have a consistent implementation for getMatchingYieldValue
for linalg generic with buffer/tensor semantics, we should assert the
opOperand index based on the numDpsInits and not numOfResults which may
be zero in the buffer semantics.
Commit: 6f272d1ecf70fc555efb1a0c601095031d5b2ca9
https://github.com/llvm/llvm-project/commit/6f272d1ecf70fc555efb1a0c601095031d5b2ca9
Author: David Green <david.green at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Move tryCombineToBSL. NFC
This is for #151855, to make the changes more obvious.
Commit: de2bac367ff9da74191bd2de130e4a81db07ae08
https://github.com/llvm/llvm-project/commit/de2bac367ff9da74191bd2de130e4a81db07ae08
Author: Matthias Guenther <mrguenther at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/CommonFolders.h
A mlir/test/Dialect/common_folders.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[MLIR] Allow `constFoldBinaryOp` to fold `(T1, T1) -> T2` (#151410)
The `constFoldBinaryOp` helper function had limited support for
different input and output types, but the static type of the underlying
value (e.g. `APInt`) had to match between the inputs and the output.
This worked fine for int comparisons of the form `(intN, intN) -> int1`,
as the static type signature was `(APInt, APInt) -> APInt`. However,
float comparisons map `(floatN, floatN) -> int1`, with a static type
signature of `(APFloat, APFloat) -> APInt`. This use case wasn't
supported by `constFoldBinaryOp`.
`constFoldBinaryOp` now accepts an optional template argument overriding
the return type in case it differs from the input type. If the new
template argument isn't provided, the default behavior is unchanged
(i.e. the return type will be assumed to match the input type).
`constFoldUnaryOp` received similar changes in order to support folding
non-cast ops of the form `(T1) -> T2` (e.g. a `sign` op mapping
`(floatN) -> sint32`).
Commit: 3fbb553f7d31329212b658cca5b9eb5dae4e91b2
https://github.com/llvm/llvm-project/commit/3fbb553f7d31329212b658cca5b9eb5dae4e91b2
Author: Andrey Timonin <timonina1909 at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
Log Message:
-----------
[mlir][emitc] Simplify emitc::isSupportedFloatType (NFC) (#152464)
Commit: d95433bc8131e6c9f175c82f7b26e789084a347f
https://github.com/llvm/llvm-project/commit/d95433bc8131e6c9f175c82f7b26e789084a347f
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/cmake/modules/LLVMProcessSources.cmake
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
Log Message:
-----------
Remove __SHORT_FILE__ macro definition in CMake (#152344)
This per-file macro definition on the command line breaks caching of
modules. See discussion in #150677
Instead we use a constexpr function that processes the __FILE__ macro,
but prefer also the __FILE_NAME__ macro when available (clang/gcc) to spare
compile-time in the frontend.
If the constexpr function isn't const-evaluated, it'll be only evaluated when
printing the debug message.
Commit: 44aedacb1b64b415fddfada39eb876602980ea72
https://github.com/llvm/llvm-project/commit/44aedacb1b64b415fddfada39eb876602980ea72
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lldb/include/lldb/Protocol/MCP/Protocol.h
A lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Protocol/MCP/CMakeLists.txt
A lldb/source/Protocol/MCP/Server.cpp
Log Message:
-----------
[lldb] Move the generic MCP server code into Protocol/MCP (NFC) (#152396)
This is a continuation of #152188, which started splitting up the MCP
implementation into a generic implementation in Protocol/MCP that will
be shared between LLDB and lldb-mcp.
For now I kept all the networking code in the MCP server plugin. Once
the changes to JSONTransport land, we might be able to move more of it
into the Protocol library.
Commit: 6d231fbb05417a77e8787f625fd14e1a30e27a5b
https://github.com/llvm/llvm-project/commit/6d231fbb05417a77e8787f625fd14e1a30e27a5b
Author: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
Log Message:
-----------
[mlir] MemRefToSPIRV propagate alignment attributes from MemRef ops. (#151723)
This patchset:
* propagates alignment attributes from memref operations into the SPIR-V
dialect,
* fixes an error in the logic which previously propagated alignment
attributes but did not add other MemoryAccess attributes.
* adds a failure condition in the case where the alignment attribute
from the memref dialect (64-bit wide) does not fit in SPIR-V's alignment
attribute (specified to be 32-bit wide).
Commit: bd741975bc666d032665facd19144df9deedc5c8
https://github.com/llvm/llvm-project/commit/bd741975bc666d032665facd19144df9deedc5c8
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/test/CodeGen/DirectX/imad.ll
M llvm/test/CodeGen/DirectX/umad.ll
Log Message:
-----------
Scalarize vector `mad` operations for integer types (#152228)
Fixes #152220.
- Adds `dx_imad` and `dx_umad` to
`isTargetIntrinsicTriviallyScalarizable`
- Adds tests that confirm the intrinsic is now scalarizing
Commit: ed9a552563e1c8a95249036195f598990a695a95
https://github.com/llvm/llvm-project/commit/ed9a552563e1c8a95249036195f598990a695a95
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
Log Message:
-----------
[CIR][NFC] Fix typo in ComplexRangeKind comment (#152535)
Fix typo in ComplexRangeKind comment
Catched in https://github.com/llvm/clangir/pull/1779
Commit: ad3196d7595dd53c4021b4bf4cd7bcefd85853df
https://github.com/llvm/llvm-project/commit/ad3196d7595dd53c4021b4bf4cd7bcefd85853df
Author: Abhilash Majumder <abhilash.majumder at intel.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
Log Message:
-----------
[NVPTX][Test-only] Add proper sm-version to ptxas-verify in prefetch-inferas-test.ll (#152492)
prefetch-inferas-test.ll was added in #146203 , but due to missing ptxas
version the CI is defaulting to sm 60.
This patch adds the arg in ptxas-verify check.
Commit: d97f0e93642722380be9ed190c17ea895817c339
https://github.com/llvm/llvm-project/commit/d97f0e93642722380be9ed190c17ea895817c339
Author: gitoleg <forown at yandex.ru>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/module-asm.c
A clang/test/CIR/Lowering/module-asm.cir
Log Message:
-----------
[CIR] add support for file scope assembly (#152093)
This PR adds a support for file scope assembly in CIR.
Commit: 093439c688db8d176081176576011275a1aecf23
https://github.com/llvm/llvm-project/commit/093439c688db8d176081176576011275a1aecf23
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/test/CodeGen/PowerPC/memintr32.ll
M llvm/test/CodeGen/PowerPC/memintr64.ll
Log Message:
-----------
[PowerPC][AIX] Using milicode for memcmp instead of libcall (#147093)
AIX has "millicode" routines, which are functions loaded at boot time
into fixed addresses in kernel memory. This allows them to be customized
for the processor. The __memcmp routine is a millicode implementation;
we use millicode for the memcmp function instead of a library call to
improve performance.
Commit: b5902924b27348dfae35a501f8b6e5b66f3bed46
https://github.com/llvm/llvm-project/commit/b5902924b27348dfae35a501f8b6e5b66f3bed46
Author: Bushev Dmitry <111585886+dybv-sc at users.noreply.github.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
Log Message:
-----------
[DFAJumpThreading] Prevent pass from using too much memory. (#145482)
The limit 'dfa-max-num-paths' that is used to control number of
enumerated paths was not checked against inside getPathsFromStateDefMap.
It may lead to large memory consumption for complex enough switch
statements.
Commit: 193995d5a21dc8b923e19d9370aa8e1f374cd940
https://github.com/llvm/llvm-project/commit/193995d5a21dc8b923e19d9370aa8e1f374cd940
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Handle more invalid member pointer casts (#152546)
Commit: 093395ca6b5c180eabd597236a928c5ce2854260
https://github.com/llvm/llvm-project/commit/093395ca6b5c180eabd597236a928c5ce2854260
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
Log Message:
-----------
[CIR] Mul CompoundAssignment support for ComplexType (#152354)
This change adds support for Mul CompoundAssignment for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 06f06deb774ada5aa37db89fa7b4a88b13163e0d
https://github.com/llvm/llvm-project/commit/06f06deb774ada5aa37db89fa7b4a88b13163e0d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
Log Message:
-----------
[PowerPC] Fix a warning
This patch fixes:
llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:25:3: error:
'EmitTargetCodeForMemcmp' overrides a member function but is not
marked 'override' [-Werror,-Winconsistent-missing-override]
Commit: 2ff44d7d658beca1724f04211e194bf4beb2a1a0
https://github.com/llvm/llvm-project/commit/2ff44d7d658beca1724f04211e194bf4beb2a1a0
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
M llvm/lib/Support/StringRef.cpp
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[ADT] Make `getAutoSenseRadix` in `StringRef` global (#152503)
Needed in #152308
Commit: f7c6c7ce361b8664eee962f10803e92661582176
https://github.com/llvm/llvm-project/commit/f7c6c7ce361b8664eee962f10803e92661582176
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/Analysis/DXILResource.h
A llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
Log Message:
-----------
[DirectX] Overlapping binding detection - check register space first (#152250)
The code that checks for overlapping binding did not compare register space when one of the bindings was for an unbounded resource array, leading to false errors. This change fixes it.
Commit: 660555191b3e886a578f3d9bfdcb49877e1c5da0
https://github.com/llvm/llvm-project/commit/660555191b3e886a578f3d9bfdcb49877e1c5da0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/lib/Headers/cpuid.h
M clang/test/Headers/__cpuidex_conflict.c
Log Message:
-----------
[Clang] Fix __cpuidex conflict with CUDA (#152556)
The landing of #126324 made it so that __has_builtin returns false for
aux triple builtins. CUDA offloading can sometimes compile where the
host is in the aux triple (ie x86_64). This patch explicitly carves out
NVPTX so that we do not run into redefinition errors.
Commit: 229d86026fa0e5d9412a0d5004532f0d9733aac6
https://github.com/llvm/llvm-project/commit/229d86026fa0e5d9412a0d5004532f0d9733aac6
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lldb/source/Core/ModuleList.cpp
Log Message:
-----------
[NFC][lldb] Speed up lookup of shared modules (#152054)
By profiling LLDB debugging a Swift application without a dSYM and a
large amount of .o files, I identified that querying shared modules was
the biggest bottleneck when running "frame variable", and Clang types
need to be searched.
One of the reasons for that slowness is that the shared module list can
grow very large, and the search through it is O(n).
To solve this issue, this patch adds a new hashmap to the shared module
list whose key is the name of the module, and the value is all the
modules that share that name. This should speed up any search where the
query contains the module name.
rdar://156753350
Commit: 740f690831a2eb09ba73b4fb5456a37ae62a5051
https://github.com/llvm/llvm-project/commit/740f690831a2eb09ba73b4fb5456a37ae62a5051
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][rocdl] Add `readfirstlane` intrinsic (#152551)
Commit: 1e2e903684719a0bdf559af261ffff9f551f4ebb
https://github.com/llvm/llvm-project/commit/1e2e903684719a0bdf559af261ffff9f551f4ebb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/IR/invalid-vtable.cir
A clang/test/CIR/IR/vtable-addrpt.cir
Log Message:
-----------
[CIR] Add VTableAddrPointOp (#148730)
This change adds the definition of VTableAddrPointOp and the related
AddressPointAttr to the CIR dialect, along with tests for the parsing
and verification of these elements.
Code to generate this operation will be added in a later change.
Commit: 4e11f89904dc9b77ef44b01c68742e5b00bfdf21
https://github.com/llvm/llvm-project/commit/4e11f89904dc9b77ef44b01c68742e5b00bfdf21
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
A llvm/test/MC/Disassembler/RISCV/riscv-mapping-symbols.s
R llvm/test/MC/RISCV/large-instructions.s
A llvm/test/MC/RISCV/large-instructions.test
M llvm/test/MC/RISCV/nop-slide.s
M llvm/test/MC/RISCV/rvv/vsetvl-invalid.s
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[RISCV] Basic Objdump Mapping Symbol Support (#151452)
This implements very basic support for RISC-V mapping symbols in
llvm-objdump, sharing the implementation with how Arm/AArch64/CSKY
implement this feature.
This only supports the `$x` (instruction) and `$d` (data) mapping
symbols for RISC-V, and not the version of `$x` which includes an
architecture string suffix.
Commit: 9f102a90042fd3757c207112cfe64ee10182ace5
https://github.com/llvm/llvm-project/commit/9f102a90042fd3757c207112cfe64ee10182ace5
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
A llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
Log Message:
-----------
[AMDGPU] Recognise bitmask operations as srcmods on select (#152119)
Add to the VOP patterns to recognise when or/xor/and are masking only the most significant bit of i32/v2i32/i64 and replace with the corresponding FP source modifier.
Commit: 77c79313d1360b4f44919ddb7993543e3ac0a2b1
https://github.com/llvm/llvm-project/commit/77c79313d1360b4f44919ddb7993543e3ac0a2b1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/include/llvm/ADT/SmallPtrSet.h
Log Message:
-----------
[ADT] Fix a comment typo in SmallPtrSet (NFC) (#152565)
In the large mode, SmallPtrSet uses quadratic probing with ProbeAmt++
just like DenseMap.
Commit: 38542efcbabf5ae8ec4b3169321ac793f103bae0
https://github.com/llvm/llvm-project/commit/38542efcbabf5ae8ec4b3169321ac793f103bae0
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
A flang/test/Driver/atomic-control-options.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-atomic-capture-control-options.mlir
A mlir/test/Target/LLVMIR/omptarget-atomic-update-control-options.mlir
Log Message:
-----------
[flang][OMPIRBuilder][MLIR][llvm] Backend support for atomic control options (#151579)
Adding mlir to llvm support for atomic control options.
Atomic Control Options are used to specify architectural characteristics
to help lowering of atomic operations. The options used are:
`-f[no-]atomic-remote-memory`, `-f[no-]atomic-fine-grained-memory`,
`-f[no-]atomic-ignore-denormal-mode`.
Legacy option `-m[no-]unsafe-fp-atomics` is aliased to
`-f[no-]ignore-denormal-mode`.
More details can be found in
https://github.com/llvm/llvm-project/pull/102569. This PR implements the
MLIR to LLVM lowering support of atomic control attributes specified
with OpenMP `atomicUpdateOp`.
Initial support can be found in PR:
https://github.com/llvm/llvm-project/pull/150860
Commit: f68eedde7561cbe36ca775aa2d05de724fe04f96
https://github.com/llvm/llvm-project/commit/f68eedde7561cbe36ca775aa2d05de724fe04f96
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
[bazel] Port #151410: constFoldBinaryOp (#152568)
Commit: 069bf187ccc432fa379287670461462ed5001a04
https://github.com/llvm/llvm-project/commit/069bf187ccc432fa379287670461462ed5001a04
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp
Log Message:
-----------
[DWARF] Speedup .gdb_index dumping (#151806)
This patch drastically speed ups dumping .gdb_index for large indexes
Commit: ca52d9b8bebd9214db8ab71f87a1d5eb6d2ad42e
https://github.com/llvm/llvm-project/commit/ca52d9b8bebd9214db8ab71f87a1d5eb6d2ad42e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
A clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
Log Message:
-----------
[CIR] Upstream EHScopeStack memory allocator (#152215)
When the cleanup handling code was initially upstreamed, a SmallVector
was used to simplify the handling of the stack of cleanup objects.
However, that mechanism won't scale well enough for the rate at which
cleanup handlers are going to be pushed and popped while compiling a
large program. This change introduces the custom memory allocator which
is used in classic codegen and the CIR incubator.
Thiis does not otherwise change the cleanup handling implementation and
many parts of the infrastructure are still missing.
This is not intended to have any observable effect on the generated CIR,
but it does change the internal implementation significantly, so it's
not exactly an NFC change. The functionality is covered by existing
tests.
Commit: 75cc77e55e12d39aed94702b0b1365e39713081e
https://github.com/llvm/llvm-project/commit/75cc77e55e12d39aed94702b0b1365e39713081e
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lldb/source/Core/ModuleList.cpp
Log Message:
-----------
Revert "[NFC][lldb] Speed up lookup of shared modules (#152054)" (#152582)
This reverts commit 229d86026fa0e5d9412a0d5004532f0d9733aac6.
Commit: c43c1c0c45fc1ec3fab7abd6e19b318f6468bf28
https://github.com/llvm/llvm-project/commit/c43c1c0c45fc1ec3fab7abd6e19b318f6468bf28
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
Update .git-blame-ignore-revs for Pack/Unpack move (#152469)
Adds this large patch that merely moved Pack/Unpack Ops from the Tensor
to Linalg dialects:
* https://github.com/llvm/llvm-project/pull/123902
Commit: d09dbdabb93ffdd6df25ae487c95a552f13e5e16
https://github.com/llvm/llvm-project/commit/d09dbdabb93ffdd6df25ae487c95a552f13e5e16
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
Log Message:
-----------
[AMDGPU] bf16 clamp folding (#152573)
Commit: 11e1d465860903fd9ead27c0c1e60de4439011db
https://github.com/llvm/llvm-project/commit/11e1d465860903fd9ead27c0c1e60de4439011db
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/unittests/Instruction/ARM64/TestAArch64Emulator.cpp
Log Message:
-----------
[lldb] Fix UBSan complaints for #151460
Commit: b9c328480cc5c9fbc2940ce323a8dcb30a042b58
https://github.com/llvm/llvm-project/commit/b9c328480cc5c9fbc2940ce323a8dcb30a042b58
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaWasm.h
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
M clang/lib/Sema/SemaWasm.cpp
A clang/test/CodeGen/WebAssembly/builtins-test-fp-sig.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/Sema/builtins-wasm.c
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[clang][WebAssembly] Support reftypes & varargs in test_function_pointer_signature (#150921)
I fixed support for varargs functions
(previously it didn't crash but the codegen was incorrect).
I added tests for structs and unions which already work. With the
multivalue abi they crash in the backend, so I added a sema check that
rejects structs and unions for that abi.
It will also crash in the backend if passed an int128 or float128 type.
Commit: 002b5774f4c8ab43e810ed9894a652a8474d4f38
https://github.com/llvm/llvm-project/commit/002b5774f4c8ab43e810ed9894a652a8474d4f38
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-08-07 (Thu, 07 Aug 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
A .ci/utils.sh
M .git-blame-ignore-revs
A .github/workflows/mlir-spirv-tests.yml
M bolt/unittests/Core/CMakeLists.txt
M bolt/unittests/Profile/CMakeLists.txt
M clang-tools-extra/test/clang-tidy/infrastructure/diagnostic.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/export-relpath.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/OpenACCClause.h
A clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Sema/SemaWasm.h
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
A clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/EHScopeStack.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGCXXABI.h
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/avx2intrin.h
M clang/lib/Headers/avx512dqintrin.h
M clang/lib/Headers/avx512fintrin.h
M clang/lib/Headers/avxintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/mmintrin.h
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenACCClause.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaWasm.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp
M clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/CIR/CodeGen/complex-arithmetic.cpp
A clang/test/CIR/CodeGen/complex-compound-assignment.cpp
A clang/test/CIR/CodeGen/module-asm.c
A clang/test/CIR/IR/invalid-vtable.cir
A clang/test/CIR/IR/vtable-addrpt.cir
A clang/test/CIR/Lowering/module-asm.cir
A clang/test/CodeGen/WebAssembly/builtins-test-fp-sig.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512-reduceIntrin.c
M clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
M clang/test/CodeGen/X86/avx512dq-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c
M clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/cfi-icall-generalize.c
M clang/test/CodeGenCXX/dynamic-cast-exact-disabled.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/Headers/__cpuidex_conflict.c
M clang/test/Sema/builtins-wasm.c
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaOpenACC/private_firstprivate_reduction_required_ops.cpp
M clang/test/SemaOpenACC/sub-array.cpp
M clang/tools/libclang/CIndex.cpp
M compiler-rt/lib/asan/asan_mapping.h
M compiler-rt/lib/builtins/aarch64/lse.S
M compiler-rt/lib/builtins/aarch64/sme-abi.S
M compiler-rt/lib/builtins/assembly.h
M compiler-rt/lib/hwasan/hwasan_interceptors_vfork.S
M compiler-rt/lib/hwasan/hwasan_setjmp_aarch64.S
M compiler-rt/lib/hwasan/hwasan_tag_mismatch_aarch64.S
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_vfork_aarch64.inc.S
M compiler-rt/lib/tsan/rtl/tsan_rtl_aarch64.S
M compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
A compiler-rt/test/ubsan_minimal/TestCases/misalignment.cpp
A compiler-rt/test/ubsan_minimal/TestCases/null.cpp
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/extensions.cpp
M flang-rt/unittests/CMakeLists.txt
A flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/ConvertVariable.h
R flang/include/flang/Lower/Cuda.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/extensions.h
A flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Support/Fortran.h
M flang/lib/Evaluate/characteristics.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
A flang/lib/Lower/CUDA.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-metadirective.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
R flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/unparse-with-symbols.cpp
M flang/lib/Support/Fortran.cpp
A flang/test/Driver/atomic-control-options.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
M flang/test/Parser/OpenMP/critical-unparse-with-symbols.f90
M flang/test/Semantics/OpenMP/sync-critical01.f90
M flang/test/Semantics/OpenMP/sync-critical02.f90
R flang/test/Semantics/cuf17.cuf
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/wchar/character_converter.cpp
M libc/src/__support/wchar/character_converter.h
M libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/__support/wchar/string_converter.h
M libc/src/__support/wchar/wcsnrtombs.h
M libc/src/dlfcn/CMakeLists.txt
M libc/src/wctype/iswalpha.cpp
M libc/src/wctype/iswalpha.h
M libc/test/src/__support/wchar/string_converter_test.cpp
M libc/test/src/stdfix/BitsFxTest.h
M libc/test/src/wctype/iswalpha_test.cpp
M libclc/CMakeLists.txt
M libclc/cmake/modules/AddLibclc.cmake
M libcxx/docs/Contributing.rst
M libcxx/include/CMakeLists.txt
R libcxx/include/__fwd/map.h
R libcxx/include/__fwd/set.h
M libcxx/include/__tree
M libcxx/include/map
M libcxx/include/module.modulemap.in
M libcxx/include/set
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Writer.cpp
M lldb/docs/resources/lldbdap.md
M lldb/include/lldb/Protocol/MCP/Protocol.h
A lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Core/DemangledNameInfo.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
M lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Protocol/MCP/CMakeLists.txt
A lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/tools/lldb-dap/src-ts/debug-adapter-factory.ts
M lldb/tools/lldb-dap/src-ts/debug-configuration-provider.ts
M lldb/tools/lldb-dap/src-ts/lldb-dap-server.ts
M lldb/unittests/Core/MangledTest.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Instruction/ARM64/TestAArch64Emulator.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMProcessSources.cmake
M llvm/docs/MergeFunctions.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/SmallPtrSet.h
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/DXILResource.h
M llvm/include/llvm/Analysis/DependenceAnalysis.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/CodeGen/TargetCallingConv.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/Support/DebugLog.h
M llvm/include/llvm/Support/GraphWriter.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/include/llvm/Target/TargetCallingConv.td
M llvm/include/llvm/TargetParser/Host.h
M llvm/include/llvm/TextAPI/Architecture.def
M llvm/include/llvm/TextAPI/Architecture.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/lib/DebugInfo/DWARF/DWARFGdbIndex.cpp
M llvm/lib/Frontend/HLSL/HLSLRootSignature.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/LTO/LTOModule.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Support/regcomp.c
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/DirectX/DXILForwardHandleAccesses.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/Mips/MipsCCState.cpp
M llvm/lib/Target/Mips/MipsCCState.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCCCState.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
M llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
A llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.h
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86CallLowering.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TextAPI/Architecture.cpp
M llvm/lib/TextAPI/TextStubCommon.cpp
M llvm/lib/Transforms/Instrumentation/TypeSanitizer.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/addrspacecast.mir
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/addrspacecast.ll
R llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
A llvm/test/CodeGen/AArch64/aarch64-split-logic-bitmask-immediate.ll
M llvm/test/CodeGen/AArch64/arm64-ext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
A llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
A llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
A llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
A llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
M llvm/test/CodeGen/AVR/cmp.ll
A llvm/test/CodeGen/DirectX/Binding/binding-overlap-7.ll
M llvm/test/CodeGen/DirectX/imad.ll
A llvm/test/CodeGen/DirectX/issue-140819_allow_forward_handle_on_alloca.ll
M llvm/test/CodeGen/DirectX/umad.ll
A llvm/test/CodeGen/NVPTX/prefetch-inferas-test.ll
M llvm/test/CodeGen/NVPTX/prefetch.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
M llvm/test/CodeGen/PowerPC/aix-nest-param.ll
M llvm/test/CodeGen/PowerPC/aix-trampoline.ll
M llvm/test/CodeGen/PowerPC/memintr32.ll
M llvm/test/CodeGen/PowerPC/memintr64.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/macro-fusions.mir
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/misched-mem-clustering.mir
A llvm/test/CodeGen/RISCV/misched-store-clustering.ll
M llvm/test/CodeGen/RISCV/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/ImplicitBinding.ll
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
A llvm/test/DebugInfo/X86/DW_AT_alloc_type.ll
M llvm/test/Instrumentation/TypeSanitizer/alloca.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_ds.s
A llvm/test/MC/AMDGPU/gfx1250_asm_features.s
M llvm/test/MC/AMDGPU/gfx1250_asm_operands.s
M llvm/test/MC/AMDGPU/gfx1250_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop2_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3cx.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p_dpp8.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vsample_err.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_operands.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p_dpp8.txt
A llvm/test/MC/Disassembler/RISCV/riscv-mapping-symbols.s
M llvm/test/MC/ELF/many-instructions.s
R llvm/test/MC/RISCV/large-instructions.s
A llvm/test/MC/RISCV/large-instructions.test
M llvm/test/MC/RISCV/nop-slide.s
M llvm/test/MC/RISCV/rvv/vsetvl-invalid.s
M llvm/test/Transforms/GVN/PRE/phi-translate-2.ll
M llvm/test/Transforms/GVN/PRE/phi-translate-add.ll
M llvm/test/Transforms/GVN/PRE/phi-translate.ll
M llvm/test/Transforms/GVN/PRE/pre-aliasning-path.ll
M llvm/test/Transforms/GVN/PRE/pre-basic-add.ll
M llvm/test/Transforms/GVN/PRE/pre-jt-add.ll
M llvm/test/Transforms/GVN/PRE/pre-load-dbg.ll
M llvm/test/Transforms/GVN/PRE/pre-load-guards.ll
M llvm/test/Transforms/GVN/PRE/pre-load-implicit-cf-updates.ll
M llvm/test/Transforms/GVN/PRE/pre-load.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load-new-pm.ll
M llvm/test/Transforms/GVN/PRE/pre-no-cost-phi.ll
M llvm/test/Transforms/GVN/PRE/pre-poison-add.ll
M llvm/test/Transforms/GVN/PRE/pre-single-pred.ll
M llvm/test/Transforms/GVN/PRE/preserve-tbaa.ll
R llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly/dot.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-fixed-width-inorder-core.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-styles.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-remove-loop-region.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/optsize_minsize.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-inbounds-flags-for-reverse-vector-pointer.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/optsize.ll
M llvm/test/Transforms/LoopVectorize/X86/pr81872.ll
M llvm/test/Transforms/LoopVectorize/X86/scev-checks-unprofitable.ll
M llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-interleaved-accesses-gap.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/loop-form.ll
M llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/optsize.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr46525-expander-insertpoint.ll
M llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/scalable-predication.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LoopVectorize/store-reduction-results-in-tail-folded-loop.ll
M llvm/test/Transforms/LoopVectorize/strict-fadd-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-optimize-vector-induction-width.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-switch.ll
M llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
M llvm/test/Transforms/LoopVectorize/uniform-blend.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/exp.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fround.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
M llvm/test/tools/llvm-objdump/MachO/bad-trie.test
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/Support/DebugLogTest.cpp
M llvm/unittests/TargetParser/Host.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M mlir/CMakeLists.txt
M mlir/cmake/modules/AddMLIR.cmake
R mlir/cmake/modules/FindLevelZero.cmake
A mlir/cmake/modules/FindLevelZeroRuntime.cmake
M mlir/docs/DialectConversion.md
M mlir/include/mlir/Dialect/CommonFolders.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/Passes.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
A mlir/lib/Dialect/Linalg/Transforms/MorphOps.cpp
A mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
A mlir/lib/ExecutionEngine/LevelZeroRuntimeWrappers.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
M mlir/test/Dialect/Arith/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Dialect/Linalg/elementwise/named-to-elementwise.mlir
A mlir/test/Dialect/Linalg/linalg-morph-category-ops.mlir
A mlir/test/Dialect/Linalg/linalg-morph-multi-step.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
A mlir/test/Dialect/common_folders.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/scalable-interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/interleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-f32.mlir
M mlir/test/Integration/Dialect/Vector/CPU/outerproduct-i64.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-write.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-addf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-addi64-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-memcpy-addf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/gpu-reluf32-to-spirv.mlir
A mlir/test/Integration/GPU/LevelZero/lit.local.cfg
A mlir/test/Target/LLVMIR/omptarget-atomic-capture-control-options.mlir
A mlir/test/Target/LLVMIR/omptarget-atomic-update-control-options.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/test/lit.cfg
M offload/test/sanitizer/use_after_free_2.c
A offload/test/sanitizer/use_after_free_3.c
M offload/unittests/CMakeLists.txt
M offload/unittests/Conformance/tests/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
feedback+rebase
Created using spr 1.3.6
Compare: https://github.com/llvm/llvm-project/compare/284f8869e118...002b5774f4c8
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