[all-commits] [llvm/llvm-project] 9a592d: [NVPTX] lower VECREDUCE min/max to 3-input on sm_1...

[Princeton Ferro via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9a592d9a849dacf02ff571c81f2b3a805e9d13e5
      https://github.com/llvm/llvm-project/commit/9a592d9a849dacf02ff571c81f2b3a805e9d13e5
  Author: Princeton Ferro <pferro at nvidia.com>
  Date:   2025-08-06 (Wed, 06 Aug 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
    M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll

  Log Message:
  -----------
  [NVPTX] lower VECREDUCE min/max to 3-input on sm_100+ (#136253)

Add support for 3-input fmaxnum/fminnum/fmaximum/fminimum introduced in
PTX 8.8 for sm_100+:
- Use a tree reduction when 3-input operations are supported and the
  reduction has the `reassoc` flag.
- If not on sm_100+/PTX 8.8, fallback to 2-input operations and use the
  default shuffle reduction.



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