[all-commits] [llvm/llvm-project] c9684e: [RISCV] Implement EmitTargetCodeForMemset for Xqci...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c9684e58923babef7b994846b2208a05f3e3b31b
      https://github.com/llvm/llvm-project/commit/c9684e58923babef7b994846b2208a05f3e3b31b
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-08-04 (Mon, 04 Aug 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
    M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.h
    A llvm/test/CodeGen/RISCV/xqcilsm-memset.ll

  Log Message:
  -----------
  [RISCV] Implement EmitTargetCodeForMemset for Xqcilsm (#151555)

This patch adds support for converting memset calls to one or more
`QC_SETWMI` instructions when beneficial. We only handle aligned memset
calls for now.

We limit a `QC_SETWMI` to 16 words or less to improve interruptibility.
So for `1-16` words we use a single `QC_SETWMI`:

`QC_SETWMI reg1, N, 0(reg2)`

For `17-32 `words we use two `QC_SETWMI's` with the first as 16 words
and the second for the remainder:

```
QC_SETWMI reg1, 16, 0(reg2)
QC_SETWMI reg1, N, 64(reg2)
```

For `33-48` words, we would like to use `(16, 16, n)`, but that means
the last QC_SETWMI needs an offset of `128` which the instruction
doesn't support. So in this case we use a length of `15` for the second
instruction and we do the rest with the third instruction.

This means the maximum number of words handled is `47` (for now):

```
QC_SETWMI R2, R0, 16, 0
QC_SETWMI R2, R0, 15, 64
QC_SETWMI R2, R0, N, 124
```

For `48` words or more, call the target independent memset.



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