[all-commits] [llvm/llvm-project] afce93: [mlir][spirv] Enforce Fixed-Size Vectors for SPIR-...

[YixingZhang007 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: afce9320ca40bcab0c08b59576a3afffff3cf171
      https://github.com/llvm/llvm-project/commit/afce9320ca40bcab0c08b59576a3afffff3cf171
  Author: YixingZhang007 <yixing.zhang at intel.com>
  Date:   2025-08-01 (Fri, 01 Aug 2025)

  Changed paths:
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
    M mlir/test/Dialect/SPIRV/IR/arithmetic-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/bit-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/group-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/image-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/intel-ext-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/logical-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/non-uniform-ops.mlir
    M mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir

  Log Message:
  -----------
  [mlir][spirv] Enforce Fixed-Size Vectors for SPIR-V (#151738)

This PR enforces that SPIR-V instructions only allow fixed-size vectors
(no scalable vectors) by updating `SPIRV_VectorOf` to use
`FixedVectorOfLengthAndType` instead of `VectorOfLengthAndType`. The
affected MLIR tests are also updated accordingly.



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