[all-commits] [llvm/llvm-project] 9ad630: [lldb][AArch64] Add HWCAP3 to register field detec...

[David Spickett via All-commits]

  Branch: refs/heads/release/21.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 9ad630fcb7cf8e720b81d659721bc09c19989d0f
      https://github.com/llvm/llvm-project/commit/9ad630fcb7cf8e720b81d659721bc09c19989d0f
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-08-01 (Fri, 01 Aug 2025)

  Changed paths:
    M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
    M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
    M lldb/source/Plugins/Process/Utility/AuxVector.cpp
    M lldb/source/Plugins/Process/Utility/AuxVector.h
    M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
    M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
    M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp

  Log Message:
  -----------
  [lldb][AArch64] Add HWCAP3 to register field detection (#145029)

This will be used to detect the presence of Arm's new Memory Tagging
store only checking feature. This commit just adds the plumbing to get
that value into the detection function.

FreeBSD has not allocated a number for HWCAP3 and already has AT_ARGV
defined as 29. So instead of attempting to read from FreeBSD processes,
I've explicitly passed 0. We don't want to be reading some other entry
accidentally.

If/when FreeBSD adds HWCAP3 we can handle it like we do for
AUXV_FREEBSD_AT_HWCAP.

No extra tests here, those will be coming with the next change for MTE
support.

(cherry picked from commit d26ca8b87266024546501051ccaf75cb3756aee3)


  Commit: b1c834f27cda6ad3a5b63f2a9bcea01ef43d9354
      https://github.com/llvm/llvm-project/commit/b1c834f27cda6ad3a5b63f2a9bcea01ef43d9354
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2025-08-01 (Fri, 01 Aug 2025)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py
    M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
    M lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
    M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
    M lldb/test/API/linux/aarch64/mte_core_file/core.mte
    M lldb/test/API/linux/aarch64/mte_core_file/core.nomte
    M lldb/test/API/linux/aarch64/mte_core_file/main.c

  Log Message:
  -----------
  [lldb][AArch64][Linux] Show MTE store only setting in mte_ctrl (#145033)

This controls whether tag checking is performed for loads and
stores, or stores only.

It requires a specific architecture feature which we detect
with a HWCAP3 and cpuinfo feature.

Live process tests look for this and adjust expectations
accordingly, core file tests are using an updated file with
this feature enabled.

The size of the core file has increased and there's nothing
I can do about that. Could be the presence of new architecure
features or kernel changes since I last generated them.

I can generate a smaller file that has the tag segment,
but that segment does not actually contain tag data. So
that's no use.

(cherry picked from commit 0209e76fe6440bc45a9ed61b9671d9593db10957)


Compare: https://github.com/llvm/llvm-project/compare/614544048c71...b1c834f27cda

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