[all-commits] [llvm/llvm-project] 024262: [RISCV] Split the pre-defined macro tests for SiFi...
Krzysztof Drewniak via All-commits
all-commits at lists.llvm.org
Wed Jul 30 21:47:38 PDT 2025
Branch: refs/heads/users/krzysz00/missing-verifiers-in-adaptor
Home: https://github.com/llvm/llvm-project
Commit: 024262421dc7f1900a28b3a4a5d4380925fd96b8
https://github.com/llvm/llvm-project/commit/024262421dc7f1900a28b3a4a5d4380925fd96b8
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features-sifive.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for SiFive extensions to riscv-target-features-sifive.c. NFC.
Commit: 8c8b3cd28b52a98383b6875d045bdf1f4d9a3a2f
https://github.com/llvm/llvm-project/commit/8c8b3cd28b52a98383b6875d045bdf1f4d9a3a2f
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A clang/test/Preprocessor/riscv-target-features-cv.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for xcv* extensions to riscv-target-features-cv.c. NFC.
Commit: ee3cf1252a0763e56c28592edec96b029c884bba
https://github.com/llvm/llvm-project/commit/ee3cf1252a0763e56c28592edec96b029c884bba
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features-cv.c
Log Message:
-----------
[RISCV] Add pre-defined macro test for XCVmem. NFC.
Commit: 2e71bf01330d986c28dec47a7f8506021028450f
https://github.com/llvm/llvm-project/commit/2e71bf01330d986c28dec47a7f8506021028450f
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A clang/test/Preprocessor/riscv-target-features-thead.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for xthead* extensions to riscv-target-features-thead.c. NFC.
Commit: 0afb30311d2858af4134d55af927ba0266b8e505
https://github.com/llvm/llvm-project/commit/0afb30311d2858af4134d55af927ba0266b8e505
Author: Danny Mösch <danny.moesch at icloud.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
Log Message:
-----------
[clang-tidy] Add handling of type aliases in `use-designated-initializers` check (#150842)
Resolves #150782.
Commit: d35bf478a81e0ca5c9fac76767d41a23df262f94
https://github.com/llvm/llvm-project/commit/d35bf478a81e0ca5c9fac76767d41a23df262f94
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[CodeGen][NPM] Stitch up loop passes in codegen pipeline (#148114)
same as https://github.com/llvm/llvm-project/pull/133050
Co-authored-by : Oke, Akshat
<[Akshat.Oke at amd.com](mailto:Akshat.Oke at amd.com)>
Commit: 495774d6d59379edad3c8c35be8c4672d4a513fa
https://github.com/llvm/llvm-project/commit/495774d6d59379edad3c8c35be8c4672d4a513fa
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
Revert "[CodeGen][NPM] Stitch up loop passes in codegen pipeline" (#150883)
Reverts llvm/llvm-project#148114
will update with fixed PR.
Commit: 90de4a4ac96ef314e3af9c43c516d5aaf105777a
https://github.com/llvm/llvm-project/commit/90de4a4ac96ef314e3af9c43c516d5aaf105777a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
A llvm/test/Transforms/LoopFusion/sunk-phi-nodes.ll
Log Message:
-----------
[LoopFusion] Fix sink instructions (#147501)
If we have instructions in second loop's preheader which can be sunk, we
should also be adjusting PHI nodes to receive values from the fused loop's latch block.
Fixes #128600
Commit: 07d396b6f595eb90fb40f49d8a11f944553b9bfd
https://github.com/llvm/llvm-project/commit/07d396b6f595eb90fb40f49d8a11f944553b9bfd
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/X86/embed-bitcode.ll
Log Message:
-----------
[COFF] Set .llvmbc and .llvmcmd to metadata section (#150879)
Those are metadata sections for ELF but was not properly set for COFF.
Commit: 376326c6606205a390568e84a76bb182aee02ed1
https://github.com/llvm/llvm-project/commit/376326c6606205a390568e84a76bb182aee02ed1
Author: David Green <david.green at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/andorbrcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/cmp-chains.ll
M llvm/test/CodeGen/AArch64/dag-combine-select.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
Log Message:
-----------
[AArch64] Update some tests to use a more common check prefix. NFC
I'm just trying to more consistently use CHECK-SD and CHECK-GI.
Commit: 4072a6b85beed8427d14f13248d2f9cfaede489f
https://github.com/llvm/llvm-project/commit/4072a6b85beed8427d14f13248d2f9cfaede489f
Author: Marco Maia <marcogmaia at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
Reland "[clangd] Add tweak to override pure virtuals" (#150788)
This relands commit
https://github.com/llvm/llvm-project/commit/7355ea3f6b214d1569da43d02f9a166ff15012e6.
The original commit was reverted in
https://github.com/llvm/llvm-project/commit/bfd73a5161608e6355f7db87dc5f5afee56d7e2f
because it was breaking the buildbot.
The issue has now been resolved by
https://github.com/llvm/llvm-project/commit/38f82534bbe9e1c9f5edd975a72e07beb7048423.
Original PR: https://github.com/llvm/llvm-project/pull/139348
Original commit message:
<blockquote>
closes https://github.com/clangd/clangd/issues/1037
closes https://github.com/clangd/clangd/issues/2240
Example:
```c++
class Base {
public:
virtual void publicMethod() = 0;
protected:
virtual auto privateMethod() const -> int = 0;
};
// Before:
// // cursor here
class Derived : public Base{}^ ;
// After:
class Derived : public Base {
public:
void publicMethod() override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `publicMethod` is not implemented.");
}
protected:
auto privateMethod() const -> int override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `privateMethod` is not implemented.");
}
};
```
https://github.com/user-attachments/assets/79de40d9-1004-4c2e-8f5c-be1fb074c6de
</blockquote>
Commit: 3d994468098027f9cf550c78a1c91bb266040f61
https://github.com/llvm/llvm-project/commit/3d994468098027f9cf550c78a1c91bb266040f61
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in `DerivePointerAlignment: true` (#150744)
This effectively reverts a4d4859dc70c046ad928805ddeaf8fa101793394 which
didn't fix the problem that `int*,` was not counted as "Left" alignment.
Fixes #150327
Commit: fe0dbe0f2950d95071be7140c7b4680f17a7ac4e
https://github.com/llvm/llvm-project/commit/fe0dbe0f2950d95071be7140c7b4680f17a7ac4e
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
Log Message:
-----------
[CodeGen] More consistently expand float ops by default (#150597)
These float operations were expanded for scalar f32/f64/f128, but not
for f16 and more problematically, not for vectors. A small subset of
them was separately set to expand for vectors.
Change these to always expand by default, and adjust targets to mark
these as legal where necessary instead.
This is a much safer default, and avoids unnecessary legalization
failures because a target failed to manually mark them as expand.
Fixes https://github.com/llvm/llvm-project/issues/110753.
Fixes https://github.com/llvm/llvm-project/issues/121390.
Commit: a87fb3b60fac6ae420393ae8740c9becc7ef6a05
https://github.com/llvm/llvm-project/commit/a87fb3b60fac6ae420393ae8740c9becc7ef6a05
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate MLIR Core category maintainers (#149485)
This is a nomination for the maintainers of the core category within
MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: f529c0b56f3a77301b884281f8cb1aa214236f7b
https://github.com/llvm/llvm-project/commit/f529c0b56f3a77301b884281f8cb1aa214236f7b
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg][nfc] Clean-up leftover code post #149156 (#150602)
In https://github.com/llvm/llvm-project/pull/149156, I ensured that we
no longer generate spurious `tensor.empty` ops when vectorizing
`linalg.unpack`.
This follow-up removes leftover code that is now redundant but was
missed in the original PR.
Commit: ac4c13d0d8f56c6939557cc9addd6e3e149664ad
https://github.com/llvm/llvm-project/commit/ac4c13d0d8f56c6939557cc9addd6e3e149664ad
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate Tensor Compiler maintainers (#149488)
This is a nomination for the maintainers of the tensor compiler category
within MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: ddb12c10a9215d15df8058a52965241d5030422e
https://github.com/llvm/llvm-project/commit/ddb12c10a9215d15df8058a52965241d5030422e
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-div.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-gather-scatter.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-no-masking.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[RISCV][LV] Remove redundant -force-tail-folding-style from tests. NFC
This isn't needed after we set the tail folding style to data-with-evl
via TTI in #148686. Also rename the tests to reflect the fact they're
no longer forcing the tail folding style.
Commit: 72b77c193f1053fc98b3da241b25f1f7ba02d7ae
https://github.com/llvm/llvm-project/commit/72b77c193f1053fc98b3da241b25f1f7ba02d7ae
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll
Log Message:
-----------
AMDGPU: Avoid contraction in wwm allocation failure message (#150888)
Commit: 41f333250bf2b9699b9c8cfec3b12dc046162679
https://github.com/llvm/llvm-project/commit/41f333250bf2b9699b9c8cfec3b12dc046162679
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
A lld/test/COFF/embed-bitcode.test
Log Message:
-----------
[LLD][COFF] Discard .llvmbc and .llvmcmd sections (#150897)
Those sections are generated by -fembed-bitcode and do not need to be
kept in executable files.
Commit: 44ff1ed16e4f0798419f22fb6040ec94f417452d
https://github.com/llvm/llvm-project/commit/44ff1ed16e4f0798419f22fb6040ec94f417452d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
Log Message:
-----------
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
Addresses a TODO
Commit: 525090e83ca392753d371602b5e64f06e7debd9a
https://github.com/llvm/llvm-project/commit/525090e83ca392753d371602b5e64f06e7debd9a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
A llvm/test/CodeGen/Mips/nan_lowering.ll
R llvm/test/CodeGen/Mips/qnan.ll
Log Message:
-----------
Revert "[MIPS]Fix QNaNs in the MIPS legacy NaN encodings" (#150773)
Reverts llvm/llvm-project#139829.
We can't just randomly change the value of constants during lowering.
Fixes https://github.com/llvm/llvm-project/issues/149295.
Commit: cad5328b009aab73e68afc7b61fe7aa0af29c594
https://github.com/llvm/llvm-project/commit/cad5328b009aab73e68afc7b61fe7aa0af29c594
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
Log Message:
-----------
[X86] Add late tail duplication tests with computed gotos.
Add a new test for post-regalloc tail duplication with computed gotos to
complement llvm/test/CodeGen/X86/tail-dup-computed-goto.mir.
Commit: d532d58974d5f1ccb5c568b67321cc761742152b
https://github.com/llvm/llvm-project/commit/d532d58974d5f1ccb5c568b67321cc761742152b
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate MLIR Egress category maintainers (#149487)
This is a nomination for the maintainers of the egress category within
MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: 2adbf9e92b75fb6db9e98334419e1ae192f3575b
https://github.com/llvm/llvm-project/commit/2adbf9e92b75fb6db9e98334419e1ae192f3575b
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ComposeSubView.cpp
M mlir/test/Transforms/compose-subview.mlir
Log Message:
-----------
[mlir][memref] Support test-compose-subview dynamic size (#146881)
Supports the case where the sizes of the subview op is dynamic.When
there are more for loops in the tile algorithm, multiple subviews are
performed and test-compose-subview does not work when the size operand
of the subview ops is dynamic value.
Commit: fdd7f9c61bbc476bfc6839dec3428e1dea06eacb
https://github.com/llvm/llvm-project/commit/fdd7f9c61bbc476bfc6839dec3428e1dea06eacb
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Allow scalar int8 tensors to be unranked (#150731)
This PR fixes #150519
Commit: d4f9c11e06d5b38e2c110b3e42c0637b52422346
https://github.com/llvm/llvm-project/commit/d4f9c11e06d5b38e2c110b3e42c0637b52422346
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[RISCV][LV] Use predicate-else-scalar-epilogue flag in tail folding tests. NFC
Align the tests closer with what we eventually intend to enable by
default on RISC-V by using
-prefer-predicate-over-epilogue=predicate-else-scalar-epilogue, instead
of dropping vectorization entirely with predicate-dont-vectorize.
Also adjust the non-EVL run lines so that they use
-prefer-predicate-over-epilogue=scalar-epilogue instead of
-force-tail-folding-style=none, so we're only using testing one type of
flag instead of a combination of two.
Commit: 2ad4e93dedbb9936f03bb7035dccebb1cf4a75cb
https://github.com/llvm/llvm-project/commit/2ad4e93dedbb9936f03bb7035dccebb1cf4a75cb
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
A llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
Log Message:
-----------
[AMDGPU][gfx1250] Use SCOPE_SE for stores that may hit scratch (#150586)
Commit: 6c2caa63d7d2929765199a66a61660f5372f01c7
https://github.com/llvm/llvm-project/commit/6c2caa63d7d2929765199a66a61660f5372f01c7
Author: Michael Jabbour <michael.jabbour at sonarsource.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Modules/specializations-lazy-load-parentmap-crash.cpp
Log Message:
-----------
[Serialization] Fix crash while lazy-loading template specializations (#150430)
## Problem
This is a regression that was observed in Clang 20 on modules code that
uses import std.
The lazy-loading mechanism for template specializations introduced in
#119333 can currently load additional nodes when called multiple times,
which breaks assumptions made by code that iterates over
specializations. This leads to iterator invalidation crashes in some
scenarios.
The core issue occurs when:
1. Code calls `spec_begin()` to get an iterator over template
specializations. This invokes `LoadLazySpecializations()`.
2. Code then calls `spec_end()` to get the end iterator.
3. During the `spec_end()` call, `LoadExternalSpecializations()` is
invoked again.
4. This can load additional specializations for certain cases,
invalidating the begin iterator returned in 1.
I was able to trigger the problem when constructing a ParentMapContext.
The regression test demonstrates two ways to trigger the construction of
the ParentMapContext on problematic code:
- The ArrayBoundV2 checker
- Unsigned overflow detection in sanitized builds
Unfortunately, simply dumping the ast (e.g. using `-ast-dump-all`)
doesn't trigger the crash because dumping requires completing the redecl
chain before iterating over the specializations.
## Solution
The fix ensures that the redeclaration chain is always completed
**before** loading external specializations by calling
`CompleteRedeclChain(D)` at the start of
`LoadExternalSpecializations()`. The idea is to ensure that all
`SpecLookups` are fully known and loaded before the call to
`LoadExternalSpecializationsImpl()`.
Commit: 51194a4ae238f41c4f65730c95416e312dc369cb
https://github.com/llvm/llvm-project/commit/51194a4ae238f41c4f65730c95416e312dc369cb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
Log Message:
-----------
AMDGPU: Fix test to stop pipeline after VGPR allocation (#150809)
This test seems to have been incorrectly updated after
ac0f64f06d67a93817ccd9a3c529ad40920115c9. Previously it
was testing the state after VGPR allocation; after the content
was updated for the "greedy,1" which now does not correspend
to the VGPR allocation. The spills implied by the test name
aren't present (they also appear to still be missing for gfx90a).
Commit: 9c606ae0c0ae051144ff26832ccd5dcd9c94e678
https://github.com/llvm/llvm-project/commit/9c606ae0c0ae051144ff26832ccd5dcd9c94e678
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Dialect/Tosa/availability.mlir
A mlir/test/Dialect/Tosa/controlflow.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[MLIR][TOSA] Update IfOp print/parse to support ranked condition tens… (#149791)
…or and optional block arguments
This change extends the TOSA `cond_if` operation's print and parse logic
to handle the following:
- The condition operand may now have any rank, as long as the total
number of elements sums to 1.
%1 = tosa.cond_if %0 : tensor<1x1x1xi1> -> tensor<4xf32>
- The `then` and `else` regions can now include optional block
arguments. The updated IR syntax reflects this:
%1 = tosa.cond_if %0 (%arg2 = %arg0, %arg3 = %arg1) : tensor<i1>
(tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
- Removed parentheses around single result types in the printed
representation, aligning with the `AsmPrinter` conventions.
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: c4a0125f46319b7ffa6e68834eaaa659307b44ca
https://github.com/llvm/llvm-project/commit/c4a0125f46319b7ffa6e68834eaaa659307b44ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[llvm][docs] Update list of working Linux host platforms (#149503)
RISC-V and LoongArch to my knowledge are quite well supported.
Commit: 3308fc4acda46af459b9fe69bab2f011a19d2286
https://github.com/llvm/llvm-project/commit/3308fc4acda46af459b9fe69bab2f011a19d2286
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/gn/build/write_vcsrevision.py
Log Message:
-----------
[gn build] Use shutil.which to find git in write_vcsrevision.py (#142570)
Relates to https://github.com/llvm/llvm-project/issues/54337
This is just a comment referencing distutils but even so, we can ditch
the custom which and use the one Python 3.3 added. Which has the .bat
bug fixed:
https://docs.python.org/3.3/library/shutil.html#shutil.which
I tested this on Windows:
```
C:\Users\tcwg>touch foo.bat
C:\Users\tcwg>python
Python 3.11.9 (tags/v3.11.9:de54cf5, Apr 2 2024, 12:24:25) [MSC v.1938 64 bit (ARM64)] on win32 Type "help", "copyright", "credits" or "license" for more information.
>>> import shutil
>>> shutil.which("foo")
'.\\foo.BAT'
```
I just ran the script manually and got reasonable results, I haven't
done a GN build.
Commit: 98ec927fcb8697a6f6df64298835917aa1d0d3c1
https://github.com/llvm/llvm-project/commit/98ec927fcb8697a6f6df64298835917aa1d0d3c1
Author: Martin Storsjö <martin at martin.st>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
Log Message:
-----------
[lldb] [Windows] Silence format string warnings (#150886)
This fixes the following build warnings in a mingw environment:
../../lldb/source/Host/windows/MainLoopWindows.cpp:226:50: warning:
format specifies type 'int' but the argument has type
'IOObject::WaitableHandle' (aka 'void *') [-Wformat]
226 | "File descriptor %d already monitored.", waitable_handle);
| ~~ ^~~~~~~~~~~~~~~
../../lldb/source/Host/windows/MainLoopWindows.cpp:239:49: warning:
format specifies type 'int' but the argument has type 'DWORD' (aka
'unsigned long') [-Wformat]
238 | error = Status::FromErrorStringWithFormat("Unsupported file type
%d",
| ~~
| %lu
239 | file_type);
| ^~~~~~~~~
2 warnings generated.
Commit: bd2b7eb23918b618ab8fb9963ea0533522a6c16a
https://github.com/llvm/llvm-project/commit/bd2b7eb23918b618ab8fb9963ea0533522a6c16a
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[analyzer] Conversion to CheckerFamily: DereferenceChecker (#150442)
This commit converts the class DereferenceChecker to the checker family
framework and simplifies some parts of the implementation.
This commit is almost NFC, the only technically "functional" change is
that it removes the hidden modeling checker `DereferenceModeling` which
was only relevant as an implementation detail of the old checker
registration procedure.
Commit: 5ad7ef6fec63de35a02526bc3e7fce648ab486e2
https://github.com/llvm/llvm-project/commit/5ad7ef6fec63de35a02526bc3e7fce648ab486e2
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[bazel] add new cmakedefine from #147418 to bazel config file (#150912)
This PR adds the `#cmakedefine LLVM_ENABLE_PROFCHECK` in
`llvm-config.h.cmake` introduced in #147418 to the copy of that file in
the bazel overlay directory such that that define is also avalable in
the bazel build. Not having the define broke the bazel build.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 1afb42bc10efcf033c1e8b0fda90d1e2956002fa
https://github.com/llvm/llvm-project/commit/1afb42bc10efcf033c1e8b0fda90d1e2956002fa
Author: Adar Dagan <101581112+Adar-Dagan at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Let shrinkSplatShuffle act on vectors of different lengths (#148593)
shrinkSplatShuffle in InstCombine would only move truncs up through
shuffles if those shuffles inputs had the exact same type as their
output, this PR weakens this constraint to only requiring that the
scalar type of the input and output match.
Commit: 2f2df751d453566ab70fd02b9a019cd66af76bc6
https://github.com/llvm/llvm-project/commit/2f2df751d453566ab70fd02b9a019cd66af76bc6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
Log Message:
-----------
[LV] Use SCEV::getElementCount in selectEpilogueVectorizationFactor. (#150018)
Follow-up to https://github.com/llvm/llvm-project/pull/149789 to use
getElementCount to compute the remaining iterations in
selectEpilogueVectrizationFactor.
PR: https://github.com/llvm/llvm-project/pull/150018
Commit: d803c61aca0d796675d0045fe05d698e6db85e52
https://github.com/llvm/llvm-project/commit/d803c61aca0d796675d0045fe05d698e6db85e52
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #147046 (#150893)
Static functions have an implicit object argument during deduction.
Commit: a2fcf18d71b3c3d4e7b52e558124eae8ae7c4a83
https://github.com/llvm/llvm-project/commit/a2fcf18d71b3c3d4e7b52e558124eae8ae7c4a83
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
Log Message:
-----------
Fix `DEBUGLOG_WITH_STREAM_TYPE_AND_FILE` broken in #150750 (#150920)
This PR fixes the `DEBUGLOG_WITH_STREAM_TYPE_AND_FILE` macro that got
broken in #150750. That PR introduces a more sophisitaced version of
that macro and refactored some code in that process, making the
`getShortFileName` a free function instead of a class member function,
but did not adapt this macro to the refactored code.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 1b657c6d6bcf6749fd37a332c7a7d8e281cd7be3
https://github.com/llvm/llvm-project/commit/1b657c6d6bcf6749fd37a332c7a7d8e281cd7be3
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT][NFC] Register profiled functions once (#150622)
While registering profiled functions, only handle each address once.
Speeds up `DataAggregator::preprocessProfile`.
Test Plan:
For intermediate size pre-aggregated profile (10MB), reduces parsing
time from ~0.41s down to ~0.16s.
Commit: e30e644266fbc9ba638ee2c6aa23b5691397163f
https://github.com/llvm/llvm-project/commit/e30e644266fbc9ba638ee2c6aa23b5691397163f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn build] Port 4072a6b85bee
Commit: a74167dfdc18fa85f195ea01a3013804dc7aeb5d
https://github.com/llvm/llvm-project/commit/a74167dfdc18fa85f195ea01a3013804dc7aeb5d
Author: b10902118 <b10902118 at ntu.edu.tw>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
Log Message:
-----------
[lldb][Arm32] Remove unused watchpoint refcount. (#150770)
Already removed in NativeRegisterContextDBReg.h
Commit: 5452c3888c3a9e43fd3e96d1d5647b58b96398df
https://github.com/llvm/llvm-project/commit/5452c3888c3a9e43fd3e96d1d5647b58b96398df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
Log Message:
-----------
[AMDGPU] Regenerate add/sub overflow tests
Add GFX10/11 test coverage to match saddo.ll
Commit: e19743bd6cce4a3c7c84435faf855294d39ac271
https://github.com/llvm/llvm-project/commit/e19743bd6cce4a3c7c84435faf855294d39ac271
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Remove unused TargetPassConfig include from attributor (#150892)
Commit: 92d09245d61dce80d3e68a27cc34d5fc6f062c93
https://github.com/llvm/llvm-project/commit/92d09245d61dce80d3e68a27cc34d5fc6f062c93
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
Log Message:
-----------
[VPlan] Fall back to scalar epilogue if possible when EVL isn't legal (#150908)
When enabling predicated vectorization by default on RISC-V, there's a
bunch of performance regressions on llvm-test-suite's LoopInterleaving
microbenchmarks:
https://lnt.lukelau.me/db_default/v4/nts/788?show_delta=yes&show_previous=yes&show_stddev=yes&show_mad=yes&show_all=yes&show_all_samples=yes&show_sample_counts=yes&show_small_diff=yes&num_comparison_runs=0&test_filter=&test_min_value_filter=&aggregation_fn=min&MW_confidence_lv=0.05&compare_to=791&baseline=730&submit=Update
Most of these regressions stem from the interleave_count pragma, which
causes EVL tail folding interleaving to be unsupported (since we don't
support unrolling with EVL)
Currently if DataWithEVL isn't legal we fall back to DataWithoutLaneMask
as the tail folding style, but this is very slow on RISC-V.
The order of performance roughly is something like:
DataWithEVL > None (scalar-epilogue) > Data[WithoutLaneMask]
So this patch tries to prevent the regressions by falling back to a
scalar epilogue where possible, i.e. the existing vectorization we have
today. Not we may still need to fall back to DataWithoutLaneMask, e.g.
if the trip count is low etc or it's forced by
-prefer-predicate-over-epilogue=predicate-dont-vectorize.
Commit: 6ccc9e559da8d0f07e496d375dbc02bc441e60d9
https://github.com/llvm/llvm-project/commit/6ccc9e559da8d0f07e496d375dbc02bc441e60d9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
Log Message:
-----------
[AArch64] Add taildup test with computed gotos.
Add a test case showing missed optimizations from early taildup with
computed gotos for https://github.com/llvm/llvm-project/pull/150911.
Commit: 9d642b0ec806d13002e2f0b50091ca9656b238e5
https://github.com/llvm/llvm-project/commit/9d642b0ec806d13002e2f0b50091ca9656b238e5
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Lower/OpenMP/atomic-control-options.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[flang][MLIR][OpenMP][llvm]Atomic Control Support (#150860)
Commit: 5dc9937ea910f807d3e7325669053c5740545875
https://github.com/llvm/llvm-project/commit/5dc9937ea910f807d3e7325669053c5740545875
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Improve starting indices for GPU allocation (#150432)
Summary:
The slots in this allocation scheme are statically allocated. All sizes
share the same array of slots, but are given different starting
locations to space them apart. The previous implementation used a
trivial linear slice. This is inefficient because it provides the more
likely allocations (1-1024 bytes) with just as much space as a highly
unlikely one (1 MiB).
This patch uses a cubic easing function to gradually shrink the gaps.
For example, we used to get around 700 free slots for a 16 byte
allocation, now we get around 2100 before it starts encroaching on the
32 byte allocation space. This could be improved further, but I think
this is sufficient.
Commit: a63bbf2f1e0d1e1367fb111290ba8d652572d724
https://github.com/llvm/llvm-project/commit/a63bbf2f1e0d1e1367fb111290ba8d652572d724
Author: halbi2 <hehiralbi at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprObjC.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
A clang/test/SemaObjC/attr-nodiscard.m
A clang/test/SemaObjCXX/attr-nodiscard.mm
Log Message:
-----------
[clang] Diagnose [[nodiscard]] return types in Objective-C++ (#142541)
My solution was to copy-paste getUnusedResultAttr and
hasUnusedResultAttr from CallExpr into ObjCMessageExpr too.
Fixes #141504
Commit: c8a091e1b65bcb523c3327b85a2442be61659a87
https://github.com/llvm/llvm-project/commit/c8a091e1b65bcb523c3327b85a2442be61659a87
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Target/InstrumentationRuntime.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb][NFC] Use IterationAction for ModuleList::ForEach callbacks (#150930)
Commit: a6532c2adac5c2d2ba67046bdc437be6a063d75d
https://github.com/llvm/llvm-project/commit/a6532c2adac5c2d2ba67046bdc437be6a063d75d
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
Log Message:
-----------
[AMDGPU][gfx12] Clean-up implementation of waits before SCOPE_SYS stores (#150587)
We can do it all in finalizeStore if we ensure it always sees the
stores.
For that, I needed to fix a hidden bug where finalizeStore wouldn't see
all stores
because sometimes the iterator got out-of-sync and didn't point to the
store anymore.
This also removes the waits before volatile LDS stores which never
needed it, that was a bug until now.
Commit: 01d4b8e9a6aea5decfac07a81b40b7db29e8bd8f
https://github.com/llvm/llvm-project/commit/01d4b8e9a6aea5decfac07a81b40b7db29e8bd8f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/Transforms/FunctionAttrs/noalias.ll
M llvm/test/Transforms/FunctionAttrs/nofree.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/norecurse.ll
M llvm/test/Transforms/FunctionAttrs/nounwind.ll
Log Message:
-----------
[FunctionAttrs] Add additional tests (NFC)
Add test coverage for noalias, and for unknown function calls.
Commit: 904de95e713b09fa0ba86c53bf62a195e5036c00
https://github.com/llvm/llvm-project/commit/904de95e713b09fa0ba86c53bf62a195e5036c00
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
[clang][bytecode][NFC] Fix a few clang-tidy complaints (#150940)
Commit: 166493d6927026c4933be82de81adabc9751c0e3
https://github.com/llvm/llvm-project/commit/166493d6927026c4933be82de81adabc9751c0e3
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
Log Message:
-----------
[FunctionAttrs] Fix function signature mismatch in test (NFC)
There was a return type mismatch, which unintentionally blocked
attribtue inference in this test.
Commit: 9975dfdf800d9881b704a988bc004ec81639fe67
https://github.com/llvm/llvm-project/commit/9975dfdf800d9881b704a988bc004ec81639fe67
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
Log Message:
-----------
[libc] Small performance improvements to GPU allocator
Summary:
This slightly increases performance in a few places. First, we
optimistically assume the cached slab has ample space which lets us
avoid the atomic load on the highly contended counter in the case that
it is likely to succeed. Second, we no longer call `match_any` twice as
we can calculate the uniform slabs at the moment we return them.
Thirdly, we always choose a random index on a 32-bit boundary. This
means that in the fast case we fulfil the allocation with a single
`fetch_or`, and in the other case we quickly move to the free bit.
This nets around a 7.75% improvement for the fast path case.
Commit: a7649007ef269c397b5d474d1b5f4432da96d1de
https://github.com/llvm/llvm-project/commit/a7649007ef269c397b5d474d1b5f4432da96d1de
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
Log Message:
-----------
[libc] Rework match any use in hot allocate bitfield loop
Summary:
We previously used `match_all` as the shortcut to figure out which
threads were destined for which slots. This lowers to a for-loop, which
even if it often only executes once still causes some slowdown
especially when divergent. Instead we use a single ballot call and then
calculate it.
Here the ballot tells us which lanes are the first in a block, either
the starting index or the barrier for a new 32-bit int. We then use some
bit magic to figure out for each lane ID its closest leader. For the
length we simply use the length calculated by the leader of the
remaining bits to be written. This removes the match any and the
shuffle, which improves the minimum number of cycles this takes by about
5%.
Commit: a1a610a1285fe4cde9f5f6a4a759da95266bdcb6
https://github.com/llvm/llvm-project/commit/a1a610a1285fe4cde9f5f6a4a759da95266bdcb6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Increase the number of times we wait on a slab
Summary:
This wait restricts how long we wait on a slab. The only reason this
isn't an infinite loop is to prevent complete deadlocks. However, this
limit was *just* on the cusp of waiting long enough for the allocation
to be done. Just increase this to a sufficiently large value, because
this limit only exists to keep the interface wait-free in the absolute
worst case scheduling scenario. This *MASSIVELY* improved performance
for mixed allocations as we no longer shuffled around creating more than
necessary.
Commit: a22d010002baf761f84d0a8fa5fcaaf6f3b1455f
https://github.com/llvm/llvm-project/commit/a22d010002baf761f84d0a8fa5fcaaf6f3b1455f
Author: Felix Weiglhofer <9267733+fweig at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Headers/opencl-c-base.h
Log Message:
-----------
opencl: Ensure printf symbol is not mangled. (#150210)
Fixes #122453.
Commit: 33cc58f46f0c163d4bea2c7212b3830b3adf99b3
https://github.com/llvm/llvm-project/commit/33cc58f46f0c163d4bea2c7212b3830b3adf99b3
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerOptions.h
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
A compiler-rt/test/fuzzer/SigTrapTest.cpp
A compiler-rt/test/fuzzer/sig-trap.test
Log Message:
-----------
[compiler-rt][libFuzzer] Add support for capturing SIGTRAP exits. (#149120)
Swift's FatalError raises a SIGTRAP, which currently causes the fuzzer
to exit without writing out the crashing input.
rdar://142975522
Commit: 4b1d5b8d4f4d09e9988c0f5ca4a35957bf99235e
https://github.com/llvm/llvm-project/commit/4b1d5b8d4f4d09e9988c0f5ca4a35957bf99235e
Author: Will Froom <willfroom at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Pass/Pass.cpp
Log Message:
-----------
[MLIR] Fix pipelineInitializationKey never being correctly updated (#150948)
Prior to this change `pipelineInitializationKey` would never be updated
so `initialize` would always be called even if the pipeline didn't
change
Commit: fe4f6c1a58ab4f00a88a97af01000b6783b573ee
https://github.com/llvm/llvm-project/commit/fe4f6c1a58ab4f00a88a97af01000b6783b573ee
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
Log Message:
-----------
[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmin/zvfbfmin (#150882)
When vectorizing with predication some loops that were previously
vectorized without zvfhmin/zvfbfmin will no longer be vectorized because
the masked load/store or gather/scatter cost returns illegal.
This is due to a discrepancy where for these costs we check
isLegalElementTypeForRVV but for regular memory accesses we don't.
But for bf16 and f16 vectors we don't actually need the extension
support for loads and stores, so this adds a new function which takes
this into account.
For regular memory accesses we should probably also e.g. return an
invalid cost for i64 elements on zve32x, but it doesn't look like we
have tests for this yet.
We also should probably not be vectorizing these bf16/f16 loops to begin
with if we don't have zvfhmin/zvfbfmin and zfhmin/zfbfmin. I think this
is due to the scalar costs being too cheap. I've added tests for this in
a100f6367205c6a909d68027af6a8675a8091bd9 to fix in another patch.
Commit: 1ab04fc94c5f68ad0dc6755e3914f2895b85e720
https://github.com/llvm/llvm-project/commit/1ab04fc94c5f68ad0dc6755e3914f2895b85e720
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/PDB.cpp
A lld/test/COFF/pdb-empty-sec.s
Log Message:
-----------
[LLD][COFF] Allow symbols with empty chunks to have no associated output section in the PDB writer (#149523)
If a chunk is empty and there are no other non-empty chunks in the same
section, `removeEmptySections()` will remove the entire section. In this
case, use a section index of 0, as the MSVC linker does, instead of
asserting.
Commit: 8437038984c39665783a4f7445b2eb9e9bf9ce48
https://github.com/llvm/llvm-project/commit/8437038984c39665783a4f7445b2eb9e9bf9ce48
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[LoopIdiom] Add test where LCSSA needs preserving when re-using PHI (NFC)
Commit: 38cd66a6ceef5a3208367967d8537b6a7e31ebc0
https://github.com/llvm/llvm-project/commit/38cd66a6ceef5a3208367967d8537b6a7e31ebc0
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
Log Message:
-----------
[LLD][COFF] Move resolving alternate names to SymbolTable (NFC) (#149495)
Commit: 0462dfe39f82ecb9fb7c9ddb15008e590b0c2924
https://github.com/llvm/llvm-project/commit/0462dfe39f82ecb9fb7c9ddb15008e590b0c2924
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[llvm][docs] Refresh "Restrict Visibility" in Coding Standards (#150914)
No change of meaning, just formatting and an extra example to make it
easier to comprehend:
* Split separate, important points into their own paragraphs.
* Remove a contraction.
* Finally, show to to use "static" on a function. As before we just
showed why namespaces were bad, but not what you should do instead.
Commit: d26ca8b87266024546501051ccaf75cb3756aee3
https://github.com/llvm/llvm-project/commit/d26ca8b87266024546501051ccaf75cb3756aee3
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
Log Message:
-----------
[lldb][AArch64] Add HWCAP3 to register field detection (#145029)
This will be used to detect the presence of Arm's new Memory Tagging
store only checking feature. This commit just adds the plumbing to get
that value into the detection function.
FreeBSD has not allocated a number for HWCAP3 and already has AT_ARGV
defined as 29. So instead of attempting to read from FreeBSD processes,
I've explicitly passed 0. We don't want to be reading some other entry
accidentally.
If/when FreeBSD adds HWCAP3 we can handle it like we do for
AUXV_FREEBSD_AT_HWCAP.
No extra tests here, those will be coming with the next change for MTE
support.
Commit: fbf6271c7da20356d7b34583b3711b4126ca1dbb
https://github.com/llvm/llvm-project/commit/fbf6271c7da20356d7b34583b3711b4126ca1dbb
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
A llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
Reapply (2) [BranchFolding] Kill common hoisted debug instructions (#149999)
Reapply #140091.
branch-folder hoists common instructions from TBB and FBB into their
pred. Without this patch it achieves this by splicing the instructions from TBB
and deleting the common ones in FBB. That moves the debug locations and debug
instructions from TBB into the pred without modification, which is not
ideal. Debug locations are handled in #140063.
This patch handles debug instructions - in the simplest way possible, which is
to just kill (undef) them. We kill and hoist the ones in FBB as well as TBB
because otherwise the fact there's an assignment on the code path is deleted
(which might lead to a prior location extending further than it should).
There's possibly something we could do to preserve some variable locations in
some cases, but this is the easiest not-incorrect thing to do.
Note I had to replace the constant DBG_VALUEs to use registers in the test- it
turns out setDebugValueUndef doesn't undef constant DBG_VALUEs... which feels
wrong to me, but isn't something I want to touch right now.
---
Fix end-iterator-dereference and add test.
Commit: 5bcbcf8d538768c7d7a79afa8a63518479c818c2
https://github.com/llvm/llvm-project/commit/5bcbcf8d538768c7d7a79afa8a63518479c818c2
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/asinhf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinhf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asinhf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor asinhf implementation to header-only in src/__support/math folder. (#150843)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 5f2092dae36486f428485e47b9a694463c855a4e
https://github.com/llvm/llvm-project/commit/5f2092dae36486f428485e47b9a694463c855a4e
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
Log Message:
-----------
[RISCV][LV] Update f16/bf16 loop vectorizer tests. NFC
This fixes a failing test after the changes in #150908 affected the
result in #150882.
Commit: 4d259de2ae88fb022acc722dedd60260a870eb8b
https://github.com/llvm/llvm-project/commit/4d259de2ae88fb022acc722dedd60260a870eb8b
Author: Juan Besa <juanbesa at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/qualified-auto.cpp
Log Message:
-----------
[clang-tidy] Add `IgnoreAliasing` option to `readability-qualified-auto check` (#147060)
`readability-qualified-auto` check currently looks at the unsugared
type, skipping any typedefs, to determine if the variable is a
pointer-type. This may not be the desired behaviour, in particular when
the type depends on compilation flags.
For example
```
#if CONDITION
using Handler = int *;
#else
using Handler = uint64_t;
#endif
```
A more common example is some implementations of `std::array` use
pointers as iterators.
This introduces the IgnoreAliasing option so that
`readability-qualified-auto` does not look beyond typedefs.
---------
Co-authored-by: juanbesa <juanbesa at devvm33299.lla0.facebook.com>
Co-authored-by: Kazu Hirata <kazu at google.com>
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: f9f68af4b8d5f8dd0bf8f14174b8b223fcf54c97
https://github.com/llvm/llvm-project/commit/f9f68af4b8d5f8dd0bf8f14174b8b223fcf54c97
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
A llvm/test/Transforms/LoopUnroll/Hexagon/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[SCEV] Make sure LCSSA is preserved when re-using phi if needed.
If we insert a new add instruction, it may introduce a new use outside
the loop that contains the phi node we re-use. Use fixupLCSSAFormFor to
fix LCSSA form, if needed.
This fixes a crash reported in
https://github.com/llvm/llvm-project/pull/147824#issuecomment-3124670997.
Commit: 6fb8e585658ac3e0682dd9823507cea536cc8959
https://github.com/llvm/llvm-project/commit/6fb8e585658ac3e0682dd9823507cea536cc8959
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
Log Message:
-----------
AMDGPU: Disable AGPR allocation in VGPR MFMA tests (#150873)
Commit: a496a985d922e8ad1e9ef8d9ad3598a097cdfa90
https://github.com/llvm/llvm-project/commit/a496a985d922e8ad1e9ef8d9ad3598a097cdfa90
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
Log Message:
-----------
AMDGPU: Remove -stress-regalloc arguments from mfma selection tests (#150890)
I'm not really sure what the point of these was, but they originated
in the base support commit for gfx942 mfma support. These don't impact
the selection at all, so don't belong in this test. These were causing
allocation failure depending on whether or not the AGPR or VGPR form
was used.
Commit: 819f020b282f42e5ed45d8d8325cbb94ba48ef7a
https://github.com/llvm/llvm-project/commit/819f020b282f42e5ed45d8d8325cbb94ba48ef7a
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Utils/LibCallsShrinkWrap.cpp
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/Hexagon/hvx-reuse-fi-base.ll
Log Message:
-----------
Use F.hasOptSize() instead of checking optsize directly (#147348)
Commit: 0209e76fe6440bc45a9ed61b9671d9593db10957
https://github.com/llvm/llvm-project/commit/0209e76fe6440bc45a9ed61b9671d9593db10957
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_core_file/core.mte
M lldb/test/API/linux/aarch64/mte_core_file/core.nomte
M lldb/test/API/linux/aarch64/mte_core_file/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Show MTE store only setting in mte_ctrl (#145033)
This controls whether tag checking is performed for loads and
stores, or stores only.
It requires a specific architecture feature which we detect
with a HWCAP3 and cpuinfo feature.
Live process tests look for this and adjust expectations
accordingly, core file tests are using an updated file with
this feature enabled.
The size of the core file has increased and there's nothing
I can do about that. Could be the presence of new architecure
features or kernel changes since I last generated them.
I can generate a smaller file that has the tag segment,
but that segment does not actually contain tag data. So
that's no use.
Commit: 75b79c9238bc083cdff2d2364be40633fdf4d1ad
https://github.com/llvm/llvm-project/commit/75b79c9238bc083cdff2d2364be40633fdf4d1ad
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64x-delayimport.test
M lld/test/COFF/delayimports.test
M lld/test/COFF/delayimporttables.yaml
M lld/test/COFF/giats.s
Log Message:
-----------
[LLD][X86] Match delayLoad thunk with MSVC (#149521)
Previously we saved registers in the shadow space of callee before
calling __delayLoadHelper2. Now we save arguments in the shadow space of
the caller and allocate shadow space for the callee.
Fixes #51941
---------
Co-authored-by: Benjamin Santerre <benjamin.santerre at gmail.com>
Commit: 6a45697fa63828c3ad90e2def12dae39b7e83dc5
https://github.com/llvm/llvm-project/commit/6a45697fa63828c3ad90e2def12dae39b7e83dc5
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[CI] Downgrade to clang-20 for libc fullbuild (#150246)
To be reverted when llvm-21 issues are resolved with the precommit CIs.
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: 837b2d464ff16fe0d892dcf2827747c97dd5465e
https://github.com/llvm/llvm-project/commit/837b2d464ff16fe0d892dcf2827747c97dd5465e
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/attr-nonstring.c
Log Message:
-----------
[[gnu::nonstring]] should work on pointers too (#150974)
Clang's current implementation only works on array types, but GCC (which
is where we got this attribute) supports it on pointers as well as
arrays.
Fixes #150951
Commit: f0c90dfcd8f2b641c17db578bdfeb9b02994e06b
https://github.com/llvm/llvm-project/commit/f0c90dfcd8f2b641c17db578bdfeb9b02994e06b
Author: Baghirov Feyruz <113597150+feyruzb at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer-config.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer.cpp
M clang/docs/analyzer/checkers/unix_malloc_example.c
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/NewDelete-path-notes.cpp.plist
M clang/test/Analysis/Inputs/expected-plists/malloc-plist.c.plist
M clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/Malloc+MismatchedDeallocator+NewDelete.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
M clang/test/Analysis/NewDelete-intersections.mm
M clang/test/Analysis/NewDelete-path-notes.cpp
M clang/test/Analysis/diagnostics/dtors.cpp
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/getline-alloc.c
M clang/test/Analysis/gmalloc.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc-annotations.cpp
M clang/test/Analysis/malloc-free-after-return.cpp
M clang/test/Analysis/malloc-interprocedural.c
M clang/test/Analysis/malloc-plist.c
M clang/test/Analysis/malloc-refcounted.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.mm
M clang/test/Analysis/new.cpp
M clang/test/Analysis/retain-count-alloc.cpp
M clang/test/Analysis/self-assign.cpp
M clang/test/Analysis/stack-frame-context-revision.cpp
M clang/test/Analysis/std-string.cpp
Log Message:
-----------
Rename 'free' in warning messages to 'release' (#150935)
Changed the warning message:
- **From**: 'Attempt to free released memory'
**To**: 'Attempt to release already released memory'
- **From**: 'Attempt to free non-owned memory'
**To**: 'Attempt to release non-owned memory'
- **From**: 'Use of memory after it is freed'
**To**: 'Use of memory after it is released'
All connected tests and their expectations have been changed
accordingly.
Inspired by [this
PR](https://github.com/llvm/llvm-project/pull/147542#discussion_r2195197922)
Commit: 701de35f67201cb39cf22bf3835c345e55014f3c
https://github.com/llvm/llvm-project/commit/701de35f67201cb39cf22bf3835c345e55014f3c
Author: enh-google <enh at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcschr.cpp
M libc/src/wchar/wcspbrk.cpp
M libc/src/wchar/wcstok.cpp
Log Message:
-----------
[libc] Stop duplicating wcschr(). (#150661)
Three implementations of wcschr() is two too many.
Commit: b2322772f2ab97de60db906a591353a5ef77cdfe
https://github.com/llvm/llvm-project/commit/b2322772f2ab97de60db906a591353a5ef77cdfe
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Reduce reference counter to a 32-bit integer (#150961)
Summary:
This reference counter tracks how many threads are using a given slab.
Currently it's a 64-bit integer, this patch reduces it to a 32-bit
integer. The benefit of this is that we save a few registers now that we
no longer need to use two for these operations. This increases the risk
of overflow, but given that the largest value we accept for a single
slab is ~131,000 it is a long way off of the maximum of four billion or
so. Obviously we can oversubscribe the reference count by having threads
attempt to claim the lock and then try to free it, but I assert that it
is exceedingly unlikely that we will somehow have over four billion GPU
threads stalled in the same place.
A later optimization could be done to split the reference counter and
pointers into a struct of arrays, that will save 128 KiB of static
memory (as we currently use 512 KiB for the slab array).
Commit: 9c82f87aec12c77444edf04d46af4d8405becc25
https://github.com/llvm/llvm-project/commit/9c82f87aec12c77444edf04d46af4d8405becc25
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/lib/Support/Debug.cpp
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/test/IR/test-pattern-logging-listener.mlir
Log Message:
-----------
Introduce a "log level" support for DEBUG_TYPE (#150855)
This allows to set an optional integer level for a given debug type. The
string format is `type[:level]`, and the integer is interpreted as such:
- if not provided: all debugging for this debug type is enabled.
- if >0: all debug that is < to the level is enabled.
- if 0: same as for >0 but also does not disable the other debug-types,
it acts as a negative filter.
The LDBG() macro is updated to accept an optional log level to
illustrate the feature. Here is the expected behavior:
LDBG() << "A"; // Identical to LDBG(1) << "A";
LDBG(2) << "B";
With `--debug-only=some_type`: we'll see A and B in the output.
With `--debug-only=some_type:1`: we'll see A but not B in the output.
With `--debug-only=some_type:2`: we'll see A and B in the output. (same
with any level above 2)
With `--debug-only=some_type:0`: we'll see neither A nor B in the
output, but we'll see any other logging for other debug types.
Commit: 5f20518f5b4734d01848dfe44d24aed195dc2043
https://github.com/llvm/llvm-project/commit/5f20518f5b4734d01848dfe44d24aed195dc2043
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/docs/CommandGuide/clang.rst
Log Message:
-----------
[Clang][Docs] Fix typo in clang.rst (#150907)
Commit: 496d31c8a9d69ded50e4aa7fbd5c5ba1ffd3ef2c
https://github.com/llvm/llvm-project/commit/496d31c8a9d69ded50e4aa7fbd5c5ba1ffd3ef2c
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
Reapply "[mlir][linalg] Restrict linalg.pack to not have artificial padding." (#150675) (#150680)
This reverts commit
https://github.com/llvm/llvm-project/commit/0844812b2e9d7f5ab005223443791c9287bcf5a2
with a shape fix in
https://github.com/llvm/llvm-project/commit/1db4c6b27500e686fad9e55bbbe7c7c68b246b7e
The revision restrict the `linalg.pack` op to not have artificial
padding semantics. E.g., the below is valid without the change, and it
becomes invalid with the change.
```mlir
func.func @foo(%src: tensor<9xf32>) -> tensor<100x8xf32> {
%cst = arith.constant 0.000000e+00 : f32
%dest = tensor.empty() : tensor<100x8xf32>
%pack = linalg.pack %src
padding_value(%cst : f32)
inner_dims_pos = [0]
inner_tiles = [8] into %dest
: tensor<9xf32> -> tensor<100x8xf32>
return %pack : tensor<100x8xf32>
}
```
IMO, it is a misuse if we use pack ops with artificial padding sizes
because the intention of the pack op is to relayout the source based on
target intrinsics, etc. The output shape is expected to be
`tensor<2x8xf32>`. If people need extra padding sizes, they can create a
new pad op followed by the pack op.
This also makes consumer tiling much easier because the consumer fusion
does not support artificial padding sizes. It is very hard to make it
work without using ad-hoc patterns because the tiling sizes are about
source, which implies that you don't have a core_id/thread_id to write
padding values to the whole tile.
People may have a question how why pad tiling implementation works. The
answer is that it creates an `if-else` branch to handle the case. In my
experience, it is very struggle in transformation because most of the
time people only need one side of the branch given that the tile sizes
are usually greater than padding sizes. However, the implementation is
conservatively correct in terms of semantics. Given that the
introduction of `pack` op is to serve the relayout needs better, having
the restriction makes sense to me.
Removed tests:
-
`no_bubble_up_pack_extending_dimension_through_expand_cannot_reassociate`
from `data-layout-propagation.mlir`: it is a dup test to
`bubble_up_pack_non_expanded_dims_through_expand` after we fix the
shape.
- `fuse_pack_consumer_with_untiled_extra_padding` from
`tile-and-fuse-consumer.mlir`: it was created for artificial padding in
the consumer fusion implementation.
The other changes in lit tests are just fixing the shape.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 0121a8e4319619527c9c28bbc01c74f794cc2255
https://github.com/llvm/llvm-project/commit/0121a8e4319619527c9c28bbc01c74f794cc2255
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/tools/spirv-tools/CMakeLists.txt
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Target/SPIRV/constant.mlir
A mlir/test/Target/SPIRV/lit.local.cfg
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Reland "[mlir][spirv] Fix int type declaration duplication when serializing" (#145687)
This relands PRs #143108 and #144538.
The original PR was reverted due to a mistake that made all the mlir
tests run only if SPIRV target was enabled. This is now resolved since
enabling spirv-tools does not required SPIRV target any longer.
spirv-tools are not required by default to run SPIRV mlir tests, but
they can be optionally enabled in some SPIRV mlir test to verify that
the produced SPIRV assembly pass validation.
The other reverted PR #144685 is not longer needed and not part of this
relanding.
Original commit message:
> At the MLIR level unsigned integer and signless integers are different
types. Indeed when looking up the two types in type definition cache
they do not match.
> Hence when translating a SPIR-V module which contains both usign and
signless integers will contain the same type declaration twice
(something like OpTypeInt 32 0) which is not permitted in SPIR-V and
such generated modules fail validation.
> This patch solves the problem by mapping unisgned integer types to
singless integer types before looking up in the type definition cache.
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 4f58c829fd8473b11c2e6c6ee424b2432e02fb56
https://github.com/llvm/llvm-project/commit/4f58c829fd8473b11c2e6c6ee424b2432e02fb56
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Search for 'offload-arch' only next to the clang driver (#150965)
Summary:
Previously, querying for the offload architecture tool would invoke the
user's PATH, which is bad when potentially using the driver from a
direct path. This patch change this to *only* consider the
`offload-arch` that's supposed to live next to the driver executable.
Now we will no longer pick up a potentially conflicting version of this
tool and it should always be found (Since it's a clang tool that's
installazed alongside the driver)
Commit: fc2850fc7657c2ac8bff48818e797929f46168fc
https://github.com/llvm/llvm-project/commit/fc2850fc7657c2ac8bff48818e797929f46168fc
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR2VecTest] Avoid magic constants
Instead make the members of Vocabulary public. This was causing test
failures with https://github.com/llvm/llvm-project/pull/139357.
Reviewed By: svkeerthy, boomanaiden154
Pull Request: https://github.com/llvm/llvm-project/pull/150878
Commit: c03b0dd9f4d8750437500931b6e5c4ba1a6eb2ad
https://github.com/llvm/llvm-project/commit/c03b0dd9f4d8750437500931b6e5c4ba1a6eb2ad
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
Add MTIA and META to triple (#150236)
Ref:
https://ai.meta.com/blog/next-generation-meta-training-inference-accelerator-AI-MTIA/
This PR contains
1. MTIA: Meta Training and Inference Accelerator as Environment.
2. Meta as the vendor.
### Testing
Added a unittest for the relevant changes
### Reviewers
@clayborg , @jeffreytan81 , @Jlalond
Commit: 2368be38a10c4b9cbad01927fe3338fd08b42751
https://github.com/llvm/llvm-project/commit/2368be38a10c4b9cbad01927fe3338fd08b42751
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-binding.hip
Log Message:
-----------
[HIP] Always respect `--gpu-bundle-output` in the new driver (#150989)
Summary:
This is a bit of an awkward transition point for the new and old
drivers. Previously AMDGPU uses this to generate offloading bundles, but
the new driver much prefers to output the file itself. This patch
changes the behavior to always respect `--gpu-bundle-output` instead of
having it be the default behavior. This means that we effectively get to
override the default new driver behavior with this flag now. This should
hoepfully fix some errors in the downstream comgr tests.
Commit: 522ac23609abc8222dc6314e361aabd046fd0494
https://github.com/llvm/llvm-project/commit/522ac23609abc8222dc6314e361aabd046fd0494
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
Log Message:
-----------
[WebAssembly] Add pattern for relaxed nmadd (#150684)
Following footstep of https://github.com/llvm/llvm-project/pull/147487
(support for madd), this PR adds support for nmadd.
https://github.com/llvm/llvm-project/issues/55932 tracks this
Commit: 3f3fac8478516ab340d24c8c4f3a5b0c9fd7ee41
https://github.com/llvm/llvm-project/commit/3f3fac8478516ab340d24c8c4f3a5b0c9fd7ee41
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][linalg] Enable pack consumer fusion for all perfect tiling cases. (#150672)
It was disabled because there may be artificial padding. After [refining the pack op semantics](https://github.com/llvm/llvm-project/commit/773e158c64735a80b814f20be6b959d9577531f8),
we can assume that there is no artificial padding. Thus, the check can
be removed, and we can unconditionally enable the consumer fusion if it
is a perfect tiling case.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: ac31d64a64e8a648f6834f4cf9de10c56c8d1083
https://github.com/llvm/llvm-project/commit/ac31d64a64e8a648f6834f4cf9de10c56c8d1083
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/alternatename-alias.s
A lld/test/COFF/alternatename-antidep.s
A lld/test/COFF/alternatename-lib.s
M lld/test/COFF/arm64ec-altnames.s
Log Message:
-----------
[LLD][COFF] Avoid resolving symbols with -alternatename if the target is undefined (#149496)
This change fixes an issue with the use of `-alternatename` in the MSVC
CRT on ARM64EC, where both mangled and demangled symbol names are
specified. Without this patch, the demangled name could be resolved to
an anti-dependency alias of the target. Since chaining anti-dependency
aliases is not allowed, this results in an undefined symbol.
The root cause isn't specific to ARM64EC, it can affect other targets as
well, even when anti-dependency aliases aren't involved. The
accompanying test case demonstrates a scenario where the symbol could be
resolved from an archive. However, because the archive member is pulled
in after the first pass of alternate name resolution, and archive
members don't override weak aliases, eager resolution would incorrectly
skip it.
Commit: eba0c574116c45392fdd6d581fbb94be29756341
https://github.com/llvm/llvm-project/commit/eba0c574116c45392fdd6d581fbb94be29756341
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Add summary formatter for SmallBitVector (#150542)
Originally implemented in https://github.com/swiftlang/swift/pull/29014.
I've made a couple changes:
1. Use the target's address size, not lldb
2. Replaced the loop with a format string
Commit: 741df45bc351b4ce0bf9bf2c879b0bb4a58bf206
https://github.com/llvm/llvm-project/commit/741df45bc351b4ce0bf9bf2c879b0bb4a58bf206
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wchar/CMakeLists.txt
A libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/mbsnrtowcs.cpp
A libc/src/wchar/mbsnrtowcs.h
A libc/src/wchar/mbsrtowcs.cpp
A libc/src/wchar/mbsrtowcs.h
A libc/src/wchar/mbstowcs.cpp
A libc/src/wchar/mbstowcs.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/mbsnrtowcs_test.cpp
A libc/test/src/wchar/mbsrtowcs_test.cpp
A libc/test/src/wchar/mbstowcs_test.cpp
Log Message:
-----------
[libc] Reland #149423 "wchar string conversion functions mb to wc" (#150667)
Added missing includes in the test files for null check
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 35693daa705e920036f1183091663158c587735b
https://github.com/llvm/llvm-project/commit/35693daa705e920036f1183091663158c587735b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/CodeGenCUDA/bf16.cu
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Fix v2i8 call lowering, use generic ld/st nodes for call params (#146930)
Commit: 0efcb83626362213fb6cc99c4af42a93e74e6afe
https://github.com/llvm/llvm-project/commit/0efcb83626362213fb6cc99c4af42a93e74e6afe
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Preprocessor/builtin_aux_info.cpp
Log Message:
-----------
[Clang] Reland '__has_builtin should return false for aux triple builtins' (#126324)
Reland https://github.com/llvm/llvm-project/pull/121839 based on the
results of the Discourse discussion
[here](https://discourse.llvm.org/t/rfc-has-builtin-behavior-on-offloading-targets/84964).
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 33465bb2bb75f26b7ad42ab87ccb2464c0245476
https://github.com/llvm/llvm-project/commit/33465bb2bb75f26b7ad42ab87ccb2464c0245476
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/docs/Dialects/Vector.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/ConvertToSPIRV/convert-gpu-modules.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/int-range-interface.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
Log Message:
-----------
[mlir][Vector] Remove `vector.extractelement` and `vector.insertelement` ops (#149603)
This PR removes `vector.extractelement` and `vector.insertelement` ops
from the code base in favor of the `vector.extract` and `vector.insert`
counterparts.
See RFC:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops
Commit: 18302d02fb4026002e7b0cf950c99e0d44573f4e
https://github.com/llvm/llvm-project/commit/18302d02fb4026002e7b0cf950c99e0d44573f4e
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
Log Message:
-----------
[clang-tidy][mlir] Make rewrite more conservative. (#150757)
Don't create a fix where object invoked on is a temporary object as
create method requires a reference.
Commit: ae0614de05ac4278b80a02ae49f657c8ce1db13b
https://github.com/llvm/llvm-project/commit/ae0614de05ac4278b80a02ae49f657c8ce1db13b
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
A clang/test/Driver/hipspv-link-static-library.hip
Log Message:
-----------
HIPSPV: Unbundle SDL (#136412)
This fixes the issue of rdc linking static libraries with device code
https://github.com/CHIP-SPV/chipStar/issues/984
---------
Co-authored-by: Henry Linjamäki <henry.linjamaki at gmail.com>
Commit: 7ca23754c486a8ed5b6739456a4562bc09909913
https://github.com/llvm/llvm-project/commit/7ca23754c486a8ed5b6739456a4562bc09909913
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_barrier_t.h
A libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__barrier_type.h
A libc/include/llvm-libc-types/pthread_barrier_t.h
A libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/barrier.cpp
A libc/src/__support/threads/linux/barrier.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_barrier_destroy.cpp
A libc/src/pthread/pthread_barrier_destroy.h
A libc/src/pthread/pthread_barrier_init.cpp
A libc/src/pthread/pthread_barrier_init.h
A libc/src/pthread/pthread_barrier_wait.cpp
A libc/src/pthread/pthread_barrier_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_barrier_test.cpp
Log Message:
-----------
[libc] Implement barriers for pthreads (#148948)
Implemented barrier synchronization for pthreads
- Uses condition variables internally for platform independence
(platform-specific work is handled by the condition variable
implementation)
- Does NOT currently handle barrierattr pshared, this is a goal for a
future patch
Commit: 82ad67b13850599275f296a3e8cb16481be463ff
https://github.com/llvm/llvm-project/commit/82ad67b13850599275f296a3e8cb16481be463ff
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
Log Message:
-----------
[RISCV] Rewrite vlseg tests to avoid riscv.tuple.extract [nfc] (#151003)
Motivated by https://github.com/llvm/llvm-project/pull/150049, we can
directly return the tuple instead of extracting one segment.
(I wrote a quick script to rewrite these; this wasn't done by hand.)
Commit: 2762a079ee7d676a1026b15b445f75365832b2be
https://github.com/llvm/llvm-project/commit/2762a079ee7d676a1026b15b445f75365832b2be
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/complex-cast.cpp
Log Message:
-----------
[CIR] Implement LValueBitcast for ComplexType (#150668)
This change adds support for LValueBitcast for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 5846381133aa001496833310aa26d52a132b6b95
https://github.com/llvm/llvm-project/commit/5846381133aa001496833310aa26d52a132b6b95
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Move definitions of decodeZcmpRlist/decodeXqccmpRlistS0 to their declarations. NFC
These don't need anything from RISCVDisassemblerTables.inc so we
can define them earlier.
Commit: a4a0832899303d989772340404a01f6a4f1f6c99
https://github.com/llvm/llvm-project/commit/a4a0832899303d989772340404a01f6a4f1f6c99
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
R libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
R libc/hdr/types/pthread_barrier_t.h
R libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/__barrier_type.h
R libc/include/llvm-libc-types/pthread_barrier_t.h
R libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/src/__support/threads/linux/CMakeLists.txt
R libc/src/__support/threads/linux/barrier.cpp
R libc/src/__support/threads/linux/barrier.h
M libc/src/pthread/CMakeLists.txt
R libc/src/pthread/pthread_barrier_destroy.cpp
R libc/src/pthread/pthread_barrier_destroy.h
R libc/src/pthread/pthread_barrier_init.cpp
R libc/src/pthread/pthread_barrier_init.h
R libc/src/pthread/pthread_barrier_wait.cpp
R libc/src/pthread/pthread_barrier_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
R libc/test/integration/src/pthread/pthread_barrier_test.cpp
Log Message:
-----------
Revert "[libc] Implement barriers for pthreads" (#151014)
Reverts llvm/llvm-project#148948
Commit: 1381ad497b9a6d3da630cbef53cbfa9ddf117bb6
https://github.com/llvm/llvm-project/commit/1381ad497b9a6d3da630cbef53cbfa9ddf117bb6
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wchar/CMakeLists.txt
R libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/wchar/CMakeLists.txt
R libc/src/wchar/mbsnrtowcs.cpp
R libc/src/wchar/mbsnrtowcs.h
R libc/src/wchar/mbsrtowcs.cpp
R libc/src/wchar/mbsrtowcs.h
R libc/src/wchar/mbstowcs.cpp
R libc/src/wchar/mbstowcs.h
M libc/test/src/wchar/CMakeLists.txt
R libc/test/src/wchar/mbsnrtowcs_test.cpp
R libc/test/src/wchar/mbsrtowcs_test.cpp
R libc/test/src/wchar/mbstowcs_test.cpp
Log Message:
-----------
Revert "[libc] Reland #149423 "wchar string conversion functions mb to wc"" (#151016)
Reverts llvm/llvm-project#150667
Commit: 6107e3aa229368190207093298c2ac1ec5eec7c0
https://github.com/llvm/llvm-project/commit/6107e3aa229368190207093298c2ac1ec5eec7c0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libcxx] Install runner last when building CI containers
This patch changes when we install the GHA runner in the CI containers. Instead
of having it in the base image, we install it last. This will enable a follow up
patch that will do some setup enabling building the full container image with an
existing base image, thus enabling updating the GHA runner without modifying the
important bits.
Reviewers: EricWF, ldionne
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/148072
Commit: b33f9f64c7e7fbc92db2413dcac6f650ddebf80d
https://github.com/llvm/llvm-project/commit/b33f9f64c7e7fbc92db2413dcac6f650ddebf80d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libcxx] Enable installing new runner binary on existing container
This patch does some refactoring to enable installing a new GHA runner binary
into an existing libcxx image. We achieve this by pushing the base image to the
registry and enabling control over the base image used for building the actions
image. This will always build and push both images even if an existing image is
being used for the actions image, but this should not impact anything as the
SHAs are pinned everywhere and space/build time is not a large concern.
Reviewers: ldionne, EricWF, #reviewers-libcxx
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/148073
Commit: 30532c13d2fb592af9cb651f6571beca4b48b705
https://github.com/llvm/llvm-project/commit/30532c13d2fb592af9cb651f6571beca4b48b705
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
Log Message:
-----------
[scudo] Fix secondary caching for mte (#150156)
The current code always unmaps a secondary allocation when MTE is
enabled. Fix this to match the comment, namely only unmap if MTE was
enabled and is no longer enabled after acquiring the lock.
In addition, allow quaratine to work in the secondary even if MTE is not
enabled.
Commit: 88389cce5381b3386c8fe1c45c33390f69a726e9
https://github.com/llvm/llvm-project/commit/88389cce5381b3386c8fe1c45c33390f69a726e9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI][Github] Bump CI Container Runner to v2.327.1
This came out a couple days ago. Upgrading to be proactive.
Commit: ea480cc665a427cfaf09d15fea57c2a6bc1d4f93
https://github.com/llvm/llvm-project/commit/ea480cc665a427cfaf09d15fea57c2a6bc1d4f93
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Log Message:
-----------
[lldb] support ieee_single and ieee_double gdbtypes for registers (#150268)
Some gdb remote servers send target.xml that contains
```
<reg name='ft0' bitsize='32' type='ieee_single' dwarf_regnum='32'/>
<reg name='ft1' bitsize='32' type='ieee_single' dwarf_regnum='33'/>
<reg name='ft2' bitsize='32' type='ieee_single' dwarf_regnum='34'/>
<reg name='ft3' bitsize='32' type='ieee_single' dwarf_regnum='35'/>
<reg name='ft4' bitsize='32' type='ieee_single' dwarf_regnum='36'/>
<reg name='ft5' bitsize='32' type='ieee_single' dwarf_regnum='37'/>
<reg name='ft6' bitsize='32' type='ieee_single' dwarf_regnum='38'/>
<reg name='ft7' bitsize='32' type='ieee_single' dwarf_regnum='39'/>
```
it seems like a valid and supported type in gdb.
from gdb16.3/gdb/target_descriptions.c (could not find a way to link
it).
```
case TDESC_TYPE_IEEE_SINGLE:
m_type = init_float_type (alloc, -1, "builtin_type_ieee_single",
floatformats_ieee_single);
return;
case TDESC_TYPE_IEEE_DOUBLE:
m_type = init_float_type (alloc, -1, "builtin_type_ieee_double",
floatformats_ieee_double);
return;
```
### Testplan
updated unittest to test this.
Reviewers: @clayborg , @jeffreytan81 , @Jlalond
Commit: e650c4b9efd900bff56de878ba28f866b2f7b989
https://github.com/llvm/llvm-project/commit/e650c4b9efd900bff56de878ba28f866b2f7b989
Author: Daniil Fukalov <dfukalov at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150929)
As requested in #148740.
Commit: ccc96e64845ba5b5608915f6eca434af3a6de31d
https://github.com/llvm/llvm-project/commit/ccc96e64845ba5b5608915f6eca434af3a6de31d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[LV] Add tests where vector trip count is known equal to VFxUF.
Add additional tests to cover the case where the trip count isn't equal
to VFxUF, but the vector trip count is.
Commit: c46336b396e4482c51ed4bfdfa55c22ab35a6ad1
https://github.com/llvm/llvm-project/commit/c46336b396e4482c51ed4bfdfa55c22ab35a6ad1
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)
This reverts commit 05e08cdb3e576cc0887d1507ebd2f756460c7db7.
Adding the missing -mtriple flags in MIR/X86 test files which caused
these tests to fail which was the reason for reverting the patch.
Commit: 379949d79f14b7854b6b2b8caebda835dcc3fe6d
https://github.com/llvm/llvm-project/commit/379949d79f14b7854b6b2b8caebda835dcc3fe6d
Author: Mahé <mahe5397 at hotmail.fr>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/test/CodeGen/BPF/BTF/map-def-2.ll
M llvm/test/CodeGen/BPF/BTF/map-def-3.ll
A llvm/test/CodeGen/BPF/BTF/map-def-nested-array.ll
Log Message:
-----------
[BPF] Visit nested map array during BTF generation (#150608)
Fixes missing inner map struct type definitions [^1]. We should visit
the type of nested array of maps like we do for global maps. This patch
adds a boolean to convey the information to visitTypeEntry and
visitDerivedType that the pointee is a map definition and should be
treated as such.
It ressembles and works with commit 0d21c956a5c1 ("[BPF] Handle nested
wrapper structs in BPF map definition traversal (#144097)") which
focused on directly nested wrapper structs.
Before that patch, this ARRAY_OF_MAPS definition would lead to the BTF
information include the 'missing_type' as "FWD 'missing_type'
fwd_kind=struct":
struct missing_type { uint64_t foo; };
struct {
__uint(type, BPF_MAP_TYPE_ARRAY_OF_MAPS);
[...]
__array(
values, struct {
[...]
__type(value, struct missing_type);
});
} map SEC(".maps");
Which lead to errors while trying to load the map:
libbpf: map 'outer_map.inner': can't determine value size for type [N]:
-22.
To solve this issue, users had to use the struct in a dummy variable or
in a dummy function for the BTF to be generated correctly [^2].
[^1]: https://lore.kernel.org/netdev/aH_cGvgC20iD8qs9@gmail.com/T/#u
[^2]:
https://github.com/cilium/ebpf/discussions/1658#discussioncomment-12491339
---------
Signed-off-by: Mahe Tardy <mahe.tardy at gmail.com>
Co-authored-by: Eduard Zingerman <eddyz87 at gmail.com>
Commit: 67e2faa50c09813921fc1ce86ca10cb4c1612d16
https://github.com/llvm/llvm-project/commit/67e2faa50c09813921fc1ce86ca10cb4c1612d16
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] MC support for async load and store on gfx1250 (#151030)
Commit: c93d166c58f0f4ac69c58ec54fb08668b462de03
https://github.com/llvm/llvm-project/commit/c93d166c58f0f4ac69c58ec54fb08668b462de03
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
Log Message:
-----------
[VPlan] Simplify (MUL %x, 0) -> 0.
Simplify trivial multiplies.
https://alive2.llvm.org/ce/z/DabRkA
Commit: ced3b90738ff6a4c2f5f264e5085477dc59ffcf8
https://github.com/llvm/llvm-project/commit/ced3b90738ff6a4c2f5f264e5085477dc59ffcf8
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Change map to vector to avoid unstable iteration (#151039)
We iterate over a std::map indexed by FuncInfo, which is a pair of a
pointer and a clone number. In the ThinLTO case, this isn't an issue as
the function pointer always points to the same FunctionSummary object.
However, for regular LTO, this is a pointer to a Function object, which
is different for each clone. This will lead to unstable iteration order.
This was exposed in a test case added for PR150735, which added a new
instance of iteration over this map.
Since these function clones are added and numbered sequentially, change
this to a vector indexed by clone number, which points to a structure
containing the clone FuncInfo and the call map (the old map's key and
value, respectively).
Commit: 6bcff9eb13f226b89bb6ebc80bb0f3e80b7868f7
https://github.com/llvm/llvm-project/commit/6bcff9eb13f226b89bb6ebc80bb0f3e80b7868f7
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/HipStdPar/HipStdPar.h
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/math-fixup.ll
Log Message:
-----------
[HIPSTDPAR] Add handling for math builtins (#140158)
When compiling in `--hipstdpar` mode, the builtins corresponding to the
standard library might end up in code that is expected to execute on the
accelerator (e.g. by using the `std::` prefixed functions from
`<cmath>`). We do not have uniform handling for this in AMDGPU, and the
errors that obtain are quite arcane. Furthermore, the user-space changes
required to work around this tend to be rather intrusive.
This patch adds an additional `--hipstdpar` specific pass which forwards
to the run time component of HIPSTDPAR the intrinsics / libcalls which
result from the use of the math builtins, and which are not properly
handled. In the long run we will want to stop relying on this and handle
things in the compiler, but it is going to be a rather lengthy journey,
which makes this medium term escape hatch necessary.
The paired change in the run time component is here
<https://github.com/ROCm/rocThrust/pull/551>.
Commit: 4c8e79f81582a757ed4333f8ff2ad4da18bab39a
https://github.com/llvm/llvm-project/commit/4c8e79f81582a757ed4333f8ff2ad4da18bab39a
Author: jimingham <jingham at apple.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBSymbolContext.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedBreakpointInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Breakpoint/BreakpointResolverScripted.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/resolver.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
Switch the ScriptedBreakpointResolver over to the ScriptedInterface form (#150720)
This is NFC, I'm modernizing the interface before I add to it in a
subsequent commit.
Commit: ee63c1f3520bca0acb859fcb4da49d3eb667c1ad
https://github.com/llvm/llvm-project/commit/ee63c1f3520bca0acb859fcb4da49d3eb667c1ad
Author: Jonathon Penix <jpenix at quicinc.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/aarch64-toolchain.c
M clang/test/Driver/arm-toolchain.c
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
[clang][Driver] Prefer non-Linux emulations for baremetal Arm/AArch64 targets (#149235)
I'm unsure if there is an official source for which targets use/support
which emulations, but for the baremetal GNU Arm/AArch64 toolchains or
binutils builds I've tried to use, GNU ld either did not support the
Linux emulations (resulting in errors unless overriding the emulation)
or the Linux emulations were supported but GCC passed the non-Linux
emulations by default.
These emulations all seem to be accepted by lld as well, so try to align
with what it seems GCC is doing and prefer the non-Linux emulations for
baremetal Arm/AArch64 targets.
Commit: 8ecbfa66cd314df805e2910783ded37f2f8621b4
https://github.com/llvm/llvm-project/commit/8ecbfa66cd314df805e2910783ded37f2f8621b4
Author: sivadeilra <ardavis at microsoft.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
Log Message:
-----------
Hot-patch __ref_* variables should be placed in .rdata, not .data (#151008)
This is a refinment of #145565 . That PR added support for "Windows
Secure Hot-patching". In this design, functions that are compiled for
hot-patching need to be modified when they access mutable global
variables. The modification is to insert a level of indirection, the
so-called `__ref_*` variables.
Ref variables are supposed to be inserted into the `.rdata` section, not
`.data`. This provides a degree of protection against modification
(accidental or malicious) of ref variables during program execution.
When the Windows hot-patch subsystem loads a module as a hot-patch, it
finds all ref variables and changes the page protections for the pages
containing them to read/write. Then it sets the ref variables to point
to the real variable locations within the base image. Then it changes
page protections back to read-only.
This relies on the variables being placed in the `.rdata` section, not
`.data`.
However, it is still important that the LLVM `GlobalVariable` that is
created for the ref variable be created with `isConstant = false`. This
prevents LLVM from optimizing accesses to the `GlobalVariable`, i.e.
assuming that the variable can never change and thus inlining its value
into expressions that would ordinarily dereference it. That optimization
would defeat the purpose of hot-patching, so `isConstant = false` is
still the correct value for these ref variables.
Commit: f3761ab340448603fe9cabc99f49a3f04ac254b3
https://github.com/llvm/llvm-project/commit/f3761ab340448603fe9cabc99f49a3f04ac254b3
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
A llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
Log Message:
-----------
Reapply "[MemProf] Ensure all callsite clones are assigned a function clone" (#150856) (#151055)
This reverts commit 314e22bcab2b0f3d208708431a14215058f0718f, reapplying
PR150735 with a fix for the unstable iteration order exposed by the new
tests (PR151039).
Commit: bcd0d972247154336dd1321f1fded818e46671d1
https://github.com/llvm/llvm-project/commit/bcd0d972247154336dd1321f1fded818e46671d1
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
R libclc/clc/include/clc/math/unary_def_via_fp32.inc
M libclc/clc/lib/generic/math/clc_erf.cl
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_tgamma.cl
Log Message:
-----------
[libclc] Simplify unary_def_scalarize.inc's use in __clc_erf/erfc/tgamma (#150181)
Also delete unary_def_via_fp32.inc. There are small changes in
amdgcn--amdhsa.bc due to vector conversion is scalarized, e.g.
%2 = fpext <4 x half> %0 to <4 x float>
%3 = extractelement <4 x float> %2, i64 0
%4 = tail call float @llvm.fabs.f32(float %3)
->
%2 = extractelement <4 x half> %0, i64 0
%3 = tail call half @llvm.fabs.f16(half %2)
%4 = fpext half %3 to float
Commit: 5223317210cca7705d43fde4005270f5bb45215b
https://github.com/llvm/llvm-project/commit/5223317210cca7705d43fde4005270f5bb45215b
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libclc/clc/lib/generic/geometric/clc_normalize.inc
Log Message:
-----------
[libclc] Add generic native half implementation of __clc_normalize (#150165)
This is ported from
https://github.com/intel/llvm/blob/sycl/libclc/libspirv/lib/generic/geometric/normalize.cl
and can pass a closed-source OpenCL CTS
"test_geometrics geom_normalize --half CL_DEVICE_TYPE_GPU" on intel GPU.
llvm-diff amdgcn--amdhsa.bc shows fpext/fptrunc insts are now removed
from normalize function.
Commit: 21836f4a49e1296c048ae96dd55fd5299dae61e2
https://github.com/llvm/llvm-project/commit/21836f4a49e1296c048ae96dd55fd5299dae61e2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/ARM/fp16.ll
Log Message:
-----------
[SelectionDAG] Remove `UnsafeFPMath` in LegalizeDAG (#146316)
These global flags hinder further improvements like [[RFC] Honor pragmas
with
-ffp-contract=fast](https://discourse.llvm.org/t/rfc-honor-pragmas-with-ffp-contract-fast)
and pass concurrency support. Remove them incrementally.
Commit: 7162f191b8ce68dddb60e3f129f786afb08b2bbb
https://github.com/llvm/llvm-project/commit/7162f191b8ce68dddb60e3f129f786afb08b2bbb
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
[llvm] ensure DEMANGLE_ABI is properly defined (#151023)
## Overview
Include `llvm-config.h` from `DemangleConfig.h` so
`LLVM_ENABLE_LLVM_EXPORT_ANNOTATIONS` is defined correctly. The presence
of this definition controls the definition of `LLVM_ABI` on Windows DLL
builds. This include was missed in #147564.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307).
Commit: 0d05e55f69426c38f42f911a11ac540896577e06
https://github.com/llvm/llvm-project/commit/0d05e55f69426c38f42f911a11ac540896577e06
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/wchar/wcspbrk.cpp
Log Message:
-----------
[libc] Correct include path for wchar_utils.h in libc/src/wchar/wcspbrk.cpp (#151059)
A previous change incorrectly included `wchar_util.h` using a broken
relative path. This change corrects the path to `#include
"src/wchar/wchar_utils.h"`.
Commit: 5949f4596ea0f01c8072713c0a082b0e09c459cc
https://github.com/llvm/llvm-project/commit/5949f4596ea0f01c8072713c0a082b0e09c459cc
Author: Jaden Angella <ajaden at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/docs/Dialects/emitc.md
M mlir/include/mlir/Conversion/MemRefToEmitC/MemRefToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
A mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc.mlir
Log Message:
-----------
[mlir][EmitC]Expand the MemRefToEmitC pass - Lowering `AllocOp` (#148257)
This aims to lower `memref.alloc` to `emitc.call_opaque “malloc” ` or
`emitc.call_opaque “aligned_alloc” `
From:
```
module{
func.func @allocating() {
%alloc_5 = memref.alloc() : memref<999xi32>
return
}
}
```
To:
```
module {
emitc.include <"stdlib.h">
func.func @allocating() {
%0 = emitc.call_opaque "sizeof"() {args = [i32]} : () -> !emitc.size_t
%1 = "emitc.constant"() <{value = 999 : index}> : () -> index
%2 = emitc.mul %0, %1 : (!emitc.size_t, index) -> !emitc.size_t
%3 = emitc.call_opaque "malloc"(%2) : (!emitc.size_t) -> !emitc.ptr<!emitc.opaque<"void">>
%4 = emitc.cast %3 : !emitc.ptr<!emitc.opaque<"void">> to !emitc.ptr<i32>
return
}
}
```
Which is then translated as:
```
#include <stdlib.h>
void allocating() {
size_t v1 = sizeof(int32_t);
size_t v2 = 999;
size_t v3 = v1 * v2;
void* v4 = malloc(v3);
int32_t* v5 = (int32_t*) v4;
return;
}
```
Commit: 28c2c1e06e2dc73df03cfc2d797fa70365d481f2
https://github.com/llvm/llvm-project/commit/28c2c1e06e2dc73df03cfc2d797fa70365d481f2
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
Log Message:
-----------
[clang-tools-extra] using wrapper llvm::sort(nfc) (#150998)
using wrapper llvm::sort(nfc)
Commit: a5deb59dfef13cb5eb8e3defc7e94904ea132a34
https://github.com/llvm/llvm-project/commit/a5deb59dfef13cb5eb8e3defc7e94904ea132a34
Author: Shoreshen <372660931 at qq.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
Log Message:
-----------
[AMDGPU] Add NoaliasAddrSpace to AAMDnodes (#149247)
This is the following PR of
https://github.com/llvm/llvm-project/pull/136553 which calculate
NoaliasAddrSpace.
This PR carries the info calculated into MIR by adding it into AAMDnodes
Commit: e654d4e8fd7fc744215084c47e9accce2428346d
https://github.com/llvm/llvm-project/commit/e654d4e8fd7fc744215084c47e9accce2428346d
Author: Evan Liu <liuyievan at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotModuleBufferize.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
A mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Generalize OneShotModuleBufferize to operate on any Operation (#148327)
As part of 2646c36a864aa6a62bc1280e9a8cd2bcd2695349,
`OneShotModuleBufferize` no longer descends into nested symbol tables,
recommending users who wish to do this should do so in a pass
pipeline/custom pass. This did not support the use case of ops that
weren't ModuleOps. The patch updates `OneShotModuleBufferize` to work on
any general op.
Commit: 255bba013600a5624ab9f894404d06c8df17462e
https://github.com/llvm/llvm-project/commit/255bba013600a5624ab9f894404d06c8df17462e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Fix a warning
This patch fixes:
llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp:4771:9:
error: non-void lambda does not return a value in all control paths
[-Werror,-Wreturn-type]
Commit: 217f9e57d1cc46de51d3b36177c4ba4049aaa805
https://github.com/llvm/llvm-project/commit/217f9e57d1cc46de51d3b36177c4ba4049aaa805
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/AsmParser/DialectSymbolParser.cpp
M mlir/lib/AsmParser/Lexer.cpp
M mlir/lib/AsmParser/Lexer.h
Log Message:
-----------
[mlir] Make parser not rely on terminating null. (#151007)
Used in follow up to parse slices of buffer.
Commit: 2bebbe166b1d5c6803b5d0f8794df3a18eff8e03
https://github.com/llvm/llvm-project/commit/2bebbe166b1d5c6803b5d0f8794df3a18eff8e03
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
Log Message:
-----------
MCFragment: Migrate away from appendContents
The fixed-size content of the MCFragment object will be stored as
trailing data (#150846). Any post-assembler-layout adjustments must
target the variable-size tail.
Commit: 7c14c5380a510d8df20be8c681821c1ed558e39c
https://github.com/llvm/llvm-project/commit/7c14c5380a510d8df20be8c681821c1ed558e39c
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[github/CODEOWNERS] Add yozhu as BOLT reviewer
Commit: b39160ddfb625bd57f9113471b15cda748151a10
https://github.com/llvm/llvm-project/commit/b39160ddfb625bd57f9113471b15cda748151a10
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/Parser/cxx23-assume.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
Log Message:
-----------
[Clang][Sema] Expression in assumption attribute should be full expression (#150814)
Add missing `ActOnFinishFullExpr` to `BuildCXXAssumeExpr`. We did it
during template instantiation but forgot non-template case.
Commit: ce86ff105b506aa0f150f676f59ee43abc00a213
https://github.com/llvm/llvm-project/commit/ce86ff105b506aa0f150f676f59ee43abc00a213
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
Log Message:
-----------
[GlobalISel] Remove `UnsafeFPMath` references (#146319)
This is the GlobalISel part to remove `UnsafeFPMath` flag in CodeGen
pipeline.
Commit: 19ba224fb8a925d095d84836bc9896bf564dfd99
https://github.com/llvm/llvm-project/commit/19ba224fb8a925d095d84836bc9896bf564dfd99
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/crtbegin.c
Log Message:
-----------
[PAC][compiler-rt] Fix init/fini array signing schema (#150691)
When `ptrauth_calls` is present but `ptrauth_init_fini` is not, compiler
emits raw unsigned pointers in `.init_array`/`.fini_array` sections.
Previously, `__do_init`/`__do_fini` pointers, which are explicitly added
to the sections, were implicitly signed (due to the presense of
`ptrauth_calls`), while all the other pointers in the sections were
implicitly added by the compiler and thus non-signed.. As a result, the
sections contained a mix of unsigned function pointers and function
pointers signed with default signing schema.
This patch introduces use of inline assembly for this particular case,
so we can manually specify that we do not want to sign the pointers.
Note that we cannot use `__builtin_ptrauth_strip` for this purpose since
its result is not a constant expression.
Commit: dbcbdc4da0a9f4627562c305492b4464afe5b467
https://github.com/llvm/llvm-project/commit/dbcbdc4da0a9f4627562c305492b4464afe5b467
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Add IsSignExtendingOpW to P-ext CLS, CLSW, and ABSW instructions. (#151037)
This matches other W instructions. CLS is included since it can only
return 0-64 which has bits [63:31] as zero. This is similar to CLZ.
This doesn't do anything yet since we don't have CodeGen support for P.
Commit: b103311c1d75bb00845e0160fce76d75fe2377d3
https://github.com/llvm/llvm-project/commit/b103311c1d75bb00845e0160fce76d75fe2377d3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/TableGen/CompressInstEmitter/suboperands.td
M llvm/utils/TableGen/CompressInstEmitter.cpp
Log Message:
-----------
[TableGen] Check destination instruction predicates in CompressInstEmitter. (#151061)
In addition to checking the predicate from the CompressPat, also check
the destination instruction. This prevents creating bad instructions if
CompressPat isn't a proper subset of the destination instruction. This
prevents mistakes that we can't catch at compile time.
We are able to verify RegisterClass hierarchy at compile time so don't
have to check the destination register class.
I've added comments for the operand names to make auditing easier.
Commit: 769b0e6f5c28a09ed5dd7eba2e82457a0064a9e2
https://github.com/llvm/llvm-project/commit/769b0e6f5c28a09ed5dd7eba2e82457a0064a9e2
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/MC/MCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
Log Message:
-----------
XCOFF: Simplify R_REF and remove a MCFragment::addFixup use
Simplify the code added by https://reviews.llvm.org/D144356
Commit: adcad6adc981f83b42551160386d7d01367057b2
https://github.com/llvm/llvm-project/commit/adcad6adc981f83b42551160386d7d01367057b2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
M llvm/test/CodeGen/AArch64/arm64-fml-combines.ll
M llvm/test/CodeGen/AArch64/fcsel-zero.ll
M llvm/test/CodeGen/AArch64/machine-combiner-reassociate.mir
M llvm/test/CodeGen/AArch64/machine-combiner.ll
M llvm/test/CodeGen/AArch64/machine-combiner.mir
M llvm/test/CodeGen/AArch64/sched-past-vector-ldst.ll
M llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
Log Message:
-----------
[AArch64] Remove `UnsafeFPMath` (#150876)
We should always use fast math flags, remove these global flags
incrementally.
See also
https://discourse.llvm.org/t/rfc-honor-pragmas-with-ffp-contract-fast/80797
Commit: 96a9e8c9fa4ed8e53c5a13669e9dea16a566c48a
https://github.com/llvm/llvm-project/commit/96a9e8c9fa4ed8e53c5a13669e9dea16a566c48a
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
Log Message:
-----------
ARM: Migrate away from MCFragment::addFixup
Commit: f36ce53adf9294556c5d5f5f55c484c923f0c286
https://github.com/llvm/llvm-project/commit/f36ce53adf9294556c5d5f5f55c484c923f0c286
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
A llvm/test/MC/ELF/many-instructions.s
Log Message:
-----------
MCFragment: Use trailing data for fixed-size part
The fixed-size content of the MCFragment object is now stored as
trailing data, replacing ContentStart/ContentEnd with ContentSize. The
available space for trailing data is tracked using `FragSpace`. If the
available space is insufficient, a new block is allocated within the
bump allocator `MCObjectStreamer::FragStorage`.
FragList::Tail cannot be reused when switching sections or subsections,
as it is not associated with the fragment space tracked by `FragSpace`.
Instead, allocate a new fragment, which becomes less expensive after #150574.
Data can only be appended to the tail fragment of a subsection, not to
fragments in the middle. Post-assembler-layout adjustments (such as
.llvm_addrsig and .llvm.call-graph-profile) have been updated to use the
variable-size part instead.
Pull Request: https://github.com/llvm/llvm-project/pull/150846
Commit: 2b8696b58e25f53f23d35a3904c111c1ae61d6f4
https://github.com/llvm/llvm-project/commit/2b8696b58e25f53f23d35a3904c111c1ae61d6f4
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
Log Message:
-----------
[CIR][NFC] Reformat Attr to use common CIR_ prefix and traits style (#150694)
This mirror incubator changes from https://github.com/llvm/clangir/pull/1746
Commit: 3ecefba52d3ea7e0d028dd4b745766cb5627121f
https://github.com/llvm/llvm-project/commit/3ecefba52d3ea7e0d028dd4b745766cb5627121f
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/MC/MCObjectStreamer.cpp
Log Message:
-----------
MC: Restore emitInstToData optimization
Accidentally dropped by f36ce53adf9294556c5d5f5f55c484c923f0c286
Commit: 267eb81d5b92294275881f149a9e6bc5b87c0546
https://github.com/llvm/llvm-project/commit/267eb81d5b92294275881f149a9e6bc5b87c0546
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
Log Message:
-----------
MCSection: Remove unused isEncoded
Commit: 8b020d5434078145e2fd2b4f1a48bb1c78ace491
https://github.com/llvm/llvm-project/commit/8b020d5434078145e2fd2b4f1a48bb1c78ace491
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
A clang/test/Preprocessor/preprocess-cpp-output.c
A clang/test/Preprocessor/preprocess-pragma-cpp-output.c
Log Message:
-----------
[Preprocessor] Do not expand macros if the input is already preprocessed (#137665)
Preprocessing the preprocessor output again interacts poorly with some
flag combinations when we perform a separate preprocessing stage. In our
case, `-no-integrated-cpp -dD` triggered this issue; but I guess that
other flags could also trigger problems (`-save-temps` instead of
`-no-integrated-cpp`).
Full context (which is quite weird I'll admit):
* To cache OpenCL kernel compilation results, we use the
`-no-integrated-cpp` for the driver to generate a separate preprocessing
command (`clang -E`) before the rest of the compilation.
* Some OpenCL C language features are implemented as macro definitions
(in `opencl-c-base.h`). The semantic analysis queries the preprocessor
to check if these are defined or not, for example, when we checks if a
builtin is available when using `-fdeclare-opencl-builtins`.
* To preserve these `#define` directives, on the preprocessor's output,
we use `-dD`. However, other `#define` directives are also maintained
besides OpenCL ones; which triggers the issue shown in this PR.
A better fix for our particular case could have been to move the
language features implemented as macros into some sort of a flag to be
used together with `-fdeclare-opencl-builtins`.
But I also thought that not preprocessing preprocessor outputs seemed
like something desirable. I hope to work on this on a follow up.
Commit: dcff52312375bbaa1edc65e0ace9c15623a9c8ab
https://github.com/llvm/llvm-project/commit/dcff52312375bbaa1edc65e0ace9c15623a9c8ab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/TableGen/CompressInstEmitter.cpp
Log Message:
-----------
[TableGen] Use ListSeparator to handle joining condition checks in CompressInstEmitter. NFC (#151089)
This avoids needing to remove the leading indentation and trailing '
&&\n' when we are done with all conditions.
While there remove a few extra parentheses and fix a case where 6
spaces of indentation was used instead of 8.
Commit: 3ea3e334cc19cdd34416b546ac4b4a24b2018a28
https://github.com/llvm/llvm-project/commit/3ea3e334cc19cdd34416b546ac4b4a24b2018a28
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Headers/avx10_2_512niintrin.h
M clang/lib/Headers/avx10_2niintrin.h
M clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
M clang/test/CodeGen/X86/avx10_2ni-builtins.c
Log Message:
-----------
[X86][AVX10.2] Fix VNNIINT16 maskz intrinsics arguments order (#151077)
For maskz intrinsics, the first argument is always the mask.
Commit: 8c8749608bf44dd6e528305b242c7bd238cfb405
https://github.com/llvm/llvm-project/commit/8c8749608bf44dd6e528305b242c7bd238cfb405
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Fix bazel build by build by adding missing deps. (#151090)
This was broken by #150661, which added includes to `wcspbrk.cpp` and
`wcschr.cpp` that weren't in the dependencies of the corresponding
targets.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 144ae251aaf5f36310b9e3ef67e9d6d6e2fbf9c0
https://github.com/llvm/llvm-project/commit/144ae251aaf5f36310b9e3ef67e9d6d6e2fbf9c0
Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
M llvm/test/TableGen/getsetop.td
M llvm/test/TableGen/unsetop.td
Log Message:
-----------
[TableGen] Improve handling for dag op names (#149248)
There are currently no ways to add names to dag
operators other than when defining them. Furthermore a !con operation as
well as some others, drops the operator names.
This patch propagates the name from the LHS dag
for !con and adds a way to get and set the operator name for a dag
(!getdagopname, !setdagopname).
---------
Co-authored-by: Nemanja Ivanovic <nemanja at synopsys.com>
Commit: 59013d44058ef423a117f95092150e16e16fdb09
https://github.com/llvm/llvm-project/commit/59013d44058ef423a117f95092150e16e16fdb09
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][llvm] Add intrinsic arg and result attribute support (#150783)
This patch extends the LLVM dialect's intrinsic infra to support
argument and result attributes. Initial support is added for the memory
intrinsics `llvm.intr.memcpy`, `llvm.intr.memmove`, and
`llvm.intr.memset`.
Additionally, an ArgAndResultAttrsOpInterface is factored out of
CallOpInterface and CallableOpInterface, enabling operations to have
argument and result attributes without requiring them to be a call or a
callable operation.
Commit: 3eee9fc2c4d1973904b1a26fa96a8c7473ef6a5e
https://github.com/llvm/llvm-project/commit/3eee9fc2c4d1973904b1a26fa96a8c7473ef6a5e
Author: Konstantin Varlamov <varconsteq at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
A libcxx/cmake/caches/Generic-hardening-mode-extensive-observe-semantic.cmake
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/UserDocumentation.rst
M libcxx/include/__config
M libcxx/include/__cxx03/__config
M libcxx/test/libcxx/thread/thread.barrier/assert.arrive.pass.cpp
M libcxx/test/libcxx/thread/thread.latch/assert.arrive_and_wait.pass.cpp
M libcxx/test/support/check_assertion.h
M libcxx/test/support/test.support/test_check_assertion.pass.cpp
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/params.py
M libcxx/vendor/llvm/default_assertion_handler.in
M libcxxabi/src/demangle/DemangleConfig.h
Log Message:
-----------
[libc++][hardening] Introduce assertion semantics. (#149459)
Assertion semantics closely mimic C++26 Contracts evaluation semantics.
This brings our implementation closer in line with C++26 Library Hardening
(one particular benefit is that using the `observe` semantic makes adopting
hardening easier for projects).
Commit: 4745637e44bc1aaac342bd78d1f13a92caa59fde
https://github.com/llvm/llvm-project/commit/4745637e44bc1aaac342bd78d1f13a92caa59fde
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Fix bazel build by build by adding missing deps. (#151093)
This adds two dependencies that I wanted to be part of #151090 but
forgot to add them before the last push, which related to `wcschr.cpp`
and were originally broken by #150661.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 6fbc397964340ebc9cb04a094fd04bef9a53abc3
https://github.com/llvm/llvm-project/commit/6fbc397964340ebc9cb04a094fd04bef9a53abc3
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[IR] Add new CreateVectorInterleave interface (#150931)
This PR adds a new interface to IRBuilder called CreateVectorInterleave,
which can be used to create vector.interleave intrinsics of factors 2-8.
For convenience I have also moved getInterleaveIntrinsicID and
getDeinterleaveIntrinsicID from VectorUtils.cpp to Intrinsics.cpp where
it can be used by IRBuilder.
Commit: ab1f6ce482487d0f276159a57775c0b3917da6ec
https://github.com/llvm/llvm-project/commit/ab1f6ce482487d0f276159a57775c0b3917da6ec
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/test/CodeGen/X86/swap.ll
Log Message:
-----------
[IR][SDAG] Remove lifetime size handling from SDAG (#150944)
Split out from https://github.com/llvm/llvm-project/pull/150248:
Specify that the argument of lifetime.start/lifetime.end is ignored and
will be removed in the future.
Remove lifetime size handling from SDAG. The size was previously
discarded during isel, so was always ignored for stack coloring anyway.
Where necessary, obtain the size of the full frame index.
Commit: fc90685354ca36c935ebb0f315bb18592598a83b
https://github.com/llvm/llvm-project/commit/fc90685354ca36c935ebb0f315bb18592598a83b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
A llvm/test/CodeGen/WebAssembly/lower-em-sjlj-alloca.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj-debuginfo.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-sjlj.ll
Log Message:
-----------
[WebAssemblyLowerEmscriptenEHSjLj] Avoid lifetime of phi (#150932)
After #149310 lifetime intrinsics require an alloca argument, an
invariant that this pass can break.
I've fixed this in two ways:
* First, move static allocas into the entry block. Currently, the way
the pass splits the entry block makes all allocas dynamic, which I
assume was not actually intended. This will avoid unnecessary SSA
reconstruction for allocas as well, and thus avoid the problem.
* If this fails (for dynamic allocas) drop all lifetime intrinsics if
any one of them would require a rewrite during SSA reconstruction.
Fixes https://github.com/llvm/llvm-project/issues/150498.
Commit: d5985905ae8e5b2e108d1b2772b554134db162dd
https://github.com/llvm/llvm-project/commit/d5985905ae8e5b2e108d1b2772b554134db162dd
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Sema/SemaARM.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Sema/SemaARM.cpp
A clang/test/Sema/builtins-arm-exclusive-124.c
A clang/test/Sema/builtins-arm-exclusive-4.c
A clang/test/Sema/builtins-arm-exclusive-none.c
M clang/test/Sema/builtins-arm-exclusive.c
Log Message:
-----------
[Clang][ARM][Sema] Reject bad sizes of __builtin_arm_ldrex (#150419)
Depending on the particular version of the AArch32 architecture,
load/store exclusive operations might be available for various subset of
8, 16, 32, and 64-bit quantities. Sema knew nothing about this and was
accepting all four sizes, leading to a compiler crash at isel time if
you used a size not available on the target architecture.
Now the Sema checking stage emits a more sensible diagnostic, pointing
at the location in the code.
In order to allow Sema to query the set of supported sizes, I've moved
the enum of LDREX_x sizes out of its Arm-specific header into
`TargetInfo.h`.
Also, in order to allow the diagnostic to specify the correct list of
supported sizes, I've filled it with `%select{}`. (The alternative was
to make separate error messages for each different list of sizes.)
Commit: 0d21522c00e2bda466834b43af5839eedc4e36bd
https://github.com/llvm/llvm-project/commit/0d21522c00e2bda466834b43af5839eedc4e36bd
Author: Hsiangkai Wang <hsiangkai.wang at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/test/Conversion/GPUToSPIRV/rotate.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
Log Message:
-----------
[mlir][gpu] Make offset and width in gpu.rotate as attributes (#150901)
`offset` and `width` must be constants and there are constraints on
their values. Update the operation definition to use attributes instead
of operands.
Commit: 5dab1fa1fa174085a9f265ff25763a31af97c9e3
https://github.com/llvm/llvm-project/commit/5dab1fa1fa174085a9f265ff25763a31af97c9e3
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
[BranchFolding] Follow up #149999 crash fix
fbf6271c7da20356d7b34583b3711b4126ca1dbb introduced an assertion failure as
setDebugValueUndef was called on DBG_LABELs, which isn't allowed and doesn't
make sense. Fix by skipping the call for DBG_LABELs and hoisting, in line with
the original behaviour.
Commit: 2780b8f22058b35a8e70045858b87a1966df8df3
https://github.com/llvm/llvm-project/commit/2780b8f22058b35a8e70045858b87a1966df8df3
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Revert "[mlir][llvm] Add intrinsic arg and result attribute support (… (#151099)
…#150783)"
This reverts commit 59013d44058ef423a117f95092150e16e16fdb09.
The change breaks a flang build bot:
https://lab.llvm.org/buildbot/#/builders/207/builds/4441
Commit: 68152f1301cd7196377f62c1e58e9a67cfa833f1
https://github.com/llvm/llvm-project/commit/68152f1301cd7196377f62c1e58e9a67cfa833f1
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
Log Message:
-----------
[WebAssembly] v16i8 mul support (#150209)
During target DAG combine, use two i16x8.extmul_low_i8x16 and a shuffle
for v16i8 mul.
On my AArch64 machine, using V8, I observe a 3.14% geomean improvement
across 65 benchmarks, including: 9.2% for spec2017.x264, 6% for libyuv
and 1.8% for ncnn.
Commit: 3b9ea7bbc5efbefd854ac462252e4261560dcdcb
https://github.com/llvm/llvm-project/commit/3b9ea7bbc5efbefd854ac462252e4261560dcdcb
Author: David Sherwood <david.sherwood at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
Log Message:
-----------
Fix build warnings after 6fbc397964340ebc9cb04a094fd04bef9a53abc3 (#151100)
Commit: 9f00ab411a60cc41a261fe8829aa190e1b15981e
https://github.com/llvm/llvm-project/commit/9f00ab411a60cc41a261fe8829aa190e1b15981e
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/test/libcxx/diagnostics/vector.nodiscard.verify.cpp
Log Message:
-----------
[libc++] Add [[nodiscard]] to the vector accessor functions (#150615)
Commit: a749e68ac4119b99701fc740b40631351fda05da
https://github.com/llvm/llvm-project/commit/a749e68ac4119b99701fc740b40631351fda05da
Author: A. Jiang <de34 at live.cn>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__format/concepts.h
A libcxx/include/__format/fmt_pair_like.h
M libcxx/include/__format/range_default_formatter.h
M libcxx/include/__format/range_format.h
M libcxx/include/__format/range_formatter.h
M libcxx/include/module.modulemap.in
Log Message:
-----------
[libc++][format][NFC] Granularize `__fmt_pair_like` (#150583)
`<optional>` needs `format_kind` and `range_format` since C++26, but it
shouldn't drag in too many other stuffs necessary for
`<__format/concepts.h>`.
Commit: c59cc542844b5b4a25cd222ad0127ca2e74953ad
https://github.com/llvm/llvm-project/commit/c59cc542844b5b4a25cd222ad0127ca2e74953ad
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port a749e68ac411
Commit: 9bf3e615a2c6db6e2a00ee2004ebcb21daf1334b
https://github.com/llvm/llvm-project/commit/9bf3e615a2c6db6e2a00ee2004ebcb21daf1334b
Author: b10902118 <b10902118 at ntu.edu.tw>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/CMakeLists.txt
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
A lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64dbreg.cpp
A lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64dbreg.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.h
Log Message:
-----------
[lldb][AArch64] Fix arm64 hardware breakpoint/watchpoint to arm32 process. (#147198)
When debugging arm32 process on arm64 machine, arm64 lldb-server will
use `NativeRegisterContextLinux_arm`, but the server should keep using
64-bit ptrace commands for hardware watchpoint/breakpoint, even when
debugging a 32-bit tracee.
See:
https://github.com/torvalds/linux/commit/5d220ff9420f8b1689805ba2d938bedf9e0860a4
There have been many conditional compilation handling arm32 tracee on
arm64, but this one is missed out.
To reuse the 64-bit implementation, I separate the shared code from
`NativeRegisterContextLinux_arm64.cpp` to
`NativeRegisterContextLinux_arm64dbreg.cpp`, with other adjustments to
share data structures of debug registers.
Commit: 0fbcbda77a9545f2404024dc1ad946218489f140
https://github.com/llvm/llvm-project/commit/0fbcbda77a9545f2404024dc1ad946218489f140
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Linux/BUILD.gn
Log Message:
-----------
[gn build] Port 9bf3e615a2c6
Commit: 3e42146fbce5362c94f5dd854779e5bbc8630dce
https://github.com/llvm/llvm-project/commit/3e42146fbce5362c94f5dd854779e5bbc8630dce
Author: kkent030315 <hrn832 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lld/COFF/Options.td
Log Message:
-----------
[LLD][COFF] Add ignored linker flags (#150815)
These flags were treated as explicit errors, which could cause
compatibility issues with MS link.exe. To address this, LLD was updated
to ignore them, aligning its behavior with MS link.exe. The latter two
options affect how MS link.exe generates metadata for its PGO. LLD
doesn't generate any such metadata right now (and doesn't work with the
MSVC PGO feature), so those options are kept as no-ops.
- Added `/emittoolversioninfo[:no]` flag in LLD/COFF options
- This flag emits a rich header between DOS stub and PE header. LLVM
does not emit the rich header at all.
- Added `/novcfeature` flag in LLD/COFF options
- Added `/nocoffgrpinfo` flag in LLD/COFF options
Commit: 75964244d62f0c42e7b2df3d72245e8f29a29809
https://github.com/llvm/llvm-project/commit/75964244d62f0c42e7b2df3d72245e8f29a29809
Author: Martin Erhart <martin.erhart at sifive.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/unittests/IR/SymbolTableTest.cpp
Log Message:
-----------
[mlir][SymbolOpInterface] Easier visibility overriding (#151036)
When overriding 'getVisibility and/or 'setVisibility' the interface
methods calling them do not pick up the overriden version. Instead it is
necessary to override all the other methods as well. This adjusts these
interface methods to use the overriden version when available.
Commit: be17791f2624f22b3ed24a2539406164a379125d
https://github.com/llvm/llvm-project/commit/be17791f2624f22b3ed24a2539406164a379125d
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
A llvm/test/CodeGen/AMDGPU/gfx1250-no-scope-cu-stores.ll
M llvm/test/MC/Disassembler/AMDGPU/kernel-descriptor-errors.test
Log Message:
-----------
[AMDGPU][gfx1250] Add `cu-store` subtarget feature (#150588)
Determines whether we can use `SCOPE_CU` stores (on by default), or
whether all stores must be done at `SCOPE_SE` minimum.
Commit: af44d87e0d80cda78451d8de723c974bf58ccac0
https://github.com/llvm/llvm-project/commit/af44d87e0d80cda78451d8de723c974bf58ccac0
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
Log Message:
-----------
[clang][SME] Remove folding of `__arm_in_streaming_mode()` (NFC) (#150917)
This is handled by the instcombine added in #147930; there is no need
for any clang-specific folding. NFC as all clang tests for
`__arm_in_streaming_mode()` used -O1, which applies the LLVM
instcombines.
Commit: 11a959bf98fe91b1cafb0a3f4e98f76ca29fe92b
https://github.com/llvm/llvm-project/commit/11a959bf98fe91b1cafb0a3f4e98f76ca29fe92b
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/recurrence-binary-intrinsic.ll
Log Message:
-----------
[InstCombine] Introduce test for PR149858 (NFC)
Commit: ef51514c38e6bd658153230769cfb62de9384bce
https://github.com/llvm/llvm-project/commit/ef51514c38e6bd658153230769cfb62de9384bce
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noalias.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/nounwind.ll
Log Message:
-----------
[FunctionAttrs] Don't bail out on unknown calls (#150958)
When inferring attributes, we should not bail out early on unknown calls
(such as virtual calls), as we may still have call-site attributes that
can be used for inference.
Fixes https://github.com/llvm/llvm-project/issues/150817.
Commit: 76bebb5be9daf9ca035777b17fa63d4ce13e79b9
https://github.com/llvm/llvm-project/commit/76bebb5be9daf9ca035777b17fa63d4ce13e79b9
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libclc/CMakeLists.txt
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Fix building top-level 'libclc' target (#150972)
With libclc being a 'runtime', the top-level build assumes that there is
a corresopnding 'libclc' target. We previously weren't providing this,
leading to a build failure if the user tried to build it.
This commit remedies this by adding support for building the 'libclc'
target. It does so by adding dependencies from the OpenCL builtins to
this target. It uses a configurable in-between target -
libclc-opencl-builtins - to ease the possibility of adding non-OpenCL
builtin libraries in the future.
Commit: ace42cf063a52d097f505b7d9afeb53d02bc04db
https://github.com/llvm/llvm-project/commit/ace42cf063a52d097f505b7d9afeb53d02bc04db
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Support/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/examples/toy/Ch5/CMakeLists.txt
M mlir/examples/toy/Ch5/toyc.cpp
M mlir/examples/toy/Ch6/CMakeLists.txt
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/CMakeLists.txt
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform-opt/CMakeLists.txt
M mlir/examples/transform-opt/mlir-transform-opt.cpp
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/CAPI/RegisterEverything/CMakeLists.txt
M mlir/lib/CMakeLists.txt
A mlir/lib/RegisterAllDialects.cpp
A mlir/lib/RegisterAllExtensions.cpp
A mlir/lib/RegisterAllPasses.cpp
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-lsp-server/mlir-lsp-server.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-query/CMakeLists.txt
M mlir/tools/mlir-reduce/CMakeLists.txt
M mlir/tools/mlir-rewrite/CMakeLists.txt
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M mlir/unittests/Target/LLVM/CMakeLists.txt
Log Message:
-----------
[mlir][core] Move `InitAll***` implementation into static library. (#150805)
`InitAll***` functions are used by `opt`-style tools to init all MLIR
dialects/passes/extensions. Currently they are implemeted as inline
functions and include essentially the entire MLIR header tree. Each file
which includes this header (~10 currently) takes 10+ sec and multiple GB
of ram to compile (tested with clang-19), which limits amount of
parallel compiler jobs which can be run. Also, flang just includes this
file into one of its headers.
Move the actual registration code to the static library, so it's
compiled only once.
Discourse thread
https://discourse.llvm.org/t/rfc-moving-initall-implementation-into-static-library/87559
Commit: 7057eee4819a31aef06fc05bfef43919861ef2e9
https://github.com/llvm/llvm-project/commit/7057eee4819a31aef06fc05bfef43919861ef2e9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Support/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/examples/toy/Ch5/CMakeLists.txt
M mlir/examples/toy/Ch5/toyc.cpp
M mlir/examples/toy/Ch6/CMakeLists.txt
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/CMakeLists.txt
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform-opt/CMakeLists.txt
M mlir/examples/transform-opt/mlir-transform-opt.cpp
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/CAPI/RegisterEverything/CMakeLists.txt
M mlir/lib/CMakeLists.txt
R mlir/lib/RegisterAllDialects.cpp
R mlir/lib/RegisterAllExtensions.cpp
R mlir/lib/RegisterAllPasses.cpp
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-lsp-server/mlir-lsp-server.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-query/CMakeLists.txt
M mlir/tools/mlir-reduce/CMakeLists.txt
M mlir/tools/mlir-rewrite/CMakeLists.txt
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M mlir/unittests/Target/LLVM/CMakeLists.txt
Log Message:
-----------
Revert "[mlir][core] Move `InitAll***` implementation into static library." (#151118)
Reverts llvm/llvm-project#150805
Some bots are failing.
Commit: 1a3e857c6bfc2962a6951e25c33246eec24b5174
https://github.com/llvm/llvm-project/commit/1a3e857c6bfc2962a6951e25c33246eec24b5174
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/test/Headers/__clang_hip_math.hip
Log Message:
-----------
[Clang] Regenerate test checks (NFC)
The attribute numbering here has changed, resulting in lots of
spurious diffs when the test is regenerated.
Commit: d64240b5c69e0a36fd86605812860c9f1116f8c9
https://github.com/llvm/llvm-project/commit/d64240b5c69e0a36fd86605812860c9f1116f8c9
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vacopy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
M llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
Log Message:
-----------
[GISel] Introduce MachineIRBuilder::(build|materialize)ObjectPtrOffset (#150392)
These functions are for building G_PTR_ADDs when we know that the base
pointer and the result are both valid pointers into (or just after) the
same object. They are similar to SelectionDAG::getObjectPtrOffset.
This PR also changes call sites of the generic (build|materialize)PtrAdd
functions that implement pointer arithmetic to split large memory
accesses to the new functions. Since memory accesses have to fit into an
object in memory, pointer arithmetic to an offset into a large memory
access also yields an address in that object.
Currently, these (build|materialize)ObjectPtrOffset functions only add
"nuw" to the generated G_PTR_ADD, but I intend to introduce an
"inbounds" MIFlag in a later PR (analogous to a concurrent effort in
SDAG: #131862, related: #140017, #141725) that will also be set in the
(build|materialize)ObjectPtrOffset functions.
Most test changes just add "nuw" to G_PTR_ADDs. Exceptions are AMDGPU's
call-outgoing-stack-args.ll, flat-scratch.ll, and freeze.ll tests, where
offsets are now folded into scratch instructions, and cases where the
behavior of the check regeneration script changed, resulting, e.g., in
better checks for "nusw G_PTR_ADD" instructions, matched empty lines,
and the use of "CHECK-NEXT" in MIPS tests.
For SWDEV-516125.
Commit: d1054e801c1e1eb5614b571e1ba9c6d68497a4bd
https://github.com/llvm/llvm-project/commit/d1054e801c1e1eb5614b571e1ba9c6d68497a4bd
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[mlir][NFC] Use range-based overload of `llvm::sort` (#150934)
Replace explicit begin/end iterator pairs with the range-based overload
of `llvm::sort`, which simplifies the code and improves readability.
Commit: 250f2a63676b2dc6cd7266882468c4e48a72e0c7
https://github.com/llvm/llvm-project/commit/250f2a63676b2dc6cd7266882468c4e48a72e0c7
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
Log Message:
-----------
[DAG] Remove AssertZext if the input is masked (#146052)
Remove AssertZext if the input ensures the assert cannot fail.
Commit: 50f3a6b897271af6aca960b5f53dc723b87834ff
https://github.com/llvm/llvm-project/commit/50f3a6b897271af6aca960b5f53dc723b87834ff
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
Log Message:
-----------
[AMDGPU] Add tests for workgroup/workitem intrinsic optimizations (#146053)
Commit: b30034da0ffaf67a144d062607e8f627e14227d1
https://github.com/llvm/llvm-project/commit/b30034da0ffaf67a144d062607e8f627e14227d1
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
Log Message:
-----------
[mlir][linalg] Add folder for broadcast(broadcast) -> broadcast (#150825)
Back to back `linalg.broadcast` can be rewritten to a single broadcast.
Commit: b6a98b934f63431243ba062aa9e07a52aae05f70
https://github.com/llvm/llvm-project/commit/b6a98b934f63431243ba062aa9e07a52aae05f70
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/include/mlir/Support/ToolUtilities.h
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Support/ToolUtilities.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
A mlir/test/IR/diagnostic-nosplit.mlir
M mlir/test/IR/top-level.mlir
M mlir/tools/mlir-pdll/mlir-pdll.cpp
Log Message:
-----------
[mlir] Report line number from file rather than split (#150982)
Add convention for lexer if the last file is contained in the first,
then the first is used for error reporting. This requires that these two
overlap to make it easy to find the corresponding spots. Enables going
from
```
within split at mlir/test/IR/invalid.mlir::10 offset :6:9: error: reference to an undefined block
```
to
```
mlir/test/IR/invalid.mlir:15:9: error: reference to an undefined block
```
This does change the split to not produce always null terminated buffers
and tools that need it, need to do so themselves (which is mostly by copying -
this may have little actual impact as previously this was a copy too).
Commit: e8b7183d866f9d51511d5570f5f1f632046ef983
https://github.com/llvm/llvm-project/commit/e8b7183d866f9d51511d5570f5f1f632046ef983
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M .github/workflows/release-tasks.yml
M llvm/utils/release/github-upload-release.py
Log Message:
-----------
[llvm][release] Add links to commonly used release packages (#147719)
This adds download links to the GitHub release pages for common
platforms. The automatically built packages' links are automatically
revealed once the builds are complete. For packages built by hand,
hidden links are included in the text for release uploaders to reveal
later.
The approach taken:
* "LLVM x.y.z Release" becomes the title for this links section.
* Automatically built packages are commented out with special markers so
we can find them to uncomment them later.
* There is placeholder text for the time between release creation and
release tasks finishing.
* Hand built packages have release links but these will need to be
un-commented by release uploaders.
* I have used vendor names for the architectures, that casual users
would recognise.
* Their signature file is linked as well. I expect most will ignore this
but better to show it to remind people it exists.
* I called it "signature" as a generic term to cover the .jsonl and .sig
files. Instructions to use these were added to the text in a previous
change.
Commit: 1528ddbe76acbd80e3da44b3f248fc566d6ab40b
https://github.com/llvm/llvm-project/commit/1528ddbe76acbd80e3da44b3f248fc566d6ab40b
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
Log Message:
-----------
[ConstantFolding][SVE] Do not fold fcmp of denormal without known mode. (#150614)
This is a follow on to
https://github.com/llvm/llvm-project/pull/115407 that introduced code
which bypasses the splat handling for scalable vectors. To maintain
existing tests I have moved the early return until after the splat
handling so all vector types are treated equally.
Commit: 3ede2decbe271270e081e31ce26e3acd42de2f2c
https://github.com/llvm/llvm-project/commit/3ede2decbe271270e081e31ce26e3acd42de2f2c
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
Log Message:
-----------
[LLVM][LV] Improve UF calculation for vscale based scalar loops. (#146102)
Update getSmallConstantTripCount() to return scalable ElementCount
values that is used to acurrately determine the maximum value for UF,
namely:
TripCount / VF ==> X * VScale / Y * VScale ==> X / Y
This improves the chances of being able to remove the scalar loop and
also fixes an issue where a UF=2 is choosen for a scalar loop with
exactly VF(= X * VScale) iterations.
Commit: 315e2e28b13285a352d409b739ba31fb453d661b
https://github.com/llvm/llvm-project/commit/315e2e28b13285a352d409b739ba31fb453d661b
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/test/C/C23/n3037.c
Log Message:
-----------
[C23] Handle type compatibility for enumerations better (#150282)
An enumeration is compatible with its underlying type, which means that
code like the following should be accepted:
struct A { int h; };
void func() {
extern struct A x;
enum E : int { e };
struct A { enum E h; };
extern struct A x;
}
because the structures are declared in different scopes, the two
declarations of 'x' are both compatible.
Note, the structural equivalence checker does not take scope into
account, but that is something the C standard requires. This means we
are accepting code we should be rejecting per the standard, like:
void func() {
struct A { int h; };
extern struct A x;
enum E : int { e };
struct A { enum E h; };
extern struct A x;
}
Because the structures are declared in the same scope, the type
compatibility rule require the structures to use the same types, not
merely compatible ones.
Fixes #149965
Commit: 586cacdbdd995d2a2f010f7152843745f4978b4b
https://github.com/llvm/llvm-project/commit/586cacdbdd995d2a2f010f7152843745f4978b4b
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libclc/clc/lib/amdgcn/SOURCES
R libclc/clc/lib/amdgcn/math/clc_fmax.cl
R libclc/clc/lib/amdgcn/math/clc_fmin.cl
M libclc/clc/lib/generic/math/clc_fmax.cl
M libclc/clc/lib/generic/math/clc_fmin.cl
M libclc/clc/lib/r600/SOURCES
R libclc/clc/lib/r600/math/clc_fmax.cl
R libclc/clc/lib/r600/math/clc_fmin.cl
M libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv/math/clc_fmax.cl
A libclc/clc/lib/spirv/math/clc_fmin.cl
Log Message:
-----------
[libclc] Optimize generic CLC fmin/fmax (#128506)
With this commit, the CLC fmin/fmax builtins use clang's
__builtin_elementwise_(min|max)imumnum which helps us generate LLVM
minimumnum/maximumnum intrinsics directly. These intrinsics uniformly
select the non-NaN input over the (quiet or signalling) NaN input, which
corresponds to what the OpenCL CTS tests.
These intrinsics maintain the vector types, as opposed to scalarizing,
which was previously happening. This commit therefore helps to optimize
codegen for those targets.
Note that there is ongoing discussion regarding how these builtins
should handle signalling NaNs in the OpenCL specification and whether
they should be able to return a quiet NaN as per the IEEE behaviour. If
the specification and/or CTS is ever updated to allow or mandate
returning a qNAN, these builtins could/should be updated to use
__builtin_elementwise_(min|max)num instead which would lower to LLVM
minnum/maxnum intrinsics.
The SPIR-V targets maintain the old implementations, as the LLVM ->
SPIR-V translator can't currently handle the LLVM intrinsics. The
implementation has been simplifies to consistently use clang builtins,
as opposed to before where the half version was explicitly defined.
[1] https://github.com/KhronosGroup/OpenCL-CTS/pull/2285
Commit: 1249ab9a0364805c84dc57b57fc4e85c1c7d5d69
https://github.com/llvm/llvm-project/commit/1249ab9a0364805c84dc57b57fc4e85c1c7d5d69
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/builtin_bit.cpp
M clang/test/CIR/Transforms/bit.cir
Log Message:
-----------
[CIR] Add bit ffs operation (#150997)
This patch adds the `cir.ffs` operation which corresponds to the
`__builtin_ffs` family of builtin functions.
This operation was not included in the previous PRs because the call to
`__builtin_ffs` would be transformed into a library call to `ffs`. At
the time of authoring this patch, this behavior has been changed and now
we can properly lower calls to `__builtin_ffs` to `cir.ffs`.
Commit: 29e02d792b8cc1bf9017a9ca90b3d9f7cff56fb6
https://github.com/llvm/llvm-project/commit/29e02d792b8cc1bf9017a9ca90b3d9f7cff56fb6
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
A llvm/test/CodeGen/WebAssembly/narrow-simd-mul.ll
Log Message:
-----------
[NFC][WebAssembly] Precommit test for v8i8 mul (#151139)
Commit: b5fe3eb2d17b711fded1a8c2fbd05a9e4dc06a7f
https://github.com/llvm/llvm-project/commit/b5fe3eb2d17b711fded1a8c2fbd05a9e4dc06a7f
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Headers/opencl-c.h
Log Message:
-----------
[OpenCL] Add decls for cl_intel_bfloat16_conversions (#150393)
These map to SPIR-V instructions, which are long supported by the llvm
SPIR-V target [1] and the llvm-spirv translator [2].
Intel's offline compiler (ocloc) and OpenCL implementation trivially
supports these, by having these same declarations [3] and relying on
llvm-spirv to map calls to them to their corresponding SPIR-V
instructions.
[1]:
https://github.com/llvm/llvm-project/blob/531cf8298b08eacdf670bac8c28db97a5dc8cb01/llvm/lib/Target/SPIRV/SPIRVBuiltins.td#L1546C11-L1546C27
[2]:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/blob/10c7569b3c4cb456fbfdcc86c3de45d46c7f5fa8/lib/SPIRV/OCLUtil.h#L327
[3]:
https://github.com/intel/intel-graphics-compiler/blob/342c4fb729ff6a20a41e19adc8329ad18ba05660/IGC/BiFModule/Languages/OpenCL/opencl_cth_released.h#L6899
Commit: f73b0d04f39acad00cdad22fb88a440463c84fb6
https://github.com/llvm/llvm-project/commit/f73b0d04f39acad00cdad22fb88a440463c84fb6
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/legalize-load-store.mir
Log Message:
-----------
[M68k][GISel] Fix buildbot failure caused by additional MIFlags (#151147)
PR #150392 added the nuw flag to some G_PTR_ADD MIR instructions, this
patch updates the tests for the experimental M68k backend to expect
them.
Should fix buildbot failures like
https://lab.llvm.org/buildbot/#/builders/27/builds/13793
Commit: 8bb3095c24b1636ecd9bedc36186a8d9de9d7274
https://github.com/llvm/llvm-project/commit/8bb3095c24b1636ecd9bedc36186a8d9de9d7274
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/abi-interface.mlir
Log Message:
-----------
[mlir][spirv]: Add ImageSupport in ABI Lowering (#150996)
Add support for generating shader arguments as global variables in the
SPIR-V module when the argument in question is a SPIR-V image.
Add lit tests to execute the new logic and check global variables are
being generated.
---------
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
Commit: 910f6ad15abd0c812ba5df73232215bc7533f7d1
https://github.com/llvm/llvm-project/commit/910f6ad15abd0c812ba5df73232215bc7533f7d1
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
A clang/test/Driver/arm-aarch64-multilib-invalid-arch.c
Log Message:
-----------
[Clang][Driver] Valid `-march` value is not mandatory in AArch64 multilib (#151103)
If a user passed an invalid value to `-march`, an assertion failure
happened in the AArch64 multilib logic.
But an invalid `-march` value is an expected case that should be handled
via error messages.
This patch removes the requirement that the `-march` value must be
valid.
Commit: 74001beded5395f3653aac60c84a10dae277b8b7
https://github.com/llvm/llvm-project/commit/74001beded5395f3653aac60c84a10dae277b8b7
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Log Message:
-----------
[DSE] Use MemoryLocation API to get lifetime.end size (NFC)
Commit: 46526f879f1f8dd62dd1ea4051bdf1ae413d1fdc
https://github.com/llvm/llvm-project/commit/46526f879f1f8dd62dd1ea4051bdf1ae413d1fdc
Author: David Green <david.green at arm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/Analysis/CostModel/ARM/arith-ssat.ll
M llvm/test/Analysis/CostModel/ARM/arith-usat.ll
Log Message:
-----------
[ARM] Use -cost-kind=all for arith-overflow.ll, arith-ssat.ll and arith-usat.ll. NFC
Commit: fa6965f722e0573f62e4d1e533dfa5b3a2ce2c4f
https://github.com/llvm/llvm-project/commit/fa6965f722e0573f62e4d1e533dfa5b3a2ce2c4f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCP] Extract PredicateInfo handling into separate method (NFC)
Commit: 73245b06b3da19ef70e04cf0f0a0d0df1ba82a57
https://github.com/llvm/llvm-project/commit/73245b06b3da19ef70e04cf0f0a0d0df1ba82a57
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/pr141907.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
Log Message:
-----------
[RISCV] Rewrite deinterleave load as vlse optimization as DAG combine (#150049)
This reworks an existing optimization on the fixed vector (shuffle
based) deinterleave lowering into a DAG combine. This has the effect of
making it kick in much more widely - in particular on the deinterleave
intrinsic (i.e. scalable) path, deinterleaveN (without load) lowering,
but also the intrinsic lowering paths.
Commit: 8e7b02fc0cd5f63a14f4117866f860b7f174baf3
https://github.com/llvm/llvm-project/commit/8e7b02fc0cd5f63a14f4117866f860b7f174baf3
Author: Alexandru Lorinti <alexandru.lorinti at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/StorageUniquerSupport.h
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestAttributes.cpp
M mlir/test/mlir-tblgen/attrdefs.td
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/unittests/IR/AttributeTest.cpp
Log Message:
-----------
Avoid copies in getChecked (#147721)
Following-up on #68067 ; adding std::move to getChecked method as well.
Commit: e68a20e0b7623738d6af736d3aa02625cba6126a
https://github.com/llvm/llvm-project/commit/e68a20e0b7623738d6af736d3aa02625cba6126a
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Support/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/examples/toy/Ch5/CMakeLists.txt
M mlir/examples/toy/Ch5/toyc.cpp
M mlir/examples/toy/Ch6/CMakeLists.txt
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/CMakeLists.txt
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform-opt/CMakeLists.txt
M mlir/examples/transform-opt/mlir-transform-opt.cpp
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/InitAllPasses.h
M mlir/lib/CAPI/RegisterEverything/CMakeLists.txt
M mlir/lib/CMakeLists.txt
A mlir/lib/RegisterAllDialects.cpp
A mlir/lib/RegisterAllExtensions.cpp
A mlir/lib/RegisterAllPasses.cpp
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-lsp-server/mlir-lsp-server.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-query/CMakeLists.txt
M mlir/tools/mlir-reduce/CMakeLists.txt
M mlir/tools/mlir-rewrite/CMakeLists.txt
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M mlir/unittests/Target/LLVM/CMakeLists.txt
Log Message:
-----------
[mlir] Reland `Move InitAll*** implementation into static library` (#151150)
Reland https://github.com/llvm/llvm-project/pull/150805
Shared libs build was broken.
Add `${dialect_libs}` and `${conversion_libs}` to
`MLIRRegisterAllExtensions` because it depends on
`registerConvert***ToLLVMInterface` functions.
Commit: 30ad2e24ab3392b1b1f022422255f010ed6dbd63
https://github.com/llvm/llvm-project/commit/30ad2e24ab3392b1b1f022422255f010ed6dbd63
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
A clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
Log Message:
-----------
[AMDGPU] Allow readonly features to be written to IR when there is no target (#148141)
Fixes: SWDEV-541399
Commit: d4562a19911e05cf9d81c6857e94cfb1307d4315
https://github.com/llvm/llvm-project/commit/d4562a19911e05cf9d81c6857e94cfb1307d4315
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Use DenseMap for call map (NFC) (#151161)
There is no reason to use std::map for the call maps maintained for
function clones during function clone assignment, as we don't iterate
over them and don't need deterministic ordering, so use the more
efficient DenseMap.
Commit: 84576c7b5d4f838d9154640bbaf36b703bc552f5
https://github.com/llvm/llvm-project/commit/84576c7b5d4f838d9154640bbaf36b703bc552f5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h
Log Message:
-----------
[ExecutionEngine] Remove an unnecessary cast (NFC) (#151082)
BaseObj is already of const MachOObjectFile &.
Commit: 5e150bb78185b424a8e6e01aa2c4907dde409777
https://github.com/llvm/llvm-project/commit/5e150bb78185b424a8e6e01aa2c4907dde409777
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[Support] Remove an unnecessary cast (NFC) (#151083)
NumRead is already of ssize_t.
Commit: e874615a62e6a5cb7be0be67b0c4c66c4719f67a
https://github.com/llvm/llvm-project/commit/e874615a62e6a5cb7be0be67b0c4c66c4719f67a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Remove an unnecessary cast (NFC) (#151085)
getObjFileLowering() already returns TargetLoweringObjectFile *.
Commit: 99fda1a09cf7ce97fbd0ea74101e4fc3283f3428
https://github.com/llvm/llvm-project/commit/99fda1a09cf7ce97fbd0ea74101e4fc3283f3428
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/lib/Basic/FileManager.cpp
Log Message:
-----------
[Basic] Remove getVirtualFile (#151086)
This patch removes getVirtualFile because it has been deprecated for
more than 10 months since:
commit b1aea98cfa357e23f4bb52232da5f41781f23bff
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: Wed Sep 25 10:36:44 2024 -0700
I'm not aware of any downstream use AFAICT.
Commit: 1a974527bb986d73afdb62b57ead54e33b54f8ca
https://github.com/llvm/llvm-project/commit/1a974527bb986d73afdb62b57ead54e33b54f8ca
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/NewGVN.cpp
Log Message:
-----------
[NewGVN] Slightly clean up the predicate swap handling (NFC)
I found the naming here confusing. This is not something generic
for intrinsics, it's specifically about predicates, and serves to
remember a previous swap choice.
Commit: 3b66d4a987bff6d9d3e8a0932604cb40850136eb
https://github.com/llvm/llvm-project/commit/3b66d4a987bff6d9d3e8a0932604cb40850136eb
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
Log Message:
-----------
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
Commit: 860b1e68ea180672d0e02fa8328f4a7c45e16f0f
https://github.com/llvm/llvm-project/commit/860b1e68ea180672d0e02fa8328f4a7c45e16f0f
Author: Tim Blechmann <tim at klingt.org>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/Windows/WindowsSupport.h
M llvm/lib/Support/Windows/Threading.inc
Log Message:
-----------
Windows: use EcoQoS for ThreadPriority::Background (#148797)
The SetThreadInformation API allows threads to be scheduled on the most
efficient cores on the most efficient frequency.
Using this API for ThreadPriority::Background should make clangd-based
IDEs a little less CPU hungry.
---------
Co-authored-by: Alexandre Ganea <aganea at havenstudios.com>
Commit: a5db2c28443559f5a19f76f9a91ef3280231a969
https://github.com/llvm/llvm-project/commit/a5db2c28443559f5a19f76f9a91ef3280231a969
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
A clang/test/CIR/CodeGen/finegrain-bitfield-access.cpp
Log Message:
-----------
[CIR] Add support for -ffine-grained-bitfield-accesses (#150687)
This PR adds support for `-ffine-grained-bitfield-accesses`. I reused
the tests from classic CodeGen, available here:
[https://github.com/llvm/llvm-project/blob/c2c881fcc85e0c2d7a050b0199d4dadf8f556b9e/clang/test/CodeGenCXX/finegrain-bitfield-access.cpp](https://github.com/llvm/llvm-project/blob/c2c881fcc85e0c2d7a050b0199d4dadf8f556b9e/clang/test/CodeGenCXX/finegrain-bitfield-access.cpp)
We produce almost exactly the same codegen, except when returning a
variable: we emit an extra variable to hold the return value, whereas
classic CodeGen does not. Also, the GEP instructions use slightly
different syntax compared to classic CodeGen.
Commit: 9bd2aacc68a1c7632abb9410640400dcc09ef50b
https://github.com/llvm/llvm-project/commit/9bd2aacc68a1c7632abb9410640400dcc09ef50b
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/CodeGen/GCMetadata.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/SpeculateAnalyses.h
M llvm/include/llvm/IR/GCStrategy.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/Object/SFrameParser.h
M llvm/include/llvm/Support/AArch64AttributeParser.h
M llvm/include/llvm/TextAPI/SymbolSet.h
M llvm/include/llvm/Transforms/Scalar/Reassociate.h
M llvm/include/llvm/Transforms/Utils/Mem2Reg.h
M llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Object/SFrameParser.cpp
Log Message:
-----------
[llvm] annotate recently added interfaces for DLL export (#150101)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates symbols that were recently
added to LLVM without proper annotations. The annotations currently have
no meaningful impact on the LLVM build; however, they are a prerequisite
to support an LLVM Windows DLL (shared library) build.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Overview
The bulk of these changes were generated automatically using the
[Interface Definition Scanner (IDS)](https://github.com/compnerd/ids)
tool, followed formatting with `git clang-format`.
The following manual adjustments were also applied after running IDS:
- Add `LLVM_EXPORT_TEMPLATE` and `LLVM_TEMPLATE_ABI` annotations to
explicitly instantiated instances of `llvm::object::SFrameParser`.
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 83dfdd8f5485f6b50213c88f02878f86b3f53852
https://github.com/llvm/llvm-project/commit/83dfdd8f5485f6b50213c88f02878f86b3f53852
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
A cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/Debuggers.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb/LLDB.py
Log Message:
-----------
[Dexter] Add DAP support for Dexter, including lldb-dap (#149394)
This patch adds a new variety of driver to Dexter, allowing it to work
with DAP-based interfaces for debuggers. The first concrete instance of
this is implemented in this patch, adding support for an `lldb-dap`
debugger. This is functionally very similar to the existing LLDB
debugger support*, but uses lldb-dap as its executable instead of lldb.
This has been tested successfully against the existing feature_test
suite, and manually tested against some other inputs; support is
essentially complete, although any further DAP-based debuggers may
require additional hooks inserted into the base class to deal with any
idiosyncrasies they exhibit (as with the several that have been inserted
for lldb-dap).
NB: There are some small differences resulting from differences between
lldb-dap's use of the lldb API and Dexter's use in its lldb driver; one
small example of this is when evaluating variables, lldb-dap will try to
first use `GetValueForVariablePath` and fallback to `EvaluateExpression`
if necessary, while Dexter will always use `EvaluateExpression`; these
can give slightly different results, resulting in different output from
Dexter for the same input.
Commit: 15980624ac516ae2dbbf1f2cd24d63de0f9fd2be
https://github.com/llvm/llvm-project/commit/15980624ac516ae2dbbf1f2cd24d63de0f9fd2be
Author: Sergio Afonso <safonsof at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M flang/docs/OpenMPSupport.md
Log Message:
-----------
[Flang][OpenMP][Docs] Update target-related support in Flang docs, NFC (#150443)
Update docs to state that reduction is supported on OpenMP `loop` and
`teams` standalone and compound constructs.
Commit: 2abd58cb7e817767e69f3c71512ff5c4b79bc881
https://github.com/llvm/llvm-project/commit/2abd58cb7e817767e69f3c71512ff5c4b79bc881
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M offload/unittests/CMakeLists.txt
M offload/unittests/Conformance/CMakeLists.txt
M offload/unittests/Conformance/device_code/CMakeLists.txt
A offload/unittests/Conformance/device_code/LLVMLibm.c
R offload/unittests/Conformance/device_code/sin.c
A offload/unittests/Conformance/include/mathtest/CommandLine.hpp
A offload/unittests/Conformance/include/mathtest/CommandLineExtras.hpp
A offload/unittests/Conformance/include/mathtest/DeviceContext.hpp
A offload/unittests/Conformance/include/mathtest/DeviceResources.hpp
A offload/unittests/Conformance/include/mathtest/ErrorHandling.hpp
A offload/unittests/Conformance/include/mathtest/ExhaustiveGenerator.hpp
A offload/unittests/Conformance/include/mathtest/GpuMathTest.hpp
A offload/unittests/Conformance/include/mathtest/HostRefChecker.hpp
A offload/unittests/Conformance/include/mathtest/IndexedRange.hpp
A offload/unittests/Conformance/include/mathtest/InputGenerator.hpp
A offload/unittests/Conformance/include/mathtest/Numerics.hpp
A offload/unittests/Conformance/include/mathtest/OffloadForward.hpp
A offload/unittests/Conformance/include/mathtest/Support.hpp
A offload/unittests/Conformance/include/mathtest/TestConfig.hpp
A offload/unittests/Conformance/include/mathtest/TestResult.hpp
A offload/unittests/Conformance/include/mathtest/TestRunner.hpp
A offload/unittests/Conformance/include/mathtest/TypeExtras.hpp
A offload/unittests/Conformance/lib/CMakeLists.txt
A offload/unittests/Conformance/lib/CommandLineExtras.cpp
A offload/unittests/Conformance/lib/DeviceContext.cpp
A offload/unittests/Conformance/lib/DeviceResources.cpp
A offload/unittests/Conformance/lib/ErrorHandling.cpp
A offload/unittests/Conformance/lib/TestConfig.cpp
R offload/unittests/Conformance/sin.cpp
A offload/unittests/Conformance/tests/CMakeLists.txt
A offload/unittests/Conformance/tests/Hypotf16Test.cpp
A offload/unittests/Conformance/tests/LogfTest.cpp
Log Message:
-----------
[Offload] Add framework for math conformance tests (#149242)
This PR introduces the initial version of a C++ framework for the
conformance testing of GPU math library functions, building upon the
skeleton provided in #146391.
The main goal of this framework is to systematically measure the
accuracy of math functions in the GPU libc, verifying correctness or at
least conformance to standards like OpenCL via exhaustive or random
accuracy tests.
Commit: 0a4c6522a6a48cf053d334445b919e769e64ab9b
https://github.com/llvm/llvm-project/commit/0a4c6522a6a48cf053d334445b919e769e64ab9b
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/test/Conversion/ComplexToROCDLLibraryCalls/complex-to-rocdl-library-calls.mlir
Log Message:
-----------
[MLIR] Add conversion support for more ops from ComplexToROCDLLibraryCalls (#151166)
Commit: 32779cd6989e5b30a9ecd4e3c1db62fa551caefb
https://github.com/llvm/llvm-project/commit/32779cd6989e5b30a9ecd4e3c1db62fa551caefb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGen/call.c
A clang/test/CIR/CodeGen/no-prototype.c
M clang/test/CIR/IR/func.cir
Log Message:
-----------
[CIR] Add proper handling for no prototype function calls (#150553)
This adds standard-comforming handling for calls to functions that were
declared in C source in the no prototype form.
Commit: 111edfcab89b8e36e1fc791ac052133b5de4b2a2
https://github.com/llvm/llvm-project/commit/111edfcab89b8e36e1fc791ac052133b5de4b2a2
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/src/math/CMakeLists.txt
A libc/src/math/fabsbf16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/fabsbf16.cpp
M libc/test/src/math/generic/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/fabsbf16_test.cpp
Log Message:
-----------
[libc][math][c++23] Add fabsbf16 math function (#148398)
This PR implements fabsbf16 math function for BFloat16 type along with
the tests.
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 88620aee98dd677bfb94712f957c752bfab2077f
https://github.com/llvm/llvm-project/commit/88620aee98dd677bfb94712f957c752bfab2077f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
A clang/test/CIR/CodeGen/array-dtor.cpp
A clang/test/CIR/IR/array-dtor.cir
Log Message:
-----------
[CIR] Add support for array cleanups (#150499)
This adds support for array cleanups, including the ArrayDtor op.
Commit: f925ecbf19d459ff3ea77c40169a4572381082f2
https://github.com/llvm/llvm-project/commit/f925ecbf19d459ff3ea77c40169a4572381082f2
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcisim-valid.s
M llvm/test/MC/RISCV/xqcisync-valid.s
Log Message:
-----------
[RISCV] Use Hints for Xqcisim/Xqcisync Aliases (#151040)
My aim here is to make these a little easier to maintain by relying on
aliases where these instructions overlap with the Hint instructions they
are based on.
The following instructions have not been converted to aliases as they
have complex mappings from ther immediate encodings to the immediate
encoding of the underlying instruction (setting high bits):
- qc.pputci
- qc.sync, qc.sync, qc.syncwf, qc.syncwl
- qc.c.sync, qc.c.syncr, qc.c.syncwf, qc.syncwl
Co-authored-by: Sudharsan Veeravalli <quic_svs at quicinc.com>
Commit: e1e312e6af34803d1686d9ce5a441446811f425d
https://github.com/llvm/llvm-project/commit/e1e312e6af34803d1686d9ce5a441446811f425d
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
R cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/Debuggers.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/__init__.py
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb/LLDB.py
Log Message:
-----------
Revert "[Dexter] Add DAP support for Dexter, including lldb-dap (#149394)"
This reverts commit 83dfdd8f5485f6b50213c88f02878f86b3f53852.
Temporary revert, as the above patch contains some python code requiring at
least version 3.10, when the minimum required by LLVM is 3.8.
Commit: 875491f59e688f2f7dea437a2425ed7bed1a0708
https://github.com/llvm/llvm-project/commit/875491f59e688f2f7dea437a2425ed7bed1a0708
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan][compiler-rt] Fix ioctl test causing segfault on exit (#151182)
I was observing segfaults at executable exit in the rtsan instrumented
unit tests. Bisecting the offending test led to observing that this test
is not using our safe test fixture for anything involving a file
descriptor. Changing to use the fixture eliminated the segfault on exit.
Commit: 335dbba741aaee369c3c8d11224a63255a6ecb85
https://github.com/llvm/llvm-project/commit/335dbba741aaee369c3c8d11224a63255a6ecb85
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Log Message:
-----------
[OMPIRBuilder] Don't drop debug loc from LocationDescription. (#148713)
`LocationDescription` contains both the insertion point and the debug
location. When `LocationDescription` is available, it is better to use
`updateToLocation` which will update both. This PR replaces
`restoreIP(Loc.IP)` with `updateToLocation(Loc)` as former may not
update debug location in all cases.
I am not checking the return value of `updateToLocation` because that is
checked just a few lines above in all cases and we would have returned
early if it failed.
Commit: a653934b581b2132b1f67ddfb304d5f12681180d
https://github.com/llvm/llvm-project/commit/a653934b581b2132b1f67ddfb304d5f12681180d
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wchar/CMakeLists.txt
A libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/mbsnrtowcs.cpp
A libc/src/wchar/mbsnrtowcs.h
A libc/src/wchar/mbsrtowcs.cpp
A libc/src/wchar/mbsrtowcs.h
A libc/src/wchar/mbstowcs.cpp
A libc/src/wchar/mbstowcs.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/mbsnrtowcs_test.cpp
A libc/test/src/wchar/mbsrtowcs_test.cpp
A libc/test/src/wchar/mbstowcs_test.cpp
Log Message:
-----------
[libc] Reland wchar string conversion mb to wc (#151048)
Added crash on nullptr to mbstowcs
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: a1aba84c2bc23d98a25e265678dd4752f78c5b3f
https://github.com/llvm/llvm-project/commit/a1aba84c2bc23d98a25e265678dd4752f78c5b3f
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_barrier_t.h
A libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__barrier_type.h
A libc/include/llvm-libc-types/pthread_barrier_t.h
A libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/barrier.cpp
A libc/src/__support/threads/linux/barrier.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_barrier_destroy.cpp
A libc/src/pthread/pthread_barrier_destroy.h
A libc/src/pthread/pthread_barrier_init.cpp
A libc/src/pthread/pthread_barrier_init.h
A libc/src/pthread/pthread_barrier_wait.cpp
A libc/src/pthread/pthread_barrier_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_barrier_test.cpp
Log Message:
-----------
[libc] Reland #148948 "Implement barriers for pthreads" (#151021)
Fixed build dependencies for pthread_barrier_t (add __barrier_type to
cmake dependencies)
Commit: 330a7e1136f536bf7cd642e460734d0bd6e0d0bb
https://github.com/llvm/llvm-project/commit/330a7e1136f536bf7cd642e460734d0bd6e0d0bb
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Linalg/vectorization/extract-with-patterns.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
Log Message:
-----------
[mlir][Vector] Make elementwise-on-broadcast sinking handle splat consts (#150867)
There is a pattern that rewrites
elementwise_op(broadcast(x1 : T to U), broadcast(x2 : T to U), ...) to
broadcast(elementwise_op(x1, x2, ...) : T to U).
This pattern did not, however, account for the case where a broadcast
constant is represented as a SplatElementsAttr, which can safely be
reshaped or scalarized but is not a `vector.broadcast` or `vector.splat`
operation.
This patch fixes this oversight, prenting premature broadcasting.
This did result in the need to update some linalg dialect tests, which
now feature a less-broadcast computation and/or more constant folding.
Commit: 6184ef1c2fccce14cd5c0924ee3cced830e1541b
https://github.com/llvm/llvm-project/commit/6184ef1c2fccce14cd5c0924ee3cced830e1541b
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_ds.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
- BUF/FLAT/GLOBAL_ADD/MIN/MAX_F64
- DS_ADD_F64
Co-authored-by: Konstantin Zhuravlyov <Konstantin Zhuravlyov at amd.com>
Commit: 8a1b252a994dee0c30238f2e6c07516ec523cb70
https://github.com/llvm/llvm-project/commit/8a1b252a994dee0c30238f2e6c07516ec523cb70
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/ctor-alias.cpp
M clang/test/CIR/CodeGen/dtor-alias.cpp
Log Message:
-----------
[CIR] Upstream proper function alias lowering (#150520)
This change implements correct lowering of function aliases to the LLVM
dialect.
Commit: dc6d7f0637e7c80e39e8b7f0e8b61515b4961b0f
https://github.com/llvm/llvm-project/commit/dc6d7f0637e7c80e39e8b7f0e8b61515b4961b0f
Author: Vivian Zhang <zhyuhang88 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface-multiple-of.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir
Log Message:
-----------
[mlir][linalg] Fix padding shape computation in PadTilingInterface for convs (#149576)
This PR fixes the computation of padded shapes for convolution-style
affine maps (e.g., d0 + d1) in `PadTilingInterface`. Previously, the
codes used the direct sum of loop upper bounds, leading to over-padding.
For example, the following `conv_2d_nhwc_fhwc` op, if only padding the c
dimensions to multiples of 16, it also incorrectly pads the convolved
dimensions and generates the wrong input shape as:
```
%padded = tensor.pad %arg0 low[0, 0, 0, 0] high[0, 1, 1, 12] {
^bb0(%arg3: index, %arg4: index, %arg5: index, %arg6: index):
tensor.yield %cst : f32
} : tensor<1x16x16x4xf32> to tensor<1x17x17x16xf32>
%padded_0 = tensor.pad %arg1 low[0, 0, 0, 0] high[0, 0, 0, 12] {
^bb0(%arg3: index, %arg4: index, %arg5: index, %arg6: index):
tensor.yield %cst : f32
} : tensor<16x3x3x4xf32> to tensor<16x3x3x16xf32>
%0 = linalg.conv_2d_nhwc_fhwc {dilations = dense<1> : tensor<2xi64>, strides = dense<1> : tensor<2xi64>} ins(%padded, %padded_0 : tensor<1x17x17x16xf32>, tensor<16x3x3x16xf32>) outs(%arg2 : tensor<1x14x14x16xf32>) -> tensor<1x14x14x16xf32>
return %0 : tensor<1x14x14x16xf32>
```
The new implementation uses the maximum accessed index as the input for
affine map and then adds 1 after aggregating all the terms to get the
final padded size. This fixed
https://github.com/llvm/llvm-project/issues/148679.
Commit: 28b319005371afa1392fb405c53139c4ae2b3066
https://github.com/llvm/llvm-project/commit/28b319005371afa1392fb405c53139c4ae2b3066
Author: jeremyd2019 <github at jdrake.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/test/Preprocessor/Inputs/llvm-windres.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/test/CodeGen/X86/stack-protector.ll
M llvm/test/CodeGen/X86/win32-ssp.ll
M llvm/test/tools/llvm-rc/windres-preproc.test
M llvm/tools/llvm-rc/llvm-rc.cpp
Log Message:
-----------
[LLVM][Cygwin] Enable conditions that are shared with MinGW (#149638)
Cygwin and MinGW share the auto import behavior that could result in
__stack_check_guard being non-dso-local. Allow windres to assume a
Cygwin target as well as a MinGW one, so defines like _WIN32 would not
be present on Cygwin.
Commit: a3228b6bf98c3efce3722700cf71f8b093e7870c
https://github.com/llvm/llvm-project/commit/a3228b6bf98c3efce3722700cf71f8b093e7870c
Author: jeremyd2019 <github at jdrake.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CodeGen/ms_struct-long-double.c
M clang/test/Preprocessor/init-x86.c
Log Message:
-----------
[Clang][Cygwin] Enable few conditions that are shared with MinGW (#149637)
The Cygwin target is generally very similar to the MinGW target. The
default auto-import behavior, the default calling convention, the
`.dll.a` import library extension, the `__GXX_TYPEINFO_EQUALITY_INLINE`
pre-define by `g++`, and the long double configuration.
Co-authored-by: Mateusz Mikuła <oss at mateuszmikula.dev>
Commit: 2a3f72ee6e435382dd5bc46f2961c3698ac20eec
https://github.com/llvm/llvm-project/commit/2a3f72ee6e435382dd5bc46f2961c3698ac20eec
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
Log Message:
-----------
[AMDGPU][CodeGen][True16] Correct size calculation for d16 insts (#151042)
D16 pesudo instructions are introduced in true16 mode to represet a D16
load/store. In MC lowering, the pesudo instructions are lowered to the
corresponding D16 Lo/Hi MC Inst respecting the register allocation.
However, the pesudo instruction has size 0 and cause an issue in the
Inst size estimation. Use D16 Lo when calculating inst size
Commit: 4128cf3b26cff997f1f315ee571cbc7110bc250c
https://github.com/llvm/llvm-project/commit/4128cf3b26cff997f1f315ee571cbc7110bc250c
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M flang/include/flang/Lower/OpenACC.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
A flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[flang][acc] Lower do and do concurrent loops specially in acc regions (#149614)
When OpenACC is enabled and Fortran loops are annotated with `acc loop`,
they are lowered to `acc.loop` operation. And rest of the contained
loops use the normal FIR lowering path.
Hovever, the OpenACC specification has special provisions related to
contained loops and their induction variable. In order to adhere to
this, we convert all valid contained loops to `acc.loop` in order to
store this information appropriately.
The provisions in the spec that motivated this change (line numbers are
from OpenACC 3.4):
- 1353 Loop variables in Fortran do statements within a compute
construct are predetermined to be private to the thread that executes
the loop.
- 3783 When do concurrent appears without a loop construct in a kernels
construct it is treated as if it is annotated with loop auto. If it
appears in a parallel construct or an accelerator routine then it is
treated as if it is annotated with loop independent.
By valid loops - we convert do loops and do concurrent loops which have
induction variable. Loops which are unstructured are not handled.
Commit: a28e7f1aad3edf3397a8887ff8c487826fc99fe7
https://github.com/llvm/llvm-project/commit/a28e7f1aad3edf3397a8887ff8c487826fc99fe7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/packages/Python/lldbsuite/test/lldbgdbclient.py
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
A lldb/source/Plugins/Process/wasm/CMakeLists.txt
A lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
A lldb/source/Plugins/Process/wasm/ProcessWasm.h
A lldb/source/Plugins/Process/wasm/ThreadWasm.cpp
A lldb/source/Plugins/Process/wasm/ThreadWasm.h
A lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
A lldb/source/Plugins/Process/wasm/UnwindWasm.h
M lldb/source/Target/Platform.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
Log Message:
-----------
[lldb] Add WebAssembly Process Plugin (#150143)
Extend support in LLDB for WebAssembly. This PR adds a new Process
plugin (ProcessWasm) that extends ProcessGDBRemote for WebAssembly
targets. It adds support for WebAssembly's memory model with separate
address spaces, and the ability to fetch the call stack from the
WebAssembly runtime.
I have tested this change with the WebAssembly Micro Runtime (WAMR,
https://github.com/bytecodealliance/wasm-micro-runtime) which implements
a GDB debug stub and supports the qWasmCallStack packet.
```
(lldb) process connect --plugin wasm connect://localhost:4567
Process 1 stopped
* thread #1, name = 'nobody', stop reason = trace
frame #0: 0x40000000000001ad
wasm32_args.wasm`main:
-> 0x40000000000001ad <+3>: global.get 0
0x40000000000001b3 <+9>: i32.const 16
0x40000000000001b5 <+11>: i32.sub
0x40000000000001b6 <+12>: local.set 0
(lldb) b add
Breakpoint 1: where = wasm32_args.wasm`add + 28 at test.c:4:12, address = 0x400000000000019c
(lldb) c
Process 1 resuming
Process 1 stopped
* thread #1, name = 'nobody', stop reason = breakpoint 1.1
frame #0: 0x400000000000019c wasm32_args.wasm`add(a=<unavailable>, b=<unavailable>) at test.c:4:12
1 int
2 add(int a, int b)
3 {
-> 4 return a + b;
5 }
6
7 int
(lldb) bt
* thread #1, name = 'nobody', stop reason = breakpoint 1.1
* frame #0: 0x400000000000019c wasm32_args.wasm`add(a=<unavailable>, b=<unavailable>) at test.c:4:12
frame #1: 0x40000000000001e5 wasm32_args.wasm`main at test.c:12:12
frame #2: 0x40000000000001fe wasm32_args.wasm
```
This PR is based on an unmerged patch from Paolo Severini:
https://reviews.llvm.org/D78801. I intentionally stuck to the
foundations to keep this PR small. I have more PRs in the pipeline to
support the other features/packets.
My motivation for supporting Wasm is to support debugging Swift compiled
to WebAssembly:
https://www.swift.org/documentation/articles/wasm-getting-started.html
Commit: efbbc0b319120d238d64b2b412305fcff72025fd
https://github.com/llvm/llvm-project/commit/efbbc0b319120d238d64b2b412305fcff72025fd
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/shared/math.h
M libc/shared/math/asinf16.h
A libc/shared/math/asinhf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinhf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asinhf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor asinhf16 implementation to header-only in src/__support/math folder. (#150849)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: bc605f4ce85eea02cc7d79c7575b4437ef1a8a95
https://github.com/llvm/llvm-project/commit/bc605f4ce85eea02cc7d79c7575b4437ef1a8a95
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Port #151150: Move InitAll*** implementation into static library (#151183)
And prune deps when splitting
Commit: 59c3fe65054fd3fb9be62ef326d1540cc375e913
https://github.com/llvm/llvm-project/commit/59c3fe65054fd3fb9be62ef326d1540cc375e913
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/test/CodeGen/PowerPC/xxeval-vselect-x-and.ll
Log Message:
-----------
[PowerPC] Exploit xxeval instruction for ternary patterns - ternary(A, X, and(B,C)) (#141733)
## Description
<!--- Title/Description will be Subject/Body of commit message. -->
<!--- Please be concise and limit the subject line to 50 characters, -->
<!--- and wrap the Description at 72 characters. -->
<!--- Describe why this is required, what problem it solves. -->
Adds support for ternary equivalent operations of the form `ternary(A,
X, and(B,C))` where `X=[xor(B,C)| nor(B,C)| eqv(B,C)| not(B)| not(C)]`.
List of `xxeval` equivalent ternary operations added and the
corresponding `imm` value required:
Ternary Operator| Imm Value
--|--
ternary(A, xor(B,C), and(B,C)) | 22
ternary(A, nor(B,C), and(B,C)) | 24
ternary(A, eqv(B,C), and(B,C)) | 25
ternary(A, not(C), and(B,C)) | 26
ternary(A, not(B), and(B,C)) | 28
eg. `xxeval XT,XA,XB,XC,22`
- performs `XA ? xor(XB, XC) : and(XB,XC)`and places the result in `XT`.
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: 4a44a85c89af48d74c1b54f1429dc4d78c1071d5
https://github.com/llvm/llvm-project/commit/4a44a85c89af48d74c1b54f1429dc4d78c1071d5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Add Pointer::initializeAllElements() (#151151)
To initialize all elements of a primitive array at once. This saves us
from creating the InitMap just to destroy it again after all elements
have been initialized.
Commit: d2361e43d12d51b744a4131be7fab2aa3a79feab
https://github.com/llvm/llvm-project/commit/d2361e43d12d51b744a4131be7fab2aa3a79feab
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ASTStructuralEquivalence.cpp
A clang/test/ASTMerge/enum/Inputs/enum3.c
A clang/test/ASTMerge/enum/Inputs/enum4.c
A clang/test/ASTMerge/enum/test2.c
M clang/test/C/C23/n3037.c
Log Message:
-----------
[C23] More improved type compatibility for enumerations (#150946)
The structural equivalence checker was not paying attention to whether
enumerations had compatible fixed underlying types or not.
Fixes #150594
Commit: 20d992d36628ffb246ad7a67af46d83e358b8c43
https://github.com/llvm/llvm-project/commit/20d992d36628ffb246ad7a67af46d83e358b8c43
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/cast.h
Log Message:
-----------
[libc][math] Fix buildbot fails (#151186)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 6a22580305d779e2d712900d49578de9a5cb14e8
https://github.com/llvm/llvm-project/commit/6a22580305d779e2d712900d49578de9a5cb14e8
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/AST/ASTStructuralEquivalence.cpp
Log Message:
-----------
Switch sanity check to assert; NFC (#151181)
This was written out of an abundance of caution because the changes were
being added to the release branch. Now we can be a little less cautious
and switch to using an assert. No behavioral changes are expected.
Commit: 5ae79baab3ed30161654999adfd4a01d5b977726
https://github.com/llvm/llvm-project/commit/5ae79baab3ed30161654999adfd4a01d5b977726
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/Dialect/All.h
A mlir/include/mlir/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.h
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
A mlir/lib/Target/LLVMIR/Dialect/XeVM/CMakeLists.txt
A mlir/lib/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/xevm.mlir
Log Message:
-----------
[MLIR][XeVM] Add XeVM to LLVMIR translation. (#150696)
Add XeVM dialect to LLVMIR translation.
Currently no ops are translated.
Only xevm.DecorationCacheControl are translated to metadata for spirv
decoration - !spirv.DecorationCacheControlINTEL.
Co-authored-by: Artem Kroviakov artem.kroviakov at intel.com
Commit: 30a5d569b2102bba1cfb5d253bd73ec2ebce7ee0
https://github.com/llvm/llvm-project/commit/30a5d569b2102bba1cfb5d253bd73ec2ebce7ee0
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/test/ASTMerge/enum/test2.c
Log Message:
-----------
[C23] AST equivalence of attributes (#151196)
Implicitly declared types (like __NSConstantString_tag, etc) will be
declared with visibility attributes. This causes problems when merging
ASTs because we currently reject declaration merging for declarations
with attributes.
This relaxes that restriction somewhat; implicit declarations can now
have attributes when merging; we assume that if the compiler generated
it, it's fine.
Commit: 551dcc3e829599dd5f0e6690cb5d33c2e9c163af
https://github.com/llvm/llvm-project/commit/551dcc3e829599dd5f0e6690cb5d33c2e9c163af
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/atan.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/atan.h
A libc/src/__support/math/atan_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/atan.cpp
M libc/src/math/generic/atan2.cpp
M libc/src/math/generic/atan2f128.cpp
R libc/src/math/generic/atan_utils.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor atan implementation to header-only in src/__support/math folder. (#150852)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: bd66fd0d010cb31167d7284731ca286eb0235770
https://github.com/llvm/llvm-project/commit/bd66fd0d010cb31167d7284731ca286eb0235770
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/fround.ll
Log Message:
-----------
[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)
Take the actual instruction cost into account, and don't fallthrough to
code that doesn't apply to [l]lrint. Also strip invalid costs for
[b]f16, as a companion to #146507, and unify it with [l]lround costs as
a companion to #147713.
Commit: 13366759c3b9db9366659d870cc73c938422b020
https://github.com/llvm/llvm-project/commit/13366759c3b9db9366659d870cc73c938422b020
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/exp.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fround.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
Log Message:
-----------
[VectorUtils] Trivially vectorize ldexp, [l]lround (#145545)
Commit: 052b836d2384c8a583ae5f945dcdcfba2004bbb0
https://github.com/llvm/llvm-project/commit/052b836d2384c8a583ae5f945dcdcfba2004bbb0
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port #150696: XeVM to LLVMIR (#151207)
Commit: 130f24b28d38ca3679a76ab7a6a4f7ff7e9f4c81
https://github.com/llvm/llvm-project/commit/130f24b28d38ca3679a76ab7a6a4f7ff7e9f4c81
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-ir2vec.rst
A llvm/test/tools/llvm-ir2vec/entities.ll
A llvm/test/tools/llvm-ir2vec/error-handling.ll
M llvm/test/tools/llvm-ir2vec/triplets.ll
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[IR2Vec][llvm-ir2vec] Revamp triplet generation and add entity mapping mode (#149214)
Add entity mapping mode to llvm-ir2vec and improve triplet generation format for knowledge graph embedding training.
This change streamlines the workflow for training the vocabulary embeddings with IR2Vec by:
1. Directly generating numeric IDs instead of requiring string-to-ID preprocessing
2. Providing entity mappings in standard knowledge graph embedding format
3. Structuring triplet output in train2id format compatible with knowledge graph embedding frameworks
4. Adding metadata headers to simplify post-processing and training setup
These improvements make IR2Vec more compatible with standard knowledge graph embedding training pipelines and reduce the preprocessing steps needed before training.
See #149215 for more details on how it is used.
(Tracking issues - #141817, #141834)
Commit: 1e0edb072ab32e22949f88f786b340a912b81d58
https://github.com/llvm/llvm-project/commit/1e0edb072ab32e22949f88f786b340a912b81d58
Author: Maksim Panchenko <maks at fb.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/missing-code-marker.s
Log Message:
-----------
[BOLT][AArch64] Compensate for missing code markers (#151060)
Code written in assembly can have missing code markers. In BOLT, we can
compensate by recognizing that a function entry point should start a
code sequence.
Seen such code in lua jit library.
Commit: c00e8dd9ea411cdd40a6bc7bdd71eb8e91416fec
https://github.com/llvm/llvm-project/commit/c00e8dd9ea411cdd40a6bc7bdd71eb8e91416fec
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/source/Plugins/Process/wasm/ProcessWasm.cpp:107:25: error:
format specifies type 'unsigned long long' but the argument has type
'lldb::tid_t' (aka 'unsigned long') [-Werror,-Wformat]
Commit: f3c531c676794b16449fd1548ead9fbd0d36709e
https://github.com/llvm/llvm-project/commit/f3c531c676794b16449fd1548ead9fbd0d36709e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Use SDValue::getOperand instead of SDNode::getOperand for consistency. NFC
Commit: 55f9eccee9b5ca6102206d4a1aba9ca21070881d
https://github.com/llvm/llvm-project/commit/55f9eccee9b5ca6102206d4a1aba9ca21070881d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
Log Message:
-----------
[LV] Revert back to use Loop::isLoopInvariant in isPredicatedInst. (#150828)
This partially reverts https://github.com/llvm/llvm-project/pull/140744,
restoring the original TheLoop->isLoopInvariant check instead the more
powerful Legal->isInvariant, which uses SCEV.
This causes a mis-compile, because SCEV can prove that the stored value
is loop-invariant, which in turn converts the store to a uniform store.
But in VPlan, we aren't yet able to determine that the stored value is
loop-invariant, so we extract the last lane, which is incorrect, because
it does not account for the mask of the store.
Restoring the original code is a safe fix and avoids this subtle
divergence.
Fixes https://github.com/llvm/llvm-project/issues/149347.
PR: https://github.com/llvm/llvm-project/pull/150828
Commit: 5d4e1e0c8403db8e9bebaa4ee3cabc8d2175c8cc
https://github.com/llvm/llvm-project/commit/5d4e1e0c8403db8e9bebaa4ee3cabc8d2175c8cc
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Fix build failure in getIntrinsicInstrCost (#151210)
bd66fd0 ([CostModel/RISCV] Fix costs of vector [l](lrint|lround))
introduced buildbot failures by using a temporary ArrayRef when a
SmallVector should have been used. Fix this.
Failure: https://lab.llvm.org/buildbot/#/builders/186/builds/11133
Commit: bfb68291486516a67f81bcf90453d003981e92b0
https://github.com/llvm/llvm-project/commit/bfb68291486516a67f81bcf90453d003981e92b0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
Log Message:
-----------
[AMDGPU] Organize VOP3 profiles for single HasExt64BitDPP. NFC. (#151212)
This shall simplify further delta as more profiles will be
added inside these braces.
Commit: fe93f75cc6b20361c273deea625c6201156a07c9
https://github.com/llvm/llvm-project/commit/fe93f75cc6b20361c273deea625c6201156a07c9
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Address post commit style suggestion
Commit: 446b3de5b6adf8c9241d0bfd2fe3b99cd4e858eb
https://github.com/llvm/llvm-project/commit/446b3de5b6adf8c9241d0bfd2fe3b99cd4e858eb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/AArch64/fold-ext-add.ll
Log Message:
-----------
[IndVars] Add tests showing missed folding opportunity.
Commit: 616cef08831631b3b049b92af43bc71326c910e4
https://github.com/llvm/llvm-project/commit/616cef08831631b3b049b92af43bc71326c910e4
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/test/src/__support/FPUtil/comparison_operations_test.cpp
Log Message:
-----------
[libc][math] Make BFloat16 comparison tests constexpr (#151211)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: ce2383050867dbdefedec7c4fae4de86d318eadd
https://github.com/llvm/llvm-project/commit/ce2383050867dbdefedec7c4fae4de86d318eadd
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV] Combine a vsse from a vsseg with one active segment (#151198)
This is a rewrite of the current strided store optimization to be a DAG
combine. This allows it to kick in slightly more broadly, in particular
for the scalable lowering paths.
Commit: ba2e49cac9b0d6502c78d4b5fbabbd71417b8898
https://github.com/llvm/llvm-project/commit/ba2e49cac9b0d6502c78d4b5fbabbd71417b8898
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M compiler-rt/test/fuzzer/sig-trap.test
Log Message:
-----------
[libFuzzer] Mark libFuzzer SIGTRAP test unsupported on windows (#151109)
This change is based on the UNSUPPORTED mark from the existing sigusr
test
https://github.com/llvm/llvm-project/blob/c59cc542844b5b4a25cd222ad0127ca2e74953ad/compiler-rt/test/fuzzer/sigusr.test#L4
Commit: c162846f8bd23b8e3d4e6a1e7737dd1cefb91f0d
https://github.com/llvm/llvm-project/commit/c162846f8bd23b8e3d4e6a1e7737dd1cefb91f0d
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lldb/source/API/CMakeLists.txt
Log Message:
-----------
[lldb][cmake] Create dependencies for LLDB header targets (#150995)
The LLDB standalone build using Xcode currently fails due to the headers
being attached to multiple targets, but none of these targets depending
on each other. This commit resolves this by creating those dependencies.
Commit: 86f74c4d019dd705e6890f8c997072293aaaff91
https://github.com/llvm/llvm-project/commit/86f74c4d019dd705e6890f8c997072293aaaff91
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/include-cleaner/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/lib/orc/tests/unit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/wchar/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libunwind/BUILD.bazel
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/driver.bzl
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch1/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch2/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch3/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch4/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch5/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch6/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch7/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/linalggen.bzl
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/siphash/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/unittest/BUILD.bazel
Log Message:
-----------
[bazel] Use rules_cc everywhere and reformat (#149584)
We already use cc rules from `@rules_cc//cc:defs.bzl` in a few files,
but this uses it everywhere. Done automatically by running `buildifier
--lint=fix
--warnings=native-cc-binary,native-cc-library,native-cc-test,load` over
all the files. I also ran `buildifier` once more to ensure there wasn't
any missing formatting, so that caused a few unrelated diffs.
Commit: 32127045c838fcc2aab816ee9126e69ec5e63135
https://github.com/llvm/llvm-project/commit/32127045c838fcc2aab816ee9126e69ec5e63135
Author: kkent030315 <hrn832 at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/COFF.h
R llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe
A llvm/test/tools/llvm-readobj/COFF/Inputs/has-exdllcharacteristics.exe
R llvm/test/tools/llvm-readobj/COFF/cetcompat.test
A llvm/test/tools/llvm-readobj/COFF/exdllcharacteristics.test
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm-readobj][COFF] Add support for more CET and hotpatch flags (#150967)
- Added `IMAGE_DLL_CHARACTERISTICS_EX_CET_COMPAT_STRICT_MODE`
- Added
`IMAGE_DLL_CHARACTERISTICS_EX_CET_SET_CONTEXT_IP_VALIDATION_RELAXED_MODE`
- Added
`IMAGE_DLL_CHARACTERISTICS_EX_CET_DYNAMIC_APIS_ALLOW_IN_PROC_ONLY`
- Added `IMAGE_DLL_CHARACTERISTICS_EX_CET_RESERVED_1`
- Added `IMAGE_DLL_CHARACTERISTICS_EX_CET_RESERVED_2`
- Added `IMAGE_DLL_CHARACTERISTICS_EX_FORWARD_CFI_COMPAT`
- Added `IMAGE_DLL_CHARACTERISTICS_EX_HOTPATCH_COMPATIBLE`
Commit: d99238263cb9ad8403f630b046b06ce41d0e8940
https://github.com/llvm/llvm-project/commit/d99238263cb9ad8403f630b046b06ce41d0e8940
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
Log Message:
-----------
[AMDGPU] Implement v_mad_u32/v_mad_nc_u|i64_u32 on gfx1250 (#151226)
Commit: cff9ae7a15a5d1e9bf385aceea02daf5ed8482fe
https://github.com/llvm/llvm-project/commit/cff9ae7a15a5d1e9bf385aceea02daf5ed8482fe
Author: Tom Stellard <tstellar at redhat.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/cmake/caches/Release.cmake
A clang/cmake/caches/release_cpack_pre_build_strip_lto.cmake
Log Message:
-----------
[CMake][Release] Build with -ffat-lto-objects (#140381)
Fixes #133580
Commit: 7eaf1f2b2df66d7217eebdd23907d3b5b6bd7995
https://github.com/llvm/llvm-project/commit/7eaf1f2b2df66d7217eebdd23907d3b5b6bd7995
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Bitop3 opcodes for gfx1250 (#151235)
Commit: 9b4a44d63da9e745d197766b55dfd97f0eadb66e
https://github.com/llvm/llvm-project/commit/9b4a44d63da9e745d197766b55dfd97f0eadb66e
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] Update MC tests for vflat instructions on GFX1250 (#151232)
These instructions have already been supported (at MC layer) with
current upstream code base.
Commit: 78c460bbe8f1fc17e2e66b37edf419ccecbfecba
https://github.com/llvm/llvm-project/commit/78c460bbe8f1fc17e2e66b37edf419ccecbfecba
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Fix incorrect count when initializing slab
Summary:
The initialization code should share the result with all of its
neighbors. Right now it sets them to the sentinel value and doesn't
shuffle them correctly. Shuffle them after initialization so we
correctly report that we succeeded in the allocation.
Commit: 10f9f572fa525dc45943d74c117fbc41e7f1a115
https://github.com/llvm/llvm-project/commit/10f9f572fa525dc45943d74c117fbc41e7f1a115
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/cmake/modules/LLVMProcessSources.cmake
Log Message:
-----------
Fix llvm_process_sources to append source file properties instead of overriding it (#151251)
This fixes the CLANG_VENDOR macro that disappeared because it is set
using the same mechanism and one was overriding the other.
Commit: 277bcf7ffc79e7d8652dc2c89ce79535b405635a
https://github.com/llvm/llvm-project/commit/277bcf7ffc79e7d8652dc2c89ce79535b405635a
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/AArch64/constant-pool-partition.ll
M llvm/test/CodeGen/X86/constant-pool-partition.ll
Log Message:
-----------
[ELF][AsmPrinter] Emit trailing dot for constant pool section when it has a hotness prefix (#150859)
Currently, `TargetLoweringObjectFileELF::getSectionForConstant` produce
`.<section>.hot` or `.<section>.unlikely` for a constant with non-empty
section prefix. This PR changes the implementation add trailing dot when
section prefix is not empty, to disambiguate `.hot` as a hotness prefix
from `.hot` as a (pure C) variable name.
Relevant discussions are in
https://github.com/llvm/llvm-project/pull/148985#discussion_r2221141273
and
https://github.com/llvm/llvm-project/pull/148985#discussion_r2233382641
and
Commit: db322be91bdee2419eba30a850785098f321a814
https://github.com/llvm/llvm-project/commit/db322be91bdee2419eba30a850785098f321a814
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/dotest.py
Log Message:
-----------
[lldb] Fix libcxx configuration in dotest.py (#151258)
We emit a warning when running the test suite remotely that says the
libcxx arguments will be ignored, but because they're set outside the
conditional block, we're not actually do this. Fix the logic by moving
the configuration in the conditional else-block.
Commit: fe25445ded152df6cba2efcf053924f3f9f0e3c7
https://github.com/llvm/llvm-project/commit/fe25445ded152df6cba2efcf053924f3f9f0e3c7
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
Log Message:
-----------
[WebAssembly] Add gc target feature to addBleedingEdgeFeatures (#151107)
See suggestion here:
https://github.com/llvm/llvm-project/pull/150201#discussion_r2237982637
Commit: 1132562bf3760a929dd53c372cad29fe939e7a7a
https://github.com/llvm/llvm-project/commit/1132562bf3760a929dd53c372cad29fe939e7a7a
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGen/cxx-conversion-operators.cpp
Log Message:
-----------
[CIR] Add support for C++ conversion operators (#151066)
This fairly simple addition enables codegen for C++ conversion operators
Commit: 025b4388f028eabdcebd7c0588a54dc5450e1156
https://github.com/llvm/llvm-project/commit/025b4388f028eabdcebd7c0588a54dc5450e1156
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/MC/RISCV/rvv/zvfbfwma.s
Log Message:
-----------
[RISCV] Remove scalar half FP load/store/move mc tests for Zvfbfwma. NFC.
Zvfbfwma doesn't include scalar half FP load/store/move instructions.
Commit: f011c99ceb90fbc7b5b0d22652444d4292ef3ee3
https://github.com/llvm/llvm-project/commit/f011c99ceb90fbc7b5b0d22652444d4292ef3ee3
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/MC/RISCV/rvv/fadd.s
M llvm/test/MC/RISCV/rvv/fcompare.s
M llvm/test/MC/RISCV/rvv/fdiv.s
M llvm/test/MC/RISCV/rvv/fmacc.s
M llvm/test/MC/RISCV/rvv/fminmax.s
M llvm/test/MC/RISCV/rvv/fmul.s
M llvm/test/MC/RISCV/rvv/fmv.s
M llvm/test/MC/RISCV/rvv/fothers.s
M llvm/test/MC/RISCV/rvv/freduction.s
M llvm/test/MC/RISCV/rvv/fsub.s
Log Message:
-----------
[RISCV] Simplify RUN lines in the mc tests for RVV floating-point instructions. NFC.
Replace v with zve32f, as zve32f is sufficient. Remove f extension
since zve32f alrealy implies f.
Commit: 05bfcd8ae3f1764145b0d7f491f059bcf8537da3
https://github.com/llvm/llvm-project/commit/05bfcd8ae3f1764145b0d7f491f059bcf8537da3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/long-object-path.cpp
M compiler-rt/test/fuzzer/afl-driver-stderr.test
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
Log Message:
-----------
[compiler-rt] Remove %T from tests (#151265)
%T has been deprecated for about seven years and use is to be avoided
given it doesn't actually create a unique test directory per test, which
can lead to races. Remove it from compiler-rt so we can hopefully remove
it from within llvm-lit.
This patch just touches the tests. There are still uses in some
substitutions defined in compiler-rt/test/lit.common.cfg.py that I want
to leave for a separate patch because it is quite a bit more thorny.
Commit: 3dfd939a162181cf6c5f1e684abf3763fb2ab3e8
https://github.com/llvm/llvm-project/commit/3dfd939a162181cf6c5f1e684abf3763fb2ab3e8
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
Log Message:
-----------
[AMDGPU] gfx1250 V_{MIN|MAX}_{I|U}64 opcodes (#151256)
Commit: ee1ecf32451ee87705666cfb919879123d388220
https://github.com/llvm/llvm-project/commit/ee1ecf32451ee87705666cfb919879123d388220
Author: wenzhi-cui <40185576+wenzhi-cui at users.noreply.github.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Update BUILD.bazel to add RegisterAllPasses/Dialects/Extensions (#151233)
Commit: 8f09b03aebb71c154f3bbe725c29e3f47d37c26e
https://github.com/llvm/llvm-project/commit/8f09b03aebb71c154f3bbe725c29e3f47d37c26e
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaModule.cpp
Log Message:
-----------
[NFC] [Sema] [Modules] Use DynamicRecursiveASTVisitor to reduce generted code size (#151074)
It is better to use DynamicRecursiveASTVisitor than RecursiveASTVisitor
as it can reduce the generated size. And also avoid using a template
type to present callbacks to avoid generating more code too.
Commit: 9b23e2bf8d69909d959434da5ef392aefcd0b694
https://github.com/llvm/llvm-project/commit/9b23e2bf8d69909d959434da5ef392aefcd0b694
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
Log Message:
-----------
[RISCV] Add copies to physical registers in VL optimizer tests. NFC (#151170)
In an upcoming patch to support recurrences in the RISCVVLOptimizer, we
need to perform an optimistic dataflow analysis where we assume
instructions have a DemandedVL of zero until a user is encountered.
Because of this if there's no "root" instruction, nothing will be
demanded and all the VLs will be set to zero.
This prepares for this by adding a copy to a physical register in the
MIR tests so that the behaviour is preserved, and matches whats
generated lowering from regular LLVM IR.
Commit: b663e563cce2bcf6cf7e15799f0ab1cfc56a8361
https://github.com/llvm/llvm-project/commit/b663e563cce2bcf6cf7e15799f0ab1cfc56a8361
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
[VPlan] Fix header masks in EVL tail folding (#150202)
With EVL tail folding, the EVL may not always be VF on the
second-to-last iteration.
Recipes that have been converted to VP intrinsics via optimizeMaskToEVL
account for this, but recipes that are left behind will still use the
old header mask which may end up having a different vector length.
This is effectively the same as #95368, and fixes this by converting
header masks from icmp ule wide-canonical-iv, backedge-trip-count ->
icmp ult step-vector, evl. Without it, recipes that fall through
optimizeMaskToEVL may use the wrong vector length, e.g. in #150074 and
#149981.
We really need to split off optimizeMaskToEVL into
VPlanTransforms::optimize and move transformRecipestoEVLRecipes into
tryToBuildVPlanWithVPRecipes, so we don't mix up what is needed for
correctness and what is needed to optimize away the mask computations.
We should be able to still generate a correct albeit suboptimal VPlan
without running optimizeMaskToEVL. I've added a TODO for this, which I
think we can do after #148274
Fixes #150197
Commit: e10b182a5fb020f6b69ea95d00fd8590bba7559b
https://github.com/llvm/llvm-project/commit/e10b182a5fb020f6b69ea95d00fd8590bba7559b
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Support safe patterns of "%.*s" in printf functions (#145862)
The character buffer passed to a "%.*s" specifier may be safely bound if
the precision is properly specified, even if the buffer does not
guarantee null-termination.
For example,
```
void f(std::span<char> span) {
printf("%.*s", (int)span.size(), span.data()); // "span.data()" does not guarantee null-termination but is safely bound by "span.size()", so this call is safe
}
```
rdar://154072130
Commit: 3c3523c15850f3c42de35ae725288368414e4e91
https://github.com/llvm/llvm-project/commit/3c3523c15850f3c42de35ae725288368414e4e91
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/long-object-path.cpp
M compiler-rt/test/fuzzer/afl-driver-stderr.test
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
Log Message:
-----------
Revert "[compiler-rt] Remove %T from tests (#151265)"
This reverts commit 05bfcd8ae3f1764145b0d7f491f059bcf8537da3.
This broke some buildbots.
https://lab.llvm.org/buildbot/#/builders/66/builds/17200
https://lab.llvm.org/buildbot/#/builders/72/builds/13632
https://lab.llvm.org/buildbot/#/builders/199/builds/4902
Commit: f2a476d79a8b00f57cdda247580ef72c49fd21a0
https://github.com/llvm/llvm-project/commit/f2a476d79a8b00f57cdda247580ef72c49fd21a0
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/atanf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/atanf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/atanf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor atanf implementation to header-only in src/__support/math folder. (#150854)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: e9259a47a8f80465e3da66d1b48e1693fb208ed7
https://github.com/llvm/llvm-project/commit/e9259a47a8f80465e3da66d1b48e1693fb208ed7
Author: Yuxuan Chen <ych at fb.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-await.cpp
Log Message:
-----------
[Clang] fix coroutine await suspend wrapper linkage types (#151224)
Commit: 1f66724725c18f7e117e29b113472a9b61f64217
https://github.com/llvm/llvm-project/commit/1f66724725c18f7e117e29b113472a9b61f64217
Author: David Green <david.green at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Create a performRNDRCombine to pull code out of PerformDAGCombine. NFC
Commit: a7e029bd0bee6304c3654dd41aee04984d2b6edc
https://github.com/llvm/llvm-project/commit/a7e029bd0bee6304c3654dd41aee04984d2b6edc
Author: ronlieb <ron.lieberman at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
Log Message:
-----------
Revert "[WebAssembly] Add gc target feature to addBleedingEdgeFeatures" (#151268)
Reverts llvm/llvm-project#151107
Commit: 7f470586e10543aa12efc7e04d4d4ac814eaca35
https://github.com/llvm/llvm-project/commit/7f470586e10543aa12efc7e04d4d4ac814eaca35
Author: Keno Fischer <keno at juliahub.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/test/Driver/mingw-msvcrt.c
Log Message:
-----------
[Driver][MinGW] Always put libc argument last, even if non-standard (#149434)
I was attempting to build openblas with clang in msys2's `ucrt64`
environment (I'm aware of the `clang64` environment, but I wanted
libstdc++). The openblas link failed with the following:
```
clang -march=native -mtune=native -m64 -O2 -fno-asynchronous-unwind-tables -O2 -DSMALL_MATRIX_OPT -DMS_ABI -DMAX_STACK_ALLOC=2048 -Wall -m64 -DF_INTERFACE_GFORT -DDYNAMIC_ARCH -DSMP_SERVER -DNO_WARMUP -DMAX_CPU_NUMBER=512 -DMAX_PARALLEL_NUMBER=1 -DBUILD_SINGLE=1 -DBUILD_DOUBLE=1 -DBUILD_COMPLEX=1 -DBUILD_COMPLEX16=1 -DVERSION=\"0.3.29\" -UASMNAME -UASMFNAME -UNAME -UCNAME -UCHAR_NAME -UCHAR_CNAME -DASMNAME= -DASMFNAME=_ -DNAME=_ -DCNAME= -DCHAR_NAME=\"_\" -DCHAR_CNAME=\"\" -DNO_AFFINITY -I.. libopenblas64_.def dllinit.obj \
-shared -o ../libopenblas64_.dll -Wl,--out-implib,../libopenblas64_.dll.a \
-Wl,--whole-archive ../libopenblas64_p-r0.3.29.a -Wl,--no-whole-archive -LC:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0 -LC:/msys64/ucrt64/bin/../lib/gcc -LC:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../x86_64-w64-mingw32/lib/../lib -LC:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../lib -LC:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../x86_64-w64-mingw32/lib -LC:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../.. -lgfortran -lmingwex -lmsvcrt -lquadmath -lm -lpthread -lmingwex -lmsvcrt -defaultlib:advapi32 -lgfortran -defaultlib:advapi32 -lgfortran
C:/msys64/ucrt64/bin/ld: C:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../lib/libmingw32.a(lib64_libmingw32_a-pseudo-reloc.o): in function `__report_error':
D:/W/B/src/mingw-w64/mingw-w64-crt/crt/pseudo-reloc.c:157:(.text+0x59): undefined reference to `abort'
C:/msys64/ucrt64/bin/ld: C:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../lib/libmingw32.a(lib64_libmingw32_a-tlsthrd.o): in function `___w64_mingwthr_add_key_dtor':
D:/W/B/src/mingw-w64/mingw-w64-crt/crt/tlsthrd.c:48:(.text+0xa5): undefined reference to `calloc'
C:/msys64/ucrt64/bin/ld: C:/msys64/ucrt64/bin/../lib/gcc/x86_64-w64-mingw32/15.1.0/../../../../lib/libmingw32.a(lib64_libmingw32_a-pesect.o): in function `_FindPESectionByName':
D:/W/B/src/mingw-w64/mingw-w64-crt/crt/pesect.c:79:(.text+0xfd): undefined reference to `strncmp'
```
These symbols come from the `-lmingw32` dep that the driver added and
are ordinarily found in `-lmsvcrt`, which got skipped here, because
openblas passed `-lmsvcrt` explicitly earlier in the link line. Since we
always add these libraries at the end here, I think that clang is "at
fault" (as opposed to a user or packaging mistake) and should have added
some crt here.
To preserve the intent of letting the user override which crt is chosen,
duplicate the (first) user chosen crt `-l` into this position, although
we should perhaps consider an explicit `-mcrtdll` like gcc has as well.
Commit: 74763608ef0da6bdcf6032f0457d1e7a156bad6a
https://github.com/llvm/llvm-project/commit/74763608ef0da6bdcf6032f0457d1e7a156bad6a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
Log Message:
-----------
AMDGPU: Test VGPR and AGPR case for xf32 mfmas (#150891)
Commit: 4ee6943eeb1de19e182b56fde34d134d43aceb67
https://github.com/llvm/llvm-project/commit/4ee6943eeb1de19e182b56fde34d134d43aceb67
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/Transforms/GVN/PRE/load-metadata.ll
M llvm/test/Transforms/GVN/PRE/load-pre-across-backedge.ll
M llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
M llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
Log Message:
-----------
[GVN][Tests] Add MSSA coverage to some PRE tests 3/N (#150603)
Previous patch in this series
https://github.com/llvm/llvm-project/pull/137814
Commit: f527b319e377202e44b14b6875584a558a628803
https://github.com/llvm/llvm-project/commit/f527b319e377202e44b14b6875584a558a628803
Author: Abhinav Garg <39309352+abhigargrepo at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Analysis/UniformityAnalysis.cpp
Log Message:
-----------
[Uniformity Analysis] Fix print method to dump uniformity info (#151130)
Commit: 2a5ac19605ae49d6628ac3af55d6b528cb13ed2e
https://github.com/llvm/llvm-project/commit/2a5ac19605ae49d6628ac3af55d6b528cb13ed2e
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll
Log Message:
-----------
Revert "[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmin/zvfbfmin (#150882)"
This reverts commit fe4f6c1a58ab4f00a88a97af01000b6783b573ee, but leaves
the tests that were added.
The original commit mistakenly assumed that if regular bf16/f16 loads
and stores could be lowered without zvfbfmin/zvfhmin, then so too could
masked loads/stores and gathers/scatters.
However SelectionDAG can't actually type-legalize masked.load/stores
since it needs to be done in ScalarizeMaskedMemIntrinPass.
This was causing crashes on IREE because we now returned true for
isLegalMaskedLoadStore.
The original intent of this was to remove a discrepancy in the loop
vectorizer tests whenever predication was enabled, but this has gone
away after 92d09245d61dce80d3e68a27cc34d5fc6f062c93. So I don't think we
need to reapply this patch.
Commit: eddd34227ec2770c81d260826e2c31f4d5136f8f
https://github.com/llvm/llvm-project/commit/eddd34227ec2770c81d260826e2c31f4d5136f8f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[TargetLowering] Use getShiftAmountConstant in CTTZTableLookup. NFC
Commit: 8f187c74b3ad77ef8a15bc3d2d718ccd88edb873
https://github.com/llvm/llvm-project/commit/8f187c74b3ad77ef8a15bc3d2d718ccd88edb873
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
A llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
Log Message:
-----------
[AMDGPU] introduce S_WAITCNT_LDS_DIRECT in the memory legalizer (#150887)
The new instruction represents the unknown number of waitcnts needed at a
release operation to ensure that prior direct loads to LDS (formerly called LDS
DMA) are completed. The instruction is replaced in SIInsertWaitcnts with a
suitable value for vmcnt().
Co-authored-by: Austin Kerbow <austin.kerbow at amd.com>.
Commit: a9d491b17f4f0a131f68a5dbdac8d34c7c8427db
https://github.com/llvm/llvm-project/commit/a9d491b17f4f0a131f68a5dbdac8d34c7c8427db
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Don't allow implicit this access when checking function constraints (#151276)
We allowed implicit this access when checking associated constraints
after CWG2369. As a result, some of the invalid function call
expressions were not properly SFINAE'ed out and ended up as hard errors
at evaluation time.
We tried fixing that by mucking around the CurContext, but that spawned
additional breakages and I think it's probably safe to revert to the
previous behavior to avoid churns.
Though there is CWG2589, which justifies the previous change, it's not
what we're pursuing now.
Fixes https://github.com/llvm/llvm-project/issues/151271
Fixes https://github.com/llvm/llvm-project/issues/145505
Commit: 957ae8ad46d401b4e263bf786b1eafde06894125
https://github.com/llvm/llvm-project/commit/957ae8ad46d401b4e263bf786b1eafde06894125
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
Log Message:
-----------
[AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (#150899)
This concerns offset computations for kernargs and
RegBankLegalizeHelper::splitLoad, which should all be within the bounds of a
memory object. See #150392 for the motivation for introducing the
buildObjectPtrOffset function.
For SWDEV-516125.
Commit: d3b2bda19c8074d0f2e867ee82a90b52734f5bc4
https://github.com/llvm/llvm-project/commit/d3b2bda19c8074d0f2e867ee82a90b52734f5bc4
Author: woruyu <99597449+woruyu at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/CodeGen/ARM/fcopysign.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[utils][UpdateTestChecks] update_llc_test_checks.py - armv7-apple-darwin triple no longer working (#150906)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/150207
Commit: 27f777e9c06daeb03efad9230fe080df2a3a94c5
https://github.com/llvm/llvm-project/commit/27f777e9c06daeb03efad9230fe080df2a3a94c5
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/unroll-heuristic01.f90
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
A flang/test/Lower/OpenMP/unroll-heuristic03.f90
Log Message:
-----------
[Flang][OpenMP] Skip DSA for canonical loops (#150593)
OpenMP loop transformations to not have data-sharing attributes and do
not explicitly privatize the loop variable. The DataSharingProcessor was
still used in #144785 because `createAndSetPrivatizedLoopVar` expected
it.
We skip that function and directly write to the loop variable. If the
loop variable is implicitly or explicitly privatized, it will be due to
surrounding OpenMP constructs such as `parallel`.
Commit: a86ad73064e71f0f09803a7ade13a32cf316ca94
https://github.com/llvm/llvm-project/commit/a86ad73064e71f0f09803a7ade13a32cf316ca94
Author: Joachim <jenke at itc.rwth-aachen.de>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M offload/tools/offload-tblgen/CMakeLists.txt
Log Message:
-----------
[offload] Add missing build dependency (#149326)
libc++ headers must be generated before compiling part of liboffload.
The build error occurs if clang is configured to use libc++ by default.
Fixes issue #149324
Commit: e50bd78d54a228757de369a3951534244c6af36a
https://github.com/llvm/llvm-project/commit/e50bd78d54a228757de369a3951534244c6af36a
Author: Vikram Hegde <Vikram.Hegde at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
Reapply "[CodeGen][NPM] Stitch up loop passes in codegen pipeline" (#151098)
Reapplies https://github.com/llvm/llvm-project/pull/148114
includes shared lib build failure fixes for AMDGPU and X86.
Commit: fb49c6784ad425a332bd528567b9c26624fff5b0
https://github.com/llvm/llvm-project/commit/fb49c6784ad425a332bd528567b9c26624fff5b0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Move Pointer::{Prev,Next} into BlockPointer (#151097)
They are only relevant for block pointers.
Commit: c4b155709714fb3381049b6d523c1f518dc363f5
https://github.com/llvm/llvm-project/commit/c4b155709714fb3381049b6d523c1f518dc363f5
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AMDGPU/merged-bfx-opt.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
Log Message:
-----------
[DAG] Fold (setcc ((x | x >> c0 | ...) & mask)) sequences (#146054)
Fold sequences where we extract a bunch of contiguous bits from a value,
merge them into the low bit and then check if the low bits are zero or
not.
Usually the and would be on the outside (the leaves) of the expression,
but the DAG canonicalizes it to a single `and` at the root of the
expression.
The reason I put this in DAGCombiner instead of the target combiner is
because this is a generic, valid transform that's also fairly niche, so
there isn't much risk of a combine loop I think.
See #136727
Commit: 7a0024d694b9137eb8e105c0c3b20dea03fed34f
https://github.com/llvm/llvm-project/commit/7a0024d694b9137eb8e105c0c3b20dea03fed34f
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
Log Message:
-----------
[AArch64] Refactor AND/ANDS bitmask splitting (NFC). (#150619)
This patch generalises the logic for splitting bitmasks for AND/ANDS
immediate instructions, to prepare it to handle more opcodes, as in
#150394.
Commit: 058d96f2d68d3496ae52774c06177d4a9039a134
https://github.com/llvm/llvm-project/commit/058d96f2d68d3496ae52774c06177d4a9039a134
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
A llvm/test/CodeGen/RISCV/calling-conv-preserve-most.ll
Log Message:
-----------
[RISCV] Support PreserveMost calling convention (#148214)
This adds the simplest implementation of `PreserveMost` calling
convention and we preserve `x5-x31` (except x6/x7/x28) registers.
Fixes #148147.
Commit: 743177c1ef1e0e43584854191f8a11b22b85e951
https://github.com/llvm/llvm-project/commit/743177c1ef1e0e43584854191f8a11b22b85e951
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/cf.ll
Log Message:
-----------
[X86][APX] Use TEST instruction for CLOAD/CSTORE (#151160)
Commit: 4ec8503e4c480f52426ddd03619b017f19a2f452
https://github.com/llvm/llvm-project/commit/4ec8503e4c480f52426ddd03619b017f19a2f452
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/test/ELF/loongarch-relax-pc-hi20-lo12.s
Log Message:
-----------
[lld][LoongArch] Check that the relocation addend is zero before applying relaxation to R_LARCH_GOT_PC_{HI20,LO12} (#151264)
Linker relaxation to R_LARCH_GOT_PC_{HI20,LO12} is only possible when
the addend of the relocation is zero.
Note: For `ld.bfd`, GOT references with non-zero addends will trigger an
assert in LoongArch, but `lld` handles these cases without any errors.
```
ld.bfd: BFD (GNU Binutils) 2.44.0 assertion fail
/usr/src/debug/binutils/binutils-gdb/bfd/elfnn-loongarch.c:4248
```
Commit: 33e978fbfa25fa98bd521222298e903c3f324a60
https://github.com/llvm/llvm-project/commit/33e978fbfa25fa98bd521222298e903c3f324a60
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/FindSymbols.cpp
M clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
Log Message:
-----------
[clangd] Make inline friend functions appear in document symbols (#150629)
Otherwise, that definition would not show up in the document outline.
Commit: cc8c941e17558ba427de06e72c8ad96d7b17ced1
https://github.com/llvm/llvm-project/commit/cc8c941e17558ba427de06e72c8ad96d7b17ced1
Author: Shih-Po Hung <shihpo.hung at sifive.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
Log Message:
-----------
[VPlan] Convert EVL loops to variable-length stepping after dissolution (#147222)
Loop regions require fixed-length steps and rounded-up trip counts, but
after dissolution creates explicit control flow, EVL loops can leverage
variable-length stepping with original trip counts.
This patch adds a post-dissolution transform pass to convert EVL loops
from fixed-length to variable-length stepping .
Commit: c6f7fa74376634619eb4e8ea9e9580fd3e220fe7
https://github.com/llvm/llvm-project/commit/c6f7fa74376634619eb4e8ea9e9580fd3e220fe7
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/zext-add.ll
Log Message:
-----------
[SCEV] Add test for pushing constant add into zext.
Adds a SCEV-only tests for
https://github.com/llvm/llvm-project/pull/151227.
Commit: ded255e56ee1f2ef27e85b013f572fca34ca57bc
https://github.com/llvm/llvm-project/commit/ded255e56ee1f2ef27e85b013f572fca34ca57bc
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/BinaryFormat/SFrameConstants.def
M llvm/include/llvm/Object/SFrameParser.h
M llvm/lib/BinaryFormat/SFrame.cpp
M llvm/lib/Object/SFrameParser.cpp
A llvm/test/tools/llvm-readobj/ELF/sframe-fde.test
M llvm/test/tools/llvm-readobj/ELF/sframe-header.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[Object] Parsing and dumping of SFrame FDEs (#149828)
Also known as Function Description Entries. The entries occupy a
contiguous piece of the section, so the code is mostly straight-forward.
For more information about the SFrame unwind format, see the
[specification](https://sourceware.org/binutils/wiki/sframe) and the
related [RFC](https://discourse.llvm.org/t/rfc-adding-sframe-support-to-llvm/86900).
Commit: c5327b935b15548792cfce48a79e5f639b20b9d2
https://github.com/llvm/llvm-project/commit/c5327b935b15548792cfce48a79e5f639b20b9d2
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[ConstantFolding] Fix typo in GetNVVMDenormMode (#151297)
Fix typo in function name of GetNVVMDenormMode
(Denrom vs Denorm).
Commit: 2ec91a5ec41c93e79a16ddca02de14b07d593c2c
https://github.com/llvm/llvm-project/commit/2ec91a5ec41c93e79a16ddca02de14b07d593c2c
Author: David Green <david.green at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-isel-csinc-type.ll
M llvm/test/CodeGen/AArch64/add-extract.ll
M llvm/test/CodeGen/AArch64/addsub.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
M llvm/test/CodeGen/AArch64/logical_shifted_reg.ll
M llvm/test/CodeGen/AArch64/neg-abs.ll
M llvm/test/CodeGen/AArch64/neg-selects.ll
M llvm/test/CodeGen/AArch64/neon-dot-product.ll
M llvm/test/CodeGen/AArch64/reassocmls.ll
Log Message:
-----------
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
This is essentially from performAddSubCombine. addsub.ll has been cleaned up a
little in the process.
Commit: 62744f368166f223740e5f6105aeb11ea854728d
https://github.com/llvm/llvm-project/commit/62744f368166f223740e5f6105aeb11ea854728d
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/test/CodeGen/AArch64/neon-scalar-copy.c
M clang/test/CodeGen/AArch64/neon-vget.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[AArch64][NEON] NEON intrinsic compilation error with -fno-lax-vector-conversion flag fix (#149329)
Issue originally raised in
https://github.com/llvm/llvm-project/issues/71362#issuecomment-3028515618.
Certain NEON intrinsics that operate on poly types (e.g. poly8x8_t)
failed to compile with the -fno-lax-vector-conversions flag. This patch
updates NeonEmitter.cpp to insert an explicit __builtin_bit_cast from
poly types to the required signed integer vector types when generating
lane-related intrinsics. A test 'neon-bitcast-poly.ll' is included.
Commit: 497d17737518d417f6411d46aef1334f642ccd81
https://github.com/llvm/llvm-project/commit/497d17737518d417f6411d46aef1334f642ccd81
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M bolt/lib/Core/Relocation.cpp
Log Message:
-----------
[BOLT] Allow to compile with MSVC (#151189)
This change is necessary to build BOLT with MSVC on Windows.
Commit: dba558b474199142b8b2c88e9e4110ab1b8cf8e3
https://github.com/llvm/llvm-project/commit/dba558b474199142b8b2c88e9e4110ab1b8cf8e3
Author: Jakub Chlanda <jakub at codeplay.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A clang/include/clang/Driver/CudaInstallationDetector.h
A clang/include/clang/Driver/LazyDetector.h
A clang/include/clang/Driver/RocmInstallationDetector.h
A clang/include/clang/Driver/SyclInstallationDetector.h
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.h
R clang/lib/Driver/ToolChains/LazyDetector.h
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.h
R clang/lib/Driver/ToolChains/ROCm.h
M clang/lib/Driver/ToolChains/SYCL.h
Log Message:
-----------
[Clang][Driver] Installation detectors in user facing include dir (#151114)
This patch moves `LazyDetector` and target specific (Cuda, Hip, SYCL)
installation detectors to clang's include directory. It was problematic
for downstream to use headers from clang's lib dir. The use of lib
headers could lead to subtle errors, as some of the symbols there are
annotated with `LLVM_LIBRARY_VISIBILITY`. For instance
[`ROCMToolChain::getCommonDeviceLibNames`](https://github.com/jchlanda/llvm-project/blob/jakub/installation_detectors/clang/lib/Driver/ToolChains/AMDGPU.h#L147)
is c++ public, but because of the annotation it ends up as ELF hidden
symbol, which causes errors when accessed from another shared library.
Commit: 4687a7647f86f852e6a4e600aa2ec6dc4b0871ac
https://github.com/llvm/llvm-project/commit/4687a7647f86f852e6a4e600aa2ec6dc4b0871ac
Author: David Green <david.green at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/neon-dot-product.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower udot/sdot intrinsics to G_UDOT/G_SDOT
This allows them to be selected using the same pathways as normal lowering.
USDOT is not handled yet as we do not yet have a node for it.
Commit: 16d5db71b3c38f21aa17783a8758f947dca5883f
https://github.com/llvm/llvm-project/commit/16d5db71b3c38f21aa17783a8758f947dca5883f
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags-std.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/and_then.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/or_else.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/value.observers.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/and_then.mandates.verify.cpp
M libcxx/test/std/containers/sequences/array/array.creation/to_array.verify.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/conversion.verify.cpp
M libcxx/test/std/utilities/function.objects/func.bind.partial/bind_back.verify.cpp
M libcxx/test/std/utilities/function.objects/func.bind_front/bind_front.verify.cpp
Log Message:
-----------
Revert "[libc++][Clang] Added explanation why is_constructible evaluated to false. Updated the diagnostics checks in libc++ tests. (#144220)"
This reverts commit e476f968bc8e438a0435d10934f148de570db8eb.
It has introduced a failure tracked by https://github.com/llvm/llvm-project/issues/150601
One libcxx test fail if libcxx is build with no exceptions and no RTTI:
- libcxx/utilities/expected/expected.expected/value.observers.verify.cpp
Commit: ece7a72aa28975e5ed71cecabf15c9b138b1f277
https://github.com/llvm/llvm-project/commit/ece7a72aa28975e5ed71cecabf15c9b138b1f277
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
Log Message:
-----------
[LoongArch] Optimize insertelement containing variable index using compare+select (#151131)
Commit: 984ec022360805c308c105dccb594be218d57243
https://github.com/llvm/llvm-project/commit/984ec022360805c308c105dccb594be218d57243
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
Log Message:
-----------
[Clang] Replace include with forward declaration (NFC) (#151292)
After https://github.com/llvm/llvm-project/pull/142541.
Commit: 13f38c97d597f3b07fb674d9b8c2b1db2bc0724f
https://github.com/llvm/llvm-project/commit/13f38c97d597f3b07fb674d9b8c2b1db2bc0724f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/combine-and-like.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/combine-add-ssat.ll
M llvm/test/CodeGen/X86/combine-add-usat.ll
M llvm/test/CodeGen/X86/combine-sub-ssat.ll
M llvm/test/CodeGen/X86/combine-sub-usat.ll
M llvm/test/CodeGen/X86/load-combine.ll
M llvm/test/CodeGen/X86/pr33960.ll
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
A llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
A llvm/unittests/CodeGen/SelectionDAGTestBase.h
Log Message:
-----------
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
The "at construction" binop folds in SelectionDAG::getNode() has
different behaviour when compared to the equivalent LLVM IR. This PR
makes the behaviour consistent while also extending the coverage to
include signed/unsigned max/min operations.
Commit: 10d7352c7a9997f0d39d0ee26a786b08f904b5d6
https://github.com/llvm/llvm-project/commit/10d7352c7a9997f0d39d0ee26a786b08f904b5d6
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/Utility/AuxVector.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.h
Log Message:
-----------
[lldb][FreeBSD] Add Auxv numbers for HWCAP3 and HWCAP4 (#151152)
These entries serve the same purpose as the Linux HWCAPs but have been
assigned different numbers as FreeBSD had already used the Linux ones.
The numbers were assigned in:
https://github.com/freebsd/freebsd-src/commit/85007872d1227006adf2ce119fe30de856cbe12d
In theory we can read these for the purposes of register field
detection, even on earlier versions of FreeBSD. As the aux data is a
key-value structure, we simply won't find the new numbers on older
systems.
However, FreeBSD has not defined any feature bits for HWACP3 and 4. It
is likley that they will match the Linux feature bits, but I have no
proof of that yet.
For instance, FEAT_MTE_STORE_ONLY is indicated by a HWCAP3 feature bit
on Linux. FreeBSD does not support this feature at all yet.
So for now, these values exist for future use and are not used for
register field detection on FreeBSD.
Commit: 4a8ce6b704c32715bc16d6c33b8b0d91d2ab3ed1
https://github.com/llvm/llvm-project/commit/4a8ce6b704c32715bc16d6c33b8b0d91d2ab3ed1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] Port 13f38c97d597
Commit: 20293ebd3159b3964c4466e6ee04d3e9b721eac0
https://github.com/llvm/llvm-project/commit/20293ebd3159b3964c4466e6ee04d3e9b721eac0
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
Log Message:
-----------
[LLVM][CodeGen][SME] Only emit strided loads in streaming mode. (#150445)
The selection code for aarch64_sve_ld[nt]1_pn_x{2,4} intrinsics gates
the use of strided load instructions behind the SME2 target feature.
However, the instructions are only available in streaming mode.
Commit: 8a09adc22adb18387e7c40db076af32b394db288
https://github.com/llvm/llvm-project/commit/8a09adc22adb18387e7c40db076af32b394db288
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/loadstore-alignment.ll
M llvm/test/Transforms/InstCombine/pr58901.ll
M llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll
M llvm/test/Transforms/InstCombine/sub.ll
Log Message:
-----------
[InstCombine] Split GEPs with multiple variable indices (#137297)
Split GEPs that have more than one variable index into two. This is in
preparation for the ptradd migration, which will not support multi-index
GEPs.
This also enables the split off part to be CSEd and LICMed.
Commit: ef6eaa045aaa20c8c01d35c02b6200b3be5d5bb4
https://github.com/llvm/llvm-project/commit/ef6eaa045aaa20c8c01d35c02b6200b3be5d5bb4
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vacopy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AArch64/arm64-this-return.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
M llvm/utils/update_mir_test_checks.py
Log Message:
-----------
[GISel] Introduce MIFlags::InBounds (#150900)
This flag applies to G_PTR_ADD instructions and indicates that the operation
implements an inbounds getelementptr operation, i.e., the pointer operand is in
bounds wrt. the allocated object it is based on, and the arithmetic does not
change that.
It is set when the IRTranslator lowers inbounds GEPs (currently only in some
cases, to be extended with a future PR), and in the
(build|materialize)ObjectPtrOffset functions.
Inbounds information is useful in ISel when we have instructions that perform
address computations whose intermediate steps must be in the same memory region
as the final result. A follow-up patch will start using it for AMDGPU's flat
memory instructions, where the immediate offset must not affect the memory
aperture of the address.
This is analogous to a concurrent effort in SDAG: #131862
(related: #140017, #141725).
For SWDEV-516125.
Commit: cf9be978a099e041129202f1a739666ed5ae648b
https://github.com/llvm/llvm-project/commit/cf9be978a099e041129202f1a739666ed5ae648b
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
Log Message:
-----------
[NFC][analyzer] Clean bug type use in BasicObjCFoundationChecks (#151141)
This commit eliminates some corrupted variants of the once-widespread
`mutable std::unique_ptr<BugType>` antipattern from the checker file
`BasicObjCFoundationChecks.cpp`.
Previous purges probably missed these because there are slight mutations
(e.g. using a subclass of `BugType` instead of `BugType`) and therefore
some natural search terms (e.g. `make_unique<BugType>`) didn't produce
matches in this file.
Commit: ffcee267f1633d22d83ef4b4ebfb70ca00c7cd14
https://github.com/llvm/llvm-project/commit/ffcee267f1633d22d83ef4b4ebfb70ca00c7cd14
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/LLVMIRToNVVMTranslation.cpp
Log Message:
-----------
[MLIR] Avoid #include OMPIRBuilder.h (#151302)
`#include "llvm/Frontend/OpenMP/OMPIRBuilder.h"` can be replaced with
forward-declarations of `OpenMPIRBuilder` and `CanonicalLoopInfo`. This
also avoids a dependency to `omp_gen` of the LLVMFrontendOpenMP
component which is included indirectly in `OMPIRBuilder.h`.
Since its inclusion in #147069, additional indirect dependencies on
headers included by `OMPIRBuilder.h` were introduced as well. These are
now included directly.
Reported-by: fabrizio-indirli
See
https://github.com/llvm/llvm-project/pull/147069#issuecomment-3114034973
Commit: 638383cb7110469d652c75a58b42afc80e863574
https://github.com/llvm/llvm-project/commit/638383cb7110469d652c75a58b42afc80e863574
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/is_fpclass.ll
Log Message:
-----------
[SPIRV] Support G_IS_FPCLASS (#148637)
This commit adds custom legalization for G_IS_FPCLASS, corresponding to
the @llvm.is.fpclass intrinsic.
The lowering strategy is essentially copied and adjusted from the
target-agnostic LegalizeHelper::lowerISFPCLASS legalization. The reason
we can't just use that directly is that the series of instruction it
expands to aren't logged in the SPIR-V backend's register/type
book-keeping, leading to issues later on in the compilation process.
As such the code introduced here was copied from the aforementioned
helper method, with some notable changes:
* Each new instruction's destination register must have a SPIR-V type
registered to it.
* Instead of a COPY from the floating-point type to integer, we issue a
SPIR-V OpBitcast directly. The backend doesn't currently appear to
handle bitcast-like COPYs.
Fixes #72862
Commit: 0d8abc2188f8a8c48dd40a9d0ad2fb0945611b44
https://github.com/llvm/llvm-project/commit/0d8abc2188f8a8c48dd40a9d0ad2fb0945611b44
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
Log Message:
-----------
[MLIR] Migrate NVVM to the new LDBG debug macro (NFC) (#151162)
Commit: 4fdf07fd46f250804bc1ce5f9193a3ed990e308b
https://github.com/llvm/llvm-project/commit/4fdf07fd46f250804bc1ce5f9193a3ed990e308b
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/midpoint-int.ll
Log Message:
-----------
[AArch64] Use CNEG for absolute difference patterns. (#151177)
The current code generated for absolute difference patterns
(a > b ? a - b : b - a) typically consists of sequences of:
```
sub w8, w1, w0
subs w9, w0, w1
csel w0, w9, w8, hi
```
The first sub is redundant if the csel is replaced by a cneg:
```
subs w8, w0, w1
cneg w0, w8, ls
```
This is achieved by canonicalising
```
select_cc lhs, rhs, sub(lhs, rhs), sub(rhs, lhs), cc ->
select_cc lhs, rhs, sub(lhs, rhs), neg(sub(lhs, rhs)), cc
select_cc lhs, rhs, sub(rhs, lhs), sub(lhs, rhs), cc ->
select_cc lhs, rhs, neg(sub(lhs, rhs)), sub(lhs, rhs), cc
```
as the second forms can already be matched.
This helps with some of the patterns in #118413.
Commit: 4562b557a68895f0f3f5f70875eff28a42cc0f17
https://github.com/llvm/llvm-project/commit/4562b557a68895f0f3f5f70875eff28a42cc0f17
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-dependent-options.hip
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[HIP] Handle `-fhip-emit-reloctable` in the new driver (#151237)
Summary:
Support for this was missing, here it pretty much overrides the normal
bundling behavior and also requires a few errors to be emitted.
Commit: b7bfbc0c4c7b20d6623a5b0b4a7fea8ae08a62da
https://github.com/llvm/llvm-project/commit/b7bfbc0c4c7b20d6623a5b0b4a7fea8ae08a62da
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M utils/bazel/llvm-project-overlay/mlir/test/mlir-tblgen/BUILD.bazel
Log Message:
-----------
Reland "[mlir][llvm] Add intrinsic arg and result attribute support (… (#151125)
…… (#151099)
This reverts commit 2780b8f22058b35a8e70045858b87a1966df8df3 to reland
59013d44058ef423a117f95092150e16e16fdb09.
In addition to the original commit this one includes:
- This includes a bazel fix
- Use `let methods` instead of `list<InterfaceMethod> methods`
The original commit message was:
This patch extends the LLVM dialect's intrinsic infra to support
argument and result attributes. Initial support is added for the memory
intrinsics llvm.intr.memcpy, llvm.intr.memmove, and llvm.intr.memset.
Additionally, an ArgAndResultAttrsOpInterface is factored out of
CallOpInterface and CallableOpInterface, enabling operations to have
argument and result attributes without requiring them to be a call or a
callable operation.
Commit: 5c87374f2a33015d39b4e2634c2949851e463602
https://github.com/llvm/llvm-project/commit/5c87374f2a33015d39b4e2634c2949851e463602
Author: Chaitanya Koparkar <ckoparkar at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/docs/DefiningDialects/AttributesAndTypes.md
Log Message:
-----------
[mlir][docs] Use APIntParameter instead of APInt in AttributesAndTypes.md (#151315)
Fixes #151314.
Commit: 97fa9a1f5332dd05883fb67b37ce42c3c9d667be
https://github.com/llvm/llvm-project/commit/97fa9a1f5332dd05883fb67b37ce42c3c9d667be
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M utils/bazel/llvm-project-overlay/mlir/test/mlir-tblgen/BUILD.bazel
Log Message:
-----------
Revert "Reland "[mlir][llvm] Add intrinsic arg and result attribute support (…" (#151316)
Reverts llvm/llvm-project#151125
Broke the gcc-7 build:
include/mlir/Target/LLVMIR/ModuleTranslation.h:318:34: error: no type
named 'CallBase' in namespace 'llvm'
llvm::CallBase *call,
~~~~~~^
Commit: 58d70dc62b219cd89ba434c96928a0d9c1b23a60
https://github.com/llvm/llvm-project/commit/58d70dc62b219cd89ba434c96928a0d9c1b23a60
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/selectopt-const.ll
A llvm/test/CodeGen/AArch64/store-float-conversion.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
Log Message:
-----------
[AArch64] Keep floating-point conversion in SIMD (#147707)
Stores can be issued faster if the result is kept in the SIMD/FP
registers.
The `HasOneUse` guards against creating two floating point conversions,
if for example there's some arithmetic done on the converted value as
well. Another approach would be to inspect the user instructions during
lowering, but I don't see that type of check in the lowering too often.
Commit: 1d6e68e63aa28783ad0de7d0b46238ce95849f2f
https://github.com/llvm/llvm-project/commit/1d6e68e63aa28783ad0de7d0b46238ce95849f2f
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp
Log Message:
-----------
[analyzer] Conversion to CheckerFamily: NSOrCFErrorDerefChecker (#151171)
This commit converts the class `NSOrCFErrorDerefChecker` to the checker
family framework and simplifies some parts of the implementation (e.g.
removes two very trivial subclasses of `BugType`).
This commit is almost NFC, the only technically "functional" change is
that it removes the hidden modeling checker `NSOrCFErrorDerefChecker`
which was only relevant as an implementation detail of the old checker
registration procedure.
Commit: eca29aa0f17152f9801e08d14e3d0da6702262b5
https://github.com/llvm/llvm-project/commit/eca29aa0f17152f9801e08d14e3d0da6702262b5
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[analyzer] Conversion to CheckerFamily: StackAddrEscapeChecker (#151136)
This commit converts the class StackAddrEscapeChecker to the checker
family framework and slightly simplifies the implementation.
This commit is almost NFC, the only technically "functional" change is
that it removes the hidden modeling checker `core.StackAddrEscapeBase`
which was only relevant as an implementation detail of the old checker
registration procedure.
Commit: 9164d206b33d61c93f5fc4628797485f96d654ca
https://github.com/llvm/llvm-project/commit/9164d206b33d61c93f5fc4628797485f96d654ca
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
Log Message:
-----------
[MLIR] Missing declaration build fix
The sanizer bots are reporting a missing declaration:
```
In file included from /home/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp:17:
In file included from /home/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h:26:
/home/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h:318:34: error: no type named 'CallBase' in namespace 'llvm'
318 | llvm::CallBase *call,
| ~~~~~~^
1 error generated.
```
https://lab.llvm.org/buildbot/#/builders/94/builds/9340
https://lab.llvm.org/buildbot/#/builders/24/builds/11029
https://lab.llvm.org/buildbot/#/builders/169/builds/13454
https://lab.llvm.org/buildbot/#/builders/25/builds/10250
PR #151302 removed some indirect header #includes which had to be
includes explicitly. I do not know why this particular error only occurs
with the sanitizer buildbots.
Fix by adding a forward declaration.
Commit: fbdf4ec2a56075e5632ba2104a0b0a3cee0ae747
https://github.com/llvm/llvm-project/commit/fbdf4ec2a56075e5632ba2104a0b0a3cee0ae747
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
Log Message:
-----------
[mlir][tosa] Fix invalid data type combinations check (#150066)
Previously this check assumed that if an operator exists in profile
complimance (TosaProfileComplianceData.h.inc), an entry exists in both
the profiles and extensions section. However, this is not necessarily
the case.
This commit changes the check such that it doesn't assume the above. In
doing so, it allows more operators to be checked for invalid data type
combinations, which were otherwise skipped previously.
Commit: 3e5f1a66bde9d6c55955da73dfd054394d377b7e
https://github.com/llvm/llvm-project/commit/3e5f1a66bde9d6c55955da73dfd054394d377b7e
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll
Log Message:
-----------
[InstCombine] Generate test checks (NFC)
Commit: 730d05b0ebb73ada1f86ebea32496737d796b13c
https://github.com/llvm/llvm-project/commit/730d05b0ebb73ada1f86ebea32496737d796b13c
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/Transforms/InstCombine/gepphigep.ll
Log Message:
-----------
[InstCombine] Avoid tmp var conflicts in test (NFC)
Commit: 807a82d40789a5e50174f979accca77c8b6841b5
https://github.com/llvm/llvm-project/commit/807a82d40789a5e50174f979accca77c8b6841b5
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/utils/TableGen/InstrInfoEmitter.cpp
Log Message:
-----------
[TableGen] Implement getNamedOperandIdx with another table lookup. NFC. (#151116)
Use direct table lookup instead of a switch over all opcodes.
In my Release+Asserts build this reduced the code size for
AMDGPU::getNamedOperandIdx from 11422 to 80 bytes, and the total size of
all its tables (including the jump table for the switch) from 243564 to
155020 bytes.
Commit: 635e6d76530328b8412fbf985708dad26e3f8ea5
https://github.com/llvm/llvm-project/commit/635e6d76530328b8412fbf985708dad26e3f8ea5
Author: Aethezz <64500703+Aethezz at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
M clang/test/Analysis/placement-new.cpp
Log Message:
-----------
[analyzer] Fix FP for cplusplus.placement new #149240 (#150161)
Fix false positive where warnings were asserted for placement new even
when no additional space is requested
The PlacementNewChecker incorrectly triggered warnings when the storage
provided matched or exceeded the allocated type size, causing false
positives. Now the warning triggers only when the provided storage is
strictly less than the required size.
Add test cases covering exact size, undersize, and oversize scenarios to
validate the fix.
Fixes #149240
Commit: 36961202fbf45968cc273fa78fe3479409f5a9c7
https://github.com/llvm/llvm-project/commit/36961202fbf45968cc273fa78fe3479409f5a9c7
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A llvm/test/Transforms/InstCombine/vectorgep-crash.ll
R llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
Log Message:
-----------
[InstSimplify] Regenerate test checks (NFC)
Change the function name so that UTC works properly. Also move the
test into the InstCombine directory, as that's the pass that's
actually being tested.
Commit: deced287ad1da9a61302e12e0406f8be36f3831b
https://github.com/llvm/llvm-project/commit/deced287ad1da9a61302e12e0406f8be36f3831b
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
Reapply "[mlir][llvm] Add intrinsic arg and result attribute support … (#151324)
…(… (#151099)
This reverts commit 2780b8f22058b35a8e70045858b87a1966df8df3 and relands
b7bfbc0c4c7b20d6623a5b0b4a7fea8ae08a62da.
Adds the following fixes compared to the original PR
(https://github.com/llvm/llvm-project/pull/150783):
- A bazel fix
- Use `let methods` instead of `list<InterfaceMethod> methods`
The missing forward declaration has been added in meantime:
https://github.com/llvm/llvm-project/commit/9164d206b33d61c93f5fc4628797485f96d654ca.
Commit: fcbbcffd2e6ea30097809ba0cd1e3b6003fa862f
https://github.com/llvm/llvm-project/commit/fcbbcffd2e6ea30097809ba0cd1e3b6003fa862f
Author: Martin Storsjö <martin at martin.st>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/ObjCopy/COFF/COFFReader.cpp
A llvm/test/tools/llvm-objcopy/COFF/exe-bogus-assoc.test
Log Message:
-----------
[llvm-objcopy] [COFF] Ignore associative sections in executables (#151143)
COFF associative sections is a feature where relocatable object files
can have section snippets marked as related to another section snippet,
so they are kept or discarded in relation to that other section snippet.
When llvm-objcopy removes sections, it also removes sections that are
marked as associative to the removed section (as the associative
sections otherwise would end up orphaned).
In a linked executable module (EXE or DLL), section associativity is
meaningless - thus, we should ignore those fields from the input.
After linking, GNU ld keeps the SectionDefinition auxillary part of
symbols intact as it was in the source object file, which means that it
references section numbers in the source object files.
This fixes https://github.com/llvm/llvm-project/issues/53433.
Commit: 330b40e11fd20e9a29b9c24de17e4ba23afeedc6
https://github.com/llvm/llvm-project/commit/330b40e11fd20e9a29b9c24de17e4ba23afeedc6
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/SemaCXX/noreturn-weverything.c
Log Message:
-----------
[Analysis] Prevent revisiting block when searching for noreturn vars (#150582)
When searching for noreturn variable initializations, do not visit CFG
blocks that are already visited, it prevents hanging the analysis.
It must fix https://github.com/llvm/llvm-project/issues/150336.
Commit: 17c1921b4a78b2ab3f455278c2a057d164863866
https://github.com/llvm/llvm-project/commit/17c1921b4a78b2ab3f455278c2a057d164863866
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/struct.mlir
M mlir/test/Target/SPIRV/undef.mlir
Log Message:
-----------
[mlir][spirv] Add support for structs decorations (#149793)
An alternative implementation could use `ArrayRef` of `NamedAttribute`s
or `NamedAttrList` to store structs decorations, as the deserializer
uses `NamedAttribute`s for decorations. However, using a custom struct
allows us to store the `spirv::Decoration`s directly rather than its
name in a `StringRef`/`StringAttr`.
Commit: bae8f1336db6a7f3288a7dcf253f2d484743b257
https://github.com/llvm/llvm-project/commit/bae8f1336db6a7f3288a7dcf253f2d484743b257
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
A llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
M llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
A llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
A llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
A llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
A llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
Log Message:
-----------
Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)
This tries to reland #123632 (previously reverted by commit
6b1db79887df19bc8e8c946108966aa6021c8b87)
This PR aims to fix coalescing of SUBREG_TO_REG when sub-register
liveness tracking is enabled and this is now the so-manieth
reincarnation of this effort :)
This change is needed in order to enable subreg liveness tracking for
AArch64, because without the implicit-def, Machine Copy Propagation
would remove a 'redundant' copy because it doesn't realise that the
top 32-bits of the register are zeroed, which subsequent instructions
rely on.
Changes compared to previous PR:
* Rather than updating all instructions that define the source register
(SrcReg) of the SUBREG_TO_REG, this new approach only updates
instructions
that define SrcReg when they dominate the SUBREG_TO_REG. The live-ranges
are updated accordingly.
Commit: 3d4f1fee48689465b5026f75414247307db7d34d
https://github.com/llvm/llvm-project/commit/3d4f1fee48689465b5026f75414247307db7d34d
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
Log Message:
-----------
[mlir][spirv] Fix UpdateVCEPass to deduce the correct set of capabilities (#151108)
When deducing capabilities implied capabilities are not considered,
which causes generation of incorrect SPIR-V modules. This commit fixes
that by pulling in the capability set for all the implied ones.
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: b47d9d033acd26e492bef9429ee9bce640be0901
https://github.com/llvm/llvm-project/commit/b47d9d033acd26e492bef9429ee9bce640be0901
Author: Steve Merritt <steve.merritt at intel.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/CodeGenCXX/debug-info-gline-tables-only.cpp
Log Message:
-----------
[clang][DebugInfo] Don't emit VTable debug symbols for -gline-tables-only. (#151025)
The -gline-tables-only option emits minimal debug info for functions,
files and line numbers while omitting variables, parameters and most
type information. VTable debug symbols are emitted to facilitate a
debugger's ability to perform automatic type promotion on variables and
parameters. With variables and parameters being omitted, the VTable
symbols are unnecessary.
Commit: 3c62303ac3bfa115681509759a959b2f618d0266
https://github.com/llvm/llvm-project/commit/3c62303ac3bfa115681509759a959b2f618d0266
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode] Clean up {Compiler,Interp}.h (#151335)
Remove else after return and remove some unused includes.
Commit: 74e4a8645da91247dc8dc502771c2cc4d46f1f91
https://github.com/llvm/llvm-project/commit/74e4a8645da91247dc8dc502771c2cc4d46f1f91
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/linker-wrapper-libs.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/lto-dwo.c
M clang/test/Driver/opt-record.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[LinkerWrapper] Fix -fsave-optimization-record default file (#149003)
As discussed in PR #145603, the following command seems to fail to
produce a YAML remarks file for offload LTO passes and thus for
kernel-info:
```
clang -O2 -g -fopenmp --offload-arch=native test.c -foffload-lto \
-Rpass=kernel-info -fsave-optimization-record
```
The problem is that, in clang-linker-wrapper's clang call, clang names
the file based on clang's main output file (from `-o`). That is a
temporary file, so the YAML file becomes a temporary file, which the
user never sees.
This patch:
- Makes clang honor `-dumpdir` for the default YAML remarks file in the
case of LTO.
- Extends clang-linker-wrapper to specify that option to clang.
To demonstrate the appeal of the generality of `-dumpdir` (as opposed to
a one-off `-fsave-optimization-record` solution in
clang-linker-wrapper), this patch also fixes `-gsplit-dwarf`. Without
this patch, when using `-gsplit-dwarf` and later debugging using rocgdb,
the dwo directory for offload is a temporary file, so temporary file
cleanup causes rocgdb to lose debug symbols for offload code.
WARNING: The clang driver passes `-dumpdir` to various clang frontend
calls. For LTO, that was previously being ignored, and now it's not.
That changes some auxiliary file names, as revealed by changes in some
existing tests' expected output: `clang/test/Driver/opt-record.c` and
`clang/test/Driver/lto-dwo.c`. Hopefully this change does not introduce
a backward compatibility issue for users.
Commit: b90e1e186b303b4a551c0fd7722be8f5f4ddbfcf
https://github.com/llvm/llvm-project/commit/b90e1e186b303b4a551c0fd7722be8f5f4ddbfcf
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
Log Message:
-----------
[AST] Remove an unnecessary cast (NFC) (#151278)
getSignificantBits() already returns unsigned.
Commit: c6a376371d1fa1a00a0f7e41a271c0688c1e15f2
https://github.com/llvm/llvm-project/commit/c6a376371d1fa1a00a0f7e41a271c0688c1e15f2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Remove an unnecessary cast (NFC) (#151279)
value() already returns uint64_t.
Commit: 5672a8723f98ac531644ae3f8fe182d11d781cb1
https://github.com/llvm/llvm-project/commit/5672a8723f98ac531644ae3f8fe182d11d781cb1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/ModuloSchedule.cpp
Log Message:
-----------
[CodeGen] Remove an unnecessary cast (NFC) (#151280)
LoopValStage is already of int.
Commit: 5191cf090d3854656a183879770c4f046334af22
https://github.com/llvm/llvm-project/commit/5191cf090d3854656a183879770c4f046334af22
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/docs/TableGen/BackGuide.rst
Log Message:
-----------
[llvm] Proofread BackGuide.rst (#151281)
Commit: 2920c4332482af47441bf51fd3eee74ac3200bfd
https://github.com/llvm/llvm-project/commit/2920c4332482af47441bf51fd3eee74ac3200bfd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicInst.h
Log Message:
-----------
[IR] Remove getDestAlignment and getSourceAlignment (#151282)
This patch removes getDestAlignment and getSourceAlignment as they
have been deprecated for more than two years since:
commit 135f23d67bf5397745be1897afd0a3a50119089f
Author: Guillaume Chatelet <gchatelet at google.com>
Date: Mon Jan 16 12:34:40 2023 +0000
I'm not aware of any downstream users AFAIK.
Commit: 5327eeb0bf4eed084b1761cd1b14f3f335383e95
https://github.com/llvm/llvm-project/commit/5327eeb0bf4eed084b1761cd1b14f3f335383e95
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/source/Interpreter/ScriptInterpreter.cpp
Log Message:
-----------
[lldb] Remove a redundant call to std::unique_ptr<T>::get (NFC) (#151283)
Commit: 8f9b01884d78553292e7e8fe87a58fbe419643e1
https://github.com/llvm/llvm-project/commit/8f9b01884d78553292e7e8fe87a58fbe419643e1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[Coroutines] Remove a redundant call to std::unique_ptr<T>::get (NFC) (#151284)
Commit: 83d3770d73fa6bd0b04228611b979bfa006a7b93
https://github.com/llvm/llvm-project/commit/83d3770d73fa6bd0b04228611b979bfa006a7b93
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Sema/Sema.cpp
A clang/test/Sema/aarch64-sme-attrs-without-sve.cpp
Log Message:
-----------
[Clang][AArch64] Remove unwarranted 'cannot be used in non-streaming mode' diagnostic. (#150592)
Previously Clang would give an unwarranted error on the capture of '&a'
in the function below, even though the parent function and the lambda
are both `__arm_streaming` functions, when the target is compiled with
+sme only.
```
void test_both_streaming(int32_t *out) __arm_streaming {
svint32_t a;
[&a, &out]() __arm_streaming {
^
error: SVE vector type 'svint32_t' (aka '__SVInt32_t') cannot be used in a non-streaming function
a = svdup_s32(1);
svst1(svptrue_b32(), out, a);
}();
}
```
That seems to happen because when `checkTypeSupport` is called the
`FunctionDecl` context of the lambda isn't yet complete and
`FD->getType()` returns a Null `QualTy`.
This is loosely related to #94976 which removed a `FD->hasBody()` check
in the same place, because `hasBody()` may incorrectly return `false`
when Clang is still processing a function.
Commit: 55cdbda58de554e3ecedfeef5cabe926311ae947
https://github.com/llvm/llvm-project/commit/55cdbda58de554e3ecedfeef5cabe926311ae947
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/test/mlir-tblgen/BUILD.bazel
Log Message:
-----------
[bazel] Port #151324 (#151345)
This was included in #151125 but somehow lost in the second time the
patch was re-applied
Commit: 56c93a47acfd0391da0ca8b9eb27c1568d37d051
https://github.com/llvm/llvm-project/commit/56c93a47acfd0391da0ca8b9eb27c1568d37d051
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/test/Sema/aarch64-sme-attrs-without-sve.cpp
Log Message:
-----------
[Clang] NFC: Add missing REQUIRES to aarch64-sme-attrs-without-sve.cpp
Test was missing `REQUIRES: aarch64-registered-target`.
Commit: 8070e9b63ccc170b04adfbbd61a372c1401adf76
https://github.com/llvm/llvm-project/commit/8070e9b63ccc170b04adfbbd61a372c1401adf76
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Refactor xegpu-wg-to-sg tests (#149204)
This PR refactors the xegpu-wg-to-sg.mlir tests to use larger shapes
which resemble closer to workgroup level programming.
Commit: 254bfe23e3174d5695f4e35212ff352082f05ae4
https://github.com/llvm/llvm-project/commit/254bfe23e3174d5695f4e35212ff352082f05ae4
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/AST/Decl.cpp
Log Message:
-----------
[Clang][AArch64] Expect valid FunctionDecl in IsArmStreamingFunction
This follows from a conversation on #150592 where we decided to
split out this change and commit it separately.
The rationale is that FunctionDecl must be sufficiently parsed/created
in order to tell whether it is a streaming function.
Commit: 56944e606a1ba24e71fc89fad1eabb97e8240d65
https://github.com/llvm/llvm-project/commit/56944e606a1ba24e71fc89fad1eabb97e8240d65
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-gfni-intrinsics.ll
Log Message:
-----------
[msan] Approximately handle AVX Galois Field Affine Transformation (#150794)
e.g.,
<16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8>, <16 x i8>, i8)
<32 x i8> @llvm.x86.vgf2p8affineqb.256(<32 x i8>, <32 x i8>, i8)
<64 x i8> @llvm.x86.vgf2p8affineqb.512(<64 x i8>, <64 x i8>, i8)
Out A x b
where A and x are packed matrices, b is a vector, Out = A * x + b in
GF(2)
Multiplication in GF(2) is equivalent to bitwise AND. However, the
matrix computation also includes a parity calculation.
For the bitwise AND of bits V1 and V2, the exact shadow is:
Out_Shadow = (V1_Shadow & V2_Shadow) | (V1 & V2_Shadow) | (V1_Shadow &
V2)
We approximate the shadow of gf2p8affine using:
Out_Shadow = _mm512_gf2p8affine_epi64_epi8(x_Shadow, A_shadow, 0)
| _mm512_gf2p8affine_epi64_epi8(x, A_shadow, 0)
| _mm512_gf2p8affine_epi64_epi8(x_Shadow, A, 0)
| _mm512_set1_epi8(b_Shadow)
This approximation has false negatives: if an intermediate dot-product
contains an even number of 1's, the parity is 0.
It has no false positives.
Updates the test from https://github.com/llvm/llvm-project/pull/149258
Commit: 8a503378c9eb40bbcfe6fd8b6fe3c2f8f7e0ba3d
https://github.com/llvm/llvm-project/commit/8a503378c9eb40bbcfe6fd8b6fe3c2f8f7e0ba3d
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
Log Message:
-----------
[NFC][analyzer] Conversion to CheckerFamily: CStringChecker (#150971)
This commit converts the class CStringChecker to the checker family
framework and slightly simplifies the implementation.
This commit is NFC and preserves the confused garbage descriptions and
categories of the bug types (which was inherited from old mistakes). I'm
planning to clean that up in a follow-up commit.
Commit: 062b22e46238be9a542755a9021486b651731908
https://github.com/llvm/llvm-project/commit/062b22e46238be9a542755a9021486b651731908
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Semantics/OpenACC/acc-atomic-validity.f90
Log Message:
-----------
[flang][openacc] Add semantic checks for atomic constructs (#149579)
An error report of the following code generating non-atomic code led us
to realize there are missing checks in the OpenACC atomics code. Add
some of those checks for atomic and sketch how the rest of the code
should proceed in checking the rest of the properties. The following
cases are all reported as errors.
```fortran
! Originally reported error!
!$acc atomic capture
a = b
c = b
!$acc end atomic capture
! Other ambiguous, but related errors!
!$acc atomic capture
x = i
i = x
!$acc end atomic capture
!$acc atomic capture
a = b
b = b
!$acc end atomic capture
!$acc atomic capture
a = b
a = c
!$acc end atomic capture
```
Commit: 88c23ada9a037bca94927796b4cefab54d11a7d1
https://github.com/llvm/llvm-project/commit/88c23ada9a037bca94927796b4cefab54d11a7d1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/long-object-path.cpp
M compiler-rt/test/fuzzer/afl-driver-stderr.test
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
Log Message:
-----------
Reapply "[compiler-rt] Remove %T from tests (#151265)"
This reverts commit 3c3523c15850f3c42de35ae725288368414e4e91.
Keeping the directory structure the same as before fixes the failures.
They trivially reproduced locally and only passed before because I was
not cleaning up the temp test directory in between invocations.
Commit: eb9e526af050611ceafa6a53b73d72a7d3ea065c
https://github.com/llvm/llvm-project/commit/eb9e526af050611ceafa6a53b73d72a7d3ea065c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
Log Message:
-----------
[lldb] Pick the builder for the target platform (#151262)
Pick the builder for the target platform, not the host platform. This is
necessary when running the test suite remotely on a different platform.
Unlike for Darwin, both Windows and Linux us the default builder, which
is why this went unnoticed on the remote-linux bots.
Commit: 66b34bc943644c7e20f5c5c22a706a091dd9b053
https://github.com/llvm/llvm-project/commit/66b34bc943644c7e20f5c5c22a706a091dd9b053
Author: UmeshKalappa <103930015+ukalappa-mips at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/CodeGen/RISCV/xmips-cbop.ll
Log Message:
-----------
[RISCV] Handled the uimm9 offset while FrameIndex folding. (#149303)
Reverted the https://github.com/llvm/llvm-project/pull/148779 changes
and
- handled the uimm9 offset in eliminateFrameIndex ()
- updated the testcase.
Commit: 2672719a09cf9fd279e66cd3582b7cc8331c0b31
https://github.com/llvm/llvm-project/commit/2672719a09cf9fd279e66cd3582b7cc8331c0b31
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Don't handle non-canonical index type in icmp of load fold (#151346)
We should just bail out and wait for it to be canonicalized. The current
implementation could emit a trunc without actually performing the
transform.
Commit: fec2c434ca86c3dfcde095673858fc53deb73ab7
https://github.com/llvm/llvm-project/commit/fec2c434ca86c3dfcde095673858fc53deb73ab7
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
Log Message:
-----------
[MLIR] Migrate InlinerInterfaceImpl to the new LDBG() debug form (NFC) (#150853)
Commit: 385fe30ee0e4fc798f25b31dd8c6fd5e1f4081d1
https://github.com/llvm/llvm-project/commit/385fe30ee0e4fc798f25b31dd8c6fd5e1f4081d1
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/strcmp-3.ll
M llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
M llvm/test/Transforms/InstCombine/vectorgep-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
Log Message:
-----------
[InstCombine] Strip trailing zero GEP indices (#151338)
Zero indices at the end do not change the GEP offset and can be removed.
(Doing the same at the start requires adjusting the source element
type.)
Commit: e8e9bef32bc89ed1d0937ae87976269855d2fa71
https://github.com/llvm/llvm-project/commit/e8e9bef32bc89ed1d0937ae87976269855d2fa71
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/IR/AsmPrinter.cpp
Log Message:
-----------
[MLIR] Use LDBG in MLIR AsmPrinter (#151163)
Commit: 42e0d302686657cc381dc49033f68daa0f09b046
https://github.com/llvm/llvm-project/commit/42e0d302686657cc381dc49033f68daa0f09b046
Author: Justin Fargnoli <jfargnoli at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
A llvm/test/CodeGen/NVPTX/combine-wide.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/vector-loads.ll
Log Message:
-----------
[NVPTX] Enhance `mul.wide` and `mad.wide` peepholes (#150477)
Implements `(sign_extend|zero_extend (mul|shl) x, y) -> (mul.wide x, y)`
as a DAG combine.
Implements `(add (mul.wide a, b), c) -> (mad.wide a, b, c)` in
instruction selection.
Commit: 75e5a705771315bc40d2188675d08cb2c71f6933
https://github.com/llvm/llvm-project/commit/75e5a705771315bc40d2188675d08cb2c71f6933
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
Log Message:
-----------
[MLIR] Migrate some conversion passes and dialects to LDBG() macro (NFC) (#151349)
Commit: 58e6bc87b7af81a87376f389cd6a107105ba4dcd
https://github.com/llvm/llvm-project/commit/58e6bc87b7af81a87376f389cd6a107105ba4dcd
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Target.cpp
Log Message:
-----------
[ELF] Add a dummySym member to Ctx
This ensures subsequent calls to elf::postScanRelocations with a new Ctx
will correctly use an instance with the right internalFile (with the old
one presumably deleted, even). It also avoids having to create a new
instance in elf::getErrorPlace, and will allow more uses of such a dummy
symbol in future commits.
Reviewers: MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/150796
Commit: 0d81d3c59a9f10cb4b7a1f6086ae42b7f59ad6d3
https://github.com/llvm/llvm-project/commit/0d81d3c59a9f10cb4b7a1f6086ae42b7f59ad6d3
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFCI][ELF] Introduce explicit Computed state for DynamicReloc
Currently we set the kind to AddendOnly in computeRaw() in order to
catch cases where we're not treating the DynamicReloc as computed.
Specifically, computeAddend() will then assert that sym is nullptr, so
can catch any subsequent calls for relocations that have sym set.
However, if the DynamicReloc was already AddendOnly (or
MipsMultiGotPage), we will silently allow this, which does work
correctly, but is not the intended use. We also cannot catch cases where
needsDynSymIndex() is called after this point, which would give a
misleading value if the kind were previously against a symbol.
By introducing a new (internal) Computed kind we can be explicit and add
more rigorous assertions, rather than abusing AddendOnly.
Reviewers: arichardson, MaskRay
Reviewed By: arichardson, MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/150799
Commit: e027b9258ac8779e45363a13eeb0dc00c19f689e
https://github.com/llvm/llvm-project/commit/e027b9258ac8779e45363a13eeb0dc00c19f689e
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[NFCI][ELF] Merge AddendOnly and AddendOnlyWithTargetVA
The former is just a special case of the latter, ignoring the expr and
always just using the addend, allowing (and enforcing) the sym is null.
If we just use dummySym then we don't need to maintain this as a
separate case, since R_ADDEND will return the addend unmodified for the
call to getRelocTargetVA.
Reviewers: MaskRay, arichardson
Reviewed By: MaskRay, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/150797
Commit: 4f39139df31bd908ce0253aa8078f509aa0327d0
https://github.com/llvm/llvm-project/commit/4f39139df31bd908ce0253aa8078f509aa0327d0
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A llvm/test/tools/llvm-mc/disassembler-profile.test
M llvm/tools/llvm-mc/Disassembler.cpp
M llvm/tools/llvm-mc/Disassembler.h
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
[llvm-mc] Add --runs option for benchmarking (#151149)
Add support for measuring decode times in llvm-mc tool. Add command line
options to enable time-trace profiling (similar to llc or opt) and add
option `runs` to run the decoder several times on each instruction.
Commit: 54df4b8c35b6f53d3df418c58a0c920c6132e0f7
https://github.com/llvm/llvm-project/commit/54df4b8c35b6f53d3df418c58a0c920c6132e0f7
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFCI][ELF] Merge AgainstSymbol and AgainstSymbolWithTargetVA
The former is just a special case of the latter, ignoring the expr and
always just using the addend. If we use R_ADDEND as expr (which
previously had no effect, and so was misleadingly R_ABS not R_ADDEND in
all but one use) then we don't need to maintain this as a separate case.
Aside from the internal Computed Kind, this just leaves MipsMultiGotPage
as a special case; the only difference between the other two Kind values
is what needsDynSymIndex returns.
Reviewers: MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/150798
Commit: 06d5e87e659a19e7acfa6d7ff6545fb2361ff012
https://github.com/llvm/llvm-project/commit/06d5e87e659a19e7acfa6d7ff6545fb2361ff012
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Arch/Mips.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
Log Message:
-----------
[NFCI][ELF][Mips] Replace MipsMultiGotPage with new RE_MIPS_OSEC_LOCAL_PAGE
Instead of having a special DynamicReloc::Kind, we can just use a new
RelExpr for the calculation needed. The only odd thing we do that allows
this is to keep a representative symbol for the OutputSection in
question (the first we see for it) around to use in this relocation for
the addend calculation.
This reduces DynamicReloc to just AddendOnly vs AgainstSymbol, plus the
internal Computed.
Reviewers: MaskRay, arichardson
Reviewed By: MaskRay, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/150810
Commit: 1522ad956929b53d3adfe61c1c3f60d2d3fe076c
https://github.com/llvm/llvm-project/commit/1522ad956929b53d3adfe61c1c3f60d2d3fe076c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFC][ELF] Don't duplicate DynamicReloc constructor
This second constructor is just a shorthand for an AddendOnly relocation
against dummySym with R_ADDEND, so write it as such.
Reviewers: arichardson, MaskRay
Reviewed By: MaskRay, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/150811
Commit: ab12b43047fb3cb1fd80a508299c4a553065b023
https://github.com/llvm/llvm-project/commit/ab12b43047fb3cb1fd80a508299c4a553065b023
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFCI][ELF] Store DynamicReloc Kind as two bools
Aside from Computed, Kind is now just AddendOnly and AgainstSymbol, so
it's really just a bool reflecting whether the resulting ELF relocation
should reference the symbol or not. Refactor DynamicReloc's storage to
reflect this, splitting Computed out into its own orthogonal isFinal
bool. As part of this, rename computeRaw to finalize to reflect that
it's side-effecting.
This also allows needsDynSymIndex() to work even after finalize(), so
drop the existing assertion.
A future commit will refact the DynamicReloc API to take isAgainstSymbol
directly now the enum serves little purpose, as a more invasive,
mechanical change. For this commit we keep DynamicReloc::Kind as the
external API.
Reviewers: MaskRay, arichardson
Reviewed By: MaskRay, arichardson
Pull Request: https://github.com/llvm/llvm-project/pull/150812
Commit: 52ddcfd8d6c078b3e5ae3c230eea67a466d64f0f
https://github.com/llvm/llvm-project/commit/52ddcfd8d6c078b3e5ae3c230eea67a466d64f0f
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[NFC][ELF] Replace DynamicReloc::Kind with the equivalent bool in APIs
DynamicReloc::AgainstSymbol is now true and DynamicReloc::AddendOnly is
now false; uses of the constants were replaced mechanically.
Reviewers: rnk, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/150813
Commit: a7b58e74a080152c30fc5eb5f749e2254c277938
https://github.com/llvm/llvm-project/commit/a7b58e74a080152c30fc5eb5f749e2254c277938
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/test/Shell/Commands/command-disassemble-process.yaml
M lldb/test/Shell/Commands/command-image-lookup.yaml
M lldb/test/Shell/Minidump/Windows/arm-fp-unwind.test
M lldb/test/Shell/Minidump/Windows/broken-unwind.test
M lldb/test/Shell/Minidump/Windows/find-module.test
M lldb/test/Shell/Minidump/memory-region-from-module.yaml
M lldb/test/Shell/ObjectFile/Breakpad/uuid-matching-mac.test
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-set-and-hit-breakpoint.test
M lldb/test/Shell/SymbolFile/Breakpad/inline-record.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-discontinuous-file-ids.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-edgecases.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-missing-file.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-mixed-path-styles.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab-macho.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab-sorted-by-size.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab.test
M lldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-win-no-memory-info.yaml
M lldb/test/Shell/SymbolFile/DWARF/dwo-missing-error.test
M lldb/test/Shell/SymbolFile/DWARF/dwo-relative-path.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_loclists-dwo.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_rnglists-dwo.s
M lldb/test/Shell/SymbolFile/DWARF/x86/dwo-type-in-main-file.s
M lldb/test/Shell/SymbolFile/PDB/class-layout.test
M lldb/test/Shell/SymbolFile/PDB/compilands.test
M lldb/test/Shell/SymbolFile/PDB/enums-layout.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
M lldb/test/Shell/SymbolFile/PDB/pointers.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/variables.test
Log Message:
-----------
[lldb] Remove %T from lit tests (#151343)
%T has been deprecated for about seven years, mostly because it is not
unique to each test which can lead to races. This patch updates the few
remaining tests in lldb that use %T to not use it (either directly using
files or creating their own temp dir). The eventual goal is to remove
support for %T from llvm-lit given few tests use it and it still has
racey behavior.
This patch errors on the side of creating new temp dirs even when not
strictly necessary to avoid needing to update filenames inside filecheck
matchers.
Commit: 9a84c62da4e8bcf76c39077e0c18f21dd724e9ab
https://github.com/llvm/llvm-project/commit/9a84c62da4e8bcf76c39077e0c18f21dd724e9ab
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/cmake/modules/LLVMProcessSources.cmake
Log Message:
-----------
[cmake] Don't generate per-file "__SHORT_FILE__" defines on visual studio builds (#151167)
As reported on #150677 - this is preventing msbuild parallelization as cmake is repeatedly being updated
Commit: 6be3cc5ad5ee0d33264bc202005e93c667b67698
https://github.com/llvm/llvm-project/commit/6be3cc5ad5ee0d33264bc202005e93c667b67698
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h
Log Message:
-----------
[LLDB][NativePDB] Fix name access for classes in `CVTagRecord::name` (#151190)
From
https://github.com/llvm/llvm-project/pull/149876#discussion_r2240478480:
The `name()` accessor checked for `m_kind == Union` and accessed
`cvclass` instead of `cvunion`. This is technically wrong (maybe UB
even?).
In practice, this wasn't an issue, because all types in the union
(`ClassRecord`/`EnumRecord`/`UnionRecord`) inherit from `TagRecord`.
Commit: 26f9166ca1afe767063b6e319dc9634e91cb923c
https://github.com/llvm/llvm-project/commit/26f9166ca1afe767063b6e319dc9634e91cb923c
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
Log Message:
-----------
[TSan][compiler-rt] Defer symbolization of Reports to as late as possible (#151120)
This is the refactoring portion of:
https://github.com/llvm/llvm-project/pull/149516. My aim is for this
change to replicate current behaviour - just with Symbolization done
explicitly (and later than previously).
This change will enable us to perform symboliaztion after releasing the
locks in `OutputReport`; this is necessary on Apple platforms in order
to avoid a deadlock.
Commit: c2548a8c4c581bfd7c2b7738508fff4d85413cd6
https://github.com/llvm/llvm-project/commit/c2548a8c4c581bfd7c2b7738508fff4d85413cd6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/include/lldb/Expression/DWARFExpression.h
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
A lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
A lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
A lldb/source/Utility/WasmVirtualRegisters.h
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Support DW_OP_WASM_location in DWARFExpression (#151010)
Add support for DW_OP_WASM_location in DWARFExpression. This PR rebases
#78977 and cleans up the unit test. The DWARF extensions are documented
at https://yurydelendik.github.io/webassembly-dwarf/ and supported by
LLVM-based toolchains such as Clang, Swift, Emscripten, and Rust.
Commit: a349ccf32d6e34a5cc8166132b604b5bc2cbad98
https://github.com/llvm/llvm-project/commit/a349ccf32d6e34a5cc8166132b604b5bc2cbad98
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
Log Message:
-----------
Revert "[mlir][spirv] Fix UpdateVCEPass to deduce the correct set of capabilities" (#151358)
Reverts llvm/llvm-project#151108 as it breaks sanitizer builds.
Commit: b2d876a693c199c8022d5447ce45cca9c73aa35d
https://github.com/llvm/llvm-project/commit/b2d876a693c199c8022d5447ce45cca9c73aa35d
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[LTO][NFC] Switch LTO API from output parameter to return value (#151272)
Commit: 9a46091d4b996ce0511f4baf6ebbe1f0706d0d0e
https://github.com/llvm/llvm-project/commit/9a46091d4b996ce0511f4baf6ebbe1f0706d0d0e
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/test/Dialect/Vector/vector-sink.mlir
Log Message:
-----------
[mlir][Vector] Allow elementwise/broadcast swap to handle mixed types (#151274)
This patch extends the operation that rewrites elementwise operations
whose inputs are all broadcast from the same shape to handle
mixed-types, such as when the result and input types don't match, or
when the inputs have multiple types.
PR #150867 failed to check for the possibility of type mismatches when
rewriting splat constants. In order to fix that issue, we add support
for mixed-type operations more generally.
Commit: c9e2ad7da808f1d7d67fec7dfac7527d98fbfff1
https://github.com/llvm/llvm-project/commit/c9e2ad7da808f1d7d67fec7dfac7527d98fbfff1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A utils/bazel/llvm-project-overlay/mlir/examples/transform-opt/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch2/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch3/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch4/BUILD.bazel
Log Message:
-----------
[bazel][mlir] Add build files for transform examples (#151351)
Commit: 5fc482cfc0fa70c98e14d64d83dffbf7da03c303
https://github.com/llvm/llvm-project/commit/5fc482cfc0fa70c98e14d64d83dffbf7da03c303
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
Log Message:
-----------
[clang-format] Disable IntegerLiteralSeparator for C++ before c++14 (#151273)
Fixes #151102
Commit: 8e199f0f754dd263b3816705e650dded76273f66
https://github.com/llvm/llvm-project/commit/8e199f0f754dd263b3816705e650dded76273f66
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Log Message:
-----------
[RISCV] Fix a warning
This patch fixes:
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:579:11: error: unused
variable 'Subtarget' [-Werror,-Wunused-variable]
Commit: fc5976118d5271c23630ae43d91acf66383693f5
https://github.com/llvm/llvm-project/commit/fc5976118d5271c23630ae43d91acf66383693f5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/sched/CMakeLists.txt
A libc/src/sched/getcpu.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/getcpu.cpp
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/getcpu_test.cpp
Log Message:
-----------
[libc] Add implementation of getcpu syscall wrapper (#150871)
This patch adds the getcpu syscall wrapper. This has been supported in
glibc since v2.29.
Commit: bf72bd6cfa08356a4579fa80d153f1dae3d55f71
https://github.com/llvm/llvm-project/commit/bf72bd6cfa08356a4579fa80d153f1dae3d55f71
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
Log Message:
-----------
[gn build] Port c2548a8c4c58
Commit: c2c864462bd2cc771b08939ac38b0ca27cc75572
https://github.com/llvm/llvm-project/commit/c2c864462bd2cc771b08939ac38b0ca27cc75572
Author: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
Log Message:
-----------
[mlir][spirv] Fix UpdateVCEPass pass to deduce the correct version (#151192)
UpdateVCEPass currently deduces the required version based on vrsion
requirement of ops. This fix adds a check to update the minimum required
version based on capabilities as well.
---------
Signed-off-by: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Commit: c1968fee972859dfd03a7e698422e18a5bc1d478
https://github.com/llvm/llvm-project/commit/c1968fee972859dfd03a7e698422e18a5bc1d478
Author: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Target/SPIRV/constant.mlir
Log Message:
-----------
[mlir][spirv] Fix serialization of multi-dimensional TensorArm constant (#151158)
This fixes an issue where multi-dimensional TensorArm dense elements
could not be serialized.
Signed-off-by: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Commit: 71d6762309a7db67770bdbd39572ef04e6a1ea59
https://github.com/llvm/llvm-project/commit/71d6762309a7db67770bdbd39572ef04e6a1ea59
Author: zGoldthorpe <zgoldtho at ualberta.ca>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/or-packed-int-vecs.ll
Log Message:
-----------
[InstCombine] Added pattern for recognising the construction of packed integers. (#147414)
This patch extends the instruction combiner to simplify the construction
of a packed scalar integer from a vector type, such as:
```llvm
target datalayout = "e"
define i32 @src(<4 x i8> %v) {
%v.0 = extractelement <4 x i8> %v, i32 0
%z.0 = zext i8 %v.0 to i32
%v.1 = extractelement <4 x i8> %v, i32 1
%z.1 = zext i8 %v.1 to i32
%s.1 = shl i32 %z.1, 8
%x.1 = or i32 %z.0, %s.1
%v.2 = extractelement <4 x i8> %v, i32 2
%z.2 = zext i8 %v.2 to i32
%s.2 = shl i32 %z.2, 16
%x.2 = or i32 %x.1, %s.2
%v.3 = extractelement <4 x i8> %v, i32 3
%z.3 = zext i8 %v.3 to i32
%s.3 = shl i32 %z.3, 24
%x.3 = or i32 %x.2, %s.3
ret i32 %x.3
}
; ===============
define i32 @tgt(<4 x i8> %v) {
%x.3 = bitcast <4 x i8> %v to i32
ret i32 %x.3
}
```
Alive2 proofs (little-endian):
[YKdMeg](https://alive2.llvm.org/ce/z/YKdMeg)
Alive2 proofs (big-endian):
[vU6iKc](https://alive2.llvm.org/ce/z/vU6iKc)
Commit: 1a53553f11514c4eb116e6a935ada3e350d8d6c5
https://github.com/llvm/llvm-project/commit/1a53553f11514c4eb116e6a935ada3e350d8d6c5
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
[ORC] Fix synchronization in CoreAPIsTest. (#144556)
The code previously appeared to have a (benign?) race condition on
`WorkThreads.size`, since it was being accessed outside of the mutex
lock that protected it on the threads. This is usually okay since
1a1d6e6f98738be249b20994bcfed48dccac59e3, but doesn't seem reliable in
general, so fix this code to express the intent more accurately. This
instead relies on the same general principles as ref-counting, where
each existing reference (thread) can add new references (threads)
because they already have a reference themselves (until joined).
Commit: 2cf15a1a54fc45659f667113379891e6c06ce50a
https://github.com/llvm/llvm-project/commit/2cf15a1a54fc45659f667113379891e6c06ce50a
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
Log Message:
-----------
Silence a not all control paths return a value warning; NFC
Commit: a14659a2c8c82804b611925fa7a48fd26ef1d135
https://github.com/llvm/llvm-project/commit/a14659a2c8c82804b611925fa7a48fd26ef1d135
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/test/API/commands/expression/import-std-module/array/TestArrayFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/basic/TestImportStdModule.py
M lldb/test/API/commands/expression/import-std-module/conflicts/TestStdModuleWithConflicts.py
M lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list/TestListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/non-module-type-separation/TestNonModuleTypeSeparation.py
M lldb/test/API/commands/expression/import-std-module/retry-with-std-module/TestRetryWithStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContentFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr/TestSharedPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/unique_ptr-dbg-info-content/TestUniquePtrDbgInfoContent.py
M lldb/test/API/commands/expression/import-std-module/unique_ptr/TestUniquePtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr/TestWeakPtrFromStdModule.py
Log Message:
-----------
[lldb] deactivate some tests on older SDKs (#147768)
https://github.com/llvm/llvm-project/pull/144913 was reverted because
some of the Darwin tests were failing on SDKs prior to `15.0`.
Only the x86 bots run on macOS `14.0`. The aarch64 ones run on macOS
`15.0`.
In this patch, we deactivate the failing Darwin tests on older SDKs
(prior to `15.0`).
Commit: 8e9a0fc0f2e58c794de01ff457f4d487a2f499fa
https://github.com/llvm/llvm-project/commit/8e9a0fc0f2e58c794de01ff457f4d487a2f499fa
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-ir2vec.rst
A llvm/utils/mlgo-utils/IR2Vec/generateTriplets.py
Log Message:
-----------
[IR2Vec] Add triplet generation utility script for vocabulary training (#149215)
Added a Python utility script for generating IR2Vec triplets and updated documentation to reference it.
The script generates triplets in a form suitable for training the vocabulary.
(Tracking issues - #141817, #141834; closes - #141834)
Commit: c56be46c1c594b96be9ee27721e0fcc68f6a3e75
https://github.com/llvm/llvm-project/commit/c56be46c1c594b96be9ee27721e0fcc68f6a3e75
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] Port #151010: DW_OP_WASM_location (#151364)
Commit: 6b76ca88ac2147ee3c5c458ac568a9ddc7c0965f
https://github.com/llvm/llvm-project/commit/6b76ca88ac2147ee3c5c458ac568a9ddc7c0965f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
Log Message:
-----------
Revert "[lldb] Pick the builder for the target platform" (#151367)
Reverts llvm/llvm-project#151262 while I investigate why this breaks
GreenDragon.
Commit: 3a4d506cb057488ab8dbaf234b7761edb1854be9
https://github.com/llvm/llvm-project/commit/3a4d506cb057488ab8dbaf234b7761edb1854be9
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/tbl-loops.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Prevent invalid extract_elt within combineStoreValueFPToInt.
This reverts a small part of https://github.com/llvm/llvm-project/pull/147707
that triggers an isel failure because we cannot extract an >i32 element
into an i64 result.
Commit: a194d516546061078dc217a81655688f1a175ca2
https://github.com/llvm/llvm-project/commit/a194d516546061078dc217a81655688f1a175ca2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
Log Message:
-----------
[ExecutionEngine] Fix a warning
This patch fixes:
llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp:1578:3: error:
'std::unique_lock' may not intend to support class template argument
deduction [-Werror,-Wctad-maybe-unsupported]
Commit: 3b5aff569d0604d554a6648920cc627d71748ae4
https://github.com/llvm/llvm-project/commit/3b5aff569d0604d554a6648920cc627d71748ae4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/test/Headers/__cpuidex_conflict.c
Log Message:
-----------
[clang][X86] Update __cpuidex_conflict.c test post #126324 (#151220)
It does not look like __cpuidex builtins are being incorrectly included
in compilations for offload targets anymore, so change up the test to
assume that we are defining __cpuidex as static in cpuid.h now that
\#126324 updates the behavior of __has_builtin on offload compilations.
This ensures we are still testing that we are avoiding the conflicts
around offloading that were first pointed out in
https://reviews.llvm.org/D150646.
Commit: 9de49703b82e8e3d45d2e1ceb2626f5bb920ee12
https://github.com/llvm/llvm-project/commit/9de49703b82e8e3d45d2e1ceb2626f5bb920ee12
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
Log Message:
-----------
[SPIRV] Preserve implicit bitcast (#151041)
fixes #146942
## Issue
The cause of the bug is in InstCombine which is converting our load of
float vec4 and bitcast to i32 vec4 into one load of i32 vec4. That means
wr have to do a legalization in the spirv backend to convert back
```diff
- %3 = load <4 x i32>, ptr addrspace(11) %2, align 16
+ %3 = load <4 x float>, ptr addrspace(11) %2, align 16
+ %4 = bitcast <4 x float> %3 to <4 x i32>
```
<img width="2566" height="548" alt="Image"
src="https://github.com/user-attachments/assets/0bf8813c-70f8-47df-8207-ab7da54f5382"
/>
https://godbolt.org/z/K4GeM4fKT
## The Fix
Just removing the assert isn't enough to fix this bug. If we do so we
get an assert later
`Assertion failed: (!storageClassRequiresExplictLayout(SC)), function
getOrCreateSPIRVPointerType, file SPIRVGlobalRegistry.cpp, line 1806.`
If we just remove the assert the `CreateShuffleVector` uses the source
type via the `NewLoad` when the `Output` type needs to be the
`TargetType`.
We also can't use`CreateBitCast` That will feed the right types for the
`ShuffleVector` but it doesn't emit OpBitcast. the llvmIR isn't
translated over to MIR.
The fix then is to emit `spv_bitcast` just like what
`SPIRVEmitIntrinsics::visitBitCastInst` does.
---------
Co-authored-by: Chris B <beanz at abolishcrlf.org>
Commit: ec0c79df593c4a23565e54d8f9acccbb241513a6
https://github.com/llvm/llvm-project/commit/ec0c79df593c4a23565e54d8f9acccbb241513a6
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/fround.ll
Log Message:
-----------
[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)
Follow up on a review of bd66fd0 ([CostModel/RISCV] Fix costs of vector
[l](lrint|lround)) post-landing to fix a subtle problem with the cost
of vector [l](lrint|lround). We should use source LMUL in the case of
a narrowing op.
Co-authored-by: Luke Lau <luke at igalia.com>
Commit: 0d6a67c1ad6742d2c1a1606c91aa5c73c74c002a
https://github.com/llvm/llvm-project/commit/0d6a67c1ad6742d2c1a1606c91aa5c73c74c002a
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/unit.h
Log Message:
-----------
[flang][runtime] Remove redundant initialization (#150984)
The assignment to mutableModes() in BeginIoStatement() is redundant,
since the mutableModes_ data member is initialized by the constructors
of the two classes that now have one. Remove the assignment to avoid
confusion.
Also restores the original OutputStatementState base class name after a
recent patch that needlessly changed it to something equivalent but less
readable.
Commit: b01ab5318e6d1c0e19245cd0551789c02c81fb7d
https://github.com/llvm/llvm-project/commit/b01ab5318e6d1c0e19245cd0551789c02c81fb7d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang/include/flang/Semantics/semantics.h
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/bug1214.cuf
M flang/test/Semantics/cuf11.cuf
Log Message:
-----------
[flang][CUDA] Apply intrinsic operator overrides (#151018)
Fortran's intrinsic numeric and relational operators can be overridden
with explicit interfaces so long as one or more of the dummy arguments
have the DEVICE attribute. Semantics already allows this without
complaint, but fails to replace the operations with the defined specific
procedure calls when analyzing expressions.
Commit: 13b2fc1b9d04065d542acc0dd357865febfd3377
https://github.com/llvm/llvm-project/commit/13b2fc1b9d04065d542acc0dd357865febfd3377
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang/lib/Semantics/pointer-assignment.cpp
M flang/test/Semantics/assign02.f90
Log Message:
-----------
[flang][near NFC] Fix English in an error message (#151029)
Correct "is a not a pointer" to "is not a pointer" in an error message.
While here, also unsplit nearby error messages so that their contents
are more searchable.
Fixes https://github.com/llvm/llvm-project/issues/150864.
Commit: 35cabd69e694a2ba326f406f38b93a21d6c26108
https://github.com/llvm/llvm-project/commit/35cabd69e694a2ba326f406f38b93a21d6c26108
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/namelist.cpp
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/InputExtensions.cpp
M flang/docs/Extensions.md
Log Message:
-----------
[flang] Support fixed-width input field truncation for LOGICAL (#151203)
As a common extension, we support the truncation of fixed-width fields
for non-list-directed input editing when a separator character (',' or
';' depending on DECIMAL='POINT' or 'COMMA' resp.) appears in the field.
This isn't working for L input editing; fix.
(The bug reports a failure with DC mode, but it doesn't work with a
comma either.)
Fixes https://github.com/llvm/llvm-project/issues/151178.
Commit: 1bf89e90a878e7e5844866d75b6c25933395435d
https://github.com/llvm/llvm-project/commit/1bf89e90a878e7e5844866d75b6c25933395435d
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/include/profile/MemProfData.inc
M compiler-rt/lib/memprof/memprof_rawprofile.cpp
M compiler-rt/lib/memprof/tests/CMakeLists.txt
A compiler-rt/lib/memprof/tests/histogram_encoding.cpp
A compiler-rt/test/memprof/TestCases/memprof_histogram_uint8.cpp
M llvm/include/llvm/ProfileData/MemProfData.inc
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw
M llvm/test/tools/llvm-profdata/memprof-basic-histogram.test
M llvm/test/tools/llvm-profdata/memprof-basic.test
A llvm/test/tools/llvm-profdata/memprof-basic_v4.test
M llvm/test/tools/llvm-profdata/memprof-inline.test
M llvm/test/tools/llvm-profdata/memprof-multi.test
M llvm/test/tools/llvm-profdata/memprof-padding-histogram.test
M llvm/test/tools/llvm-profdata/memprof-pic.test
Log Message:
-----------
[MemProf] Change histogram storage from uint64_t to uint16_t (#147854)
Change memory access histogram storage from uint64_t to uint16_t to
reduce profile size on disk. This change updates the raw profile format
to v5. Also add a histogram test in compiler-rt since we didn't have one
before. With this change the histogram memprof raw for the basic test
reduces from 75KB -> 20KB.
Commit: 953be42e407593b5c5dd17283e2b0f8f7f7f4d6d
https://github.com/llvm/llvm-project/commit/953be42e407593b5c5dd17283e2b0f8f7f7f4d6d
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
Log Message:
-----------
[CIR] Upstream Unary Plus & Minus op for ComplexType (#150281)
This change adds support for Unary Plus & Minus op for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 180281b8eccfa8e1ec4ebc58df7685497f9ccb26
https://github.com/llvm/llvm-project/commit/180281b8eccfa8e1ec4ebc58df7685497f9ccb26
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
Log Message:
-----------
[AMDGPU] Fix op_sel settings for v_cvt_scale32_* and v_cvt_sr_* (#151286)
For OPF_OPSEL_SRCBYTE: Vector instruction uses OPSEL[1:0] to specify a
byte
select for the first source operand. So op_sel [0, 0], [1, 0], [0, 1]
and [1, 1] should map
to byte 0, 1, 2 and 3, respectively.
For OPF_OPSEL_DSTBYTE: OPSEL is used as a destination byte select.
OPSEL[2:3]
specify which byte of the destination to write to. Note that the order
of the bits is different
from that of OPF_OPSEL_SRCBYT. So the mapping should be: op_sel [0, 0],
[0, 1], [1, 0]
and [1, 1] map to byte 0, 1, 2 and 3, respectively.
Fixes: SWDEV-544901
Commit: 96b4425669352e240c753c352b2782cbfce0e129
https://github.com/llvm/llvm-project/commit/96b4425669352e240c753c352b2782cbfce0e129
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Log Message:
-----------
[mlir][linalg][nfc] Clean-up leftover code post #149156 (#151334)
In https://github.com/llvm/llvm-project/pull/149156, I ensured that we
no longer generate spurious `tensor.empty` ops when vectorizing
`linalg.unpack`.
This follow-up removes leftover code that is now redundant but was
missed in the original PR and in #150602 that was also meant to clean-up
left-over code.
Note, this is removing code to compute "write-vector-sizes". Instead,
these are fully inferred from previous Ops.
Commit: 24f9482abddbc24135d8e0143eb1bac499645648
https://github.com/llvm/llvm-project/commit/24f9482abddbc24135d8e0143eb1bac499645648
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/include/profile/MemProfData.inc
M compiler-rt/lib/memprof/memprof_rawprofile.cpp
M compiler-rt/lib/memprof/tests/CMakeLists.txt
R compiler-rt/lib/memprof/tests/histogram_encoding.cpp
R compiler-rt/test/memprof/TestCases/memprof_histogram_uint8.cpp
M llvm/include/llvm/ProfileData/MemProfData.inc
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw
R llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe
R llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw
M llvm/test/tools/llvm-profdata/memprof-basic-histogram.test
M llvm/test/tools/llvm-profdata/memprof-basic.test
R llvm/test/tools/llvm-profdata/memprof-basic_v4.test
M llvm/test/tools/llvm-profdata/memprof-inline.test
M llvm/test/tools/llvm-profdata/memprof-multi.test
M llvm/test/tools/llvm-profdata/memprof-padding-histogram.test
M llvm/test/tools/llvm-profdata/memprof-pic.test
Log Message:
-----------
Revert "[MemProf] Change histogram storage from uint64_t to uint16_t" (#151382)
Reverts llvm/llvm-project#147854
Test failure when building with gcc.
https://lab.llvm.org/buildbot/#/builders/174/builds/21989
Commit: a7ac43125eabb5845a2855bbf37fd4485831e860
https://github.com/llvm/llvm-project/commit/a7ac43125eabb5845a2855bbf37fd4485831e860
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/builders/__init__.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
Re-land "[lldb] Pick the builder for the target platform (#151262)"
Pick the builder for the target platform, not the host platform. This is
necessary when running the test suite remotely on a different platform.
Unlike for Darwin, both Windows and Linux us the default builder, which
is why this went unnoticed on the remote-linux bots.
Commit: e4c0f300309fbdcdabc43ff4bf57957181d6451e
https://github.com/llvm/llvm-project/commit/e4c0f300309fbdcdabc43ff4bf57957181d6451e
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/source/Expression/Materializer.cpp
M lldb/test/API/functionalities/postmortem/elf-core/expr/TestExpr.py
Log Message:
-----------
[lldb] Fix updating persistent variables without JIT (#149642)
This patch fixes updating persistent variables when memory cannot be
allocated in an inferior process:
```
> lldb -c test.core
(lldb) expr int $i = 5
(lldb) expr $i = 55
(int) $0 = 55
(lldb) expr $i
(int) $i = 5
```
With this patch, the last command prints:
```
(int) $i = 55
```
The issue was introduced in #145599.
Commit: 90aed4dbdfe7354405db980d2b684bf91f69b4fb
https://github.com/llvm/llvm-project/commit/90aed4dbdfe7354405db980d2b684bf91f69b4fb
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Fix running TestWithLimitDebugInfo.py on Windows (#150579)
When debug info categories were set for a test method with the
`@add_test_categories` decorator, they were all added to its
"categories" attribute. If some of these categories were not supported,
`LLDBTestResult.startTest()` skipped all variants of the test method.
For example, the tests in `TestWithLimitDebugInfo.py` use the categories
`dwarf` and `dwo`. However, since `dwo` is not supported on Windows, all
the tests in this file were skipped, even though the tests for `dwarf`
could be run.
Commit: 8dd91996f008c47b986943499acf3e1abd4deaa8
https://github.com/llvm/llvm-project/commit/8dd91996f008c47b986943499acf3e1abd4deaa8
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/Driver/wasm-features.c
M clang/test/Preprocessor/wasm-target-features.c
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
Log Message:
-----------
[WebAssembly] Add gc target feature to addBleedingEdgeFeatures (#151294)
Also alphebetize feature list, add `-mgc` and `-mno-gc` flags, and add
some missing feature tests.
Reland of #151107.
https://github.com/llvm/llvm-project/pull/150201#discussion_r2237982637
Commit: d74d841b65dc5ecc1adb87f94ee5c8073984e130
https://github.com/llvm/llvm-project/commit/d74d841b65dc5ecc1adb87f94ee5c8073984e130
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/zext-add.ll
M llvm/test/Transforms/IndVarSimplify/AArch64/fold-ext-add.ll
M llvm/test/Transforms/IndVarSimplify/zext-nuw.ll
Log Message:
-----------
[SECV] Try to push the op into ZExt: A + zext (-A + B) -> zext (B) (#151227)
Try to push the constant operand into a ZExt:
A + zext (-A + B) -> zext (B), if trunc (A) + -A + B does not
unsigned-wrap.
The actual code supports ZExts with arbitrary number of arguments, hence
the getAddExpr in the return.
This helps SCEV reasoning in some cases, commonly when adding an offset
to a zero-extended SCEV that subtracts the same offset.
Note that this is restricted to cases where we can fold away an operand
of the inner Add. This is needed to avoid bad interactions with patterns
when forming ZExts, which try to push to ZExt to add operands.
https://alive2.llvm.org/ce/z/q7d303
PR: https://github.com/llvm/llvm-project/pull/151227
Commit: d70f228e83c3d4ea0369472442f8bbcf285f8392
https://github.com/llvm/llvm-project/commit/d70f228e83c3d4ea0369472442f8bbcf285f8392
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add gfx1250 V_ADD_{MIN|MAX}_{U|I}32 instructions (#151379)
Commit: 729b0d1b61ec581a86eb87f662a6a38f25a510aa
https://github.com/llvm/llvm-project/commit/729b0d1b61ec581a86eb87f662a6a38f25a510aa
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/atanf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/atanf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/atanf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor atanf16 implementation to header-only in src/__support/math folder. (#150868)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 11f52ec4d1a3b3172cee06d78857a9d5231f68b7
https://github.com/llvm/llvm-project/commit/11f52ec4d1a3b3172cee06d78857a9d5231f68b7
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
A llvm/test/CodeGen/NVPTX/ld-param-sink.ll
Log Message:
-----------
[NVPTX] Mark callseq insts as reading and writing memory (#151376)
In order to prevent the st.param and ld.param instructions which store
parameters and load return values from being sunk or hoisted out of a
call sequence, mark the callseq start and end nodes as reading and
writing memory.
Fixes #151329
Commit: 82f00ea40aaa6d4915517b970a65f4af56c9a0fc
https://github.com/llvm/llvm-project/commit/82f00ea40aaa6d4915517b970a65f4af56c9a0fc
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_err.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop2_err.s
Log Message:
-----------
[AMDGPU][MC] In GFX11+ v_pk_fmac_f16 should not allow DPP (#148751)
In GFX11+ the instruction v_pk_fmac_f16 should not allow DPP.
Commit: f5d49c71b49a99ea700c30208cff7039553a4403
https://github.com/llvm/llvm-project/commit/f5d49c71b49a99ea700c30208cff7039553a4403
Author: Nikolay Panchenko <nicholas.panchenko at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
R llvm/test/MC/ELF/many-instructions.s
Log Message:
-----------
Revert "MCFragment: Use trailing data for fixed-size part" (#151383)
Reverts llvm/llvm-project#150846 due to unsigned underflow identifier by
UBSan in several tests
Commit: 62187a60e61017c3a453bb138d27f9bdda27879d
https://github.com/llvm/llvm-project/commit/62187a60e61017c3a453bb138d27f9bdda27879d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add gfx1250 v_cvt_sr_pk_bf16_f32 instruction (#151385)
Commit: ff38981a5817f06afad2c7e263e3bf8486f35da9
https://github.com/llvm/llvm-project/commit/ff38981a5817f06afad2c7e263e3bf8486f35da9
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/LTO/LTO.h
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/test/Transforms/LowerTypeTests/Inputs/exported-funcs.yaml
M llvm/test/Transforms/LowerTypeTests/export-alias.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/function-alias.ll
Log Message:
-----------
LTO: Redesign the CFI !aliases metadata.
With the current aliases metadata we lose information about which groups
of aliases survive symbol resolution. This causes various problems such
as #150075 where symbol resolution breaks the link between alias groups.
In this redesign of the aliases metadata, we stop representing the
individual aliases in !aliases. Instead, the individual aliases are
represented in !cfi.functions in the same way as functions, and the
alias groups (i.e. groups of symbols with the same address) are stored
in !aliases. At symbol resolution time, we filter out all non-prevailing
members of !aliases; the resulting set is used by LowerTypeTests to
recreate the aliases.
With this change it is now possible for a jump table entry to refer
to an alias in one of the ThinLTO object files (e.g. if a function is
non-prevailing but its alias is prevailing), so instead of deleting them,
rename them with the ".cfi" suffix.
Fixes #150070.
Fixes #150075.
Reviewers: teresajohnson, vitalybuka
Reviewed By: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/150690
Commit: 1a0121cbedc6bad7cf07cc9234fc8368db0dfbe3
https://github.com/llvm/llvm-project/commit/1a0121cbedc6bad7cf07cc9234fc8368db0dfbe3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Start slab search at number of allocated bits
Summary:
This patch changes the slab search to start at the number of allocated
bits. Previously we would randomly search, but this gives very good
performance when doing nothing but allocating, which is a common
configuration. This will degrade performance when mixing malloc and free
close to eachother as this is more likely to fail when the counter
starts decreasing.
Commit: 6f2029dc4a293c3aca3b6efd6cc9e07723eb2368
https://github.com/llvm/llvm-project/commit/6f2029dc4a293c3aca3b6efd6cc9e07723eb2368
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
LTO: Fix bug, Res was meant to be InputRes.
Commit: 254b90fa9584da4cc9f8d846fc610c731a73f742
https://github.com/llvm/llvm-project/commit/254b90fa9584da4cc9f8d846fc610c731a73f742
Author: Bill Wendling <morbo at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/attr-counted-by-for-pointers.c
Log Message:
-----------
[CodeGen][counted_by] See past parentheses and no-op casts (#151266)
Parentheses and no-op casts don't change the value. Skip past them to
get to a MemberExpr.
Fixes #151236
Commit: 17ccb849f349e246e7e7a02726ecb4210a26676f
https://github.com/llvm/llvm-project/commit/17ccb849f349e246e7e7a02726ecb4210a26676f
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
A llvm/test/CodeGen/AArch64/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/ARM/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/ARM/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/ARM/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/MIR/X86/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/Mips/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/Mips/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/Mips/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/RISCV/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/RISCV/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/RISCV/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll
Log Message:
-----------
[llvm] Extract and propagate callee_type metadata
Update MachineFunction::CallSiteInfo to extract numeric CalleeTypeIds
from callee_type metadata attached to indirect call instructions.
Reviewers: nikic, ilovepi
Reviewed By: ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/87575
Commit: c8b6ddf3a3b32283d8c31f988aadbed291a38c80
https://github.com/llvm/llvm-project/commit/c8b6ddf3a3b32283d8c31f988aadbed291a38c80
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/atan2.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/atan2.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/atan2.cpp
M libc/src/math/generic/atan2l.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor atan2 implementation to header-only in src/__support/math folder. (#150968)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: b9a627e6fba4137ca5411aaa416d57e28f685588
https://github.com/llvm/llvm-project/commit/b9a627e6fba4137ca5411aaa416d57e28f685588
Author: Md Abdullah Shahneous Bari <98356296+mshahneo at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRVPass.cpp
M mlir/lib/Conversion/FuncToSPIRV/FuncToSPIRVPass.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRVPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/FuncToSPIRV/types-to-spirv.mlir
Log Message:
-----------
[mlir][spirv] Add 8-bit float type emulation (#148811)
8-bit floats are not supported in SPIR-V. They are emulated as 8-bit
integer during conversion.
Commit: e6f360b0ab6573bf9d3bb0e42445a20c93eea8b1
https://github.com/llvm/llvm-project/commit/e6f360b0ab6573bf9d3bb0e42445a20c93eea8b1
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Allow load/store/prefetch uses [memref+offset] instead of tdesc (#150576)
Add variant of load/store/prefetch to allow offset. The new xegpu.load
variant accepts memref+offset, and the existing tdesc operand will be
removed in the future PR.
The semantics are combination of "creating scattered_tdesc + xegpu.load
with scattered_tdesc". The current xegpu.load accepts tdesc operand,
which encapsulates "memref+offset". This PR "fold" "memref+offset"
directly to xegpu.load replacing "tdesc". Create_tdesc will be removed
as scatter_tdesc only contains base address after offsets being taken
away, so there is no point to keep it.
```mlir
// wi level code example
%2 = xegpu.load %src[%offsets], %mask <{chunk_size = 2}> : ui64, vector<1xindex>, vector<1xi1> -> vector<2xf32>
xegpu.store %val, %src[%offsets], %mask: vector<1xf16>, memref<?xf16>, vector<1xindex>, vector<1xi1>
xegpu.prefetch %src[%0] : ui64, vector<1xindex>
```
Commit: ed940d7228aec95e994be848f1e42eab2a7fa7f3
https://github.com/llvm/llvm-project/commit/ed940d7228aec95e994be848f1e42eab2a7fa7f3
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
Log Message:
-----------
[DWARFLinker] Fix matching logic to remove type 1 missing offsets (#149618)
Second attempt to fix
https://discourse.llvm.org/t/rfc-new-dwarf-attribute-for-symbolication-of-merged-functions/79434/29?u=alx32
(First attempt: https://github.com/llvm/llvm-project/pull/143656)
Context: the sequence offset to row index we parsed may not be complete.
And we need to add manual matching to it.
https://github.com/llvm/llvm-project/pull/143656 attempts to do trivial
1:1 matching, however, sometimes they don't line up perfectly, as shown
below:
```
// While SeqOffToOrigRow parsed from CU could be the ground truth,
// e.g.
//
// SeqOff Row
// 0x08 9
// 0x14 15
//
// The StmtAttrs and SeqStartRows may not match perfectly, e.g.
//
// StmtAttrs SeqStartRows
// 0x04 3
// 0x08 5
// 0x10 9
// 0x12 11
// 0x14 15
//
// In this case, we don't want to assign 5 to 0x08, since we know 0x08
// maps to 9. If we do a dummy 1:1 mapping 0x10 will be mapped to 9
// which is incorrect. The expected behavior is ignore 5, realign the
// table based on the result from the line table:
//
// StmtAttrs SeqStartRows
// 0x04 3
// -- 5
// 0x08 9 <- LineTableMapping ground truth
// 0x10 11
// 0x12 --
// 0x14 15 <- LineTableMapping ground truth
```
In this case, we need to use the mapping we read from the line table as
a ground truth and organize them properly to prevent duplicated
offset/missing offset.
Test:
Updated the test case
---------
Signed-off-by: Peter Rong <PeterRong at meta.com>
Commit: 7d2332391f81d44d7c9d1ca40bd5f393c59ad0df
https://github.com/llvm/llvm-project/commit/7d2332391f81d44d7c9d1ca40bd5f393c59ad0df
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
Log Message:
-----------
[AMDGPU] Fix destination op_sel for v_cvt_scale32_* and v_cvt_sr_* (#151411)
GFX950 uses OP_SEL[MSB:LSB] for both src reads and dest writes. So this
patch essentially revert the work from
https://github.com/llvm/llvm-project/pull/151286 regarding dest writes.
Commit: 2b2f5791f2b5a1f8f38844ba14c965ea9b3c72f5
https://github.com/llvm/llvm-project/commit/2b2f5791f2b5a1f8f38844ba14c965ea9b3c72f5
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M libc/src/math/generic/atan2l.cpp
Log Message:
-----------
[libc][math] fix atan2l build failure. (#151413)
Commit: cd4360a16ad6143c5a1f0c32e44691565d5cb52c
https://github.com/llvm/llvm-project/commit/cd4360a16ad6143c5a1f0c32e44691565d5cb52c
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
Log Message:
-----------
[lldb][NFC] fix three small typeos.
Commit: 8377f90c2171d6ff9671aba21dc3e374006829d2
https://github.com/llvm/llvm-project/commit/8377f90c2171d6ff9671aba21dc3e374006829d2
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/lib/memprof/memprof_interface_internal.h
A compiler-rt/test/memprof/TestCases/memprof_histogram_uint8.cpp
Log Message:
-----------
[MemProf] Add sanitizer interface decls for histogram funcs. (#151398)
Add the necessary sanitizer interface decls required when the memprof
runtime is built in dynamic mode. This was a latent issue since we didn't
add tests for the histogram feature in compiler-rt. These tests are run
with `ninja check-memprof-dynamic`. I discovered this after the CI
failures for #147854.
Commit: b3b36d35903d7b2dd556d229d35fcdf9cf732e78
https://github.com/llvm/llvm-project/commit/b3b36d35903d7b2dd556d229d35fcdf9cf732e78
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add V_ASHR_PK_I8_I32 and V_ASHR_PK_U8_I32 on gfx1250 (#151389)
Commit: 2e36afc8d91e592a57b9b00d92607b0e999030b2
https://github.com/llvm/llvm-project/commit/2e36afc8d91e592a57b9b00d92607b0e999030b2
Author: Richard Smith <richard at metafoo.co.uk>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/Any.h
Log Message:
-----------
Remove declaration of undefined `any_isa`. (#151395)
Looks like this was missed by #65636, which removed the definition of
this function.
Commit: 6c3d62a4b4f15eb001585bf61a8c3f4b9aff8237
https://github.com/llvm/llvm-project/commit/6c3d62a4b4f15eb001585bf61a8c3f4b9aff8237
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
M llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
Log Message:
-----------
Revert "[DWARFLinker] Fix matching logic to remove type 1 missing off… (#151424)
…sets (#149618)"
This reverts commit ed940d7228aec95e994be848f1e42eab2a7fa7f3.
Commit: b00d4f235038e874fc0cdb790f7e5dbc7ccd6cac
https://github.com/llvm/llvm-project/commit/b00d4f235038e874fc0cdb790f7e5dbc7ccd6cac
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M flang/docs/FortranStandardsSupport.md
Log Message:
-----------
[flang][doc] Update some F2023 status. (#151165)
- Trig functions: done with various earlier commits like #149343.
- c_f_pointer: #149870.
Commit: a8d0ae3412bdbbf3248192c31f94f6649a217b3a
https://github.com/llvm/llvm-project/commit/a8d0ae3412bdbbf3248192c31f94f6649a217b3a
Author: Anthony Tran <atran881 at usc.edu>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
A lldb/test/Shell/Recognizer/Inputs/ubsan_add_overflow.c
A lldb/test/Shell/Recognizer/ubsan_add_overflow.test
Log Message:
-----------
[lldb][test][NFC] Add LLDB test for UBSan trap frame recognizer (#151231)
In #145967 Clang was taught to emit trap reasons on UBSan traps in debug
info using the same method as `__builtin_verbose_trap`. This patch adds
a test case to make sure that the existing "Verbose Trap StackFrame
Recognizer" recognizes the trap reason and sets the stop reason and
stack frame appropriately.
Part of a GSoC 2025 Project.
Commit: ce408632092d48a3da4e17cc282c35058e7f3656
https://github.com/llvm/llvm-project/commit/ce408632092d48a3da4e17cc282c35058e7f3656
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
A llvm/test/CodeGen/AMDGPU/code-size-estimate-gfx1250.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add v_cvt_sr|pk_bf8|fp8_f16 gfx1250 instructions (#151415)
Commit: d3f500f2d9238ac96f1afad1091d461ae98530ac
https://github.com/llvm/llvm-project/commit/d3f500f2d9238ac96f1afad1091d461ae98530ac
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[NVPTX] Fixup ISel patterns for setcc of i8 extract (#151204)
Fix a correctness bug in ISel lowering patterns for setcc of v4i8
extraction. Refactor and cleanup these patterns somewhat in general to
try to make them a bit more comprehensible.
Commit: 0bbe1b30faf57b5007d7be6af64ae423b4992de4
https://github.com/llvm/llvm-project/commit/0bbe1b30faf57b5007d7be6af64ae423b4992de4
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/functions.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/Sema/constexpr-void-cast.c
Log Message:
-----------
[clang] Forbid reinterpret_cast of function pointers in constexpr. (#150557)
This has been explicitly forbidden since C++11, but somehow the edge
case of converting a function pointer to void* using a cast like
`(void*)f` wasn't handled.
Fixes #150340 .
Commit: 5906ff67ae80e47ad8f48f8a063f283c74d62282
https://github.com/llvm/llvm-project/commit/5906ff67ae80e47ad8f48f8a063f283c74d62282
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/sched/linux/sched_getcpucount.cpp
M libc/src/sched/linux/sched_getscheduler.cpp
M libc/src/sched/linux/sched_rr_get_interval.cpp
M libc/src/sched/linux/sched_setaffinity.cpp
M libc/src/sched/sched_getaffinity.h
M libc/src/sched/sched_getcpucount.h
M libc/src/sched/sched_getscheduler.h
M libc/src/sched/sched_rr_get_interval.h
M libc/src/sched/sched_setaffinity.h
M libc/test/src/sched/CMakeLists.txt
M libc/test/src/sched/affinity_test.cpp
M libc/test/src/sched/cpu_count_test.cpp
M libc/test/src/sched/get_priority_test.cpp
M libc/test/src/sched/sched_rr_get_interval_test.cpp
Log Message:
-----------
[libc] Remove some sched.h includes (#151425)
This patch removes some sched.h includes, preferring the proxy headers.
This patch does not clean them all up as some proxy type headers need to
be added, like for `struct sched_param`.
Commit: 70471f08ee109cd0472fdd6659c2a1ad236c6835
https://github.com/llvm/llvm-project/commit/70471f08ee109cd0472fdd6659c2a1ad236c6835
Author: M. Zeeshan Siddiqui <mzs at microsoft.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Expr.cpp
M clang/test/Sema/warn-unreachable_crash.cpp
Log Message:
-----------
[Sema] Fix -Wunreachable-code false negative when operands differ only by implicit casts (#149972)
## Motivation
`-Wunreachable-code` missed—or in rare cases crashed on—tautological
comparisons such as
```cpp
x != 0 || x != 1.0 // always true
x == 0 && x == 1.0 // always false
```
when the *same* variable appears on both sides but one operand goes
through a floating‑rank promotion that is target‑dependent. On back‑ends
with **native half‑precision** (`_Float16` / `__fp16`) such as
AArch64 `+fullfp16`, no promotion occurs, so the cast stacks between the
two operands differ and the existing heuristic bails out.
## Technical description
* **Extends `Expr::isSameComparisonOperand()`** – the helper now ignores
parentheses **and value‑preserving implicit casts**
(`CK_LValueToRValue`, floating‑rank `CK_FloatingCast`) before comparing
the underlying operands. This prevents floating‑rank promotions and
lvalue‑to‑rvalue conversions from blocking the unreachable‑code
diagnostic on targets with native FP16.
*No change needed in `CheckIncorrectLogicOperator`; it simply benefits
from the improved helper.*
* **Regression test** – `warn-unreachable_crash.cpp` updated to cover
both the promoted case (x86‑64) and the native‑half case
(AArch64 `+fullfp16`).
* **Docs** – release‑note bullet added under *Bug Fixes in This
Version*.
@ziqingluo-90 @yronglin Could you please review promptly? (feel free to
also merge it on my behalf) Thanks!
Fixes #149967
Co-authored-by: Zeeshan Siddiqui <mzs at ntdev.microsoft.com>
Commit: 08e40c12fa0c83652968f2f24c3ec76a062f4042
https://github.com/llvm/llvm-project/commit/08e40c12fa0c83652968f2f24c3ec76a062f4042
Author: Snehasish Kumar <snehasishk at google.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/include/profile/MemProfData.inc
M compiler-rt/lib/memprof/memprof_rawprofile.cpp
M compiler-rt/lib/memprof/tests/CMakeLists.txt
A compiler-rt/lib/memprof/tests/histogram_encoding.cpp
M llvm/include/llvm/ProfileData/MemProfData.inc
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw
M llvm/test/tools/llvm-profdata/memprof-basic-histogram.test
M llvm/test/tools/llvm-profdata/memprof-basic.test
A llvm/test/tools/llvm-profdata/memprof-basic_v4.test
M llvm/test/tools/llvm-profdata/memprof-inline.test
M llvm/test/tools/llvm-profdata/memprof-multi.test
M llvm/test/tools/llvm-profdata/memprof-padding-histogram.test
M llvm/test/tools/llvm-profdata/memprof-pic.test
Log Message:
-----------
Reapply "[MemProf] Change histogram storage from uint64_t to uint16_t… (#151431)
Reapply #147854 after fixes merged in #151398.
Change memory access histogram storage from uint64_t to uint16_t to
reduce profile size on disk. This change updates the raw profile format
to v5. Also add a histogram test in compiler-rt since we didn't have one
before. With this change the histogram memprof raw for the basic test
reduces from 75KB -> 20KB.
Commit: 19f3aca7efc2f71c5210c182ea8a3ca01e5c1a10
https://github.com/llvm/llvm-project/commit/19f3aca7efc2f71c5210c182ea8a3ca01e5c1a10
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Remove unused vector pseudo class. NFC (#151327)
Commit: 596640a245e3ba05c3fe42745984fb4bb921ad75
https://github.com/llvm/llvm-project/commit/596640a245e3ba05c3fe42745984fb4bb921ad75
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Fold vmv.v.v into vmerge (#151341)
We support folding vmv.v.v into its source via the foldVMV_V_V peephole,
but currently it requires that the source has a policy operand.
PseudoVMERGEs (as well as add-with-carry/subtract-with-borrow pseudos)
don't have a policy operand, and instead just seem to derive TA/TU from
whether or not the passthru is undef, since the mask policy doesn't
affect them.
This patch allows pseudos without policy operands, given that if there's
no policy operand then it will default to TU when the passthru is
undefined which should be conservatively correct.
I previously tried adding a policy operand to vmerge/vadc etc., but this
ended up being a lot of churn.
This removes a bunch of redundant vmv.v.vs that I noticed with EVL tail
folding on llvm-test-suite.
Commit: ef962752d9fee02fe1e626dc92206eb0457e2aa3
https://github.com/llvm/llvm-project/commit/ef962752d9fee02fe1e626dc92206eb0457e2aa3
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/allocator_config.def
M compiler-rt/lib/scudo/standalone/allocator_config_wrapper.h
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
Log Message:
-----------
[scudo] Allow the quarantine code to be compiled out (#151064)
Add a new configuration option QuarantineDisabled that allows all of the
quarantine code to be compiled out.
Add new tests that verify that the code is removed properly.
On Android, this saves ~4000 bytes for 32 bit and ~6000 bytes for 64
bit.
On Android, I used some microbenchmarks that do malloc/free in a loop
and for allocations in the primary, the performance is about the same
for both 32 bit and 64 bit. For secondary allocations, I saw ~8% speed
up on 32 bit and ~3% on 64 bit speed up which feels like it could just
be code size improvements.
Commit: f62370290a66f8d3a47a4b25c3896983424f97bd
https://github.com/llvm/llvm-project/commit/f62370290a66f8d3a47a4b25c3896983424f97bd
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/source/Plugins/Process/wasm/CMakeLists.txt
M lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
M lldb/source/Plugins/Process/wasm/ProcessWasm.h
A lldb/source/Plugins/Process/wasm/RegisterContextWasm.cpp
A lldb/source/Plugins/Process/wasm/RegisterContextWasm.h
M lldb/source/Plugins/Process/wasm/ThreadWasm.cpp
M lldb/source/Plugins/Process/wasm/ThreadWasm.h
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
A lldb/test/API/functionalities/gdb_remote_client/simple.c
A lldb/test/API/functionalities/gdb_remote_client/simple.yaml
Log Message:
-----------
[lldb] Implement RegisterContextWasm (#151056)
This PR implements a register context for Wasm, which uses virtual
registers to resolve Wasm local, globals and stack values. The registers
are used to implement support for `DW_OP_WASM_location` in the DWARF
expression evaluator (#151010). This also adds a more comprehensive
test, showing that we can use this to show local variables.
Commit: ebf96f93160973ab5b0c886655adde850affc707
https://github.com/llvm/llvm-project/commit/ebf96f93160973ab5b0c886655adde850affc707
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-07-31 (Thu, 31 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/X86/apx/cf.ll
Log Message:
-----------
[X86][APX] Do optimizeMemoryInst for v1X masked load/store (#151331)
Fix redundant LEA: https://godbolt.org/z/34xEYE818
Commit: 8a5ef3f82be4551571bf1c39b36421463e1c6fec
https://github.com/llvm/llvm-project/commit/8a5ef3f82be4551571bf1c39b36421463e1c6fec
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M .github/CODEOWNERS
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/release-tasks.yml
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Core/Relocation.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/missing-code-marker.s
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.h
M clang-tools-extra/clangd/FindSymbols.cpp
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
M clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
M clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/qualified-auto.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer-config.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer.cpp
M clang/cmake/caches/Release.cmake
A clang/cmake/caches/release_cpack_pre_build_strip_lto.cmake
M clang/docs/CommandGuide/clang.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers/unix_malloc_example.c
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/Driver/CudaInstallationDetector.h
A clang/include/clang/Driver/LazyDetector.h
M clang/include/clang/Driver/Options.td
A clang/include/clang/Driver/RocmInstallationDetector.h
A clang/include/clang/Driver/SyclInstallationDetector.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/DynamicAllocator.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/AST/RecordLayoutBuilder.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
R clang/lib/Driver/ToolChains/LazyDetector.h
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
R clang/lib/Driver/ToolChains/ROCm.h
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Frontend/Rewrite/FrontendActions.cpp
M clang/lib/Headers/avx10_2_512niintrin.h
M clang/lib/Headers/avx10_2niintrin.h
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Headers/opencl-c.h
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTypeTraits.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NSErrorChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/AST/ByteCode/functions.cpp
A clang/test/ASTMerge/enum/Inputs/enum3.c
A clang/test/ASTMerge/enum/Inputs/enum4.c
A clang/test/ASTMerge/enum/test2.c
M clang/test/Analysis/Inputs/expected-plists/NewDelete-path-notes.cpp.plist
M clang/test/Analysis/Inputs/expected-plists/malloc-plist.c.plist
M clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/Malloc+MismatchedDeallocator+NewDelete.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
M clang/test/Analysis/NewDelete-intersections.mm
M clang/test/Analysis/NewDelete-path-notes.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/diagnostics/dtors.cpp
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/getline-alloc.c
M clang/test/Analysis/gmalloc.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc-annotations.cpp
M clang/test/Analysis/malloc-free-after-return.cpp
M clang/test/Analysis/malloc-interprocedural.c
M clang/test/Analysis/malloc-plist.c
M clang/test/Analysis/malloc-refcounted.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.mm
M clang/test/Analysis/new.cpp
M clang/test/Analysis/placement-new.cpp
M clang/test/Analysis/retain-count-alloc.cpp
M clang/test/Analysis/self-assign.cpp
M clang/test/Analysis/stack-frame-context-revision.cpp
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
M clang/test/Analysis/std-string.cpp
M clang/test/C/C23/n3037.c
M clang/test/CIR/CodeGen/array-ctor.cpp
A clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/builtin_bit.cpp
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
M clang/test/CIR/CodeGen/ctor-alias.cpp
A clang/test/CIR/CodeGen/cxx-conversion-operators.cpp
M clang/test/CIR/CodeGen/dtor-alias.cpp
A clang/test/CIR/CodeGen/finegrain-bitfield-access.cpp
A clang/test/CIR/CodeGen/no-prototype.c
A clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/Transforms/bit.cir
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/AArch64/neon-scalar-copy.c
M clang/test/CodeGen/AArch64/neon-vget.c
M clang/test/CodeGen/AArch64/poly64.c
M clang/test/CodeGen/X86/avx10_2_512ni-builtins.c
M clang/test/CodeGen/X86/avx10_2ni-builtins.c
M clang/test/CodeGen/attr-counted-by-for-pointers.c
M clang/test/CodeGen/ms_struct-long-double.c
M clang/test/CodeGenCUDA/bf16.cu
M clang/test/CodeGenCXX/debug-info-gline-tables-only.cpp
M clang/test/CodeGenCoroutines/coro-await.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/amdgpu-features.cl
A clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-async-load-store-lds.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/Driver/aarch64-toolchain.c
A clang/test/Driver/arm-aarch64-multilib-invalid-arch.c
M clang/test/Driver/arm-toolchain.c
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-dependent-options.hip
M clang/test/Driver/hip-phases.hip
A clang/test/Driver/hipspv-link-static-library.hip
M clang/test/Driver/linker-wrapper-libs.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/lto-dwo.c
M clang/test/Driver/mingw-msvcrt.c
M clang/test/Driver/opt-record.c
M clang/test/Driver/wasm-features.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Modules/specializations-lazy-load-parentmap-crash.cpp
M clang/test/Parser/cxx23-assume.cpp
M clang/test/Preprocessor/Inputs/llvm-windres.h
A clang/test/Preprocessor/builtin_aux_info.cpp
M clang/test/Preprocessor/init-x86.c
A clang/test/Preprocessor/preprocess-cpp-output.c
A clang/test/Preprocessor/preprocess-pragma-cpp-output.c
A clang/test/Preprocessor/riscv-target-features-cv.c
M clang/test/Preprocessor/riscv-target-features-sifive.c
A clang/test/Preprocessor/riscv-target-features-thead.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Preprocessor/wasm-target-features.c
A clang/test/Sema/aarch64-sme-attrs-without-sve.cpp
M clang/test/Sema/attr-nonstring.c
A clang/test/Sema/builtins-arm-exclusive-124.c
A clang/test/Sema/builtins-arm-exclusive-4.c
A clang/test/Sema/builtins-arm-exclusive-none.c
M clang/test/Sema/builtins-arm-exclusive.c
M clang/test/Sema/constexpr-void-cast.c
M clang/test/Sema/warn-unreachable_crash.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
A clang/test/SemaCXX/noreturn-weverything.c
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags-std.cpp
M clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
A clang/test/SemaObjC/attr-nodiscard.m
A clang/test/SemaObjCXX/attr-nodiscard.mm
M clang/test/SemaTemplate/concepts.cpp
M clang/tools/cir-lsp-server/CMakeLists.txt
M clang/tools/cir-opt/cir-opt.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M compiler-rt/include/profile/MemProfData.inc
M compiler-rt/lib/builtins/crtbegin.c
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerOptions.h
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
M compiler-rt/lib/memprof/memprof_interface_internal.h
M compiler-rt/lib/memprof/memprof_rawprofile.cpp
M compiler-rt/lib/memprof/tests/CMakeLists.txt
A compiler-rt/lib/memprof/tests/histogram_encoding.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/scudo/standalone/allocator_config.def
M compiler-rt/lib/scudo/standalone/allocator_config_wrapper.h
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
M compiler-rt/test/asan/TestCases/Linux/long-object-path.cpp
A compiler-rt/test/fuzzer/SigTrapTest.cpp
M compiler-rt/test/fuzzer/afl-driver-stderr.test
A compiler-rt/test/fuzzer/sig-trap.test
A compiler-rt/test/memprof/TestCases/memprof_histogram_uint8.cpp
M compiler-rt/test/sanitizer_common/TestCases/suffix-log-path_test.c
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-inmemory.cpp
M compiler-rt/test/xray/TestCases/Posix/fdr-mode-multiple.cpp
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/io-stmt.cpp
M flang-rt/lib/runtime/namelist.cpp
M flang-rt/lib/runtime/unit.h
M flang-rt/unittests/Runtime/CMakeLists.txt
A flang-rt/unittests/Runtime/InputExtensions.cpp
M flang/docs/Extensions.md
M flang/docs/FortranStandardsSupport.md
M flang/docs/OpenMPSupport.md
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/OpenACC.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Semantics/semantics.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Optimizer/Support/CMakeLists.txt
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/pointer-assignment.cpp
A flang/test/Lower/OpenACC/Todo/do-loops-to-acc-loops-todo.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
A flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
A flang/test/Lower/OpenMP/atomic-control-options.f90
M flang/test/Lower/OpenMP/unroll-heuristic01.f90
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
A flang/test/Lower/OpenMP/unroll-heuristic03.f90
M flang/test/Semantics/OpenACC/acc-atomic-validity.f90
M flang/test/Semantics/assign02.f90
A flang/test/Semantics/bug1214.cuf
M flang/test/Semantics/cuf11.cuf
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_barrier_t.h
A libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__barrier_type.h
A libc/include/llvm-libc-types/pthread_barrier_t.h
A libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/include/sched.yaml
M libc/include/wchar.yaml
M libc/shared/math.h
M libc/shared/math/asinf16.h
A libc/shared/math/asinhf.h
A libc/shared/math/asinhf16.h
A libc/shared/math/atan.h
A libc/shared/math/atan2.h
A libc/shared/math/atanf.h
A libc/shared/math/atanf16.h
M libc/src/__support/FPUtil/cast.h
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinhf.h
A libc/src/__support/math/asinhf16.h
A libc/src/__support/math/atan.h
A libc/src/__support/math/atan2.h
A libc/src/__support/math/atan_utils.h
A libc/src/__support/math/atanf.h
A libc/src/__support/math/atanf16.h
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/barrier.cpp
A libc/src/__support/threads/linux/barrier.h
M libc/src/__support/wchar/CMakeLists.txt
A libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/math/CMakeLists.txt
A libc/src/math/fabsbf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/asinhf16.cpp
M libc/src/math/generic/atan.cpp
M libc/src/math/generic/atan2.cpp
M libc/src/math/generic/atan2f128.cpp
M libc/src/math/generic/atan2l.cpp
R libc/src/math/generic/atan_utils.h
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/atanf16.cpp
A libc/src/math/generic/fabsbf16.cpp
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_barrier_destroy.cpp
A libc/src/pthread/pthread_barrier_destroy.h
A libc/src/pthread/pthread_barrier_init.cpp
A libc/src/pthread/pthread_barrier_init.h
A libc/src/pthread/pthread_barrier_wait.cpp
A libc/src/pthread/pthread_barrier_wait.h
M libc/src/sched/CMakeLists.txt
A libc/src/sched/getcpu.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/getcpu.cpp
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/sched/linux/sched_getcpucount.cpp
M libc/src/sched/linux/sched_getscheduler.cpp
M libc/src/sched/linux/sched_rr_get_interval.cpp
M libc/src/sched/linux/sched_setaffinity.cpp
M libc/src/sched/sched_getaffinity.h
M libc/src/sched/sched_getcpucount.h
M libc/src/sched/sched_getscheduler.h
M libc/src/sched/sched_rr_get_interval.h
M libc/src/sched/sched_setaffinity.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/mbsnrtowcs.cpp
A libc/src/wchar/mbsnrtowcs.h
A libc/src/wchar/mbsrtowcs.cpp
A libc/src/wchar/mbsrtowcs.h
A libc/src/wchar/mbstowcs.cpp
A libc/src/wchar/mbstowcs.h
M libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcschr.cpp
M libc/src/wchar/wcspbrk.cpp
M libc/src/wchar/wcstok.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_barrier_test.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/FPUtil/comparison_operations_test.cpp
M libc/test/src/math/generic/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/fabsbf16_test.cpp
M libc/test/src/sched/CMakeLists.txt
M libc/test/src/sched/affinity_test.cpp
M libc/test/src/sched/cpu_count_test.cpp
M libc/test/src/sched/get_priority_test.cpp
A libc/test/src/sched/getcpu_test.cpp
M libc/test/src/sched/sched_rr_get_interval_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/mbsnrtowcs_test.cpp
A libc/test/src/wchar/mbsrtowcs_test.cpp
A libc/test/src/wchar/mbstowcs_test.cpp
M libclc/CMakeLists.txt
R libclc/clc/include/clc/math/unary_def_via_fp32.inc
M libclc/clc/lib/amdgcn/SOURCES
R libclc/clc/lib/amdgcn/math/clc_fmax.cl
R libclc/clc/lib/amdgcn/math/clc_fmin.cl
M libclc/clc/lib/generic/geometric/clc_normalize.inc
M libclc/clc/lib/generic/math/clc_erf.cl
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_fmax.cl
M libclc/clc/lib/generic/math/clc_fmin.cl
M libclc/clc/lib/generic/math/clc_tgamma.cl
M libclc/clc/lib/r600/SOURCES
R libclc/clc/lib/r600/math/clc_fmax.cl
R libclc/clc/lib/r600/math/clc_fmin.cl
M libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv/math/clc_fmax.cl
A libclc/clc/lib/spirv/math/clc_fmin.cl
M libclc/cmake/modules/AddLibclc.cmake
A libcxx/cmake/caches/Generic-hardening-mode-extensive-observe-semantic.cmake
M libcxx/docs/Hardening.rst
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/UserDocumentation.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__config
M libcxx/include/__cxx03/__config
M libcxx/include/__format/concepts.h
A libcxx/include/__format/fmt_pair_like.h
M libcxx/include/__format/range_default_formatter.h
M libcxx/include/__format/range_format.h
M libcxx/include/__format/range_formatter.h
M libcxx/include/__vector/vector.h
M libcxx/include/__vector/vector_bool.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/diagnostics/vector.nodiscard.verify.cpp
M libcxx/test/libcxx/thread/thread.barrier/assert.arrive.pass.cpp
M libcxx/test/libcxx/thread/thread.latch/assert.arrive_and_wait.pass.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/and_then.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/or_else.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/value.observers.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/and_then.mandates.verify.cpp
M libcxx/test/std/containers/sequences/array/array.creation/to_array.verify.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/conversion.verify.cpp
M libcxx/test/std/utilities/function.objects/func.bind.partial/bind_back.verify.cpp
M libcxx/test/std/utilities/function.objects/func.bind_front/bind_front.verify.cpp
M libcxx/test/support/check_assertion.h
M libcxx/test/support/test.support/test_check_assertion.pass.cpp
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/params.py
M libcxx/vendor/llvm/default_assertion_handler.in
M libcxxabi/src/demangle/DemangleConfig.h
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/Options.td
M lld/COFF/PDB.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
A lld/test/COFF/alternatename-alias.s
A lld/test/COFF/alternatename-antidep.s
A lld/test/COFF/alternatename-lib.s
M lld/test/COFF/arm64ec-altnames.s
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64x-delayimport.test
M lld/test/COFF/delayimports.test
M lld/test/COFF/delayimporttables.yaml
A lld/test/COFF/embed-bitcode.test
M lld/test/COFF/giats.s
A lld/test/COFF/pdb-empty-sec.s
M lld/test/ELF/loongarch-relax-pc-hi20-lo12.s
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/API/SBSymbolContext.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
M lldb/include/lldb/Core/ModuleList.h
M lldb/include/lldb/Expression/DWARFExpression.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedBreakpointInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/builders/__init__.py
M lldb/packages/Python/lldbsuite/test/dotest.py
M lldb/packages/Python/lldbsuite/test/lldbgdbclient.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/API/CMakeLists.txt
M lldb/source/Breakpoint/BreakpointResolverScripted.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/Process/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/Linux/CMakeLists.txt
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
A lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64dbreg.cpp
A lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64dbreg.h
M lldb/source/Plugins/Process/Utility/AuxVector.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
A lldb/source/Plugins/Process/wasm/CMakeLists.txt
A lldb/source/Plugins/Process/wasm/ProcessWasm.cpp
A lldb/source/Plugins/Process/wasm/ProcessWasm.h
A lldb/source/Plugins/Process/wasm/RegisterContextWasm.cpp
A lldb/source/Plugins/Process/wasm/RegisterContextWasm.h
A lldb/source/Plugins/Process/wasm/ThreadWasm.cpp
A lldb/source/Plugins/Process/wasm/ThreadWasm.h
A lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
A lldb/source/Plugins/Process/wasm/UnwindWasm.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/DWARF/CMakeLists.txt
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h
A lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.cpp
A lldb/source/Plugins/SymbolFile/DWARF/SymbolFileWasm.h
M lldb/source/Plugins/SymbolFile/NativePDB/PdbUtil.h
M lldb/source/Target/InstrumentationRuntime.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Target.cpp
A lldb/source/Utility/WasmVirtualRegisters.h
M lldb/test/API/commands/expression/import-std-module/array/TestArrayFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/basic/TestImportStdModule.py
M lldb/test/API/commands/expression/import-std-module/conflicts/TestStdModuleWithConflicts.py
M lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/list/TestListFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/non-module-type-separation/TestNonModuleTypeSeparation.py
M lldb/test/API/commands/expression/import-std-module/retry-with-std-module/TestRetryWithStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr-dbg-info-content/TestSharedPtrDbgInfoContentFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/shared_ptr/TestSharedPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/unique_ptr-dbg-info-content/TestUniquePtrDbgInfoContent.py
M lldb/test/API/commands/expression/import-std-module/unique_ptr/TestUniquePtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr-dbg-info-content/TestDbgInfoContentWeakPtrFromStdModule.py
M lldb/test/API/commands/expression/import-std-module/weak_ptr/TestWeakPtrFromStdModule.py
M lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/resolver.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
A lldb/test/API/functionalities/gdb_remote_client/simple.c
A lldb/test/API/functionalities/gdb_remote_client/simple.yaml
M lldb/test/API/functionalities/postmortem/elf-core/expr/TestExpr.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_core_file/core.mte
M lldb/test/API/linux/aarch64/mte_core_file/core.nomte
M lldb/test/API/linux/aarch64/mte_core_file/main.c
M lldb/test/Shell/Commands/command-disassemble-process.yaml
M lldb/test/Shell/Commands/command-image-lookup.yaml
M lldb/test/Shell/Minidump/Windows/arm-fp-unwind.test
M lldb/test/Shell/Minidump/Windows/broken-unwind.test
M lldb/test/Shell/Minidump/Windows/find-module.test
M lldb/test/Shell/Minidump/memory-region-from-module.yaml
M lldb/test/Shell/ObjectFile/Breakpad/uuid-matching-mac.test
M lldb/test/Shell/ObjectFile/ELF/minidebuginfo-set-and-hit-breakpoint.test
A lldb/test/Shell/Recognizer/Inputs/ubsan_add_overflow.c
A lldb/test/Shell/Recognizer/ubsan_add_overflow.test
M lldb/test/Shell/SymbolFile/Breakpad/inline-record.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-discontinuous-file-ids.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-edgecases.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-missing-file.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table-mixed-path-styles.test
M lldb/test/Shell/SymbolFile/Breakpad/line-table.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab-macho.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab-sorted-by-size.test
M lldb/test/Shell/SymbolFile/Breakpad/symtab.test
M lldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-win-no-memory-info.yaml
M lldb/test/Shell/SymbolFile/DWARF/dwo-missing-error.test
M lldb/test/Shell/SymbolFile/DWARF/dwo-relative-path.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_loclists-dwo.s
M lldb/test/Shell/SymbolFile/DWARF/x86/debug_rnglists-dwo.s
M lldb/test/Shell/SymbolFile/DWARF/x86/dwo-type-in-main-file.s
M lldb/test/Shell/SymbolFile/PDB/class-layout.test
M lldb/test/Shell/SymbolFile/PDB/compilands.test
M lldb/test/Shell/SymbolFile/PDB/enums-layout.test
M lldb/test/Shell/SymbolFile/PDB/func-symbols.test
M lldb/test/Shell/SymbolFile/PDB/pointers.test
M lldb/test/Shell/SymbolFile/PDB/type-quals.test
M lldb/test/Shell/SymbolFile/PDB/typedefs.test
M lldb/test/Shell/SymbolFile/PDB/variables.test
M lldb/unittests/Expression/CMakeLists.txt
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M llvm/cmake/modules/LLVMProcessSources.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/CommandGuide/llvm-ir2vec.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/TableGen/BackGuide.rst
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/ADT/Any.h
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/COFF.h
M llvm/include/llvm/BinaryFormat/SFrame.h
M llvm/include/llvm/BinaryFormat/SFrameConstants.def
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/GCMetadata.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCIndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/SpeculateAnalyses.h
M llvm/include/llvm/IR/GCStrategy.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/Object/SFrameParser.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/ProfileData/MemProfData.inc
M llvm/include/llvm/Support/AArch64AttributeParser.h
M llvm/include/llvm/Support/AMDHSAKernelDescriptor.h
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/include/llvm/Support/Windows/WindowsSupport.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TextAPI/SymbolSet.h
M llvm/include/llvm/Transforms/HipStdPar/HipStdPar.h
M llvm/include/llvm/Transforms/Scalar/Reassociate.h
M llvm/include/llvm/Transforms/Utils/Mem2Reg.h
M llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/UniformityAnalysis.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/BinaryFormat/SFrame.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOX86_64.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCXCOFFStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/ObjCopy/COFF/COFFReader.cpp
M llvm/lib/Object/SFrameParser.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Support/Debug.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Windows/Threading.inc
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
M llvm/lib/Target/PowerPC/PPCInstrP10.td
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.h
M llvm/lib/Target/WebAssembly/WebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/LibCallsShrinkWrap.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/ARM/arith-overflow.ll
M llvm/test/Analysis/CostModel/ARM/arith-ssat.ll
M llvm/test/Analysis/CostModel/ARM/arith-usat.ll
M llvm/test/Analysis/CostModel/RISCV/fround.ll
A llvm/test/Analysis/ScalarEvolution/zext-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vacopy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
M llvm/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
M llvm/test/CodeGen/AArch64/aarch64-isel-csinc-type.ll
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/add-extract.ll
M llvm/test/CodeGen/AArch64/addsub.ll
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/andorbrcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/arm64-fml-combines.ll
M llvm/test/CodeGen/AArch64/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/arm64-vmul.ll
A llvm/test/CodeGen/AArch64/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/AArch64/callsite-emit-calleetypeid.ll
M llvm/test/CodeGen/AArch64/cmp-chains.ll
M llvm/test/CodeGen/AArch64/combine-and-like.ll
M llvm/test/CodeGen/AArch64/constant-pool-partition.ll
M llvm/test/CodeGen/AArch64/dag-combine-select.ll
M llvm/test/CodeGen/AArch64/fcsel-zero.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
M llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
A llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
M llvm/test/CodeGen/AArch64/logical_shifted_reg.ll
M llvm/test/CodeGen/AArch64/machine-combiner-reassociate.mir
M llvm/test/CodeGen/AArch64/machine-combiner.ll
M llvm/test/CodeGen/AArch64/machine-combiner.mir
M llvm/test/CodeGen/AArch64/midpoint-int.ll
M llvm/test/CodeGen/AArch64/neg-abs.ll
M llvm/test/CodeGen/AArch64/neg-selects.ll
M llvm/test/CodeGen/AArch64/neon-dot-product.ll
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
M llvm/test/CodeGen/AArch64/reassocmls.ll
A llvm/test/CodeGen/AArch64/register-coalesce-implicit-def-subreg-to-reg.mir
M llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
M llvm/test/CodeGen/AArch64/sched-past-vector-ldst.ll
M llvm/test/CodeGen/AArch64/selectopt-const.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
A llvm/test/CodeGen/AArch64/store-float-conversion.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
A llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
A llvm/test/CodeGen/AMDGPU/code-size-estimate-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
A llvm/test/CodeGen/AMDGPU/gfx1250-no-scope-cu-stores.ll
A llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
A llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
A llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.pk.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.iterative.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
A llvm/test/CodeGen/AMDGPU/merged-bfx-opt.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
A llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
M llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
A llvm/test/CodeGen/ARM/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/ARM/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/ARM/callsite-emit-calleetypeid.ll
M llvm/test/CodeGen/ARM/fcopysign.ll
M llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/BPF/BTF/map-def-2.ll
M llvm/test/CodeGen/BPF/BTF/map-def-3.ll
A llvm/test/CodeGen/BPF/BTF/map-def-nested-array.ll
M llvm/test/CodeGen/Hexagon/hvx-reuse-fi-base.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/legalize-load-store.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
A llvm/test/CodeGen/MIR/X86/callsite-emit-calleetypeid.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir
A llvm/test/CodeGen/Mips/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/Mips/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/Mips/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/Mips/nan_lowering.ll
R llvm/test/CodeGen/Mips/qnan.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bug26185-2.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
A llvm/test/CodeGen/NVPTX/combine-wide.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
A llvm/test/CodeGen/NVPTX/ld-param-sink.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vector-loads.ll
M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/combine-fneg.ll
M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
M llvm/test/CodeGen/PowerPC/frem.ll
A llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
M llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll
M llvm/test/CodeGen/PowerPC/ldexp.ll
M llvm/test/CodeGen/PowerPC/llvm.modf.ll
M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/xxeval-vselect-x-and.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
A llvm/test/CodeGen/RISCV/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/RISCV/calling-conv-preserve-most.ll
A llvm/test/CodeGen/RISCV/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/RISCV/callsite-emit-calleetypeid.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/pr141907.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/CodeGen/RISCV/xmips-cbop.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/issue-146942-ptr-cast.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/is_fpclass.ll
A llvm/test/CodeGen/WebAssembly/lower-em-sjlj-alloca.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj-debuginfo.ll
M llvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-ehsjlj.ll
M llvm/test/CodeGen/WebAssembly/lower-wasm-sjlj.ll
A llvm/test/CodeGen/WebAssembly/narrow-simd-mul.ll
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
M llvm/test/CodeGen/WebAssembly/target-features-cpus.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/test/CodeGen/X86/apx/cf.ll
A llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll
A llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll
A llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll
A llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness.ll
M llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
A llvm/test/CodeGen/X86/coalescing-subreg-to-reg-requires-subrange-update.mir
M llvm/test/CodeGen/X86/combine-add-ssat.ll
M llvm/test/CodeGen/X86/combine-add-usat.ll
M llvm/test/CodeGen/X86/combine-sub-ssat.ll
M llvm/test/CodeGen/X86/combine-sub-usat.ll
M llvm/test/CodeGen/X86/constant-pool-partition.ll
M llvm/test/CodeGen/X86/embed-bitcode.ll
A llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
M llvm/test/CodeGen/X86/load-combine.ll
M llvm/test/CodeGen/X86/pr33960.ll
A llvm/test/CodeGen/X86/pr76416.ll
M llvm/test/CodeGen/X86/stack-protector.ll
M llvm/test/CodeGen/X86/subreg-fail.mir
A llvm/test/CodeGen/X86/subreg-to-reg-coalescing.mir
M llvm/test/CodeGen/X86/swap.ll
M llvm/test/CodeGen/X86/win32-ssp.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
A llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-gfni-intrinsics.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop2_fake16_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_ds.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop2_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_ds.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/kernel-descriptor-errors.test
M llvm/test/MC/RISCV/rvv/fadd.s
M llvm/test/MC/RISCV/rvv/fcompare.s
M llvm/test/MC/RISCV/rvv/fdiv.s
M llvm/test/MC/RISCV/rvv/fmacc.s
M llvm/test/MC/RISCV/rvv/fminmax.s
M llvm/test/MC/RISCV/rvv/fmul.s
M llvm/test/MC/RISCV/rvv/fmv.s
M llvm/test/MC/RISCV/rvv/fothers.s
M llvm/test/MC/RISCV/rvv/freduction.s
M llvm/test/MC/RISCV/rvv/fsub.s
M llvm/test/MC/RISCV/rvv/zvfbfwma.s
M llvm/test/MC/RISCV/xqcisim-valid.s
M llvm/test/MC/RISCV/xqcisync-valid.s
M llvm/test/TableGen/CompressInstEmitter/suboperands.td
M llvm/test/TableGen/get-named-operand-idx.td
M llvm/test/TableGen/getsetop.td
M llvm/test/TableGen/unsetop.td
A llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
A llvm/test/Transforms/FunctionAttrs/noalias.ll
M llvm/test/Transforms/FunctionAttrs/nofree.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/norecurse.ll
M llvm/test/Transforms/FunctionAttrs/nounwind.ll
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
M llvm/test/Transforms/GVN/PRE/load-metadata.ll
M llvm/test/Transforms/GVN/PRE/load-pre-across-backedge.ll
M llvm/test/Transforms/GVN/PRE/load-pre-nonlocal.ll
M llvm/test/Transforms/GVN/PRE/lpre-call-wrap.ll
M llvm/test/Transforms/GVN/PRE/rle-addrspace-cast.ll
M llvm/test/Transforms/GVN/PRE/rle-semidominated.ll
A llvm/test/Transforms/HipStdPar/math-fixup.ll
A llvm/test/Transforms/IndVarSimplify/AArch64/fold-ext-add.ll
M llvm/test/Transforms/IndVarSimplify/zext-nuw.ll
M llvm/test/Transforms/InstCombine/2010-11-21-SizeZeroTypeGEP.ll
M llvm/test/Transforms/InstCombine/canonicalize-gep-constglob.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/gepphigep.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/load-cmp.ll
M llvm/test/Transforms/InstCombine/loadstore-alignment.ll
A llvm/test/Transforms/InstCombine/or-packed-int-vecs.ll
M llvm/test/Transforms/InstCombine/pr58901.ll
M llvm/test/Transforms/InstCombine/ptrtoint-nullgep.ll
A llvm/test/Transforms/InstCombine/recurrence-binary-intrinsic.ll
M llvm/test/Transforms/InstCombine/strcmp-3.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vector_gep1.ll
A llvm/test/Transforms/InstCombine/vectorgep-crash.ll
R llvm/test/Transforms/InstSimplify/ConstProp/vectorgep-crash.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/LoopFusion/sunk-phi-nodes.ll
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
A llvm/test/Transforms/LoopUnroll/Hexagon/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vector-loop-backedge-elimination-with-evl.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-div.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-gather-scatter.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-no-masking.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
M llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
M llvm/test/Transforms/LowerTypeTests/Inputs/exported-funcs.yaml
M llvm/test/Transforms/LowerTypeTests/export-alias.ll
A llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
M llvm/test/Transforms/SCCP/no-fold-fcmp-dynamic-denormal-mode-issue114947.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/exp.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/fround.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/function-alias.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
A llvm/test/tools/llvm-ir2vec/entities.ll
A llvm/test/tools/llvm-ir2vec/error-handling.ll
M llvm/test/tools/llvm-ir2vec/triplets.ll
A llvm/test/tools/llvm-mc/disassembler-profile.test
A llvm/test/tools/llvm-objcopy/COFF/exe-bogus-assoc.test
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/basic.memprofraw
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofexe
A llvm/test/tools/llvm-profdata/Inputs/basic_v4.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/buildid.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/inline.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/multi.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/padding-histogram.memprofraw
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofexe
M llvm/test/tools/llvm-profdata/Inputs/pic.memprofraw
M llvm/test/tools/llvm-profdata/memprof-basic-histogram.test
M llvm/test/tools/llvm-profdata/memprof-basic.test
A llvm/test/tools/llvm-profdata/memprof-basic_v4.test
M llvm/test/tools/llvm-profdata/memprof-inline.test
M llvm/test/tools/llvm-profdata/memprof-multi.test
M llvm/test/tools/llvm-profdata/memprof-padding-histogram.test
M llvm/test/tools/llvm-profdata/memprof-pic.test
M llvm/test/tools/llvm-rc/windres-preproc.test
R llvm/test/tools/llvm-readobj/COFF/Inputs/has-cet.exe
A llvm/test/tools/llvm-readobj/COFF/Inputs/has-exdllcharacteristics.exe
R llvm/test/tools/llvm-readobj/COFF/cetcompat.test
A llvm/test/tools/llvm-readobj/COFF/exdllcharacteristics.test
A llvm/test/tools/llvm-readobj/ELF/sframe-fde.test
M llvm/test/tools/llvm-readobj/ELF/sframe-header.test
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-mc/Disassembler.cpp
M llvm/tools/llvm-mc/Disassembler.h
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/llvm-rc/llvm-rc.cpp
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/spirv-tools/CMakeLists.txt
M llvm/unittests/Analysis/IR2VecTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
A llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
A llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
M llvm/unittests/Support/DebugLogTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/InstrInfoEmitter.cpp
M llvm/utils/UpdateTestChecks/asm.py
M llvm/utils/gn/build/write_vcsrevision.py
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Linux/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/DWARF/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/lldbDataFormatters.py
A llvm/utils/mlgo-utils/IR2Vec/generateTriplets.py
M llvm/utils/release/github-upload-release.py
M llvm/utils/update_mir_test_checks.py
A mlir/Maintainers.md
M mlir/docs/DefiningDialects/AttributesAndTypes.md
M mlir/docs/Dialects/Vector.md
M mlir/docs/Dialects/emitc.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/examples/standalone/standalone-opt/CMakeLists.txt
M mlir/examples/standalone/standalone-opt/standalone-opt.cpp
M mlir/examples/toy/Ch5/CMakeLists.txt
M mlir/examples/toy/Ch5/toyc.cpp
M mlir/examples/toy/Ch6/CMakeLists.txt
M mlir/examples/toy/Ch6/toyc.cpp
M mlir/examples/toy/Ch7/CMakeLists.txt
M mlir/examples/toy/Ch7/toyc.cpp
M mlir/examples/transform-opt/CMakeLists.txt
M mlir/examples/transform-opt/mlir-transform-opt.cpp
M mlir/include/mlir/Conversion/MemRefToEmitC/MemRefToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEIntrinsicOps.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotModuleBufferize.h
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Diagnostics.h
M mlir/include/mlir/IR/StorageUniquerSupport.h
M mlir/include/mlir/IR/SymbolInterfaces.td
M mlir/include/mlir/InitAllDialects.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/include/mlir/InitAllPasses.h
M mlir/include/mlir/Interfaces/CallInterfaces.td
M mlir/include/mlir/Support/ToolUtilities.h
M mlir/include/mlir/Target/LLVMIR/Dialect/All.h
A mlir/include/mlir/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.h
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/AsmParser/DialectSymbolParser.cpp
M mlir/lib/AsmParser/Lexer.cpp
M mlir/lib/AsmParser/Lexer.h
M mlir/lib/CAPI/RegisterEverything/CMakeLists.txt
M mlir/lib/CMakeLists.txt
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/lib/Conversion/ControlFlowToSPIRV/ControlFlowToSPIRVPass.cpp
M mlir/lib/Conversion/FuncToSPIRV/FuncToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/NVVMToLLVM/NVVMToLLVM.cpp
M mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRVPass.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/MemRef/Transforms/ComposeSubView.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
M mlir/lib/Dialect/Shard/IR/ShardOps.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Pass/Pass.cpp
A mlir/lib/RegisterAllDialects.cpp
A mlir/lib/RegisterAllExtensions.cpp
A mlir/lib/RegisterAllPasses.cpp
M mlir/lib/Support/ToolUtilities.cpp
M mlir/lib/Target/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/NVVM/LLVMIRToNVVMTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/lib/Target/LLVMIR/Dialect/XeVM/CMakeLists.txt
A mlir/lib/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.h
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/lib/Tools/mlir-translate/MlirTranslateMain.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/ComplexToROCDLLibraryCalls/complex-to-rocdl-library-calls.mlir
M mlir/test/Conversion/ConvertToSPIRV/convert-gpu-modules.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
M mlir/test/Conversion/FuncToSPIRV/types-to-spirv.mlir
M mlir/test/Conversion/GPUToSPIRV/rotate.mlir
A mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc.mlir
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
A mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/ops.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface-multiple-of.mlir
M mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir
M mlir/test/Dialect/Linalg/vectorization/extract-with-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SPIRV/IR/types.mlir
M mlir/test/Dialect/SPIRV/Transforms/abi-interface.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Dialect/Tosa/availability.mlir
A mlir/test/Dialect/Tosa/controlflow.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/int-range-interface.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-sink.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
A mlir/test/IR/diagnostic-nosplit.mlir
M mlir/test/IR/test-pattern-logging-listener.mlir
M mlir/test/IR/top-level.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
A mlir/test/Target/LLVMIR/xevm.mlir
M mlir/test/Target/SPIRV/constant.mlir
A mlir/test/Target/SPIRV/lit.local.cfg
M mlir/test/Target/SPIRV/memory-ops.mlir
M mlir/test/Target/SPIRV/struct.mlir
M mlir/test/Target/SPIRV/undef.mlir
M mlir/test/Transforms/compose-subview.mlir
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestAttrDefs.td
M mlir/test/lib/Dialect/Test/TestAttributes.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M mlir/test/mlir-tblgen/attrdefs.td
M mlir/tools/mlir-lsp-server/CMakeLists.txt
M mlir/tools/mlir-lsp-server/mlir-lsp-server.cpp
M mlir/tools/mlir-opt/CMakeLists.txt
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/tools/mlir-pdll/mlir-pdll.cpp
M mlir/tools/mlir-query/CMakeLists.txt
M mlir/tools/mlir-reduce/CMakeLists.txt
M mlir/tools/mlir-rewrite/CMakeLists.txt
M mlir/tools/mlir-rewrite/mlir-rewrite.cpp
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/unittests/ExecutionEngine/CMakeLists.txt
M mlir/unittests/IR/AttributeTest.cpp
M mlir/unittests/IR/SymbolTableTest.cpp
M mlir/unittests/Target/LLVM/CMakeLists.txt
M offload/tools/offload-tblgen/CMakeLists.txt
M offload/unittests/CMakeLists.txt
M offload/unittests/Conformance/CMakeLists.txt
M offload/unittests/Conformance/device_code/CMakeLists.txt
A offload/unittests/Conformance/device_code/LLVMLibm.c
R offload/unittests/Conformance/device_code/sin.c
A offload/unittests/Conformance/include/mathtest/CommandLine.hpp
A offload/unittests/Conformance/include/mathtest/CommandLineExtras.hpp
A offload/unittests/Conformance/include/mathtest/DeviceContext.hpp
A offload/unittests/Conformance/include/mathtest/DeviceResources.hpp
A offload/unittests/Conformance/include/mathtest/ErrorHandling.hpp
A offload/unittests/Conformance/include/mathtest/ExhaustiveGenerator.hpp
A offload/unittests/Conformance/include/mathtest/GpuMathTest.hpp
A offload/unittests/Conformance/include/mathtest/HostRefChecker.hpp
A offload/unittests/Conformance/include/mathtest/IndexedRange.hpp
A offload/unittests/Conformance/include/mathtest/InputGenerator.hpp
A offload/unittests/Conformance/include/mathtest/Numerics.hpp
A offload/unittests/Conformance/include/mathtest/OffloadForward.hpp
A offload/unittests/Conformance/include/mathtest/Support.hpp
A offload/unittests/Conformance/include/mathtest/TestConfig.hpp
A offload/unittests/Conformance/include/mathtest/TestResult.hpp
A offload/unittests/Conformance/include/mathtest/TestRunner.hpp
A offload/unittests/Conformance/include/mathtest/TypeExtras.hpp
A offload/unittests/Conformance/lib/CMakeLists.txt
A offload/unittests/Conformance/lib/CommandLineExtras.cpp
A offload/unittests/Conformance/lib/DeviceContext.cpp
A offload/unittests/Conformance/lib/DeviceResources.cpp
A offload/unittests/Conformance/lib/ErrorHandling.cpp
A offload/unittests/Conformance/lib/TestConfig.cpp
R offload/unittests/Conformance/sin.cpp
A offload/unittests/Conformance/tests/CMakeLists.txt
A offload/unittests/Conformance/tests/Hypotf16Test.cpp
A offload/unittests/Conformance/tests/LogfTest.cpp
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/include-cleaner/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/lib/orc/tests/unit/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/wchar/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libunwind/BUILD.bazel
M utils/bazel/llvm-project-overlay/lld/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/driver.bzl
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/build_defs.bzl
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch1/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch2/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch3/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch4/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch5/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch6/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch7/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform-opt/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch2/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch3/BUILD.bazel
A utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch4/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/linalggen.bzl
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/mlir-tblgen/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/siphash/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/unittest/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
Merge branch 'main' into users/krzysz00/missing-verifiers-in-adaptor
Commit: 4d73991e001186b344c1b8af3f0c9ef3437780f4
https://github.com/llvm/llvm-project/commit/4d73991e001186b344c1b8af3f0c9ef3437780f4
Author: Krzysztof Drewniak <krzysdrewniak at gmail.com>
Date: 2025-07-30 (Wed, 30 Jul 2025)
Changed paths:
M mlir/test/mlir-tblgen/op-properties-predicates.td
Log Message:
-----------
Add a test
Compare: https://github.com/llvm/llvm-project/compare/95d71aaad5b0...4d73991e0011
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list