[all-commits] [llvm/llvm-project] cca803: [AMDGPU] Extending wave reduction intrinsics for `...

[Aaditya via All-commits]

  Branch: refs/heads/users/easyonaadit/amdgpu/wave-reduce-intrinsics-arithmetic
  Home:   https://github.com/llvm/llvm-project
  Commit: cca8039b56a35d0b6393e6dae3a9e4bb6d1fa0b8
      https://github.com/llvm/llvm-project/commit/cca8039b56a35d0b6393e6dae3a9e4bb6d1fa0b8
  Author: Aaditya <Aaditya.AlokDeshpande at amd.com>
  Date:   2025-07-30 (Wed, 30 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll

  Log Message:
  -----------
  [AMDGPU] Extending wave reduction intrinsics for `i64` types - 1

Supporting Min/Max Operations: `min`, `max`, `umin`, `umax`


  Commit: fb0a84b999ea6e7bec64b902f4a06befaa2b7648
      https://github.com/llvm/llvm-project/commit/fb0a84b999ea6e7bec64b902f4a06befaa2b7648
  Author: Aaditya <Aaditya.AlokDeshpande at amd.com>
  Date:   2025-07-30 (Wed, 30 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll

  Log Message:
  -----------
  [AMDGPU] Extending wave reduction intrinsics for `i64` types - 2

Supporting Arithemtic Operations: `add`, `sub`


Compare: https://github.com/llvm/llvm-project/compare/cca8039b56a3%5E...fb0a84b999ea

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