[all-commits] [llvm/llvm-project] 2a5ac1: Revert "[RISCV] Cost bf16/f16 vector non-unit memo...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a5ac19605ae49d6628ac3af55d6b528cb13ed2e
      https://github.com/llvm/llvm-project/commit/2a5ac19605ae49d6628ac3af55d6b528cb13ed2e
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-07-30 (Wed, 30 Jul 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
    M llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll

  Log Message:
  -----------
  Revert "[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmin/zvfbfmin (#150882)"

This reverts commit fe4f6c1a58ab4f00a88a97af01000b6783b573ee, but leaves
the tests that were added.

The original commit mistakenly assumed that if regular bf16/f16 loads
and stores could be lowered without zvfbfmin/zvfhmin, then so too could
masked loads/stores and gathers/scatters.

However SelectionDAG can't actually type-legalize masked.load/stores
since it needs to be done in ScalarizeMaskedMemIntrinPass.

This was causing crashes on IREE because we now returned true for
isLegalMaskedLoadStore.

The original intent of this was to remove a discrepancy in the loop
vectorizer tests whenever predication was enabled, but this has gone
away after 92d09245d61dce80d3e68a27cc34d5fc6f062c93. So I don't think we
need to reapply this patch.



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