[all-commits] [llvm/llvm-project] 9b23e2: [RISCV] Add copies to physical registers in VL opt...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9b23e2bf8d69909d959434da5ef392aefcd0b694
      https://github.com/llvm/llvm-project/commit/9b23e2bf8d69909d959434da5ef392aefcd0b694
  Author: Luke Lau <luke at igalia.com>
  Date:   2025-07-30 (Wed, 30 Jul 2025)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
    M llvm/test/CodeGen/RISCV/rvv/vl-opt.mir

  Log Message:
  -----------
  [RISCV] Add copies to physical registers in VL optimizer tests. NFC (#151170)

In an upcoming patch to support recurrences in the RISCVVLOptimizer, we
need to perform an optimistic dataflow analysis where we assume
instructions have a DemandedVL of zero until a user is encountered.

Because of this if there's no "root" instruction, nothing will be
demanded and all the VLs will be set to zero.

This prepares for this by adding a copy to a physical register in the
MIR tests so that the behaviour is preserved, and matches whats
generated lowering from regular LLVM IR.



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