[all-commits] [llvm/llvm-project] b19ef4: [GISel] Introduce MachineIRBuilder::(build|materia...

Tue Jul 29 02:48:19 PDT 2025

  Branch: refs/heads/users/ritter-x2a/07-24-_gisel_introduce_machineirbuilder_build_materialize_objectptroffset
  Home:   https://github.com/llvm/llvm-project
  Commit: b19ef41d368a64d75cb886d240499c4d6508d7cb
      https://github.com/llvm/llvm-project/commit/b19ef41d368a64d75cb886d240499c4d6508d7cb
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-07-29 (Tue, 29 Jul 2025)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy-forced.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store-vector.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-min-max.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-vacopy.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
    M llvm/test/CodeGen/AMDGPU/freeze.ll
    M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
    M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
    M llvm/test/CodeGen/Mips/GlobalISel/mips-prelegalizer-combiner/inline-memcpy.mir
    M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir
    M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir
    M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir
    M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-load-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv32.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-store-rv64.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir
    M llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir
    M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
    M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
    M llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp

  Log Message:
  -----------
  [GISel] Introduce MachineIRBuilder::(build|materialize)ObjectPtrOffset

These functions are for building G_PTR_ADDs when we know that the base
pointer and the result are both valid pointers into (or just after) the
same object. They are similar to SelectionDAG::getObjectPtrOffset.

This PR also changes call sites of the generic (build|materialize)PtrAdd
functions that implement pointer arithmetic to split large memory
accesses to the new functions. Since memory accesses have to fit into an
object in memory, pointer arithmetic to an offset into a large memory
access also yields an address in that object.

Currently, these (build|materialize)ObjectPtrOffset functions only add
"nuw" to the generated G_PTR_ADD, but I intend to introduce an
"inbounds" MIFlag in a later PR (analogous to a concurrent effort in
SDAG: #131862, related: #140017, #141725) that will also be set in the
(build|materialize)ObjectPtrOffset functions.

Most test changes just add "nuw" to G_PTR_ADDs. Exceptions are AMDGPU's
call-outgoing-stack-args.ll, flat-scratch.ll, and freeze.ll tests, where
offsets are now folded into scratch instructions, and cases where the
behavior of the check regeneration script changed, resulting, e.g., in
better checks for "nusw G_PTR_ADD" instructions, matched empty lines,
and the use of "CHECK-NEXT" in MIPS tests.

For SWDEV-516125.

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