[all-commits] [llvm/llvm-project] c7cd1d: [Analysis] Remove an unnecessary cast (NFC) (#150838)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Jul 28 21:11:27 PDT 2025
Branch: refs/heads/users/MaskRay/spr/mcfragment-use-trailing-data-for-fixed-size-part
Home: https://github.com/llvm/llvm-project
Commit: c7cd1d0ae371dda60f341499e23be5c03ed11b59
https://github.com/llvm/llvm-project/commit/c7cd1d0ae371dda60f341499e23be5c03ed11b59
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
Log Message:
-----------
[Analysis] Remove an unnecessary cast (NFC) (#150838)
getOpcode() already returns Instruction::CastOps.
Commit: adbf59dafab9d32f44c3f191febab683d7ad5a0d
https://github.com/llvm/llvm-project/commit/adbf59dafab9d32f44c3f191febab683d7ad5a0d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Log Message:
-----------
[AsmPrinter] Remove an unnecessary cast (NFC) (#150839)
getLabelAfterInsn() already returns MCSymbol *.
Commit: 5deb4428852bc66e6e94d1ccc7c98d376ee2ab2e
https://github.com/llvm/llvm-project/commit/5deb4428852bc66e6e94d1ccc7c98d376ee2ab2e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/docs/YamlIO.rst
Log Message:
-----------
[llvm] Proofread YamlIO.rst (#150840)
Commit: 83cb8b7befa4d17dbaccfa5a0716812115efc6f4
https://github.com/llvm/llvm-project/commit/83cb8b7befa4d17dbaccfa5a0716812115efc6f4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[llvm] Use a range-based for loop instead of {std,llvm}::for_each (NFC) (#150841)
LLVM Coding Standards discourages {std,llvm}::for_each unless we
already have a callable.
Commit: f8b1c7333f79423e70a37e7bf423ddc9d49a52e9
https://github.com/llvm/llvm-project/commit/f8b1c7333f79423e70a37e7bf423ddc9d49a52e9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Add getContext helper to VPlan (NFC).
Commit: 789fcef8058aafd495c975cda3b27784b8085397
https://github.com/llvm/llvm-project/commit/789fcef8058aafd495c975cda3b27784b8085397
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/examples/transform/Ch4/lib/MyExtension.cpp
M mlir/include/mlir/Dialect/Linalg/TransformOps/GPUHeuristics.h
M mlir/lib/Dialect/Affine/Transforms/DecomposeAffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
Log Message:
-----------
[MLIR] Migrate some "transform dialect" source to use the standard LDBG macro (NFC) (#150695)
Commit: c28dfa13417cd66f1cded00bbe9fa5fb9f042c98
https://github.com/llvm/llvm-project/commit/c28dfa13417cd66f1cded00bbe9fa5fb9f042c98
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/lib/Transforms/Utils/Inliner.cpp
Log Message:
-----------
[MLIR] Update Inliner.cpp to use LDBG() for logging (NFC) (#150762)
Commit: 5983d7db7da4e8c9b83ad26cb67c81e2a7cc6b7b
https://github.com/llvm/llvm-project/commit/5983d7db7da4e8c9b83ad26cb67c81e2a7cc6b7b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
Log Message:
-----------
Migrate more of DataFlow framework to LDBG (NFC) (#150752)
Commit: 865dd278a9957f68ea7517427e5b73c81ea22db5
https://github.com/llvm/llvm-project/commit/865dd278a9957f68ea7517427e5b73c81ea22db5
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/lib/Support/TypeID.cpp
Log Message:
-----------
[MLIR] Remove overly verbose Debug for TypeID checks (NFC) (#150751)
These are spammy and mostly uninteresting during debugging.
Commit: 03dc2a41f3d9a500e47b513de5c5008c06860d65
https://github.com/llvm/llvm-project/commit/03dc2a41f3d9a500e47b513de5c5008c06860d65
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/docs/Tutorials/Toy/Ch-4.md
M mlir/examples/toy/Ch4/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch5/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch6/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch7/mlir/ShapeInferencePass.cpp
Log Message:
-----------
[MLIR] Update MLIR tutorial to use LDBG() macro (#150763)
Commit: 0f2484a7408eb4a14dc9bb231e56e8dbfddbc5bc
https://github.com/llvm/llvm-project/commit/0f2484a7408eb4a14dc9bb231e56e8dbfddbc5bc
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
A llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
Log Message:
-----------
[MemProf] Ensure all callsite clones are assigned a function clone (#150735)
Fix a bug in function assignment where we were not assigning all
callsite clones to a function clone. This led to incorrect call updates
because multiple callsite clones could look like they were assigned to
the same function clone.
Add in a stat and debug message to help identify and debug cases where
this is still happening.
Commit: f4c05be544a02d7271605e09700310a77f5e80e0
https://github.com/llvm/llvm-project/commit/f4c05be544a02d7271605e09700310a77f5e80e0
Author: Matthias Springer <me at m-sp.org>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/docs/Tutorials/Toy/Ch-5.md
M mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
M mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
Log Message:
-----------
[mlir][toy] Update dialect conversion example (#150826)
The Toy tutorial used outdated API. Update the example to:
* Use the `OpAdaptor` in all places.
* Do not mix `RewritePattern` and `ConversionPattern`. This cannot
always be done safely and should not be advertised in the example code.
Commit: 9e5f9ff82f2f060aac73a965ab37fdbb6b53cfe0
https://github.com/llvm/llvm-project/commit/9e5f9ff82f2f060aac73a965ab37fdbb6b53cfe0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M mlir/lib/Transforms/Utils/Inliner.cpp
Log Message:
-----------
[MLIR] Fix release build: reference to NDEBUG guarded function (NFC)
With LDBG(), the code isn't guarded in release mode, even if the optimizer
will remove it because there is a `if (false)` statement. We need the
function declaration to be there at minima.
Commit: 1c3d6b3ec0fd329b3c7afe46d8ecaea1b4e54708
https://github.com/llvm/llvm-project/commit/1c3d6b3ec0fd329b3c7afe46d8ecaea1b4e54708
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
Log Message:
-----------
Implement a custom stream for LDBG macro to handle newlines (#150750)
This prints the prefix on every new line, allowing for an output that
looks like:
```
[dead-code-analysis] DeadCodeAnalysis.cpp:288 Visiting operation: func.func private @private_1() -> (i32, i32) {
[dead-code-analysis] DeadCodeAnalysis.cpp:288 %c0_i32 = arith.constant 0 : i32
[dead-code-analysis] DeadCodeAnalysis.cpp:288 %0 = arith.addi %c0_i32, %c0_i32 {tag = "one"} : i32
[dead-code-analysis] DeadCodeAnalysis.cpp:288 return %c0_i32, %0 : i32, i32
[dead-code-analysis] DeadCodeAnalysis.cpp:288 }
[dead-code-analysis] DeadCodeAnalysis.cpp:313 Visiting callable operation: func.func private @private_1() -> (i32, i32) {
[dead-code-analysis] DeadCodeAnalysis.cpp:313 %c0_i32 = arith.constant 0 : i32
[dead-code-analysis] DeadCodeAnalysis.cpp:313 %0 = arith.addi %c0_i32, %c0_i32 {tag = "one"} : i32
[dead-code-analysis] DeadCodeAnalysis.cpp:313 return %c0_i32, %0 : i32, i32
[dead-code-analysis] DeadCodeAnalysis.cpp:313 }
```
Commit: bca80a00e7379d043af5020f595dab99f8290bd6
https://github.com/llvm/llvm-project/commit/bca80a00e7379d043af5020f595dab99f8290bd6
Author: Mahesh-Attarde <mahesh.attarde at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/CodeGen/X86/isel-fpclass.ll
Log Message:
-----------
[X86][GlobalISel] Add test for IS_FP_CLASS (#148816)
Test for PR https://github.com/llvm/llvm-project/pull/148801
Commit: 314e22bcab2b0f3d208708431a14215058f0718f
https://github.com/llvm/llvm-project/commit/314e22bcab2b0f3d208708431a14215058f0718f
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
R llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
R llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
Log Message:
-----------
Revert "[MemProf] Ensure all callsite clones are assigned a function clone" (#150856)
Reverts llvm/llvm-project#150735 due to bot failures that I need to
investigate
Commit: 22c9236f5043367b0f68584031f86fa8438f859f
https://github.com/llvm/llvm-project/commit/22c9236f5043367b0f68584031f86fa8438f859f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Object/IRSymtab.cpp
Log Message:
-----------
IRSymtab: Use StringSet instead of DenseMap for preserved symbols (#149836)
Microbenchmarking shows this is faster
Commit: 778fb76e6308534a63239a91b98f5dad055f6fdb
https://github.com/llvm/llvm-project/commit/778fb76e6308534a63239a91b98f5dad055f6fdb
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
A llvm/test/CodeGen/Mips/abiflags-soft-float.ll
Log Message:
-----------
[Mips] Fix wrong ELF FP ABI info when inline asm was empty (#146457)
When Mips process emitStartOfAsmFile and updateABIInfo, it did not know
the real value of IsSoftFloat and STI.useSoftFloat(). And when inline
asm instruction was empty, Mips did not process asm parser, so it would
not do TS.updateABIInfo(STI) again and at this time the value of
IsSoftFloat is correct.
Fix #135283.
Commit: 45104662c086b4e194a23c63760096dd11edd935
https://github.com/llvm/llvm-project/commit/45104662c086b4e194a23c63760096dd11edd935
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features-sifive.c
Log Message:
-----------
[RISCV] Add negative pre-defined macro test for XSfmm* extension. NFC. (#150596)
Commit: 80e0d4167765d70766c836cb8db4933976a47dae
https://github.com/llvm/llvm-project/commit/80e0d4167765d70766c836cb8db4933976a47dae
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
Log Message:
-----------
[LoongArch] Custom legalizing build_vector with same constant elements (#150584)
Commit: eb04b699e9df89c493da2986c29aa6f553cc85b6
https://github.com/llvm/llvm-project/commit/eb04b699e9df89c493da2986c29aa6f553cc85b6
Author: Haowei <haowei at google.com>
Date: 2025-07-27 (Sun, 27 Jul 2025)
Changed paths:
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
Log Message:
-----------
[libc] Add misssing inttypes dependencies (#150861)
This is a follow up of 9e7999147de757107482d8a2cedab4155a0b6635. It
attempts to fix the CI flakes we saw on fuchsia-linux-x64 builder.
Commit: 1b4db78d2eaa070b3f364a2d2b2b826a5439b892
https://github.com/llvm/llvm-project/commit/1b4db78d2eaa070b3f364a2d2b2b826a5439b892
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
A clang/test/CXX/basic/basic.link/p19.cppm
A clang/test/Modules/Exposure-2.cppm
A clang/test/Modules/Exposure.cppm
Log Message:
-----------
[C++20] [Modules] Implement diagnose for exposured partially
Tracked at https://github.com/llvm/llvm-project/issues/112294
This patch implements from [basic.link]p14 to [basic.link]p18 partially.
The explicitly missing parts are:
- Anything related to specializations.
- Decide if a pointer is associated with a TU-local value at compile
time.
- [basic.link]p15.1.2 to decide if a type is TU-local.
- Diagnose if TU-local functions from other TU are collected to the
overload set. See [basic.link]p19, the call to 'h(N::A{});' in
translation unit #2
There should be other implicitly missing parts as the wording uses
"names" briefly several times. But to implement this precisely, we have
to visit the whole AST, including Decls, Expression and Types, which may
be harder to implement and be more time-consuming for compilation time.
So I choose to implement the common parts.
It won't be too bad to miss some cases since we DIDN'T do any such
checks in the past 3 years. Any new check is an improvement. Given
modules have been basically available since clang15 without such checks,
it will be user unfriendly if we give a hard error now. And there are
a lot of cases which violating the rule actually just fine. So I decide
to emit it as warnings instead of hard errors.
Commit: e259ba8bec6b4d0efd5e37c9566b11108ce9ffa9
https://github.com/llvm/llvm-project/commit/e259ba8bec6b4d0efd5e37c9566b11108ce9ffa9
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV] Modernize FP cost model tests. NFC
* Replace undef -> poison
* Remove overloaded type in intrinsic signature
Commit: a100f6367205c6a909d68027af6a8675a8091bd9
https://github.com/llvm/llvm-project/commit/a100f6367205c6a909d68027af6a8675a8091bd9
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV] Add FP cost model tests for no zfhmin/zfbfmin. NFC
Vector costs without zvfhmin/zvfbfmin and zfhmin/zfbfmin are somehow
cheaper than with zvfhmin/zvfbfmin at smaller vector sizes, despite the
fact that the former are scalarized to libcalls. This adds a RUN line to
showcase this, splitting out the bfloat tests into their own functions
so we don't have duplicate lines for the regular float/double costs.
Commit: 024262421dc7f1900a28b3a4a5d4380925fd96b8
https://github.com/llvm/llvm-project/commit/024262421dc7f1900a28b3a4a5d4380925fd96b8
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features-sifive.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for SiFive extensions to riscv-target-features-sifive.c. NFC.
Commit: 8c8b3cd28b52a98383b6875d045bdf1f4d9a3a2f
https://github.com/llvm/llvm-project/commit/8c8b3cd28b52a98383b6875d045bdf1f4d9a3a2f
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A clang/test/Preprocessor/riscv-target-features-cv.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for xcv* extensions to riscv-target-features-cv.c. NFC.
Commit: ee3cf1252a0763e56c28592edec96b029c884bba
https://github.com/llvm/llvm-project/commit/ee3cf1252a0763e56c28592edec96b029c884bba
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/Preprocessor/riscv-target-features-cv.c
Log Message:
-----------
[RISCV] Add pre-defined macro test for XCVmem. NFC.
Commit: 2e71bf01330d986c28dec47a7f8506021028450f
https://github.com/llvm/llvm-project/commit/2e71bf01330d986c28dec47a7f8506021028450f
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A clang/test/Preprocessor/riscv-target-features-thead.c
M clang/test/Preprocessor/riscv-target-features.c
Log Message:
-----------
[RISCV] Split the pre-defined macro tests for xthead* extensions to riscv-target-features-thead.c. NFC.
Commit: 0afb30311d2858af4134d55af927ba0266b8e505
https://github.com/llvm/llvm-project/commit/0afb30311d2858af4134d55af927ba0266b8e505
Author: Danny Mösch <danny.moesch at icloud.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
Log Message:
-----------
[clang-tidy] Add handling of type aliases in `use-designated-initializers` check (#150842)
Resolves #150782.
Commit: d35bf478a81e0ca5c9fac76767d41a23df262f94
https://github.com/llvm/llvm-project/commit/d35bf478a81e0ca5c9fac76767d41a23df262f94
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[CodeGen][NPM] Stitch up loop passes in codegen pipeline (#148114)
same as https://github.com/llvm/llvm-project/pull/133050
Co-authored-by : Oke, Akshat
<[Akshat.Oke at amd.com](mailto:Akshat.Oke at amd.com)>
Commit: 495774d6d59379edad3c8c35be8c4672d4a513fa
https://github.com/llvm/llvm-project/commit/495774d6d59379edad3c8c35be8c4672d4a513fa
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
Revert "[CodeGen][NPM] Stitch up loop passes in codegen pipeline" (#150883)
Reverts llvm/llvm-project#148114
will update with fixed PR.
Commit: 90de4a4ac96ef314e3af9c43c516d5aaf105777a
https://github.com/llvm/llvm-project/commit/90de4a4ac96ef314e3af9c43c516d5aaf105777a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
A llvm/test/Transforms/LoopFusion/sunk-phi-nodes.ll
Log Message:
-----------
[LoopFusion] Fix sink instructions (#147501)
If we have instructions in second loop's preheader which can be sunk, we
should also be adjusting PHI nodes to receive values from the fused loop's latch block.
Fixes #128600
Commit: 07d396b6f595eb90fb40f49d8a11f944553b9bfd
https://github.com/llvm/llvm-project/commit/07d396b6f595eb90fb40f49d8a11f944553b9bfd
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/X86/embed-bitcode.ll
Log Message:
-----------
[COFF] Set .llvmbc and .llvmcmd to metadata section (#150879)
Those are metadata sections for ELF but was not properly set for COFF.
Commit: 376326c6606205a390568e84a76bb182aee02ed1
https://github.com/llvm/llvm-project/commit/376326c6606205a390568e84a76bb182aee02ed1
Author: David Green <david.green at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/andorbrcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/cmp-chains.ll
M llvm/test/CodeGen/AArch64/dag-combine-select.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
Log Message:
-----------
[AArch64] Update some tests to use a more common check prefix. NFC
I'm just trying to more consistently use CHECK-SD and CHECK-GI.
Commit: 4072a6b85beed8427d14f13248d2f9cfaede489f
https://github.com/llvm/llvm-project/commit/4072a6b85beed8427d14f13248d2f9cfaede489f
Author: Marco Maia <marcogmaia at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
Reland "[clangd] Add tweak to override pure virtuals" (#150788)
This relands commit
https://github.com/llvm/llvm-project/commit/7355ea3f6b214d1569da43d02f9a166ff15012e6.
The original commit was reverted in
https://github.com/llvm/llvm-project/commit/bfd73a5161608e6355f7db87dc5f5afee56d7e2f
because it was breaking the buildbot.
The issue has now been resolved by
https://github.com/llvm/llvm-project/commit/38f82534bbe9e1c9f5edd975a72e07beb7048423.
Original PR: https://github.com/llvm/llvm-project/pull/139348
Original commit message:
<blockquote>
closes https://github.com/clangd/clangd/issues/1037
closes https://github.com/clangd/clangd/issues/2240
Example:
```c++
class Base {
public:
virtual void publicMethod() = 0;
protected:
virtual auto privateMethod() const -> int = 0;
};
// Before:
// // cursor here
class Derived : public Base{}^ ;
// After:
class Derived : public Base {
public:
void publicMethod() override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `publicMethod` is not implemented.");
}
protected:
auto privateMethod() const -> int override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `privateMethod` is not implemented.");
}
};
```
https://github.com/user-attachments/assets/79de40d9-1004-4c2e-8f5c-be1fb074c6de
</blockquote>
Commit: 3d994468098027f9cf550c78a1c91bb266040f61
https://github.com/llvm/llvm-project/commit/3d994468098027f9cf550c78a1c91bb266040f61
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Format/Format.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in `DerivePointerAlignment: true` (#150744)
This effectively reverts a4d4859dc70c046ad928805ddeaf8fa101793394 which
didn't fix the problem that `int*,` was not counted as "Left" alignment.
Fixes #150327
Commit: fe0dbe0f2950d95071be7140c7b4680f17a7ac4e
https://github.com/llvm/llvm-project/commit/fe0dbe0f2950d95071be7140c7b4680f17a7ac4e
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
Log Message:
-----------
[CodeGen] More consistently expand float ops by default (#150597)
These float operations were expanded for scalar f32/f64/f128, but not
for f16 and more problematically, not for vectors. A small subset of
them was separately set to expand for vectors.
Change these to always expand by default, and adjust targets to mark
these as legal where necessary instead.
This is a much safer default, and avoids unnecessary legalization
failures because a target failed to manually mark them as expand.
Fixes https://github.com/llvm/llvm-project/issues/110753.
Fixes https://github.com/llvm/llvm-project/issues/121390.
Commit: a87fb3b60fac6ae420393ae8740c9becc7ef6a05
https://github.com/llvm/llvm-project/commit/a87fb3b60fac6ae420393ae8740c9becc7ef6a05
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate MLIR Core category maintainers (#149485)
This is a nomination for the maintainers of the core category within
MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: f529c0b56f3a77301b884281f8cb1aa214236f7b
https://github.com/llvm/llvm-project/commit/f529c0b56f3a77301b884281f8cb1aa214236f7b
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg][nfc] Clean-up leftover code post #149156 (#150602)
In https://github.com/llvm/llvm-project/pull/149156, I ensured that we
no longer generate spurious `tensor.empty` ops when vectorizing
`linalg.unpack`.
This follow-up removes leftover code that is now redundant but was
missed in the original PR.
Commit: ac4c13d0d8f56c6939557cc9addd6e3e149664ad
https://github.com/llvm/llvm-project/commit/ac4c13d0d8f56c6939557cc9addd6e3e149664ad
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate Tensor Compiler maintainers (#149488)
This is a nomination for the maintainers of the tensor compiler category
within MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: ddb12c10a9215d15df8058a52965241d5030422e
https://github.com/llvm/llvm-project/commit/ddb12c10a9215d15df8058a52965241d5030422e
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-div.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-gather-scatter.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-no-masking.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[RISCV][LV] Remove redundant -force-tail-folding-style from tests. NFC
This isn't needed after we set the tail folding style to data-with-evl
via TTI in #148686. Also rename the tests to reflect the fact they're
no longer forcing the tail folding style.
Commit: 72b77c193f1053fc98b3da241b25f1f7ba02d7ae
https://github.com/llvm/llvm-project/commit/72b77c193f1053fc98b3da241b25f1f7ba02d7ae
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll
Log Message:
-----------
AMDGPU: Avoid contraction in wwm allocation failure message (#150888)
Commit: 41f333250bf2b9699b9c8cfec3b12dc046162679
https://github.com/llvm/llvm-project/commit/41f333250bf2b9699b9c8cfec3b12dc046162679
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/InputFiles.cpp
A lld/test/COFF/embed-bitcode.test
Log Message:
-----------
[LLD][COFF] Discard .llvmbc and .llvmcmd sections (#150897)
Those sections are generated by -fembed-bitcode and do not need to be
kept in executable files.
Commit: 44ff1ed16e4f0798419f22fb6040ec94f417452d
https://github.com/llvm/llvm-project/commit/44ff1ed16e4f0798419f22fb6040ec94f417452d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
Log Message:
-----------
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
Addresses a TODO
Commit: 525090e83ca392753d371602b5e64f06e7debd9a
https://github.com/llvm/llvm-project/commit/525090e83ca392753d371602b5e64f06e7debd9a
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
A llvm/test/CodeGen/Mips/nan_lowering.ll
R llvm/test/CodeGen/Mips/qnan.ll
Log Message:
-----------
Revert "[MIPS]Fix QNaNs in the MIPS legacy NaN encodings" (#150773)
Reverts llvm/llvm-project#139829.
We can't just randomly change the value of constants during lowering.
Fixes https://github.com/llvm/llvm-project/issues/149295.
Commit: cad5328b009aab73e68afc7b61fe7aa0af29c594
https://github.com/llvm/llvm-project/commit/cad5328b009aab73e68afc7b61fe7aa0af29c594
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
Log Message:
-----------
[X86] Add late tail duplication tests with computed gotos.
Add a new test for post-regalloc tail duplication with computed gotos to
complement llvm/test/CodeGen/X86/tail-dup-computed-goto.mir.
Commit: d532d58974d5f1ccb5c568b67321cc761742152b
https://github.com/llvm/llvm-project/commit/d532d58974d5f1ccb5c568b67321cc761742152b
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/Maintainers.md
Log Message:
-----------
[mlir] Nominate MLIR Egress category maintainers (#149487)
This is a nomination for the maintainers of the egress category within
MLIR as proposed in
https://discourse.llvm.org/t/mlir-project-maintainers/87189. As agreed
in the Project Council meeting on July 17, we are proceeding with
category nominations without waiting for lead maintainers to be
nominated.
Commit: 2adbf9e92b75fb6db9e98334419e1ae192f3575b
https://github.com/llvm/llvm-project/commit/2adbf9e92b75fb6db9e98334419e1ae192f3575b
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/ComposeSubView.cpp
M mlir/test/Transforms/compose-subview.mlir
Log Message:
-----------
[mlir][memref] Support test-compose-subview dynamic size (#146881)
Supports the case where the sizes of the subview op is dynamic.When
there are more for loops in the tile algorithm, multiple subviews are
performed and test-compose-subview does not work when the size operand
of the subview ops is dynamic value.
Commit: fdd7f9c61bbc476bfc6839dec3428e1dea06eacb
https://github.com/llvm/llvm-project/commit/fdd7f9c61bbc476bfc6839dec3428e1dea06eacb
Author: Yi-Chi Lee <55395582+yichi170 at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
Log Message:
-----------
[mlir][tosa] Allow scalar int8 tensors to be unranked (#150731)
This PR fixes #150519
Commit: d4f9c11e06d5b38e2c110b3e42c0637b52422346
https://github.com/llvm/llvm-project/commit/d4f9c11e06d5b38e2c110b3e42c0637b52422346
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[RISCV][LV] Use predicate-else-scalar-epilogue flag in tail folding tests. NFC
Align the tests closer with what we eventually intend to enable by
default on RISC-V by using
-prefer-predicate-over-epilogue=predicate-else-scalar-epilogue, instead
of dropping vectorization entirely with predicate-dont-vectorize.
Also adjust the non-EVL run lines so that they use
-prefer-predicate-over-epilogue=scalar-epilogue instead of
-force-tail-folding-style=none, so we're only using testing one type of
flag instead of a combination of two.
Commit: 2ad4e93dedbb9936f03bb7035dccebb1cf4a75cb
https://github.com/llvm/llvm-project/commit/2ad4e93dedbb9936f03bb7035dccebb1cf4a75cb
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
A llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
Log Message:
-----------
[AMDGPU][gfx1250] Use SCOPE_SE for stores that may hit scratch (#150586)
Commit: 6c2caa63d7d2929765199a66a61660f5372f01c7
https://github.com/llvm/llvm-project/commit/6c2caa63d7d2929765199a66a61660f5372f01c7
Author: Michael Jabbour <michael.jabbour at sonarsource.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Modules/specializations-lazy-load-parentmap-crash.cpp
Log Message:
-----------
[Serialization] Fix crash while lazy-loading template specializations (#150430)
## Problem
This is a regression that was observed in Clang 20 on modules code that
uses import std.
The lazy-loading mechanism for template specializations introduced in
#119333 can currently load additional nodes when called multiple times,
which breaks assumptions made by code that iterates over
specializations. This leads to iterator invalidation crashes in some
scenarios.
The core issue occurs when:
1. Code calls `spec_begin()` to get an iterator over template
specializations. This invokes `LoadLazySpecializations()`.
2. Code then calls `spec_end()` to get the end iterator.
3. During the `spec_end()` call, `LoadExternalSpecializations()` is
invoked again.
4. This can load additional specializations for certain cases,
invalidating the begin iterator returned in 1.
I was able to trigger the problem when constructing a ParentMapContext.
The regression test demonstrates two ways to trigger the construction of
the ParentMapContext on problematic code:
- The ArrayBoundV2 checker
- Unsigned overflow detection in sanitized builds
Unfortunately, simply dumping the ast (e.g. using `-ast-dump-all`)
doesn't trigger the crash because dumping requires completing the redecl
chain before iterating over the specializations.
## Solution
The fix ensures that the redeclaration chain is always completed
**before** loading external specializations by calling
`CompleteRedeclChain(D)` at the start of
`LoadExternalSpecializations()`. The idea is to ensure that all
`SpecLookups` are fully known and loaded before the call to
`LoadExternalSpecializationsImpl()`.
Commit: 51194a4ae238f41c4f65730c95416e312dc369cb
https://github.com/llvm/llvm-project/commit/51194a4ae238f41c4f65730c95416e312dc369cb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
Log Message:
-----------
AMDGPU: Fix test to stop pipeline after VGPR allocation (#150809)
This test seems to have been incorrectly updated after
ac0f64f06d67a93817ccd9a3c529ad40920115c9. Previously it
was testing the state after VGPR allocation; after the content
was updated for the "greedy,1" which now does not correspend
to the VGPR allocation. The spills implied by the test name
aren't present (they also appear to still be missing for gfx90a).
Commit: 9c606ae0c0ae051144ff26832ccd5dcd9c94e678
https://github.com/llvm/llvm-project/commit/9c606ae0c0ae051144ff26832ccd5dcd9c94e678
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Dialect/Tosa/availability.mlir
A mlir/test/Dialect/Tosa/controlflow.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[MLIR][TOSA] Update IfOp print/parse to support ranked condition tens… (#149791)
…or and optional block arguments
This change extends the TOSA `cond_if` operation's print and parse logic
to handle the following:
- The condition operand may now have any rank, as long as the total
number of elements sums to 1.
%1 = tosa.cond_if %0 : tensor<1x1x1xi1> -> tensor<4xf32>
- The `then` and `else` regions can now include optional block
arguments. The updated IR syntax reflects this:
%1 = tosa.cond_if %0 (%arg2 = %arg0, %arg3 = %arg1) : tensor<i1>
(tensor<4xf32>, tensor<4xf32>) -> tensor<4xf32>
- Removed parentheses around single result types in the printed
representation, aligning with the `AsmPrinter` conventions.
Co-authored-by: Luke Hutton <luke.hutton at arm.com>
Commit: c4a0125f46319b7ffa6e68834eaaa659307b44ca
https://github.com/llvm/llvm-project/commit/c4a0125f46319b7ffa6e68834eaaa659307b44ca
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
Log Message:
-----------
[llvm][docs] Update list of working Linux host platforms (#149503)
RISC-V and LoongArch to my knowledge are quite well supported.
Commit: 3308fc4acda46af459b9fe69bab2f011a19d2286
https://github.com/llvm/llvm-project/commit/3308fc4acda46af459b9fe69bab2f011a19d2286
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/gn/build/write_vcsrevision.py
Log Message:
-----------
[gn build] Use shutil.which to find git in write_vcsrevision.py (#142570)
Relates to https://github.com/llvm/llvm-project/issues/54337
This is just a comment referencing distutils but even so, we can ditch
the custom which and use the one Python 3.3 added. Which has the .bat
bug fixed:
https://docs.python.org/3.3/library/shutil.html#shutil.which
I tested this on Windows:
```
C:\Users\tcwg>touch foo.bat
C:\Users\tcwg>python
Python 3.11.9 (tags/v3.11.9:de54cf5, Apr 2 2024, 12:24:25) [MSC v.1938 64 bit (ARM64)] on win32 Type "help", "copyright", "credits" or "license" for more information.
>>> import shutil
>>> shutil.which("foo")
'.\\foo.BAT'
```
I just ran the script manually and got reasonable results, I haven't
done a GN build.
Commit: 98ec927fcb8697a6f6df64298835917aa1d0d3c1
https://github.com/llvm/llvm-project/commit/98ec927fcb8697a6f6df64298835917aa1d0d3c1
Author: Martin Storsjö <martin at martin.st>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
Log Message:
-----------
[lldb] [Windows] Silence format string warnings (#150886)
This fixes the following build warnings in a mingw environment:
../../lldb/source/Host/windows/MainLoopWindows.cpp:226:50: warning:
format specifies type 'int' but the argument has type
'IOObject::WaitableHandle' (aka 'void *') [-Wformat]
226 | "File descriptor %d already monitored.", waitable_handle);
| ~~ ^~~~~~~~~~~~~~~
../../lldb/source/Host/windows/MainLoopWindows.cpp:239:49: warning:
format specifies type 'int' but the argument has type 'DWORD' (aka
'unsigned long') [-Wformat]
238 | error = Status::FromErrorStringWithFormat("Unsupported file type
%d",
| ~~
| %lu
239 | file_type);
| ^~~~~~~~~
2 warnings generated.
Commit: bd2b7eb23918b618ab8fb9963ea0533522a6c16a
https://github.com/llvm/llvm-project/commit/bd2b7eb23918b618ab8fb9963ea0533522a6c16a
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
Log Message:
-----------
[analyzer] Conversion to CheckerFamily: DereferenceChecker (#150442)
This commit converts the class DereferenceChecker to the checker family
framework and simplifies some parts of the implementation.
This commit is almost NFC, the only technically "functional" change is
that it removes the hidden modeling checker `DereferenceModeling` which
was only relevant as an implementation detail of the old checker
registration procedure.
Commit: 5ad7ef6fec63de35a02526bc3e7fce648ab486e2
https://github.com/llvm/llvm-project/commit/5ad7ef6fec63de35a02526bc3e7fce648ab486e2
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
[bazel] add new cmakedefine from #147418 to bazel config file (#150912)
This PR adds the `#cmakedefine LLVM_ENABLE_PROFCHECK` in
`llvm-config.h.cmake` introduced in #147418 to the copy of that file in
the bazel overlay directory such that that define is also avalable in
the bazel build. Not having the define broke the bazel build.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 1afb42bc10efcf033c1e8b0fda90d1e2956002fa
https://github.com/llvm/llvm-project/commit/1afb42bc10efcf033c1e8b0fda90d1e2956002fa
Author: Adar Dagan <101581112+Adar-Dagan at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Let shrinkSplatShuffle act on vectors of different lengths (#148593)
shrinkSplatShuffle in InstCombine would only move truncs up through
shuffles if those shuffles inputs had the exact same type as their
output, this PR weakens this constraint to only requiring that the
scalar type of the input and output match.
Commit: 2f2df751d453566ab70fd02b9a019cd66af76bc6
https://github.com/llvm/llvm-project/commit/2f2df751d453566ab70fd02b9a019cd66af76bc6
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
Log Message:
-----------
[LV] Use SCEV::getElementCount in selectEpilogueVectorizationFactor. (#150018)
Follow-up to https://github.com/llvm/llvm-project/pull/149789 to use
getElementCount to compute the remaining iterations in
selectEpilogueVectrizationFactor.
PR: https://github.com/llvm/llvm-project/pull/150018
Commit: d803c61aca0d796675d0045fe05d698e6db85e52
https://github.com/llvm/llvm-project/commit/d803c61aca0d796675d0045fe05d698e6db85e52
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #147046 (#150893)
Static functions have an implicit object argument during deduction.
Commit: a2fcf18d71b3c3d4e7b52e558124eae8ae7c4a83
https://github.com/llvm/llvm-project/commit/a2fcf18d71b3c3d4e7b52e558124eae8ae7c4a83
Author: Ingo Müller <ingomueller at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/DebugLog.h
M llvm/unittests/Support/DebugLogTest.cpp
Log Message:
-----------
Fix `DEBUGLOG_WITH_STREAM_TYPE_AND_FILE` broken in #150750 (#150920)
This PR fixes the `DEBUGLOG_WITH_STREAM_TYPE_AND_FILE` macro that got
broken in #150750. That PR introduces a more sophisitaced version of
that macro and refactored some code in that process, making the
`getShortFileName` a free function instead of a class member function,
but did not adapt this macro to the refactored code.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 1b657c6d6bcf6749fd37a332c7a7d8e281cd7be3
https://github.com/llvm/llvm-project/commit/1b657c6d6bcf6749fd37a332c7a7d8e281cd7be3
Author: Amir Ayupov <aaupov at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT][NFC] Register profiled functions once (#150622)
While registering profiled functions, only handle each address once.
Speeds up `DataAggregator::preprocessProfile`.
Test Plan:
For intermediate size pre-aggregated profile (10MB), reduces parsing
time from ~0.41s down to ~0.16s.
Commit: e30e644266fbc9ba638ee2c6aa23b5691397163f
https://github.com/llvm/llvm-project/commit/e30e644266fbc9ba638ee2c6aa23b5691397163f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn build] Port 4072a6b85bee
Commit: a74167dfdc18fa85f195ea01a3013804dc7aeb5d
https://github.com/llvm/llvm-project/commit/a74167dfdc18fa85f195ea01a3013804dc7aeb5d
Author: b10902118 <b10902118 at ntu.edu.tw>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
Log Message:
-----------
[lldb][Arm32] Remove unused watchpoint refcount. (#150770)
Already removed in NativeRegisterContextDBReg.h
Commit: 5452c3888c3a9e43fd3e96d1d5647b58b96398df
https://github.com/llvm/llvm-project/commit/5452c3888c3a9e43fd3e96d1d5647b58b96398df
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
Log Message:
-----------
[AMDGPU] Regenerate add/sub overflow tests
Add GFX10/11 test coverage to match saddo.ll
Commit: e19743bd6cce4a3c7c84435faf855294d39ac271
https://github.com/llvm/llvm-project/commit/e19743bd6cce4a3c7c84435faf855294d39ac271
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
Log Message:
-----------
AMDGPU: Remove unused TargetPassConfig include from attributor (#150892)
Commit: 92d09245d61dce80d3e68a27cc34d5fc6f062c93
https://github.com/llvm/llvm-project/commit/92d09245d61dce80d3e68a27cc34d5fc6f062c93
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
Log Message:
-----------
[VPlan] Fall back to scalar epilogue if possible when EVL isn't legal (#150908)
When enabling predicated vectorization by default on RISC-V, there's a
bunch of performance regressions on llvm-test-suite's LoopInterleaving
microbenchmarks:
https://lnt.lukelau.me/db_default/v4/nts/788?show_delta=yes&show_previous=yes&show_stddev=yes&show_mad=yes&show_all=yes&show_all_samples=yes&show_sample_counts=yes&show_small_diff=yes&num_comparison_runs=0&test_filter=&test_min_value_filter=&aggregation_fn=min&MW_confidence_lv=0.05&compare_to=791&baseline=730&submit=Update
Most of these regressions stem from the interleave_count pragma, which
causes EVL tail folding interleaving to be unsupported (since we don't
support unrolling with EVL)
Currently if DataWithEVL isn't legal we fall back to DataWithoutLaneMask
as the tail folding style, but this is very slow on RISC-V.
The order of performance roughly is something like:
DataWithEVL > None (scalar-epilogue) > Data[WithoutLaneMask]
So this patch tries to prevent the regressions by falling back to a
scalar epilogue where possible, i.e. the existing vectorization we have
today. Not we may still need to fall back to DataWithoutLaneMask, e.g.
if the trip count is low etc or it's forced by
-prefer-predicate-over-epilogue=predicate-dont-vectorize.
Commit: 6ccc9e559da8d0f07e496d375dbc02bc441e60d9
https://github.com/llvm/llvm-project/commit/6ccc9e559da8d0f07e496d375dbc02bc441e60d9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
Log Message:
-----------
[AArch64] Add taildup test with computed gotos.
Add a test case showing missed optimizations from early taildup with
computed gotos for https://github.com/llvm/llvm-project/pull/150911.
Commit: 9d642b0ec806d13002e2f0b50091ca9656b238e5
https://github.com/llvm/llvm-project/commit/9d642b0ec806d13002e2f0b50091ca9656b238e5
Author: Anchu Rajendran S <asudhaku at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Lower/OpenMP/atomic-control-options.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[flang][MLIR][OpenMP][llvm]Atomic Control Support (#150860)
Commit: 5dc9937ea910f807d3e7325669053c5740545875
https://github.com/llvm/llvm-project/commit/5dc9937ea910f807d3e7325669053c5740545875
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Improve starting indices for GPU allocation (#150432)
Summary:
The slots in this allocation scheme are statically allocated. All sizes
share the same array of slots, but are given different starting
locations to space them apart. The previous implementation used a
trivial linear slice. This is inefficient because it provides the more
likely allocations (1-1024 bytes) with just as much space as a highly
unlikely one (1 MiB).
This patch uses a cubic easing function to gradually shrink the gaps.
For example, we used to get around 700 free slots for a 16 byte
allocation, now we get around 2100 before it starts encroaching on the
32 byte allocation space. This could be improved further, but I think
this is sufficient.
Commit: a63bbf2f1e0d1e1367fb111290ba8d652572d724
https://github.com/llvm/llvm-project/commit/a63bbf2f1e0d1e1367fb111290ba8d652572d724
Author: halbi2 <hehiralbi at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprObjC.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
A clang/test/SemaObjC/attr-nodiscard.m
A clang/test/SemaObjCXX/attr-nodiscard.mm
Log Message:
-----------
[clang] Diagnose [[nodiscard]] return types in Objective-C++ (#142541)
My solution was to copy-paste getUnusedResultAttr and
hasUnusedResultAttr from CallExpr into ObjCMessageExpr too.
Fixes #141504
Commit: c8a091e1b65bcb523c3327b85a2442be61659a87
https://github.com/llvm/llvm-project/commit/c8a091e1b65bcb523c3327b85a2442be61659a87
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/include/lldb/Core/ModuleList.h
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Target/InstrumentationRuntime.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb][NFC] Use IterationAction for ModuleList::ForEach callbacks (#150930)
Commit: a6532c2adac5c2d2ba67046bdc437be6a063d75d
https://github.com/llvm/llvm-project/commit/a6532c2adac5c2d2ba67046bdc437be6a063d75d
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
Log Message:
-----------
[AMDGPU][gfx12] Clean-up implementation of waits before SCOPE_SYS stores (#150587)
We can do it all in finalizeStore if we ensure it always sees the
stores.
For that, I needed to fix a hidden bug where finalizeStore wouldn't see
all stores
because sometimes the iterator got out-of-sync and didn't point to the
store anymore.
This also removes the waits before volatile LDS stores which never
needed it, that was a bug until now.
Commit: 01d4b8e9a6aea5decfac07a81b40b7db29e8bd8f
https://github.com/llvm/llvm-project/commit/01d4b8e9a6aea5decfac07a81b40b7db29e8bd8f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
A llvm/test/Transforms/FunctionAttrs/noalias.ll
M llvm/test/Transforms/FunctionAttrs/nofree.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/norecurse.ll
M llvm/test/Transforms/FunctionAttrs/nounwind.ll
Log Message:
-----------
[FunctionAttrs] Add additional tests (NFC)
Add test coverage for noalias, and for unknown function calls.
Commit: 904de95e713b09fa0ba86c53bf62a195e5036c00
https://github.com/llvm/llvm-project/commit/904de95e713b09fa0ba86c53bf62a195e5036c00
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
Log Message:
-----------
[clang][bytecode][NFC] Fix a few clang-tidy complaints (#150940)
Commit: 166493d6927026c4933be82de81adabc9751c0e3
https://github.com/llvm/llvm-project/commit/166493d6927026c4933be82de81adabc9751c0e3
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
Log Message:
-----------
[FunctionAttrs] Fix function signature mismatch in test (NFC)
There was a return type mismatch, which unintentionally blocked
attribtue inference in this test.
Commit: 9975dfdf800d9881b704a988bc004ec81639fe67
https://github.com/llvm/llvm-project/commit/9975dfdf800d9881b704a988bc004ec81639fe67
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
Log Message:
-----------
[libc] Small performance improvements to GPU allocator
Summary:
This slightly increases performance in a few places. First, we
optimistically assume the cached slab has ample space which lets us
avoid the atomic load on the highly contended counter in the case that
it is likely to succeed. Second, we no longer call `match_any` twice as
we can calculate the uniform slabs at the moment we return them.
Thirdly, we always choose a random index on a 32-bit boundary. This
means that in the fast case we fulfil the allocation with a single
`fetch_or`, and in the other case we quickly move to the free bit.
This nets around a 7.75% improvement for the fast path case.
Commit: a7649007ef269c397b5d474d1b5f4432da96d1de
https://github.com/llvm/llvm-project/commit/a7649007ef269c397b5d474d1b5f4432da96d1de
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
Log Message:
-----------
[libc] Rework match any use in hot allocate bitfield loop
Summary:
We previously used `match_all` as the shortcut to figure out which
threads were destined for which slots. This lowers to a for-loop, which
even if it often only executes once still causes some slowdown
especially when divergent. Instead we use a single ballot call and then
calculate it.
Here the ballot tells us which lanes are the first in a block, either
the starting index or the barrier for a new 32-bit int. We then use some
bit magic to figure out for each lane ID its closest leader. For the
length we simply use the length calculated by the leader of the
remaining bits to be written. This removes the match any and the
shuffle, which improves the minimum number of cycles this takes by about
5%.
Commit: a1a610a1285fe4cde9f5f6a4a759da95266bdcb6
https://github.com/llvm/llvm-project/commit/a1a610a1285fe4cde9f5f6a4a759da95266bdcb6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Increase the number of times we wait on a slab
Summary:
This wait restricts how long we wait on a slab. The only reason this
isn't an infinite loop is to prevent complete deadlocks. However, this
limit was *just* on the cusp of waiting long enough for the allocation
to be done. Just increase this to a sufficiently large value, because
this limit only exists to keep the interface wait-free in the absolute
worst case scheduling scenario. This *MASSIVELY* improved performance
for mixed allocations as we no longer shuffled around creating more than
necessary.
Commit: a22d010002baf761f84d0a8fa5fcaaf6f3b1455f
https://github.com/llvm/llvm-project/commit/a22d010002baf761f84d0a8fa5fcaaf6f3b1455f
Author: Felix Weiglhofer <9267733+fweig at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Headers/opencl-c-base.h
Log Message:
-----------
opencl: Ensure printf symbol is not mangled. (#150210)
Fixes #122453.
Commit: 33cc58f46f0c163d4bea2c7212b3830b3adf99b3
https://github.com/llvm/llvm-project/commit/33cc58f46f0c163d4bea2c7212b3830b3adf99b3
Author: Dan Blackwell <dan_blackwell at apple.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerOptions.h
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
A compiler-rt/test/fuzzer/SigTrapTest.cpp
A compiler-rt/test/fuzzer/sig-trap.test
Log Message:
-----------
[compiler-rt][libFuzzer] Add support for capturing SIGTRAP exits. (#149120)
Swift's FatalError raises a SIGTRAP, which currently causes the fuzzer
to exit without writing out the crashing input.
rdar://142975522
Commit: 4b1d5b8d4f4d09e9988c0f5ca4a35957bf99235e
https://github.com/llvm/llvm-project/commit/4b1d5b8d4f4d09e9988c0f5ca4a35957bf99235e
Author: Will Froom <willfroom at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Pass/Pass.cpp
Log Message:
-----------
[MLIR] Fix pipelineInitializationKey never being correctly updated (#150948)
Prior to this change `pipelineInitializationKey` would never be updated
so `initialize` would always be called even if the pipeline didn't
change
Commit: fe4f6c1a58ab4f00a88a97af01000b6783b573ee
https://github.com/llvm/llvm-project/commit/fe4f6c1a58ab4f00a88a97af01000b6783b573ee
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
Log Message:
-----------
[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmin/zvfbfmin (#150882)
When vectorizing with predication some loops that were previously
vectorized without zvfhmin/zvfbfmin will no longer be vectorized because
the masked load/store or gather/scatter cost returns illegal.
This is due to a discrepancy where for these costs we check
isLegalElementTypeForRVV but for regular memory accesses we don't.
But for bf16 and f16 vectors we don't actually need the extension
support for loads and stores, so this adds a new function which takes
this into account.
For regular memory accesses we should probably also e.g. return an
invalid cost for i64 elements on zve32x, but it doesn't look like we
have tests for this yet.
We also should probably not be vectorizing these bf16/f16 loops to begin
with if we don't have zvfhmin/zvfbfmin and zfhmin/zfbfmin. I think this
is due to the scalar costs being too cheap. I've added tests for this in
a100f6367205c6a909d68027af6a8675a8091bd9 to fix in another patch.
Commit: 1ab04fc94c5f68ad0dc6755e3914f2895b85e720
https://github.com/llvm/llvm-project/commit/1ab04fc94c5f68ad0dc6755e3914f2895b85e720
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/PDB.cpp
A lld/test/COFF/pdb-empty-sec.s
Log Message:
-----------
[LLD][COFF] Allow symbols with empty chunks to have no associated output section in the PDB writer (#149523)
If a chunk is empty and there are no other non-empty chunks in the same
section, `removeEmptySections()` will remove the entire section. In this
case, use a section index of 0, as the MSVC linker does, instead of
asserting.
Commit: 8437038984c39665783a4f7445b2eb9e9bf9ce48
https://github.com/llvm/llvm-project/commit/8437038984c39665783a4f7445b2eb9e9bf9ce48
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[LoopIdiom] Add test where LCSSA needs preserving when re-using PHI (NFC)
Commit: 38cd66a6ceef5a3208367967d8537b6a7e31ebc0
https://github.com/llvm/llvm-project/commit/38cd66a6ceef5a3208367967d8537b6a7e31ebc0
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
Log Message:
-----------
[LLD][COFF] Move resolving alternate names to SymbolTable (NFC) (#149495)
Commit: 0462dfe39f82ecb9fb7c9ddb15008e590b0c2924
https://github.com/llvm/llvm-project/commit/0462dfe39f82ecb9fb7c9ddb15008e590b0c2924
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[llvm][docs] Refresh "Restrict Visibility" in Coding Standards (#150914)
No change of meaning, just formatting and an extra example to make it
easier to comprehend:
* Split separate, important points into their own paragraphs.
* Remove a contraction.
* Finally, show to to use "static" on a function. As before we just
showed why namespaces were bad, but not what you should do instead.
Commit: d26ca8b87266024546501051ccaf75cb3756aee3
https://github.com/llvm/llvm-project/commit/d26ca8b87266024546501051ccaf75cb3756aee3
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
Log Message:
-----------
[lldb][AArch64] Add HWCAP3 to register field detection (#145029)
This will be used to detect the presence of Arm's new Memory Tagging
store only checking feature. This commit just adds the plumbing to get
that value into the detection function.
FreeBSD has not allocated a number for HWCAP3 and already has AT_ARGV
defined as 29. So instead of attempting to read from FreeBSD processes,
I've explicitly passed 0. We don't want to be reading some other entry
accidentally.
If/when FreeBSD adds HWCAP3 we can handle it like we do for
AUXV_FREEBSD_AT_HWCAP.
No extra tests here, those will be coming with the next change for MTE
support.
Commit: fbf6271c7da20356d7b34583b3711b4126ca1dbb
https://github.com/llvm/llvm-project/commit/fbf6271c7da20356d7b34583b3711b4126ca1dbb
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
A llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
Reapply (2) [BranchFolding] Kill common hoisted debug instructions (#149999)
Reapply #140091.
branch-folder hoists common instructions from TBB and FBB into their
pred. Without this patch it achieves this by splicing the instructions from TBB
and deleting the common ones in FBB. That moves the debug locations and debug
instructions from TBB into the pred without modification, which is not
ideal. Debug locations are handled in #140063.
This patch handles debug instructions - in the simplest way possible, which is
to just kill (undef) them. We kill and hoist the ones in FBB as well as TBB
because otherwise the fact there's an assignment on the code path is deleted
(which might lead to a prior location extending further than it should).
There's possibly something we could do to preserve some variable locations in
some cases, but this is the easiest not-incorrect thing to do.
Note I had to replace the constant DBG_VALUEs to use registers in the test- it
turns out setDebugValueUndef doesn't undef constant DBG_VALUEs... which feels
wrong to me, but isn't something I want to touch right now.
---
Fix end-iterator-dereference and add test.
Commit: 5bcbcf8d538768c7d7a79afa8a63518479c818c2
https://github.com/llvm/llvm-project/commit/5bcbcf8d538768c7d7a79afa8a63518479c818c2
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/asinhf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinhf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asinhf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor asinhf implementation to header-only in src/__support/math folder. (#150843)
Part of #147386
in preparation for: https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 5f2092dae36486f428485e47b9a694463c855a4e
https://github.com/llvm/llvm-project/commit/5f2092dae36486f428485e47b9a694463c855a4e
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
Log Message:
-----------
[RISCV][LV] Update f16/bf16 loop vectorizer tests. NFC
This fixes a failing test after the changes in #150908 affected the
result in #150882.
Commit: 4d259de2ae88fb022acc722dedd60260a870eb8b
https://github.com/llvm/llvm-project/commit/4d259de2ae88fb022acc722dedd60260a870eb8b
Author: Juan Besa <juanbesa at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/qualified-auto.cpp
Log Message:
-----------
[clang-tidy] Add `IgnoreAliasing` option to `readability-qualified-auto check` (#147060)
`readability-qualified-auto` check currently looks at the unsugared
type, skipping any typedefs, to determine if the variable is a
pointer-type. This may not be the desired behaviour, in particular when
the type depends on compilation flags.
For example
```
#if CONDITION
using Handler = int *;
#else
using Handler = uint64_t;
#endif
```
A more common example is some implementations of `std::array` use
pointers as iterators.
This introduces the IgnoreAliasing option so that
`readability-qualified-auto` does not look beyond typedefs.
---------
Co-authored-by: juanbesa <juanbesa at devvm33299.lla0.facebook.com>
Co-authored-by: Kazu Hirata <kazu at google.com>
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: f9f68af4b8d5f8dd0bf8f14174b8b223fcf54c97
https://github.com/llvm/llvm-project/commit/f9f68af4b8d5f8dd0bf8f14174b8b223fcf54c97
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
A llvm/test/Transforms/LoopUnroll/Hexagon/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[SCEV] Make sure LCSSA is preserved when re-using phi if needed.
If we insert a new add instruction, it may introduce a new use outside
the loop that contains the phi node we re-use. Use fixupLCSSAFormFor to
fix LCSSA form, if needed.
This fixes a crash reported in
https://github.com/llvm/llvm-project/pull/147824#issuecomment-3124670997.
Commit: 6fb8e585658ac3e0682dd9823507cea536cc8959
https://github.com/llvm/llvm-project/commit/6fb8e585658ac3e0682dd9823507cea536cc8959
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
Log Message:
-----------
AMDGPU: Disable AGPR allocation in VGPR MFMA tests (#150873)
Commit: a496a985d922e8ad1e9ef8d9ad3598a097cdfa90
https://github.com/llvm/llvm-project/commit/a496a985d922e8ad1e9ef8d9ad3598a097cdfa90
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
Log Message:
-----------
AMDGPU: Remove -stress-regalloc arguments from mfma selection tests (#150890)
I'm not really sure what the point of these was, but they originated
in the base support commit for gfx942 mfma support. These don't impact
the selection at all, so don't belong in this test. These were causing
allocation failure depending on whether or not the AGPR or VGPR form
was used.
Commit: 819f020b282f42e5ed45d8d8325cbb94ba48ef7a
https://github.com/llvm/llvm-project/commit/819f020b282f42e5ed45d8d8325cbb94ba48ef7a
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Utils/LibCallsShrinkWrap.cpp
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/Hexagon/hvx-reuse-fi-base.ll
Log Message:
-----------
Use F.hasOptSize() instead of checking optsize directly (#147348)
Commit: 0209e76fe6440bc45a9ed61b9671d9593db10957
https://github.com/llvm/llvm-project/commit/0209e76fe6440bc45a9ed61b9671d9593db10957
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_core_file/core.mte
M lldb/test/API/linux/aarch64/mte_core_file/core.nomte
M lldb/test/API/linux/aarch64/mte_core_file/main.c
Log Message:
-----------
[lldb][AArch64][Linux] Show MTE store only setting in mte_ctrl (#145033)
This controls whether tag checking is performed for loads and
stores, or stores only.
It requires a specific architecture feature which we detect
with a HWCAP3 and cpuinfo feature.
Live process tests look for this and adjust expectations
accordingly, core file tests are using an updated file with
this feature enabled.
The size of the core file has increased and there's nothing
I can do about that. Could be the presence of new architecure
features or kernel changes since I last generated them.
I can generate a smaller file that has the tag segment,
but that segment does not actually contain tag data. So
that's no use.
Commit: 75b79c9238bc083cdff2d2364be40633fdf4d1ad
https://github.com/llvm/llvm-project/commit/75b79c9238bc083cdff2d2364be40633fdf4d1ad
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/DLL.cpp
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64x-delayimport.test
M lld/test/COFF/delayimports.test
M lld/test/COFF/delayimporttables.yaml
M lld/test/COFF/giats.s
Log Message:
-----------
[LLD][X86] Match delayLoad thunk with MSVC (#149521)
Previously we saved registers in the shadow space of callee before
calling __delayLoadHelper2. Now we save arguments in the shadow space of
the caller and allocate shadow space for the callee.
Fixes #51941
---------
Co-authored-by: Benjamin Santerre <benjamin.santerre at gmail.com>
Commit: 6a45697fa63828c3ad90e2def12dae39b7e83dc5
https://github.com/llvm/llvm-project/commit/6a45697fa63828c3ad90e2def12dae39b7e83dc5
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
Log Message:
-----------
[CI] Downgrade to clang-20 for libc fullbuild (#150246)
To be reverted when llvm-21 issues are resolved with the precommit CIs.
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: 837b2d464ff16fe0d892dcf2827747c97dd5465e
https://github.com/llvm/llvm-project/commit/837b2d464ff16fe0d892dcf2827747c97dd5465e
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/Sema/attr-nonstring.c
Log Message:
-----------
[[gnu::nonstring]] should work on pointers too (#150974)
Clang's current implementation only works on array types, but GCC (which
is where we got this attribute) supports it on pointers as well as
arrays.
Fixes #150951
Commit: f0c90dfcd8f2b641c17db578bdfeb9b02994e06b
https://github.com/llvm/llvm-project/commit/f0c90dfcd8f2b641c17db578bdfeb9b02994e06b
Author: Baghirov Feyruz <113597150+feyruzb at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer-config.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer.cpp
M clang/docs/analyzer/checkers/unix_malloc_example.c
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/NewDelete-path-notes.cpp.plist
M clang/test/Analysis/Inputs/expected-plists/malloc-plist.c.plist
M clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/Malloc+MismatchedDeallocator+NewDelete.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
M clang/test/Analysis/NewDelete-intersections.mm
M clang/test/Analysis/NewDelete-path-notes.cpp
M clang/test/Analysis/diagnostics/dtors.cpp
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/getline-alloc.c
M clang/test/Analysis/gmalloc.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc-annotations.cpp
M clang/test/Analysis/malloc-free-after-return.cpp
M clang/test/Analysis/malloc-interprocedural.c
M clang/test/Analysis/malloc-plist.c
M clang/test/Analysis/malloc-refcounted.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.mm
M clang/test/Analysis/new.cpp
M clang/test/Analysis/retain-count-alloc.cpp
M clang/test/Analysis/self-assign.cpp
M clang/test/Analysis/stack-frame-context-revision.cpp
M clang/test/Analysis/std-string.cpp
Log Message:
-----------
Rename 'free' in warning messages to 'release' (#150935)
Changed the warning message:
- **From**: 'Attempt to free released memory'
**To**: 'Attempt to release already released memory'
- **From**: 'Attempt to free non-owned memory'
**To**: 'Attempt to release non-owned memory'
- **From**: 'Use of memory after it is freed'
**To**: 'Use of memory after it is released'
All connected tests and their expectations have been changed
accordingly.
Inspired by [this
PR](https://github.com/llvm/llvm-project/pull/147542#discussion_r2195197922)
Commit: 701de35f67201cb39cf22bf3835c345e55014f3c
https://github.com/llvm/llvm-project/commit/701de35f67201cb39cf22bf3835c345e55014f3c
Author: enh-google <enh at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcschr.cpp
M libc/src/wchar/wcspbrk.cpp
M libc/src/wchar/wcstok.cpp
Log Message:
-----------
[libc] Stop duplicating wcschr(). (#150661)
Three implementations of wcschr() is two too many.
Commit: b2322772f2ab97de60db906a591353a5ef77cdfe
https://github.com/llvm/llvm-project/commit/b2322772f2ab97de60db906a591353a5ef77cdfe
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Reduce reference counter to a 32-bit integer (#150961)
Summary:
This reference counter tracks how many threads are using a given slab.
Currently it's a 64-bit integer, this patch reduces it to a 32-bit
integer. The benefit of this is that we save a few registers now that we
no longer need to use two for these operations. This increases the risk
of overflow, but given that the largest value we accept for a single
slab is ~131,000 it is a long way off of the maximum of four billion or
so. Obviously we can oversubscribe the reference count by having threads
attempt to claim the lock and then try to free it, but I assert that it
is exceedingly unlikely that we will somehow have over four billion GPU
threads stalled in the same place.
A later optimization could be done to split the reference counter and
pointers into a struct of arrays, that will save 128 KiB of static
memory (as we currently use 512 KiB for the slab array).
Commit: 9c82f87aec12c77444edf04d46af4d8405becc25
https://github.com/llvm/llvm-project/commit/9c82f87aec12c77444edf04d46af4d8405becc25
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/lib/Support/Debug.cpp
M llvm/unittests/Support/DebugLogTest.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/test/IR/test-pattern-logging-listener.mlir
Log Message:
-----------
Introduce a "log level" support for DEBUG_TYPE (#150855)
This allows to set an optional integer level for a given debug type. The
string format is `type[:level]`, and the integer is interpreted as such:
- if not provided: all debugging for this debug type is enabled.
- if >0: all debug that is < to the level is enabled.
- if 0: same as for >0 but also does not disable the other debug-types,
it acts as a negative filter.
The LDBG() macro is updated to accept an optional log level to
illustrate the feature. Here is the expected behavior:
LDBG() << "A"; // Identical to LDBG(1) << "A";
LDBG(2) << "B";
With `--debug-only=some_type`: we'll see A and B in the output.
With `--debug-only=some_type:1`: we'll see A but not B in the output.
With `--debug-only=some_type:2`: we'll see A and B in the output. (same
with any level above 2)
With `--debug-only=some_type:0`: we'll see neither A nor B in the
output, but we'll see any other logging for other debug types.
Commit: 5f20518f5b4734d01848dfe44d24aed195dc2043
https://github.com/llvm/llvm-project/commit/5f20518f5b4734d01848dfe44d24aed195dc2043
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang/docs/CommandGuide/clang.rst
Log Message:
-----------
[Clang][Docs] Fix typo in clang.rst (#150907)
Commit: 496d31c8a9d69ded50e4aa7fbd5c5ba1ffd3ef2c
https://github.com/llvm/llvm-project/commit/496d31c8a9d69ded50e4aa7fbd5c5ba1ffd3ef2c
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
Reapply "[mlir][linalg] Restrict linalg.pack to not have artificial padding." (#150675) (#150680)
This reverts commit
https://github.com/llvm/llvm-project/commit/0844812b2e9d7f5ab005223443791c9287bcf5a2
with a shape fix in
https://github.com/llvm/llvm-project/commit/1db4c6b27500e686fad9e55bbbe7c7c68b246b7e
The revision restrict the `linalg.pack` op to not have artificial
padding semantics. E.g., the below is valid without the change, and it
becomes invalid with the change.
```mlir
func.func @foo(%src: tensor<9xf32>) -> tensor<100x8xf32> {
%cst = arith.constant 0.000000e+00 : f32
%dest = tensor.empty() : tensor<100x8xf32>
%pack = linalg.pack %src
padding_value(%cst : f32)
inner_dims_pos = [0]
inner_tiles = [8] into %dest
: tensor<9xf32> -> tensor<100x8xf32>
return %pack : tensor<100x8xf32>
}
```
IMO, it is a misuse if we use pack ops with artificial padding sizes
because the intention of the pack op is to relayout the source based on
target intrinsics, etc. The output shape is expected to be
`tensor<2x8xf32>`. If people need extra padding sizes, they can create a
new pad op followed by the pack op.
This also makes consumer tiling much easier because the consumer fusion
does not support artificial padding sizes. It is very hard to make it
work without using ad-hoc patterns because the tiling sizes are about
source, which implies that you don't have a core_id/thread_id to write
padding values to the whole tile.
People may have a question how why pad tiling implementation works. The
answer is that it creates an `if-else` branch to handle the case. In my
experience, it is very struggle in transformation because most of the
time people only need one side of the branch given that the tile sizes
are usually greater than padding sizes. However, the implementation is
conservatively correct in terms of semantics. Given that the
introduction of `pack` op is to serve the relayout needs better, having
the restriction makes sense to me.
Removed tests:
-
`no_bubble_up_pack_extending_dimension_through_expand_cannot_reassociate`
from `data-layout-propagation.mlir`: it is a dup test to
`bubble_up_pack_non_expanded_dims_through_expand` after we fix the
shape.
- `fuse_pack_consumer_with_untiled_extra_padding` from
`tile-and-fuse-consumer.mlir`: it was created for artificial padding in
the consumer fusion implementation.
The other changes in lit tests are just fixing the shape.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 0121a8e4319619527c9c28bbc01c74f794cc2255
https://github.com/llvm/llvm-project/commit/0121a8e4319619527c9c28bbc01c74f794cc2255
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/tools/spirv-tools/CMakeLists.txt
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Target/SPIRV/constant.mlir
A mlir/test/Target/SPIRV/lit.local.cfg
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
Log Message:
-----------
Reland "[mlir][spirv] Fix int type declaration duplication when serializing" (#145687)
This relands PRs #143108 and #144538.
The original PR was reverted due to a mistake that made all the mlir
tests run only if SPIRV target was enabled. This is now resolved since
enabling spirv-tools does not required SPIRV target any longer.
spirv-tools are not required by default to run SPIRV mlir tests, but
they can be optionally enabled in some SPIRV mlir test to verify that
the produced SPIRV assembly pass validation.
The other reverted PR #144685 is not longer needed and not part of this
relanding.
Original commit message:
> At the MLIR level unsigned integer and signless integers are different
types. Indeed when looking up the two types in type definition cache
they do not match.
> Hence when translating a SPIR-V module which contains both usign and
signless integers will contain the same type declaration twice
(something like OpTypeInt 32 0) which is not permitted in SPIR-V and
such generated modules fail validation.
> This patch solves the problem by mapping unisgned integer types to
singless integer types before looking up in the type definition cache.
---------
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 4f58c829fd8473b11c2e6c6ee424b2432e02fb56
https://github.com/llvm/llvm-project/commit/4f58c829fd8473b11c2e6c6ee424b2432e02fb56
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Search for 'offload-arch' only next to the clang driver (#150965)
Summary:
Previously, querying for the offload architecture tool would invoke the
user's PATH, which is bad when potentially using the driver from a
direct path. This patch change this to *only* consider the
`offload-arch` that's supposed to live next to the driver executable.
Now we will no longer pick up a potentially conflicting version of this
tool and it should always be found (Since it's a clang tool that's
installazed alongside the driver)
Commit: fc2850fc7657c2ac8bff48818e797929f46168fc
https://github.com/llvm/llvm-project/commit/fc2850fc7657c2ac8bff48818e797929f46168fc
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR2VecTest] Avoid magic constants
Instead make the members of Vocabulary public. This was causing test
failures with https://github.com/llvm/llvm-project/pull/139357.
Reviewed By: svkeerthy, boomanaiden154
Pull Request: https://github.com/llvm/llvm-project/pull/150878
Commit: c03b0dd9f4d8750437500931b6e5c4ba1a6eb2ad
https://github.com/llvm/llvm-project/commit/c03b0dd9f4d8750437500931b6e5c4ba1a6eb2ad
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
Add MTIA and META to triple (#150236)
Ref:
https://ai.meta.com/blog/next-generation-meta-training-inference-accelerator-AI-MTIA/
This PR contains
1. MTIA: Meta Training and Inference Accelerator as Environment.
2. Meta as the vendor.
### Testing
Added a unittest for the relevant changes
### Reviewers
@clayborg , @jeffreytan81 , @Jlalond
Commit: 2368be38a10c4b9cbad01927fe3338fd08b42751
https://github.com/llvm/llvm-project/commit/2368be38a10c4b9cbad01927fe3338fd08b42751
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-binding.hip
Log Message:
-----------
[HIP] Always respect `--gpu-bundle-output` in the new driver (#150989)
Summary:
This is a bit of an awkward transition point for the new and old
drivers. Previously AMDGPU uses this to generate offloading bundles, but
the new driver much prefers to output the file itself. This patch
changes the behavior to always respect `--gpu-bundle-output` instead of
having it be the default behavior. This means that we effectively get to
override the default new driver behavior with this flag now. This should
hoepfully fix some errors in the downstream comgr tests.
Commit: 522ac23609abc8222dc6314e361aabd046fd0494
https://github.com/llvm/llvm-project/commit/522ac23609abc8222dc6314e361aabd046fd0494
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
Log Message:
-----------
[WebAssembly] Add pattern for relaxed nmadd (#150684)
Following footstep of https://github.com/llvm/llvm-project/pull/147487
(support for madd), this PR adds support for nmadd.
https://github.com/llvm/llvm-project/issues/55932 tracks this
Commit: 3f3fac8478516ab340d24c8c4f3a5b0c9fd7ee41
https://github.com/llvm/llvm-project/commit/3f3fac8478516ab340d24c8c4f3a5b0c9fd7ee41
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][linalg] Enable pack consumer fusion for all perfect tiling cases. (#150672)
It was disabled because there may be artificial padding. After [refining the pack op semantics](https://github.com/llvm/llvm-project/commit/773e158c64735a80b814f20be6b959d9577531f8),
we can assume that there is no artificial padding. Thus, the check can
be removed, and we can unconditionally enable the consumer fusion if it
is a perfect tiling case.
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: ac31d64a64e8a648f6834f4cf9de10c56c8d1083
https://github.com/llvm/llvm-project/commit/ac31d64a64e8a648f6834f4cf9de10c56c8d1083
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lld/COFF/SymbolTable.cpp
A lld/test/COFF/alternatename-alias.s
A lld/test/COFF/alternatename-antidep.s
A lld/test/COFF/alternatename-lib.s
M lld/test/COFF/arm64ec-altnames.s
Log Message:
-----------
[LLD][COFF] Avoid resolving symbols with -alternatename if the target is undefined (#149496)
This change fixes an issue with the use of `-alternatename` in the MSVC
CRT on ARM64EC, where both mangled and demangled symbol names are
specified. Without this patch, the demangled name could be resolved to
an anti-dependency alias of the target. Since chaining anti-dependency
aliases is not allowed, this results in an undefined symbol.
The root cause isn't specific to ARM64EC, it can affect other targets as
well, even when anti-dependency aliases aren't involved. The
accompanying test case demonstrates a scenario where the symbol could be
resolved from an archive. However, because the archive member is pulled
in after the first pass of alternate name resolution, and archive
members don't override weak aliases, eager resolution would incorrectly
skip it.
Commit: eba0c574116c45392fdd6d581fbb94be29756341
https://github.com/llvm/llvm-project/commit/eba0c574116c45392fdd6d581fbb94be29756341
Author: Dave Lee <davelee.com at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[llvm][utils] Add summary formatter for SmallBitVector (#150542)
Originally implemented in https://github.com/swiftlang/swift/pull/29014.
I've made a couple changes:
1. Use the target's address size, not lldb
2. Replaced the loop with a format string
Commit: 741df45bc351b4ce0bf9bf2c879b0bb4a58bf206
https://github.com/llvm/llvm-project/commit/741df45bc351b4ce0bf9bf2c879b0bb4a58bf206
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wchar/CMakeLists.txt
A libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/mbsnrtowcs.cpp
A libc/src/wchar/mbsnrtowcs.h
A libc/src/wchar/mbsrtowcs.cpp
A libc/src/wchar/mbsrtowcs.h
A libc/src/wchar/mbstowcs.cpp
A libc/src/wchar/mbstowcs.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/mbsnrtowcs_test.cpp
A libc/test/src/wchar/mbsrtowcs_test.cpp
A libc/test/src/wchar/mbstowcs_test.cpp
Log Message:
-----------
[libc] Reland #149423 "wchar string conversion functions mb to wc" (#150667)
Added missing includes in the test files for null check
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 35693daa705e920036f1183091663158c587735b
https://github.com/llvm/llvm-project/commit/35693daa705e920036f1183091663158c587735b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/test/CodeGenCUDA/bf16.cu
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[NVPTX] Fix v2i8 call lowering, use generic ld/st nodes for call params (#146930)
Commit: 0efcb83626362213fb6cc99c4af42a93e74e6afe
https://github.com/llvm/llvm-project/commit/0efcb83626362213fb6cc99c4af42a93e74e6afe
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Preprocessor/builtin_aux_info.cpp
Log Message:
-----------
[Clang] Reland '__has_builtin should return false for aux triple builtins' (#126324)
Reland https://github.com/llvm/llvm-project/pull/121839 based on the
results of the Discourse discussion
[here](https://discourse.llvm.org/t/rfc-has-builtin-behavior-on-offloading-targets/84964).
---------
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 33465bb2bb75f26b7ad42ab87ccb2464c0245476
https://github.com/llvm/llvm-project/commit/33465bb2bb75f26b7ad42ab87ccb2464c0245476
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/docs/Dialects/Vector.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/ConvertToSPIRV/convert-gpu-modules.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/int-range-interface.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
Log Message:
-----------
[mlir][Vector] Remove `vector.extractelement` and `vector.insertelement` ops (#149603)
This PR removes `vector.extractelement` and `vector.insertelement` ops
from the code base in favor of the `vector.extract` and `vector.insert`
counterparts.
See RFC:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops
Commit: 18302d02fb4026002e7b0cf950c99e0d44573f4e
https://github.com/llvm/llvm-project/commit/18302d02fb4026002e7b0cf950c99e0d44573f4e
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
Log Message:
-----------
[clang-tidy][mlir] Make rewrite more conservative. (#150757)
Don't create a fix where object invoked on is a temporary object as
create method requires a reference.
Commit: ae0614de05ac4278b80a02ae49f657c8ce1db13b
https://github.com/llvm/llvm-project/commit/ae0614de05ac4278b80a02ae49f657c8ce1db13b
Author: Paulius Velesko <pvelesko at pglc.io>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/HIPSPV.cpp
A clang/test/Driver/hipspv-link-static-library.hip
Log Message:
-----------
HIPSPV: Unbundle SDL (#136412)
This fixes the issue of rdc linking static libraries with device code
https://github.com/CHIP-SPV/chipStar/issues/984
---------
Co-authored-by: Henry Linjamäki <henry.linjamaki at gmail.com>
Commit: 7ca23754c486a8ed5b6739456a4562bc09909913
https://github.com/llvm/llvm-project/commit/7ca23754c486a8ed5b6739456a4562bc09909913
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/pthread_barrier_t.h
A libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/__barrier_type.h
A libc/include/llvm-libc-types/pthread_barrier_t.h
A libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/barrier.cpp
A libc/src/__support/threads/linux/barrier.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_barrier_destroy.cpp
A libc/src/pthread/pthread_barrier_destroy.h
A libc/src/pthread/pthread_barrier_init.cpp
A libc/src/pthread/pthread_barrier_init.h
A libc/src/pthread/pthread_barrier_wait.cpp
A libc/src/pthread/pthread_barrier_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
A libc/test/integration/src/pthread/pthread_barrier_test.cpp
Log Message:
-----------
[libc] Implement barriers for pthreads (#148948)
Implemented barrier synchronization for pthreads
- Uses condition variables internally for platform independence
(platform-specific work is handled by the condition variable
implementation)
- Does NOT currently handle barrierattr pshared, this is a goal for a
future patch
Commit: 82ad67b13850599275f296a3e8cb16481be463ff
https://github.com/llvm/llvm-project/commit/82ad67b13850599275f296a3e8cb16481be463ff
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
Log Message:
-----------
[RISCV] Rewrite vlseg tests to avoid riscv.tuple.extract [nfc] (#151003)
Motivated by https://github.com/llvm/llvm-project/pull/150049, we can
directly return the tuple instead of extracting one segment.
(I wrote a quick script to rewrite these; this wasn't done by hand.)
Commit: 2762a079ee7d676a1026b15b445f75365832b2be
https://github.com/llvm/llvm-project/commit/2762a079ee7d676a1026b15b445f75365832b2be
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/complex-cast.cpp
Log Message:
-----------
[CIR] Implement LValueBitcast for ComplexType (#150668)
This change adds support for LValueBitcast for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 5846381133aa001496833310aa26d52a132b6b95
https://github.com/llvm/llvm-project/commit/5846381133aa001496833310aa26d52a132b6b95
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Move definitions of decodeZcmpRlist/decodeXqccmpRlistS0 to their declarations. NFC
These don't need anything from RISCVDisassemblerTables.inc so we
can define them earlier.
Commit: a4a0832899303d989772340404a01f6a4f1f6c99
https://github.com/llvm/llvm-project/commit/a4a0832899303d989772340404a01f6a4f1f6c99
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
R libc/hdr/pthread_macros.h
M libc/hdr/types/CMakeLists.txt
R libc/hdr/types/pthread_barrier_t.h
R libc/hdr/types/pthread_barrierattr_t.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/pthread-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
R libc/include/llvm-libc-types/__barrier_type.h
R libc/include/llvm-libc-types/pthread_barrier_t.h
R libc/include/llvm-libc-types/pthread_barrierattr_t.h
M libc/include/pthread.yaml
M libc/src/__support/threads/linux/CMakeLists.txt
R libc/src/__support/threads/linux/barrier.cpp
R libc/src/__support/threads/linux/barrier.h
M libc/src/pthread/CMakeLists.txt
R libc/src/pthread/pthread_barrier_destroy.cpp
R libc/src/pthread/pthread_barrier_destroy.h
R libc/src/pthread/pthread_barrier_init.cpp
R libc/src/pthread/pthread_barrier_init.h
R libc/src/pthread/pthread_barrier_wait.cpp
R libc/src/pthread/pthread_barrier_wait.h
M libc/test/integration/src/pthread/CMakeLists.txt
R libc/test/integration/src/pthread/pthread_barrier_test.cpp
Log Message:
-----------
Revert "[libc] Implement barriers for pthreads" (#151014)
Reverts llvm/llvm-project#148948
Commit: 1381ad497b9a6d3da630cbef53cbfa9ddf117bb6
https://github.com/llvm/llvm-project/commit/1381ad497b9a6d3da630cbef53cbfa9ddf117bb6
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/__support/wchar/CMakeLists.txt
R libc/src/__support/wchar/mbsnrtowcs.h
M libc/src/wchar/CMakeLists.txt
R libc/src/wchar/mbsnrtowcs.cpp
R libc/src/wchar/mbsnrtowcs.h
R libc/src/wchar/mbsrtowcs.cpp
R libc/src/wchar/mbsrtowcs.h
R libc/src/wchar/mbstowcs.cpp
R libc/src/wchar/mbstowcs.h
M libc/test/src/wchar/CMakeLists.txt
R libc/test/src/wchar/mbsnrtowcs_test.cpp
R libc/test/src/wchar/mbsrtowcs_test.cpp
R libc/test/src/wchar/mbstowcs_test.cpp
Log Message:
-----------
Revert "[libc] Reland #149423 "wchar string conversion functions mb to wc"" (#151016)
Reverts llvm/llvm-project#150667
Commit: 6107e3aa229368190207093298c2ac1ec5eec7c0
https://github.com/llvm/llvm-project/commit/6107e3aa229368190207093298c2ac1ec5eec7c0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libcxx] Install runner last when building CI containers
This patch changes when we install the GHA runner in the CI containers. Instead
of having it in the base image, we install it last. This will enable a follow up
patch that will do some setup enabling building the full container image with an
existing base image, thus enabling updating the GHA runner without modifying the
important bits.
Reviewers: EricWF, ldionne
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/148072
Commit: b33f9f64c7e7fbc92db2413dcac6f650ddebf80d
https://github.com/llvm/llvm-project/commit/b33f9f64c7e7fbc92db2413dcac6f650ddebf80d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/libcxx-build-containers.yml
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
Log Message:
-----------
[libcxx] Enable installing new runner binary on existing container
This patch does some refactoring to enable installing a new GHA runner binary
into an existing libcxx image. We achieve this by pushing the base image to the
registry and enabling control over the base image used for building the actions
image. This will always build and push both images even if an existing image is
being used for the actions image, but this should not impact anything as the
SHAs are pinned everywhere and space/build time is not a large concern.
Reviewers: ldionne, EricWF, #reviewers-libcxx
Reviewed By: ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/148073
Commit: 30532c13d2fb592af9cb651f6571beca4b48b705
https://github.com/llvm/llvm-project/commit/30532c13d2fb592af9cb651f6571beca4b48b705
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
Log Message:
-----------
[scudo] Fix secondary caching for mte (#150156)
The current code always unmaps a secondary allocation when MTE is
enabled. Fix this to match the comment, namely only unmap if MTE was
enabled and is no longer enabled after acquiring the lock.
In addition, allow quaratine to work in the secondary even if MTE is not
enabled.
Commit: 88389cce5381b3386c8fe1c45c33390f69a726e9
https://github.com/llvm/llvm-project/commit/88389cce5381b3386c8fe1c45c33390f69a726e9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI][Github] Bump CI Container Runner to v2.327.1
This came out a couple days ago. Upgrading to be proactive.
Commit: ea480cc665a427cfaf09d15fea57c2a6bc1d4f93
https://github.com/llvm/llvm-project/commit/ea480cc665a427cfaf09d15fea57c2a6bc1d4f93
Author: satyanarayana reddy janga <satyajanga at fb.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
Log Message:
-----------
[lldb] support ieee_single and ieee_double gdbtypes for registers (#150268)
Some gdb remote servers send target.xml that contains
```
<reg name='ft0' bitsize='32' type='ieee_single' dwarf_regnum='32'/>
<reg name='ft1' bitsize='32' type='ieee_single' dwarf_regnum='33'/>
<reg name='ft2' bitsize='32' type='ieee_single' dwarf_regnum='34'/>
<reg name='ft3' bitsize='32' type='ieee_single' dwarf_regnum='35'/>
<reg name='ft4' bitsize='32' type='ieee_single' dwarf_regnum='36'/>
<reg name='ft5' bitsize='32' type='ieee_single' dwarf_regnum='37'/>
<reg name='ft6' bitsize='32' type='ieee_single' dwarf_regnum='38'/>
<reg name='ft7' bitsize='32' type='ieee_single' dwarf_regnum='39'/>
```
it seems like a valid and supported type in gdb.
from gdb16.3/gdb/target_descriptions.c (could not find a way to link
it).
```
case TDESC_TYPE_IEEE_SINGLE:
m_type = init_float_type (alloc, -1, "builtin_type_ieee_single",
floatformats_ieee_single);
return;
case TDESC_TYPE_IEEE_DOUBLE:
m_type = init_float_type (alloc, -1, "builtin_type_ieee_double",
floatformats_ieee_double);
return;
```
### Testplan
updated unittest to test this.
Reviewers: @clayborg , @jeffreytan81 , @Jlalond
Commit: e650c4b9efd900bff56de878ba28f866b2f7b989
https://github.com/llvm/llvm-project/commit/e650c4b9efd900bff56de878ba28f866b2f7b989
Author: Daniil Fukalov <dfukalov at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
Log Message:
-----------
[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150929)
As requested in #148740.
Commit: ccc96e64845ba5b5608915f6eca434af3a6de31d
https://github.com/llvm/llvm-project/commit/ccc96e64845ba5b5608915f6eca434af3a6de31d
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
Log Message:
-----------
[LV] Add tests where vector trip count is known equal to VFxUF.
Add additional tests to cover the case where the trip count isn't equal
to VFxUF, but the vector trip count is.
Commit: c46336b396e4482c51ed4bfdfa55c22ab35a6ad1
https://github.com/llvm/llvm-project/commit/c46336b396e4482c51ed4bfdfa55c22ab35a6ad1
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
Reapply "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335) (#150990)
This reverts commit 05e08cdb3e576cc0887d1507ebd2f756460c7db7.
Adding the missing -mtriple flags in MIR/X86 test files which caused
these tests to fail which was the reason for reverting the patch.
Commit: 379949d79f14b7854b6b2b8caebda835dcc3fe6d
https://github.com/llvm/llvm-project/commit/379949d79f14b7854b6b2b8caebda835dcc3fe6d
Author: Mahé <mahe5397 at hotmail.fr>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/test/CodeGen/BPF/BTF/map-def-2.ll
M llvm/test/CodeGen/BPF/BTF/map-def-3.ll
A llvm/test/CodeGen/BPF/BTF/map-def-nested-array.ll
Log Message:
-----------
[BPF] Visit nested map array during BTF generation (#150608)
Fixes missing inner map struct type definitions [^1]. We should visit
the type of nested array of maps like we do for global maps. This patch
adds a boolean to convey the information to visitTypeEntry and
visitDerivedType that the pointee is a map definition and should be
treated as such.
It ressembles and works with commit 0d21c956a5c1 ("[BPF] Handle nested
wrapper structs in BPF map definition traversal (#144097)") which
focused on directly nested wrapper structs.
Before that patch, this ARRAY_OF_MAPS definition would lead to the BTF
information include the 'missing_type' as "FWD 'missing_type'
fwd_kind=struct":
struct missing_type { uint64_t foo; };
struct {
__uint(type, BPF_MAP_TYPE_ARRAY_OF_MAPS);
[...]
__array(
values, struct {
[...]
__type(value, struct missing_type);
});
} map SEC(".maps");
Which lead to errors while trying to load the map:
libbpf: map 'outer_map.inner': can't determine value size for type [N]:
-22.
To solve this issue, users had to use the struct in a dummy variable or
in a dummy function for the BTF to be generated correctly [^2].
[^1]: https://lore.kernel.org/netdev/aH_cGvgC20iD8qs9@gmail.com/T/#u
[^2]:
https://github.com/cilium/ebpf/discussions/1658#discussioncomment-12491339
---------
Signed-off-by: Mahe Tardy <mahe.tardy at gmail.com>
Co-authored-by: Eduard Zingerman <eddyz87 at gmail.com>
Commit: 67e2faa50c09813921fc1ce86ca10cb4c1612d16
https://github.com/llvm/llvm-project/commit/67e2faa50c09813921fc1ce86ca10cb4c1612d16
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] MC support for async load and store on gfx1250 (#151030)
Commit: c93d166c58f0f4ac69c58ec54fb08668b462de03
https://github.com/llvm/llvm-project/commit/c93d166c58f0f4ac69c58ec54fb08668b462de03
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
Log Message:
-----------
[VPlan] Simplify (MUL %x, 0) -> 0.
Simplify trivial multiplies.
https://alive2.llvm.org/ce/z/DabRkA
Commit: ced3b90738ff6a4c2f5f264e5085477dc59ffcf8
https://github.com/llvm/llvm-project/commit/ced3b90738ff6a4c2f5f264e5085477dc59ffcf8
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[MemProf] Change map to vector to avoid unstable iteration (#151039)
We iterate over a std::map indexed by FuncInfo, which is a pair of a
pointer and a clone number. In the ThinLTO case, this isn't an issue as
the function pointer always points to the same FunctionSummary object.
However, for regular LTO, this is a pointer to a Function object, which
is different for each clone. This will lead to unstable iteration order.
This was exposed in a test case added for PR150735, which added a new
instance of iteration over this map.
Since these function clones are added and numbered sequentially, change
this to a vector indexed by clone number, which points to a structure
containing the clone FuncInfo and the call map (the old map's key and
value, respectively).
Commit: 6bcff9eb13f226b89bb6ebc80bb0f3e80b7868f7
https://github.com/llvm/llvm-project/commit/6bcff9eb13f226b89bb6ebc80bb0f3e80b7868f7
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/HipStdPar/HipStdPar.h
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/math-fixup.ll
Log Message:
-----------
[HIPSTDPAR] Add handling for math builtins (#140158)
When compiling in `--hipstdpar` mode, the builtins corresponding to the
standard library might end up in code that is expected to execute on the
accelerator (e.g. by using the `std::` prefixed functions from
`<cmath>`). We do not have uniform handling for this in AMDGPU, and the
errors that obtain are quite arcane. Furthermore, the user-space changes
required to work around this tend to be rather intrusive.
This patch adds an additional `--hipstdpar` specific pass which forwards
to the run time component of HIPSTDPAR the intrinsics / libcalls which
result from the use of the math builtins, and which are not properly
handled. In the long run we will want to stop relying on this and handle
things in the compiler, but it is going to be a rather lengthy journey,
which makes this medium term escape hatch necessary.
The paired change in the run time component is here
<https://github.com/ROCm/rocThrust/pull/551>.
Commit: 4c8e79f81582a757ed4333f8ff2ad4da18bab39a
https://github.com/llvm/llvm-project/commit/4c8e79f81582a757ed4333f8ff2ad4da18bab39a
Author: jimingham <jingham at apple.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBSymbolContext.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedBreakpointInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Breakpoint/BreakpointResolverScripted.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/resolver.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
Switch the ScriptedBreakpointResolver over to the ScriptedInterface form (#150720)
This is NFC, I'm modernizing the interface before I add to it in a
subsequent commit.
Commit: ee63c1f3520bca0acb859fcb4da49d3eb667c1ad
https://github.com/llvm/llvm-project/commit/ee63c1f3520bca0acb859fcb4da49d3eb667c1ad
Author: Jonathon Penix <jpenix at quicinc.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/aarch64-toolchain.c
M clang/test/Driver/arm-toolchain.c
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
[clang][Driver] Prefer non-Linux emulations for baremetal Arm/AArch64 targets (#149235)
I'm unsure if there is an official source for which targets use/support
which emulations, but for the baremetal GNU Arm/AArch64 toolchains or
binutils builds I've tried to use, GNU ld either did not support the
Linux emulations (resulting in errors unless overriding the emulation)
or the Linux emulations were supported but GCC passed the non-Linux
emulations by default.
These emulations all seem to be accepted by lld as well, so try to align
with what it seems GCC is doing and prefer the non-Linux emulations for
baremetal Arm/AArch64 targets.
Commit: 8ecbfa66cd314df805e2910783ded37f2f8621b4
https://github.com/llvm/llvm-project/commit/8ecbfa66cd314df805e2910783ded37f2f8621b4
Author: sivadeilra <ardavis at microsoft.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
Log Message:
-----------
Hot-patch __ref_* variables should be placed in .rdata, not .data (#151008)
This is a refinment of #145565 . That PR added support for "Windows
Secure Hot-patching". In this design, functions that are compiled for
hot-patching need to be modified when they access mutable global
variables. The modification is to insert a level of indirection, the
so-called `__ref_*` variables.
Ref variables are supposed to be inserted into the `.rdata` section, not
`.data`. This provides a degree of protection against modification
(accidental or malicious) of ref variables during program execution.
When the Windows hot-patch subsystem loads a module as a hot-patch, it
finds all ref variables and changes the page protections for the pages
containing them to read/write. Then it sets the ref variables to point
to the real variable locations within the base image. Then it changes
page protections back to read-only.
This relies on the variables being placed in the `.rdata` section, not
`.data`.
However, it is still important that the LLVM `GlobalVariable` that is
created for the ref variable be created with `isConstant = false`. This
prevents LLVM from optimizing accesses to the `GlobalVariable`, i.e.
assuming that the variable can never change and thus inlining its value
into expressions that would ordinarily dereference it. That optimization
would defeat the purpose of hot-patching, so `isConstant = false` is
still the correct value for these ref variables.
Commit: f3761ab340448603fe9cabc99f49a3f04ac254b3
https://github.com/llvm/llvm-project/commit/f3761ab340448603fe9cabc99f49a3f04ac254b3
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
A llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
Log Message:
-----------
Reapply "[MemProf] Ensure all callsite clones are assigned a function clone" (#150856) (#151055)
This reverts commit 314e22bcab2b0f3d208708431a14215058f0718f, reapplying
PR150735 with a fix for the unstable iteration order exposed by the new
tests (PR151039).
Commit: bcd0d972247154336dd1321f1fded818e46671d1
https://github.com/llvm/llvm-project/commit/bcd0d972247154336dd1321f1fded818e46671d1
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
R libclc/clc/include/clc/math/unary_def_via_fp32.inc
M libclc/clc/lib/generic/math/clc_erf.cl
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_tgamma.cl
Log Message:
-----------
[libclc] Simplify unary_def_scalarize.inc's use in __clc_erf/erfc/tgamma (#150181)
Also delete unary_def_via_fp32.inc. There are small changes in
amdgcn--amdhsa.bc due to vector conversion is scalarized, e.g.
%2 = fpext <4 x half> %0 to <4 x float>
%3 = extractelement <4 x float> %2, i64 0
%4 = tail call float @llvm.fabs.f32(float %3)
->
%2 = extractelement <4 x half> %0, i64 0
%3 = tail call half @llvm.fabs.f16(half %2)
%4 = fpext half %3 to float
Commit: 5223317210cca7705d43fde4005270f5bb45215b
https://github.com/llvm/llvm-project/commit/5223317210cca7705d43fde4005270f5bb45215b
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M libclc/clc/lib/generic/geometric/clc_normalize.inc
Log Message:
-----------
[libclc] Add generic native half implementation of __clc_normalize (#150165)
This is ported from
https://github.com/intel/llvm/blob/sycl/libclc/libspirv/lib/generic/geometric/normalize.cl
and can pass a closed-source OpenCL CTS
"test_geometrics geom_normalize --half CL_DEVICE_TYPE_GPU" on intel GPU.
llvm-diff amdgcn--amdhsa.bc shows fpext/fptrunc insts are now removed
from normalize function.
Commit: 21836f4a49e1296c048ae96dd55fd5299dae61e2
https://github.com/llvm/llvm-project/commit/21836f4a49e1296c048ae96dd55fd5299dae61e2
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/ARM/fp16.ll
Log Message:
-----------
[SelectionDAG] Remove `UnsafeFPMath` in LegalizeDAG (#146316)
These global flags hinder further improvements like [[RFC] Honor pragmas
with
-ffp-contract=fast](https://discourse.llvm.org/t/rfc-honor-pragmas-with-ffp-contract-fast)
and pass concurrency support. Remove them incrementally.
Commit: 7162f191b8ce68dddb60e3f129f786afb08b2bbb
https://github.com/llvm/llvm-project/commit/7162f191b8ce68dddb60e3f129f786afb08b2bbb
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
[llvm] ensure DEMANGLE_ABI is properly defined (#151023)
## Overview
Include `llvm-config.h` from `DemangleConfig.h` so
`LLVM_ENABLE_LLVM_EXPORT_ANNOTATIONS` is defined correctly. The presence
of this definition controls the definition of `LLVM_ABI` on Windows DLL
builds. This include was missed in #147564.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307).
Commit: 0d05e55f69426c38f42f911a11ac540896577e06
https://github.com/llvm/llvm-project/commit/0d05e55f69426c38f42f911a11ac540896577e06
Author: Jin Huang <jinhuang1102 at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M libc/src/wchar/wcspbrk.cpp
Log Message:
-----------
[libc] Correct include path for wchar_utils.h in libc/src/wchar/wcspbrk.cpp (#151059)
A previous change incorrectly included `wchar_util.h` using a broken
relative path. This change corrects the path to `#include
"src/wchar/wchar_utils.h"`.
Commit: 5949f4596ea0f01c8072713c0a082b0e09c459cc
https://github.com/llvm/llvm-project/commit/5949f4596ea0f01c8072713c0a082b0e09c459cc
Author: Jaden Angella <ajaden at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/docs/Dialects/emitc.md
M mlir/include/mlir/Conversion/MemRefToEmitC/MemRefToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
A mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc.mlir
Log Message:
-----------
[mlir][EmitC]Expand the MemRefToEmitC pass - Lowering `AllocOp` (#148257)
This aims to lower `memref.alloc` to `emitc.call_opaque “malloc” ` or
`emitc.call_opaque “aligned_alloc” `
From:
```
module{
func.func @allocating() {
%alloc_5 = memref.alloc() : memref<999xi32>
return
}
}
```
To:
```
module {
emitc.include <"stdlib.h">
func.func @allocating() {
%0 = emitc.call_opaque "sizeof"() {args = [i32]} : () -> !emitc.size_t
%1 = "emitc.constant"() <{value = 999 : index}> : () -> index
%2 = emitc.mul %0, %1 : (!emitc.size_t, index) -> !emitc.size_t
%3 = emitc.call_opaque "malloc"(%2) : (!emitc.size_t) -> !emitc.ptr<!emitc.opaque<"void">>
%4 = emitc.cast %3 : !emitc.ptr<!emitc.opaque<"void">> to !emitc.ptr<i32>
return
}
}
```
Which is then translated as:
```
#include <stdlib.h>
void allocating() {
size_t v1 = sizeof(int32_t);
size_t v2 = 999;
size_t v3 = v1 * v2;
void* v4 = malloc(v3);
int32_t* v5 = (int32_t*) v4;
return;
}
```
Commit: 28c2c1e06e2dc73df03cfc2d797fa70365d481f2
https://github.com/llvm/llvm-project/commit/28c2c1e06e2dc73df03cfc2d797fa70365d481f2
Author: Austin <zhenhangwang at huawei.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/Representation.cpp
Log Message:
-----------
[clang-tools-extra] using wrapper llvm::sort(nfc) (#150998)
using wrapper llvm::sort(nfc)
Commit: a5deb59dfef13cb5eb8e3defc7e94904ea132a34
https://github.com/llvm/llvm-project/commit/a5deb59dfef13cb5eb8e3defc7e94904ea132a34
Author: Shoreshen <372660931 at qq.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
Log Message:
-----------
[AMDGPU] Add NoaliasAddrSpace to AAMDnodes (#149247)
This is the following PR of
https://github.com/llvm/llvm-project/pull/136553 which calculate
NoaliasAddrSpace.
This PR carries the info calculated into MIR by adding it into AAMDnodes
Commit: e654d4e8fd7fc744215084c47e9accce2428346d
https://github.com/llvm/llvm-project/commit/e654d4e8fd7fc744215084c47e9accce2428346d
Author: Evan Liu <liuyievan at gmail.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotModuleBufferize.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
A mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Generalize OneShotModuleBufferize to operate on any Operation (#148327)
As part of 2646c36a864aa6a62bc1280e9a8cd2bcd2695349,
`OneShotModuleBufferize` no longer descends into nested symbol tables,
recommending users who wish to do this should do so in a pass
pipeline/custom pass. This did not support the use case of ops that
weren't ModuleOps. The patch updates `OneShotModuleBufferize` to work on
any general op.
Commit: 255bba013600a5624ab9f894404d06c8df17462e
https://github.com/llvm/llvm-project/commit/255bba013600a5624ab9f894404d06c8df17462e
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
Log Message:
-----------
[memprof] Fix a warning
This patch fixes:
llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp:4771:9:
error: non-void lambda does not return a value in all control paths
[-Werror,-Wreturn-type]
Commit: 217f9e57d1cc46de51d3b36177c4ba4049aaa805
https://github.com/llvm/llvm-project/commit/217f9e57d1cc46de51d3b36177c4ba4049aaa805
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-29 (Tue, 29 Jul 2025)
Changed paths:
M mlir/lib/AsmParser/DialectSymbolParser.cpp
M mlir/lib/AsmParser/Lexer.cpp
M mlir/lib/AsmParser/Lexer.h
Log Message:
-----------
[mlir] Make parser not rely on terminating null. (#151007)
Used in follow up to parse slices of buffer.
Commit: 2bebbe166b1d5c6803b5d0f8794df3a18eff8e03
https://github.com/llvm/llvm-project/commit/2bebbe166b1d5c6803b5d0f8794df3a18eff8e03
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
Log Message:
-----------
MCFragment: Migrate away from appendContents
The fixed-size content of the MCFragment object will be stored as
trailing data (#150846). Any post-assembler-layout adjustments must
target the variable-size tail.
Commit: 28e6f7e0fc0cb7de72091e0dd14234f4b83f9bfa
https://github.com/llvm/llvm-project/commit/28e6f7e0fc0cb7de72091e0dd14234f4b83f9bfa
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-28 (Mon, 28 Jul 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libcxx-build-containers.yml
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
M clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.h
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/qualified-auto.rst
M clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/qualified-auto.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer-config.cpp
M clang-tools-extra/test/clang-tidy/infrastructure/static-analyzer.cpp
M clang/docs/CommandGuide/clang.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers/unix_malloc_example.c
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/ExprObjC.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprObjC.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
M clang/lib/Driver/ToolChains/Arch/AArch64.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaModule.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/Inputs/expected-plists/NewDelete-path-notes.cpp.plist
M clang/test/Analysis/Inputs/expected-plists/malloc-plist.c.plist
M clang/test/Analysis/Inputs/overloaded-delete-in-header.h
M clang/test/Analysis/Malloc+MismatchedDeallocator+NewDelete.cpp
M clang/test/Analysis/NewDelete-checker-test.cpp
M clang/test/Analysis/NewDelete-intersections.mm
M clang/test/Analysis/NewDelete-path-notes.cpp
M clang/test/Analysis/analyzer-enabled-checkers.c
M clang/test/Analysis/diagnostics/dtors.cpp
M clang/test/Analysis/dtor.cpp
M clang/test/Analysis/getline-alloc.c
M clang/test/Analysis/gmalloc.c
M clang/test/Analysis/malloc-annotations.c
M clang/test/Analysis/malloc-annotations.cpp
M clang/test/Analysis/malloc-free-after-return.cpp
M clang/test/Analysis/malloc-interprocedural.c
M clang/test/Analysis/malloc-plist.c
M clang/test/Analysis/malloc-refcounted.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.mm
M clang/test/Analysis/new.cpp
M clang/test/Analysis/retain-count-alloc.cpp
M clang/test/Analysis/self-assign.cpp
M clang/test/Analysis/stack-frame-context-revision.cpp
M clang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
M clang/test/Analysis/std-string.cpp
M clang/test/CIR/CodeGen/complex-cast.cpp
A clang/test/CXX/basic/basic.link/p19.cppm
M clang/test/CodeGenCUDA/bf16.cu
M clang/test/Driver/aarch64-toolchain.c
M clang/test/Driver/arm-toolchain.c
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/hip-binding.hip
A clang/test/Driver/hipspv-link-static-library.hip
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Modules/Exposure-2.cppm
A clang/test/Modules/Exposure.cppm
A clang/test/Modules/specializations-lazy-load-parentmap-crash.cpp
A clang/test/Preprocessor/builtin_aux_info.cpp
A clang/test/Preprocessor/riscv-target-features-cv.c
M clang/test/Preprocessor/riscv-target-features-sifive.c
A clang/test/Preprocessor/riscv-target-features-thead.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/attr-nonstring.c
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
M clang/test/SemaCXX/warn-unused-result.cpp
A clang/test/SemaObjC/attr-nodiscard.m
A clang/test/SemaObjCXX/attr-nodiscard.mm
M clang/unittests/Format/FormatTest.cpp
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/fuzzer/FuzzerOptions.h
M compiler-rt/lib/fuzzer/FuzzerUtilFuchsia.cpp
M compiler-rt/lib/fuzzer/FuzzerUtilPosix.cpp
M compiler-rt/lib/scudo/standalone/secondary.h
A compiler-rt/test/fuzzer/SigTrapTest.cpp
A compiler-rt/test/fuzzer/sig-trap.test
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Lower/OpenMP/atomic-control-options.f90
M libc/shared/math.h
A libc/shared/math/asinhf.h
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/asinhf.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/asinhf.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcschr.cpp
M libc/src/wchar/wcspbrk.cpp
M libc/src/wchar/wcstok.cpp
M libc/test/integration/src/stdlib/gpu/malloc_stress.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
R libclc/clc/include/clc/math/unary_def_via_fp32.inc
M libclc/clc/lib/generic/geometric/clc_normalize.inc
M libclc/clc/lib/generic/math/clc_erf.cl
M libclc/clc/lib/generic/math/clc_erfc.cl
M libclc/clc/lib/generic/math/clc_tgamma.cl
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/docker-compose.yml
M lld/COFF/DLL.cpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/PDB.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
A lld/test/COFF/alternatename-alias.s
A lld/test/COFF/alternatename-antidep.s
A lld/test/COFF/alternatename-lib.s
M lld/test/COFF/arm64ec-altnames.s
M lld/test/COFF/arm64ec-delayimport.test
M lld/test/COFF/arm64x-delayimport.test
M lld/test/COFF/delayimports.test
M lld/test/COFF/delayimporttables.yaml
A lld/test/COFF/embed-bitcode.test
M lld/test/COFF/giats.s
A lld/test/COFF/pdb-empty-sec.s
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBSymbolContext.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
M lldb/include/lldb/Core/ModuleList.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedBreakpointInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/source/Breakpoint/BreakpointResolverScripted.cpp
M lldb/source/Commands/CommandCompletions.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/InstrumentationRuntime/Utility/Utility.cpp
M lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.cpp
M lldb/source/Plugins/Process/Utility/AuxVector.h
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterFlagsDetector_arm64.h
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedBreakpointPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/InstrumentationRuntime.cpp
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/register/register/aarch64_mte_ctrl_register/TestMTECtrlRegister.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
M lldb/test/API/functionalities/breakpoint/scripted_bkpt/resolver.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
M lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
M lldb/test/API/linux/aarch64/mte_core_file/core.mte
M lldb/test/API/linux/aarch64/mte_core_file/core.nomte
M lldb/test/API/linux/aarch64/mte_core_file/main.c
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M llvm/docs/CodingStandards.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/YamlIO.rst
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/Support/Debug.h
M llvm/include/llvm/Support/DebugLog.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/HipStdPar/HipStdPar.h
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/WindowsSecureHotPatching.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/Debug.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
M llvm/lib/Target/Hexagon/HexagonMask.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Utils/LibCallsShrinkWrap.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll
M llvm/test/CodeGen/AArch64/andcompare.ll
M llvm/test/CodeGen/AArch64/andorbrcompare.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp.ll
M llvm/test/CodeGen/AArch64/cmp-chains.ll
M llvm/test/CodeGen/AArch64/dag-combine-select.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_1op.ll
M llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll
A llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
M llvm/test/CodeGen/AArch64/preferred-function-alignment.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
A llvm/test/CodeGen/AMDGPU/gfx1250-scratch-scope-se.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll
M llvm/test/CodeGen/ARM/fp16.ll
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/BPF/BTF/map-def-2.ll
M llvm/test/CodeGen/BPF/BTF/map-def-3.ll
A llvm/test/CodeGen/BPF/BTF/map-def-nested-array.ll
M llvm/test/CodeGen/Hexagon/hvx-reuse-fi-base.ll
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
A llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
A llvm/test/CodeGen/Mips/abiflags-soft-float.ll
A llvm/test/CodeGen/Mips/nan_lowering.ll
R llvm/test/CodeGen/Mips/qnan.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/byval-const-global.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compare-int.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/fma.ll
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/idioms.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
M llvm/test/CodeGen/NVPTX/misched_func_call.ll
M llvm/test/CodeGen/NVPTX/param-add.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure.mir
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
A llvm/test/CodeGen/PowerPC/froundeven-legalization.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
A llvm/test/CodeGen/WebAssembly/simd-relaxed-fnma.ll
M llvm/test/CodeGen/X86/embed-bitcode.ll
A llvm/test/CodeGen/X86/isel-fpclass.ll
A llvm/test/CodeGen/X86/late-tail-dup-computed-goto.mir
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
A llvm/test/DebugInfo/X86/branch-folder-dbg-after-end.mir
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
A llvm/test/MC/ELF/many-instructions.s
A llvm/test/ThinLTO/X86/memprof_func_assign_fix.ll
A llvm/test/Transforms/FunctionAttrs/noalias.ll
M llvm/test/Transforms/FunctionAttrs/nofree.ll
M llvm/test/Transforms/FunctionAttrs/nonnull.ll
M llvm/test/Transforms/FunctionAttrs/norecurse.ll
M llvm/test/Transforms/FunctionAttrs/nounwind.ll
M llvm/test/Transforms/FunctionAttrs/sendmsg-nocallback.ll
A llvm/test/Transforms/HipStdPar/math-fixup.ll
M llvm/test/Transforms/InstCombine/trunc-inseltpoison.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll
A llvm/test/Transforms/LoopFusion/sunk-phi-nodes.ll
M llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll
A llvm/test/Transforms/LoopUnroll/Hexagon/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/RISCV/bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/evl-compatible-loops.ll
M llvm/test/Transforms/LoopVectorize/RISCV/f16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/only-compute-cost-for-vplan-vfs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/preserve-dbg-loc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cond-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-fixed-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-known-no-overflow.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-no-masking.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-ordered-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
A llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-bin-unary-ops-args.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-call-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cast-intrinsics.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-cond-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-div.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-fixed-order-recurrence.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-gather-scatter.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-intermediate-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-iv32.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-known-no-overflow.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-masked-loadstore.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-no-masking.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-ordered-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction-cost.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reverse-load-store.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-safe-dep-distance.ll
R llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
A llvm/test/Transforms/MemProfContextDisambiguation/func_assign_fix.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
M llvm/tools/spirv-tools/CMakeLists.txt
M llvm/unittests/Analysis/IR2VecTest.cpp
M llvm/unittests/Support/DebugLogTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/gn/build/write_vcsrevision.py
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/lldbDataFormatters.py
A mlir/Maintainers.md
M mlir/docs/Dialects/Vector.md
M mlir/docs/Dialects/emitc.md
M mlir/docs/Tutorials/Toy/Ch-4.md
M mlir/docs/Tutorials/Toy/Ch-5.md
M mlir/docs/Tutorials/transform/Ch0.md
M mlir/examples/toy/Ch4/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch5/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp
M mlir/examples/toy/Ch6/mlir/ShapeInferencePass.cpp
M mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp
M mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp
M mlir/examples/toy/Ch7/mlir/ShapeInferencePass.cpp
M mlir/examples/transform/Ch4/lib/MyExtension.cpp
M mlir/include/mlir/Conversion/MemRefToEmitC/MemRefToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotModuleBufferize.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/GPUHeuristics.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPAttrDefs.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/X86Vector/X86Vector.td
M mlir/lib/Analysis/DataFlow/ConstantPropagationAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/AsmParser/DialectSymbolParser.cpp
M mlir/lib/AsmParser/Lexer.cpp
M mlir/lib/AsmParser/Lexer.h
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitCPass.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Dialect/Affine/Transforms/DecomposeAffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/MemRef/Transforms/ComposeSubView.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Pass/Pass.cpp
M mlir/lib/Support/TypeID.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/lib/Transforms/Utils/Inliner.cpp
M mlir/test/CMakeLists.txt
M mlir/test/Conversion/ConvertToSPIRV/convert-gpu-modules.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
A mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc.mlir
M mlir/test/Conversion/TosaToSCF/tosa-to-scf.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
A mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
M mlir/test/Dialect/Linalg/canonicalize.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Tosa/availability.mlir
A mlir/test/Dialect/Tosa/controlflow.mlir
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/int-range-interface.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/IR/test-pattern-logging-listener.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
M mlir/test/Integration/Dialect/Vector/CPU/0-d-vectors.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
M mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
M mlir/test/Integration/Dialect/Vector/CPU/compress.mlir
M mlir/test/Integration/Dialect/Vector/CPU/maskedstore.mlir
M mlir/test/Integration/Dialect/Vector/CPU/scatter.mlir
M mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
M mlir/test/Integration/GPU/Vulkan/vector-interleave.mlir
M mlir/test/Integration/GPU/Vulkan/vector-shuffle.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/SPIRV/constant.mlir
A mlir/test/Target/SPIRV/lit.local.cfg
M mlir/test/Transforms/compose-subview.mlir
M mlir/test/lib/Dialect/Bufferization/CMakeLists.txt
A mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lit.cfg.py
M mlir/test/lit.site.cfg.py.in
M mlir/tools/mlir-opt/mlir-opt.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm_configs/llvm-config.h.cmake
Log Message:
-----------
add test
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/94aaca75a3af...28e6f7e0fc0c
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