[all-commits] [llvm/llvm-project] ae3f03: AMDGPU: Move asm constraint physreg parsing to utils

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/move-asm-constraint-physreg-parsing-utils
  Home:   https://github.com/llvm/llvm-project
  Commit: ae3f03202052b20aae08e19a61bc382def7d8aa9
      https://github.com/llvm/llvm-project/commit/ae3f03202052b20aae08e19a61bc382def7d8aa9
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-07-28 (Mon, 28 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    A llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll

  Log Message:
  -----------
  AMDGPU: Move asm constraint physreg parsing to utils

Also fixes an assertion on out of bound physical register
indexes.



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