[all-commits] [llvm/llvm-project] 1669bd: [RISCV] Accept c.slli/c.srli/c.srli with a 0 immed...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1669bd3ae9af0cac4414479d8f1e53e329fa3efb
      https://github.com/llvm/llvm-project/commit/1669bd3ae9af0cac4414479d8f1e53e329fa3efb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-07-26 (Sat, 26 Jul 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/test/MC/Disassembler/RISCV/c_slli.txt
    M llvm/test/MC/RISCV/rv32c-invalid.s
    M llvm/test/MC/RISCV/rv64c-invalid.s
    M llvm/test/MC/RISCV/rvc-hints-invalid.s
    M llvm/test/MC/RISCV/rvc-hints-valid.s

  Log Message:
  -----------
  [RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)

These encodings were previously assigned to c.slli64/srli64/srai64, and
designated as hints for RV32 and RV64. Those mnemonics no longer appear
in the ISA manual after RV128 was removed. The spec now says that
c.slli/c.srli/c.srai with an immediate of 0 is a hint.

This patch updates the assembler to accept this. I've left the old
spelling for backwards compatibility but we disassemble a shift with a
zero immediate. The C_SLLI64_HINT/C_SRLI_HINT/C_SRAI_HINT instructions
are removed and the predicates for C_SLLI/C_SRLI/C_SRAI not accept a 0
immediate.

Fixes #150304



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