[all-commits] [llvm/llvm-project] 6e04e1: [AArch64][PAC] Introduce AArch64::PAC pseudo instr...

[Anatoly Trosinenko via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6e04e1e164636c06202cd1a68bd6a5ff7d9fa424
      https://github.com/llvm/llvm-project/commit/6e04e1e164636c06202cd1a68bd6a5ff7d9fa424
  Author: Anatoly Trosinenko <atrosinenko at accesssoftek.com>
  Date:   2025-07-25 (Fri, 25 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/CodeGen/AArch64/ptrauth-isel.ll
    A llvm/test/CodeGen/AArch64/ptrauth-isel.mir

  Log Message:
  -----------
  [AArch64][PAC] Introduce AArch64::PAC pseudo instruction (#146488)

Introduce a pseudo instruction carrying address and immediate modifiers
as separate operands to be selected instead of a pair of `MOVKXi` and
`PAC[ID][AB]` . The new pseudo instruction is expanded in AsmPrinter, so
that `MOVKXi` is emitted immediately before `PAC[ID][AB]`. This way, an
attacker cannot control the immediate modifier used to sign
the value, even if address modifier can be substituted.

To simplify the instruction selection, select `AArch64::PAC` pseudo
using TableGen pattern and post-process its `$AddrDisc` operand by
custom inserter hook - this eliminates duplication of the logic for
DAGISel and GlobalISel. Furthermore, this improves cross-BB analysis in
case of DAGISel.



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