[all-commits] [llvm/llvm-project] ce345c: [NFC][AMDGPU] Add an IR test for `v_cvt_f16_bf8` (...
Joel E. Denny via All-commits
all-commits at lists.llvm.org
Thu Jul 24 13:59:52 PDT 2025
Branch: refs/heads/users/jdenny-ornl/pgo-estimated-trip-count
Home: https://github.com/llvm/llvm-project
Commit: ce345cc793cef5ea54a5d29018571f53cd2164e3
https://github.com/llvm/llvm-project/commit/ce345cc793cef5ea54a5d29018571f53cd2164e3
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
Log Message:
-----------
[NFC][AMDGPU] Add an IR test for `v_cvt_f16_bf8` (#149627)
This was left during the upstream.
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: ba819031960ff9efb1862f2689c94a2fb496c2ba
https://github.com/llvm/llvm-project/commit/ba819031960ff9efb1862f2689c94a2fb496c2ba
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
Log Message:
-----------
[gfx1250][SDAG] Lower unsafe bf16 divisions (#149628)
Co-authored-by: Kosarev, Ivan <Ivan.Kosarev at amd.com>
Commit: e801a10b44ee96acb70b994662616a66fca0be21
https://github.com/llvm/llvm-project/commit/e801a10b44ee96acb70b994662616a66fca0be21
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
Log Message:
-----------
[AMDGPU] Add the code generation support for `llvm.[sin/cos].bf16` (#149631)
This is a partial support because some other instructions have not been upstreamed yet.
Commit: 890952ebfc4241cbca0f4fc9ad43cf9ab74ff223
https://github.com/llvm/llvm-project/commit/890952ebfc4241cbca0f4fc9ad43cf9ab74ff223
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port 401b5ccf6b50
Commit: 39389d55dd2cbfae54c3c4d4ba693f88f394e3bf
https://github.com/llvm/llvm-project/commit/39389d55dd2cbfae54c3c4d4ba693f88f394e3bf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn build] Port 7355ea3f6b21
Commit: 49d7a9b14ef1cc1c7231507f5f2feff7e7653966
https://github.com/llvm/llvm-project/commit/49d7a9b14ef1cc1c7231507f5f2feff7e7653966
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/BinaryFormat/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
Log Message:
-----------
[gn build] Port aa7ada1dfbe2
Commit: e39ee62c5bdbe71b9f191bc5da7d47577e2099a9
https://github.com/llvm/llvm-project/commit/e39ee62c5bdbe71b9f191bc5da7d47577e2099a9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[clang][bytecode] Use OptPrimType instead of std::optional<PrimType> (#149812)
We use this construct a lot. Use something similar to clang's
UnsignedOrNone.
This results in some slighy compile time improvements:
https://llvm-compile-time-tracker.com/compare.php?from=17a4b0399d161a3b89d8f0ce82add1638f23f5d4&to=a251d81ecd0ed45dd190462663155fdb303ef04d&stat=instructions:u
Commit: ed2bfd132509da679320a1d691af4a91192297d0
https://github.com/llvm/llvm-project/commit/ed2bfd132509da679320a1d691af4a91192297d0
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/intrinsic-module-path.f90
Log Message:
-----------
[Flang] Add -fintrinsic-modules-path= alias (#149417)
Add the syntax `-fintrinsic-modules-path=<dir>` as an alias to the
existing option `-fintrinsic-modules-path <dir>`. gfortran also supports
both alternatives.
This is particularly useful with CMake which de-duplicates command-line
options. For instance,
`-fintrinsic-modules-path /path/A -fintrinsic-modules-path /path/B`
is de-duplicated to
`-fintrinsic-modules-path /path/A /path/B`
since it conisiders the second `-fintrinsic-modules-path`
"redundant". This can be avoided using the syntax
`-fintrinsic-modules-path=/path/A -fintrinsic-modules-path=/path/B`.
Commit: 12a3afe47d4e5fcc97eb44271c00ace7cc8e4ff2
https://github.com/llvm/llvm-project/commit/12a3afe47d4e5fcc97eb44271c00ace7cc8e4ff2
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Remove code related to trigraphs (#148640)
When reviewing #147156, the reviewers pointed out that we didn't need to
support the trigraph. The code never handled it right.
In the debug build, this kind of input caused the assertion in the
function `countLeadingWhitespace` to fail. The release build without
assertions outputted `?` `?` `/` separated by spaces.
```C
#define A ??/
int i;
```
This is because the code in `countLeadingWhitespace` assumed that the
underlying lexer recognized the entire `??/` sequence as a single token.
In fact, the lexer recognized it as 3 separate tokens. The flag to make
the lexer recognize trigraphs was never enabled.
This patch enables the flag in the underlying lexer. This way, the
program now either turns the trigraph into a single `\` or removes it
altogether if the line is short enough. There are operators like the
`??=` in C#. So the flag is not enabled for all input languages. Instead
the check for the token size is moved from the assert line into the if
line.
The problem was introduced by my own patch 370bee480139 from about 3
years ago. I added code to count the number of characters in the escape
sequence probably just because the block of code used to have a comment
saying someone should add the feature. Maybe I forgot to enable
assertions when I ran the code. I found the problem because reviewing
pull request 145243 made me look at the code again.
Commit: 0c804da4eaf72969e338ed5619c41e038e1bdf35
https://github.com/llvm/llvm-project/commit/0c804da4eaf72969e338ed5619c41e038e1bdf35
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU][True16] turn on true16 for all gfx11 devices (#143518)
A follow up patch from https://github.com/llvm/llvm-project/pull/140736.
Set default true16 mode from gfx110x to all gfx11 devices.
Tests has been address in preivous patches.
Commit: c33c978d766a6bbaec28fce7638354c549a75111
https://github.com/llvm/llvm-project/commit/c33c978d766a6bbaec28fce7638354c549a75111
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
[AMDGPU][NFC] Run the general bf16 tests for GFX950. (#149796)
Commit: 2aa1e54fa1ff7f7c347e7108fe8650e94014c941
https://github.com/llvm/llvm-project/commit/2aa1e54fa1ff7f7c347e7108fe8650e94014c941
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Parser/OpenMP/map-modifiers-v60.f90
Log Message:
-----------
[flang][OpenMP] Parse OpenMP 6.0 map modifiers (#149134)
OpenMP 6.0 has changed the modifiers on the MAP clause:
- map-type-modifier has been split into individual modifiers,
- map-type "delete" has become a modifier,
- new modifiers have been added.
This patch adds parsing support for all of the OpenMP 6.0 modifiers. The
old "map-type-modifier" is retained, but is no longer created in
parsing. It will remain to take advantage of the preexisting modifier
validation for older versions: when the OpenMP version is < 6.0, the
modifiers will be rewritten back as map-type-modifiers (or map- type in
case of "delete").
In this patch the modifiers will always be rewritten in the older format
to isolate these changes to parsing as much as possible.
Commit: a270fdf3fe58dff7093c8bc1c7ffbd03c0268d66
https://github.com/llvm/llvm-project/commit/a270fdf3fe58dff7093c8bc1c7ffbd03c0268d66
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
Log Message:
-----------
[memprof] Simplify control flow in readMemProf (NFC) (#149764)
Now that readMemProf calls two helper functions handleAllocSite and
handleCallSite, we can simplify the control flow. We don't need to
use "continue" anymore.
Commit: 04e5e643f526090ec872c0e505c487918992e21d
https://github.com/llvm/llvm-project/commit/04e5e643f526090ec872c0e505c487918992e21d
Author: Rahul Yadav <rahul4talk at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
Log Message:
-----------
[VectorCombine] Generalize foldBitOpOfBitcasts to support more cast operations (#148350)
This patch generalizes the existing foldBitOpOfBitcasts optimization in the VectorCombine pass to handle additional cast operations beyond just bitcast.
Fixes: [#146037](https://github.com/llvm/llvm-project/issues/146037)
Summary
The optimization now supports folding bitwise operations (AND/OR/XOR)
with the following cast operations:
- bitcast (original functionality)
- trunc (truncate)
- sext (sign extend)
- zext (zero extend)
The transformation pattern is:
bitop(castop(x), castop(y)) -> castop(bitop(x, y))
This reduces the number of cast instructions from 2 to 1, improving
performance on targets where cast operations
are expensive or where performing bitwise operations on narrower types
is beneficial.
Implementation Details
- Renamed foldBitOpOfBitcasts to foldBitOpOfCastops to reflect broader
functionality
- Extended pattern matching to handle any CastInst operation
- Added validation for each cast type's constraints (e.g., trunc
requires source > dest)
- Updated cost model to use the actual cast opcode
- Preserves IR flags from original instructions
- Handles multi-use scenarios appropriately
Testing
- Added comprehensive tests in
test/Transforms/VectorCombine/bitop-of-castops.ll
- Tests cover all supported cast types with all bitwise operations
- Includes negative tests for unsupported patterns
- All existing VectorCombine tests pass
Commit: 8366dc207a2e6b50cb8afe2d98fca68bd78bd0fa
https://github.com/llvm/llvm-project/commit/8366dc207a2e6b50cb8afe2d98fca68bd78bd0fa
Author: Timothy Herchen <timothy.herchen at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Lex/LiteralSupport.cpp
M clang/test/C/C2y/n3353.c
Log Message:
-----------
[clang] Don't warn on zero literals with -std=c2y (#149688)
Fixes #149669; the old check compared with the end of the literal, but
we can just check that after parsing digits, we're pointing to one
character past the token start.
Commit: 5b98992fb98cb9cd3c492907b262e149f84c0cb0
https://github.com/llvm/llvm-project/commit/5b98992fb98cb9cd3c492907b262e149f84c0cb0
Author: Arseny Kapoulkine <arseny.kapoulkine at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-conversions.ll
M llvm/test/CodeGen/WebAssembly/simd-extending-convert.ll
Log Message:
-----------
[WebAssembly] Optimize convert_iKxN_u into convert_iKxN_s (#149609)
convert_iKxN_s is canonicalized into convert_iKxN_u when the argument is
known to have sign bit 0. This results in emitting Wasm opcodes that, on
some targets (like x86_64), are dramatically slower than signed versions
on major engines.
Similarly to X86, we now fix this up in isel when the instruction has
nonneg flag from canonicalization or if we know the source has zero sign
bit.
Fixes #149457.
Commit: 13906724ff7aa1bc58202faac62690570dfe0dc3
https://github.com/llvm/llvm-project/commit/13906724ff7aa1bc58202faac62690570dfe0dc3
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/stdint.c
Log Message:
-----------
[Mips] Correctly define IntPtrType (#145158)
Mips was the only architecture having PtrDiffType = SignedInt and
IntPtrType = SignedLong
This fixes a problem on mipsel-windows-gnu triple, where uintptr_t was
wrongly defined as unsigned long instead of unsigned int, leading to
problems in compiler-rt.
compiler-rt/lib/interception/interception_type_test.cpp:24:17: error:
static assertion failed due to requirement
'__sanitizer::is_same<unsigned long, unsigned int>::value':
24 | COMPILER_CHECK((__sanitizer::is_same<__sanitizer::uptr,
::uintptr_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
| ^~~~
compiler-rt/lib/interception/interception_type_test.cpp:25:17: error:
static assertion failed due to requirement '__sanitizer::is_same<long,
int>::value':
25 | COMPILER_CHECK((__sanitizer::is_same<__sanitizer::sptr,
::intptr_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
| ^~~~
compiler-rt/lib/interception/interception_type_test.cpp:27:17: error:
static assertion failed due to requirement '__sanitizer::is_same<long,
int>::value':
27 | COMPILER_CHECK((__sanitizer::is_same<::PTRDIFF_T,
::ptrdiff_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
Commit: 29af8e59fcd8bc5795a9668f4d4dde5572df4146
https://github.com/llvm/llvm-project/commit/29af8e59fcd8bc5795a9668f4d4dde5572df4146
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
Revert "[BranchFolding] Kill common hoisted debug instructions" (#149845)
Reverts llvm/llvm-project#140091 due to crash (see comments for reproducer)
Commit: 0b054e21f473e258fe0a886fea908fe8bb867bc8
https://github.com/llvm/llvm-project/commit/0b054e21f473e258fe0a886fea908fe8bb867bc8
Author: Aakanksha Patil <41199349+aakanksha555 at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/lib/ObjectYAML/ELFEmitter.cpp
A llvm/test/tools/obj2yaml/ELF/eflags.yaml
A llvm/test/tools/yaml2obj/file-header-flags.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
Allow "[[FLAGS=<none>]]" value in the ELF Fileheader Flags field (#143845)
https://github.com/llvm/llvm-project/pull/92066 will be dependent on
this change
Commit: 28b85502eb848538b8243039641584906712fd52
https://github.com/llvm/llvm-project/commit/28b85502eb848538b8243039641584906712fd52
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
Log Message:
-----------
[AMDGPU] Remove some duplicated lines. NFC. (#128029)
Commit: 1c49ce676caa161250624714c3698b87dc2f8628
https://github.com/llvm/llvm-project/commit/1c49ce676caa161250624714c3698b87dc2f8628
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
Log Message:
-----------
[AMDGPU] Enable FWD_PROGRESS bit for GFX10+ on PAL (#139895)
Performance testing shows no significant gains or losses on graphics
workloads, so this is mostly to make the behavior consistent across all
supported OSes instead of special-casing HSA.
Commit: b184dd9c6f4facf3c4c513ef826c584ead8220d9
https://github.com/llvm/llvm-project/commit/b184dd9c6f4facf3c4c513ef826c584ead8220d9
Author: Howard Chu <1007273067 at qq.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
Log Message:
-----------
[doc][LLVM] Fix typo in the Kaleidoscope tutorial (#133675)
"to make the add's lexically identical" -> "to make the adds lexically
identical"
Commit: f85c1a5615c87f4598c6859578c0c30d4ea6a58c
https://github.com/llvm/llvm-project/commit/f85c1a5615c87f4598c6859578c0c30d4ea6a58c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.plus_equals.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/shared_ptr_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
Log Message:
-----------
[libc++] Remove mentions of Clang 18 in the test suite (#148862)
Clang 19 has been the oldest supported version of Clang since the LLVM
20 release, but we had not cleaned up the test suite yet.
Commit: 0823f4ff086e5352f7543b68ce6e7823498cf44b
https://github.com/llvm/llvm-project/commit/0823f4ff086e5352f7543b68ce6e7823498cf44b
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[ConstantFolding] Fix nvvm_round folding on PPC (#149837)
Fix a failing test for constant-folding the nvvm_round intrinsic. The
original implementation added in #141233 used a native libm call to the
"round" function, but on PPC this produces +0.0 if the input is -0.0,
which caused a test failure.
This patch updates it to use APFloat functions instead of native libm
calls to ensure cross-platform consistency.
Commit: c9ceb9b75fd547c7d2e79837075370f4c8db8faa
https://github.com/llvm/llvm-project/commit/c9ceb9b75fd547c7d2e79837075370f4c8db8faa
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[DebugInfo] Remove intrinsic-flavours of findDbgUsers (#149816)
This is one of the final remaining debug-intrinsic specific codepaths
out there, and pieces of cross-LLVM infrastructure to do with debug
intrinsics.
Commit: 65420e5539088d3e156f6bdb3fd390d2354091f7
https://github.com/llvm/llvm-project/commit/65420e5539088d3e156f6bdb3fd390d2354091f7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
Log Message:
-----------
[NFC][AMDGPU] Fix a test issue in `llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll` (#149826)
The callee and caller signature doesn't match
Commit: 6932080866f46c198e8999d2882ba34a9b6c40e7
https://github.com/llvm/llvm-project/commit/6932080866f46c198e8999d2882ba34a9b6c40e7
Author: William Huynh <William.Huynh at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/src/string/string_utils.h
Log Message:
-----------
[libc] Add dependency <stdint.h> to src/string/string_utils.h (#149849)
string_utils.h uses uintptr_t, and there seems to be no tracking of this
dependency. It seems upstream builds are unaffected but downstream this
is causing a lot of flaky builds.
Commit: 0fa515f7332142171f40df5df8a843d7351388dd
https://github.com/llvm/llvm-project/commit/0fa515f7332142171f40df5df8a843d7351388dd
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
R llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/WinEH/wineh-reuse-catch-alloca.ll
Log Message:
-----------
[win] Merge the x64 and AArch64 wineh-reuse-catch-alloca.ll tests (#149178)
Cleans up debt from #147849 and #147860
I had originally duplicated this test since the WinEH directory wasn't
enabled for AArch64, but now that we can run AArch64 tests in that
directory, I've unified the tests.
Commit: d6094370cb3f5ed24249800c42632e453d4ada3f
https://github.com/llvm/llvm-project/commit/d6094370cb3f5ed24249800c42632e453d4ada3f
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
A llvm/test/Transforms/InstCombine/AMDGPU/wmma-f8f6f4.ll
A llvm/test/Verifier/AMDGPU/wmma-f8f6f4.ll
Log Message:
-----------
AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 234338852c43bf3452813caea851d3e49074d521
https://github.com/llvm/llvm-project/commit/234338852c43bf3452813caea851d3e49074d521
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
Log Message:
-----------
Reapply "[AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and … (#149262)
Fixed the problem in ce7851f6b7d59e50f92cb4e8dbfd801576c8b641.
This reverts commit ba271cc07334c74df55741701e5b22032c0cddbb.
Commit: 30705c5840f42f48d608b56e1efccfdbecec8f0a
https://github.com/llvm/llvm-project/commit/30705c5840f42f48d608b56e1efccfdbecec8f0a
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
Log Message:
-----------
[mlir][vector][NFC] Add deprecation notice to splat's .td (#149532)
Part of deprecation of vector.splat
RFC: https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: b80ce054206db223ec8c3cd55fad510c97afbc9f
https://github.com/llvm/llvm-project/commit/b80ce054206db223ec8c3cd55fad510c97afbc9f
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/lib/ObjectYAML/ELFEmitter.cpp
R llvm/test/tools/obj2yaml/ELF/eflags.yaml
R llvm/test/tools/yaml2obj/file-header-flags.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
Revert "Allow "[[FLAGS=<none>]]" value in the ELF Fileheader Flags field (#143845)"
This reverts commit 0b054e21f473e258fe0a886fea908fe8bb867bc8.
Breaks many tests, see comments on #143845.
Commit: f7347e9f784860d9482ad8fe757761514cceff31
https://github.com/llvm/llvm-project/commit/f7347e9f784860d9482ad8fe757761514cceff31
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
A llvm/utils/update_mir_regclass_numbers
Log Message:
-----------
[utils] Add a script to update regclass numbers in MIR tests (#142761)
Commit: 2865f1ba966c21d4ebff610875394ce9c7a5ff38
https://github.com/llvm/llvm-project/commit/2865f1ba966c21d4ebff610875394ce9c7a5ff38
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math/exp10f16.h
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/test/CMakeLists.txt
A libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_test.cpp
Log Message:
-----------
[libc][math] add smoke tests to shared/math.h (#149741)
Adding smoke tests for shared math header.
part of #147386
Commit: d9527be9141b4a9f434c5a105bb7a24a935c5d87
https://github.com/llvm/llvm-project/commit/d9527be9141b4a9f434c5a105bb7a24a935c5d87
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
A flang/test/Transforms/tbaa-local-alloc-threshold.fir
Log Message:
-----------
[NFC][flang] Added engineering option for triaging local-alloc-tbaa. (#149587)
I triaged a benchmark that showed inaccurate results, when
local-alloc-tbaa
was enabled. It turned out to be not a real TBAA issue, but rather
TBAA affecting optimizations that affect FMA generation, which
introduced
an expected accuracy variation. I would like to keep this threshold
control for future uses.
Commit: 36089e5d983fe9ae00f497c2d500f37227f82db1
https://github.com/llvm/llvm-project/commit/36089e5d983fe9ae00f497c2d500f37227f82db1
Author: Marco Elver <elver at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
Log Message:
-----------
[LowerAllowCheck] Rename removeUbsanTrap() to lowerAllowChecks() (#149847)
No traps are removed directly nor is this restricted to UBSan, therefore
rename the function doing the transformation of the intrinsic to match
its intent.
NFC.
Commit: e202dba288edd47f1b370cc43aa8cd36a924e7c1
https://github.com/llvm/llvm-project/commit/e202dba288edd47f1b370cc43aa8cd36a924e7c1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
[SLP]Initial support for copyable elements (non-schedulable only)
Adds initial support for copyable elements. This patch only models adds
and model copyable elements as add <element>, 0, i.e. uses identity
constants for missing lanes.
Only support for elements, which do not require scheduling, is added to
reduce size of the patch.
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/140279
Commit: 881b3fdfad30ca7e945fab4c68822f6bdecf06af
https://github.com/llvm/llvm-project/commit/881b3fdfad30ca7e945fab4c68822f6bdecf06af
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
Log Message:
-----------
[RISCV][IA] Support masked.load for deinterleaveN matching (#149556)
This builds on the whole series of recent API reworks to implement
support for deinterleaveN of masked.load. The goal is to be able to
enable masked interleave groups in the vectorizer once all the codegen
and costing pieces are in place.
I considered including the shuffle path support in this review as well
(since the RISCV target specific stuff should be common), but decided to
separate it into it's own review just to focus attention on one thing at
a time.
Commit: abce4e9ad0481ef33812e72a1bae53d77ddd9cce
https://github.com/llvm/llvm-project/commit/abce4e9ad0481ef33812e72a1bae53d77ddd9cce
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Folder: shape_cast(extract) -> extract (#146368)
In a later PR more shape_cast ops will appear. Specifically, broadcasts that
just prepend ones become shape_cast ops (i.e. volume preserving broadcasts
are canonicalized to shape_casts). This PR ensures that broadcast-like
shape_cast ops fold at least as well as broadcast ops.
This is done by modifying patterns that target broadcast ops, to target
'broadcast-like' ops. No new patterns are added, the patterns that exist
are just made to match on shape_casts where appropriate.
This PR also includes minor code simplifications: use
`isBroadcastableTo` to simplify `ExtractOpFromBroadcast` and simplify
how broadcast dims are detected in `foldExtractFromBroadcast`. These are
NFC.
---------
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: ac6e2ee39b34ec7ff5bed885c87e0d0bd16be835
https://github.com/llvm/llvm-project/commit/ac6e2ee39b34ec7ff5bed885c87e0d0bd16be835
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][vector] Support direct broadcast conversion (LLVM & SPIRV) (#148027)
Add conversion for broadcast from scalar for LLVM and SPIRV. Also some
miscellaneous replacements of vector.splat with vector.broadcast in
VectorToGPU and ArithToAMDGPU.
Part of deprecation of vector.splat RFC:
https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: ce44f089ded833acde529dbf448732a486207d5f
https://github.com/llvm/llvm-project/commit/ce44f089ded833acde529dbf448732a486207d5f
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Add an extra optional did_read_live_memory to Target::ReadMemory (#149620)
Target::ReadMemory may or may not read live memory, but whether it did
read from live memory or from the filecache is opaque to callers. Add an
extra out parameter to indicate whether live memory was read or not.
Commit: 8940ab510ca56e0d87ab1e6a1d6cd26df3405f10
https://github.com/llvm/llvm-project/commit/8940ab510ca56e0d87ab1e6a1d6cd26df3405f10
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg][nfc] Group tests for linalg.pack + linalg.unpack (#149783)
Groups vectorization tests for `linalg.pack` + `linalg.unpack` together.
Commit: 9ad7edef4276207ca4cefa6b39d11145f4145a72
https://github.com/llvm/llvm-project/commit/9ad7edef4276207ca4cefa6b39d11145f4145a72
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acosf16.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
A libc/src/__support/math/acosf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acosf16 implementation to header-only in src/__support/math folder. (#148412)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: abe93d9d7e891a2a6596ddb0c6324280137c89dc
https://github.com/llvm/llvm-project/commit/abe93d9d7e891a2a6596ddb0c6324280137c89dc
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Fix installed symlinks to be relative again (#149728)
Fix the symlink creation logic to use relative paths instead of
absolute, in order to ensure that the installed symlinks actually refer
to the installed .bc files rather than the ones from the build
directory. This was broken in #146833. The change is a bit roundabout
but it attempts to preserve the spirit of #146833, that is the ability
to use multiple output directories (provided they all resides in
`${LIBCLC_OUTPUT_LIBRARY_DIR}` and preserve the same structure in the
installed tree).
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 509af524e3c3a25f7c777059585e075f70bf8db3
https://github.com/llvm/llvm-project/commit/509af524e3c3a25f7c777059585e075f70bf8db3
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
R llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
Revert "[DirectX] Lower `llvm.lifetime.*` intrinsics to stores when DXIL version is lower than 1.6 (#147432)" (#149874)
This PR reverts commit d47c126fbf7915c01ea112ae372fe8835df4379f
(corresponding to PR #147432) to fix a build failure caused by #149310
Commit: 53f4abc6036a13f1b8afebc31d179d1a901084b8
https://github.com/llvm/llvm-project/commit/53f4abc6036a13f1b8afebc31d179d1a901084b8
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
R clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
M clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
Log Message:
-----------
[PowerPC][NFC] Combine the 2 dmf neg test files (#149875)
Combining since these are testing the same err message with only
difference being the target cpu.
Commit: b7e332d3f59f567b1999fbcc660d7837cba8e406
https://github.com/llvm/llvm-project/commit/b7e332d3f59f567b1999fbcc660d7837cba8e406
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/LLVMIR/BasicPtxBuilderInterface.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorType.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Interfaces/ViewLikeInterface.h
M mlir/include/mlir/Parser/Parser.h
M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDef.txt
Log Message:
-----------
[mlir][NFC] update `include` create APIs (3/n) (#149687)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: fe267860c1206b0622f5aee8fe8a04040fcecbf7
https://github.com/llvm/llvm-project/commit/fe267860c1206b0622f5aee8fe8a04040fcecbf7
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/erff.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/erff.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/erff.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor erff implementation to header-only in src/__support/math folder. (#148413)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: d93f91fc467beb3da99a43fc1874f1dbcaf250c4
https://github.com/llvm/llvm-project/commit/d93f91fc467beb3da99a43fc1874f1dbcaf250c4
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Prefer switch over intrinsic ID instead of if-chain [nfc]
Commit: 0e42c665f97ee6551e1019cd75ff649c14bda03a
https://github.com/llvm/llvm-project/commit/0e42c665f97ee6551e1019cd75ff649c14bda03a
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
Log Message:
-----------
[MemProf] Update the declaration DISubprogram linkageName for clones (#149864)
Follow up to PR145385 to also update the linkageName on any separate
DISubprogram for the clone function declaration.
Commit: c4f3bc91c0684e82491045dc3f317274be3b8131
https://github.com/llvm/llvm-project/commit/c4f3bc91c0684e82491045dc3f317274be3b8131
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
Revert "Revert "[DirectX] Lower `llvm.lifetime.*` intrinsics to stores when DXIL version is lower than 1.6 (#147432)"" (#149882)
Reverts llvm/llvm-project#149874
Reverted the wrong PR by mistake.
Commit: 8f9ed788740fd00836195b30061ad161b2055d8c
https://github.com/llvm/llvm-project/commit/8f9ed788740fd00836195b30061ad161b2055d8c
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
R llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll
M llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/tools/dxil-dis/lifetimes.ll
Log Message:
-----------
Revert "[DirectX] Legalize lifetime intrinsics for DXIL" (#149883)
Reverts llvm/llvm-project#148003 to fix a DirectX backend build breakage
due to #149310
Commit: b53be5f4b2d25aabcd676319a054f251cb0752b2
https://github.com/llvm/llvm-project/commit/b53be5f4b2d25aabcd676319a054f251cb0752b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/plugins-nextgen/common/src/Utils/ELF.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[LLVM] Update CUDA ELF flags for their new ABI (#149534)
Summary:
We rely on these flags to do things in the runtime and print the
contents of binaries correctly. CUDA updated their ABI encoding recently
and we didn't handle that. it's a new ABI entirely so we just select on
it when it shows up.
Fixes: https://github.com/llvm/llvm-project/issues/148703
Commit: 4184a1b5815810993eb87602aa6d47bcf7e72691
https://github.com/llvm/llvm-project/commit/4184a1b5815810993eb87602aa6d47bcf7e72691
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
Log Message:
-----------
[PowerPC][NFC] Fix clang format in PPCInstrFuture.td (#149884)
Commit: 033df384cde9e692fd1b9e5d3bf29100971f9444
https://github.com/llvm/llvm-project/commit/033df384cde9e692fd1b9e5d3bf29100971f9444
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
Log Message:
-----------
[IA] Naming and style cleanup [nfc]
1) Rename argument II to something slightly more descriptive since we have
more than one IntrinsicInst flowing through.
2) Perform a checked dyn_cast early to eliminate two casts later in each
routine.
Commit: 84781c0ed36410d9fb79cab6f58e09e660e4ea7e
https://github.com/llvm/llvm-project/commit/84781c0ed36410d9fb79cab6f58e09e660e4ea7e
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acoshf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acosh_float_constants.h
A libc/src/__support/math/acoshf.h
A libc/src/__support/math/acoshf_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/acoshf16.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/asinhf16.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/common_constants.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log1pf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acoshf implementation to header-only in src/__support/math folder. (#148418)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 423cea760732e7969ac5d0edff9d725d89503807
https://github.com/llvm/llvm-project/commit/423cea760732e7969ac5d0edff9d725d89503807
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Fix incorrect indentation. NFC
Commit: fcacd4e880c9a0b3f2bdaa43603aeddfa1b1cd2e
https://github.com/llvm/llvm-project/commit/fcacd4e880c9a0b3f2bdaa43603aeddfa1b1cd2e
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
R lld/test/COFF/exported-dllmain.test
A lld/test/COFF/imported-dllmain-i386.test
A lld/test/COFF/imported-dllmain.test
Log Message:
-----------
[LLD][COFF] Follow up comments on pr146610 (#147152)
This is a follow-up PR for post-commit comments in
https://github.com/llvm/llvm-project/pull/146610
- Changed "exporteddllmain" references to "importeddllmain".
- Add support for x86 target and test coverage.
- Changed a comment to better express why we're skipping importing
`DllMain`.
Commit: 96548db78f037a8f6c8a59c0110a53b4e6f0f4c6
https://github.com/llvm/llvm-project/commit/96548db78f037a8f6c8a59c0110a53b4e6f0f4c6
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/test/src/math/explogxf_test.cpp
Log Message:
-----------
[libc][math] fix explogxf test (#149891)
Commit: e1aed19fb9e36543fa7354934ee1b268bdc40705
https://github.com/llvm/llvm-project/commit/e1aed19fb9e36543fa7354934ee1b268bdc40705
Author: lntue <lntue at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add hypotf16 bazel targets. (#149761)
Commit: f38c94b80563b063439f2079de260d1424e0bffc
https://github.com/llvm/llvm-project/commit/f38c94b80563b063439f2079de260d1424e0bffc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
Log Message:
-----------
[RISCV] Fix typo in test: loat->load. NFC (#149869)
Commit: 860ff8714b2d6f810703c4490e26dd687fc15b8d
https://github.com/llvm/llvm-project/commit/860ff8714b2d6f810703c4490e26dd687fc15b8d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV] Use empty() instead of size()==0. NFC (#149868)
Move the assert past the code that determines if the pass should run.
Commit: 9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
https://github.com/llvm/llvm-project/commit/9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Infer canonical layouts for fat_raw_buffer_cast resetOffset (#149867)
When inferring the return type of amdgpu.fat_raw_buffer_cast with the
offset reset, we would sometimes use a strided layout, like
strided<[1]>, in cases where, after stripping the offset, the memref had
the identity layout. This would cause issues with EmulateNarrowTypes,
which does perform this layout canonicalization.
Now, the return type inference will put in an identity layout after
offset stripping for
1. Statically-shaped memrefs of any rank where the strides match the
suffix product of the shape, and
2. Memrefs of rank <= 1 whose strides are [1] (or []) that just had
their offset removed by resetOffset.
Commit: e47d5eb4541d5f377d9a57ef2157dbb3a41a85e6
https://github.com/llvm/llvm-project/commit/e47d5eb4541d5f377d9a57ef2157dbb3a41a85e6
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
A llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
Log Message:
-----------
[AMDGPU] Hazard handling for gfx1250 wmma instructions (#149865)
If both instructions are xdl WMMA, hazard exists when the first WMMA
writes a register (D0) and the second WMMA reads it (A1/B1/Index1).
If the first instruction is a xdl WMMA, and the second one is a VALU,
three kinds of hazards exist:
WMMA writes (D0), VALU reads (Use1);
WMMA writes (D0), VALU writes (D1);
WMMA reads (A0/B0.Index0), VALU writes (D1).
The actual number of hazard slots depends on the categories of the first
xdl WMMA as well as whether the second instruction is a xdl WMMA or
VALU. If there is not enough unrelated VALUs in between the two
instructions, appropriate number (to cover the missing) of V_NOPs will
be inserted to satisfy the hazard handling requirements.
Commit: 2d31fc85a847759a5ea1fb39718a3851d57913c3
https://github.com/llvm/llvm-project/commit/2d31fc85a847759a5ea1fb39718a3851d57913c3
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
A clang/test/Driver/modules-driver-cxx20-module-usage-scanner.cpp
Log Message:
-----------
Reland [clang][modules-driver] Add scanner to detect C++20 module presence (#147630)
This patch is part of a series to natively support C++20 module usage
from the Clang driver (without requiring an external build system). This
introduces a new scanner that detects C++20 module usage in source files
without using the preprocessor or lexer.
For now, it is enabled only with the `-fmodules-driver` flag and serves
solely diagnostic purposes. In the future, the scanner will be enabled
for any (modules-driver compatible) compilation with two or more inputs,
and will help the driver determine whether to implicitly enable the
modules driver.
Since the scanner adds very little overhead, we are also exploring
enabling it for compilations with only a single input. This approach
could allow us to detect `import std` usage in a single-file
compilation, which would then activate the modules driver. For
performance measurements on this, see
https://github.com/naveen-seth/llvm-dev-cxx-modules-check-benchmark.
RFC:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
This patch relands commit ded1426. The CI failure is resolved by
removing the compatibility warning for using the `-fmodules-driver` flag
with pre-C++20 standards, which also better aligns its behavior with
other features/flags supported only in newer standards.
Commit: 2a78c6d45d4965df35e8cb766f557e7ae52477a8
https://github.com/llvm/llvm-project/commit/2a78c6d45d4965df35e8cb766f557e7ae52477a8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/unittests/DAP/TestBase.cpp
Log Message:
-----------
[lldb] Fix warning: suggest explicit braces to avoid ambiguous ‘else’
According to the LLVM Style Guide we don't need braces because it's a
single-line, but it looks like the macro expands to code that includes a
potentially ambiguous "else". Use braces to silence the warning.
Commit: 45a6c02c2123f1d4764a8ad981193b15851df744
https://github.com/llvm/llvm-project/commit/45a6c02c2123f1d4764a8ad981193b15851df744
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
Log Message:
-----------
[flang] Control alignment of constant folded reals (#149381)
When REAL types are constant folded, the underneath implementation uses
arrays of integers. Ensure that these arrays are properly aligned.
This matters when building flang with clang. In some cases, the
resulting code for flang compiler ended up using SSE2 aligned load
instructions for REAL(16) constant folding on x86_64, and these
instructions require that the values are loaded from the aligned
addresses.
Commit: bf86abee3e86e7226887ab1a5541296beed46d82
https://github.com/llvm/llvm-project/commit/bf86abee3e86e7226887ab1a5541296beed46d82
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV][IA] Support masked.store of deinterleaveN intrinsic (#149893)
This is the masked.store side to the masked.load support added in
881b3fd.
With this change, we support masked.load and masked.store via the
intrinsic lowering path used primarily with scalable vectors. An
upcoming change will extend the fixed vector (i.a. shuffle vector) paths
in the same manner.
Commit: cb6f132b1c433c7f6b7727793a1588ae6401f284
https://github.com/llvm/llvm-project/commit/cb6f132b1c433c7f6b7727793a1588ae6401f284
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
R clang/test/Driver/modules-driver-cxx20-module-usage-scanner.cpp
Log Message:
-----------
Revert "Reland [clang][modules-driver] Add scanner to detect C++20 module presence" (#149900)
Reverts llvm/llvm-project#147630.
This causes a linker error caused by linking the driver against the
lexer.
Commit: 54ae81f6ffb4f7685e5dcb56d21eeabda24d21b7
https://github.com/llvm/llvm-project/commit/54ae81f6ffb4f7685e5dcb56d21eeabda24d21b7
Author: lntue <lntue at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][bazel] Remove -fext-numeric-literals as it is only needed for gcc and not available in clang. (#149902)
Commit: dcffa3d05ca1873c098712d6ad9cb5d095ac7c85
https://github.com/llvm/llvm-project/commit/dcffa3d05ca1873c098712d6ad9cb5d095ac7c85
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
Fix indendation in StandardCPlusPlusModules.rst (#149901)
The CI is complaining about unexpected indentation. It seems multiple-line list entries must start at the beginning of each line.
Commit: 520398e752b1f69f9c2575b23db34ab65de2cd02
https://github.com/llvm/llvm-project/commit/520398e752b1f69f9c2575b23db34ab65de2cd02
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acoshf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acoshf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acoshf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acoshf16 implementation to header-only in src/__support/math folder. (#148568)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: b66084acd9f6052ed9061ef4ec39e7c8a176f01d
https://github.com/llvm/llvm-project/commit/b66084acd9f6052ed9061ef4ec39e7c8a176f01d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
Log Message:
-----------
[AMDGPU] Verify asm VGPR alignment on gfx1250 (#149880)
Co-authored-by: Shilei Tian <Shilei.Tian at amd.com>
Commit: 5062fe5692a503b600bccb753323ba961811ade6
https://github.com/llvm/llvm-project/commit/5062fe5692a503b600bccb753323ba961811ade6
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
Commit: de011e372dff540056b4abdf02de94061f5ddb86
https://github.com/llvm/llvm-project/commit/de011e372dff540056b4abdf02de94061f5ddb86
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
Log Message:
-----------
[OpenMP] [NFC] Remove KMP_NESTED_HOT_TEAMS macro (#143584)
The feature was introduced back in 2014 and has been on ever since.
Leave the feature in place. Removing only the macro.
Commit: 4981bc24cff3344d477af04591b699da466e10b8
https://github.com/llvm/llvm-project/commit/4981bc24cff3344d477af04591b699da466e10b8
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M openmp/runtime/src/include/omp_lib.F90.var
M openmp/runtime/src/include/omp_lib.h.var
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_barrier.h
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_i18n.cpp
M openmp/runtime/src/kmp_lock.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_str.cpp
A openmp/runtime/test/env/check_certain_values.c
A openmp/runtime/test/tasking/no_task_barrier.c
Log Message:
-----------
[OpenMP] Fixup bugs found during fuzz testing (#143455)
A lot of these only trip when using sanitizers with the library.
* Insert forgotten free()s
* Change (-1) << amount to 0xffffffffu as left shifting a negative is UB
* Fixup integer parser to return INT_MAX when parsing huge string of
digits. e.g., 452523423423423423 returns INT_MAX
* Fixup range parsing for affinity mask so integer overflow does not
occur
* Don't assert when branch bits are 0, instead warn user that is invalid
and use the default value.
* Fixup kmp_set_defaults() so the C version only uses null terminated
strings and the Fortran version uses the string + size version.
* Make sure the KMP_ALIGN_ALLOC is power of two, otherwise use
CACHE_LINE.
* Disallow ability to set KMP_TASKING=1 (task barrier) this doesn't work
and hasn't worked for a long time.
* Limit KMP_HOT_TEAMS_MAX_LEVEL to 1024, an array is allocated based on
this value.
* Remove integer values for OMP_PROC_BIND. The specification only allows
strings and CSV of strings.
* Fix setting KMP_AFFINITY=disabled + OMP_DISPLAY_AFFINITY=TRUE
Commit: f0bbe73cf101b82a9b02b8466f562e3173d25523
https://github.com/llvm/llvm-project/commit/f0bbe73cf101b82a9b02b8466f562e3173d25523
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy] Proofread Contributing.rst (#149831)
Commit: 2860431e1f1bb4ecc4ebaf1006f766b37d975580
https://github.com/llvm/llvm-project/commit/2860431e1f1bb4ecc4ebaf1006f766b37d975580
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Analysis/LifetimeSafety.cpp
Log Message:
-----------
[LifetimeSafety] Add per-program-point lattice tracking (#149199)
Add per-program-point state tracking to the dataflow analysis framework.
- Added a `ProgramPoint` type representing a pair of a CFGBlock and a Fact within that block
- Added a `PerPointStates` map to store lattice states at each program point
- Modified the `transferBlock` method to store intermediate states after each fact is processed
- Added a `getLoans` method to the `LoanPropagationAnalysis` class that uses program points
This change enables more precise analysis by tracking program state at each individual program point rather than just at block boundaries. This is necessary for answering queries about the state of loans, origins, and other properties at specific points in the program, which is required for error reporting in the lifetime safety analysis.
Commit: a0b854d576c8d302394bcf12c76b22c9300e5411
https://github.com/llvm/llvm-project/commit/a0b854d576c8d302394bcf12c76b22c9300e5411
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
A llvm/test/MC/AMDGPU/gfx1250_asm_smem_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] MC support for gfx1250 scale_offset modifier (#149881)
Commit: 006858cd4d944ff44b3ef4619194a72ff8823edc
https://github.com/llvm/llvm-project/commit/006858cd4d944ff44b3ef4619194a72ff8823edc
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
Log Message:
-----------
[AMDGPU] Prevent folding of FI with scale_offset on gfx1250 (#149894)
SS forms of SCRATCH_LOAD_DWORD do not support SCALE_OFFSET,
so if this bit is used SCRATCH_LOAD_DWORD_SADDR cannot be formed.
This generally shall not happen because FI is not supposed to
be scaled, but add this as a precaution.
Commit: c59e4b58058f1861146f736ec2a3991283b05377
https://github.com/llvm/llvm-project/commit/c59e4b58058f1861146f736ec2a3991283b05377
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/include/math.yaml
Log Message:
-----------
[libc][math] fix header generation (#149918)
Commit: 5e8e03d859f4367b68ad08311ae0b3f8bf8eea4f
https://github.com/llvm/llvm-project/commit/5e8e03d859f4367b68ad08311ae0b3f8bf8eea4f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Simplify RVPUnary tablegen class. NFC
imm field was unused. rs1 is already handled in RVInstIBase.
Commit: 8f26a301bc7caf3d11d1f03818dae77a24e266e9
https://github.com/llvm/llvm-project/commit/8f26a301bc7caf3d11d1f03818dae77a24e266e9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/destructors.cpp
Log Message:
-----------
[CIR] Add complete destructor handling (#149552)
The initial implementation for emitting destructors emitted the complete
destructor body for both D1 and D2 destructors. This change updates the
code to have the D1 destructor call the D2 destructor.
Commit: 97a66a897caeb1445160d1862fd5b35bb5416ffb
https://github.com/llvm/llvm-project/commit/97a66a897caeb1445160d1862fd5b35bb5416ffb
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
Log Message:
-----------
[AMDGPU] Prohibit load/store merge if scale_offset is set on gfx1250 (#149895)
Scaling is done on the operation size, by merging instructions we
would need to generate code to scale the offset and reset the
auto-scale bit. This is unclear if that would be beneficial, just
disable such merge for now.
Commit: 354944d675c04c87bc0e9ebcca900148f5a344b8
https://github.com/llvm/llvm-project/commit/354944d675c04c87bc0e9ebcca900148f5a344b8
Author: Scott Linder <scott.linder at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/MC/MCDwarf.cpp
A llvm/test/Assembler/difile-empty-source.ll
M llvm/test/DebugInfo/Generic/mixed-source.ll
Log Message:
-----------
[DebugInfo] Fully implement DWARF issue 180201.1 (#149226)
Finish making LLVM's implementation of `DW_LNCT_LLVM_source` conform to
the final accepted version of `DW_LNCT_source` from
https://dwarfstd.org/issues/180201.1.html
This is effectively a continuation of a few commits which have moved in
this direction already, including:
* c9cb4fc761cd7 [DebugInfo] Store optional DIFile::Source as pointer
* 87e22bdd2bd6d Allow for mixing source/no-source DIFiles in one CU
This patch:
* Teaches LLParser that there is a distinction between an empty and an
absent "source:" field on DIFile.
* Makes printing the "source:" field in AsmWriter conditional on it
being present, instead of being conditional on it being non-empty.
* Teaches MC to map an empty-but-present source field to "\n" (which is
ambiguous, making the source strings "" and "\n" indistinguishable, but
that's what the DWARF issue specifies).
Add a test for round-tripping an empty source field through
assembler/bitcode.
Extend the test for the actual DWARF generation so it covers all of the
cases (absent, present-but-empty,
present-and-ambiguously-single-newline, present).
Commit: a7d93653a6712d8a374a2776853057b03181c12a
https://github.com/llvm/llvm-project/commit/a7d93653a6712d8a374a2776853057b03181c12a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/cuda-phases.cu
M clang/test/Driver/hip-inputs.hip
M clang/test/Driver/hip-invalid-target-id.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/invalid-offload-options.cpp
M clang/test/Driver/nvptx-cuda-system-arch.c
A clang/test/Driver/offload-target.c
M clang/test/Driver/openmp-offload.c
M clang/test/Driver/openmp-system-arch.c
Log Message:
-----------
[Clang] Rework creating offloading toolchains (#125556)
Summary:
This patch reworks how we create offloading toolchains. Previously we
would handle this separately for all the different kinds. This patch
instead changes this to use the target triple and the offloading kind to
determine the proper toolchain. In the old case where the user only
passes `--offload-arch` we instead infer the triple from the passed
arguments. This is a pretty major overhaul but currently passes all the
clang tests with only minor changes to error messages.
Commit: 46f6df0848ea04449c6179ecdedc404ee5b5cf11
https://github.com/llvm/llvm-project/commit/46f6df0848ea04449c6179ecdedc404ee5b5cf11
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AbstractResult.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CharacterConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Transforms` create APIs (11/n) (#149915)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 6fa759b465a681c9c2bea046a65e2f8c5a9f4104
https://github.com/llvm/llvm-project/commit/6fa759b465a681c9c2bea046a65e2f8c5a9f4104
Author: Stanley Winata <68087699+raikonenfnu at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/test/python/dialects/amdgpu.py
Log Message:
-----------
[MLIR][AMDGPU] Use Attr for resetOffset + boundsCheck in RawBufferCastOp (#149939)
In order to access and modify resetOffset and boundsCheck of
RawBufferCastOp in pythonic binding, we will have to use Attrs instead
of Property. This is because we do not have python binding support for
property yet. We should move back to property once we add pythonic
binding support for it.
---------
Signed-off-by: Stanley Winata <stanley.winata at amd.com>
Commit: a3a007ad5fa20abc90ead4e1030b481bf109b4cf
https://github.com/llvm/llvm-project/commit/a3a007ad5fa20abc90ead4e1030b481bf109b4cf
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertProcedureDesignator.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Lower/VectorSubscripts.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Lower` create APIs (8/n) (#149912)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 5547c6cd03ddddd405a09e51624e1f19955a85b1
https://github.com/llvm/llvm-project/commit/5547c6cd03ddddd405a09e51624e1f19955a85b1
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/Builder/Runtime/Assign.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/EnvironmentDefaults.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Pointer.cpp
M flang/lib/Optimizer/Builder/Runtime/Ragged.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/lib/Optimizer/Builder/Runtime/Support.cpp
M flang/lib/Optimizer/Builder/Runtime/TemporaryStack.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Builder/Runtime` create APIs (10/n) (#149916)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 9844ba6d9740206129b52633c555f767eaa45581
https://github.com/llvm/llvm-project/commit/9844ba6d9740206129b52633c555f767eaa45581
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/Complex.cpp
M flang/lib/Optimizer/Builder/DoLoopHelper.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Builder` create APIs (9/n) (#149917)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: dce6679cf5cbbdaffb9c2b51dc762c5c6689ea78
https://github.com/llvm/llvm-project/commit/dce6679cf5cbbdaffb9c2b51dc762c5c6689ea78
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/ControlFlow/Transforms/BufferDeallocationOpInterfaceImpl.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/EmitC/Transforms/Transforms.cpp
M mlir/lib/Dialect/EmitC/Transforms/TypeConversions.cpp
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/lib/Dialect/Func/Extensions/InlinerExtension.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/Func/Transforms/FuncConversions.cpp
M mlir/lib/Dialect/Func/Utils/Utils.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
M mlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/GPU/Transforms/GlobalIdRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/GPU/Transforms/ModuleToBinary.cpp
M mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
M mlir/lib/Dialect/GPU/Transforms/ShuffleRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupIdRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
M mlir/lib/Dialect/GPU/Utils/DistributionUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (16/n) (#149922)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c3823af156b517d926a56e3d0d585e2a15720e96
https://github.com/llvm/llvm-project/commit/c3823af156b517d926a56e3d0d585e2a15720e96
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/Linking/ModuleCombiner/ModuleCombiner.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/RewriteInsertsPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVWebGPUTransforms.cpp
M mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (22/n) (#149929)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 08ac7815960bb9fc56701f307729144a3d0c94f2
https://github.com/llvm/llvm-project/commit/08ac7815960bb9fc56701f307729144a3d0c94f2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang][NFC] Fix linting warnings after #125556
Commit: 7b787965431e666858fdf66db25ee5a129833927
https://github.com/llvm/llvm-project/commit/7b787965431e666858fdf66db25ee5a129833927
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaTypeConverters.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/UB/IR/UBOps.cpp
M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (25/n) (#149932)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 0c14f0e891ad88b9bb4666ef337466961b27314f
https://github.com/llvm/llvm-project/commit/0c14f0e891ad88b9bb4666ef337466961b27314f
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/test/CodeGen/DirectX/UAddc.ll
A llvm/test/Transforms/Scalarizer/extractvalue-struct-of-vectors.ll
Log Message:
-----------
[Scalarizer] Use correct key for ExtractValueInst gather (#149855)
Fixes #149345
Effectively no-op pairs of insertelement-extractelement instructions
were being created due to the ExtractValueInst visitor in the Scalarizer
storing its scalarized result into the Scattered map using an incorrect
key (specifically the type used in the key).
This PR fixes this issue.
Commit: 24bf4aea0ca31c4733d8771751f7fb766c455aa9
https://github.com/llvm/llvm-project/commit/24bf4aea0ca31c4733d8771751f7fb766c455aa9
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/interrupt-attr-nocall.ll
Log Message:
-----------
[RISCV][llvm] Handle vector callee saved register correctly (#149467)
In TargetFrameLowering::determineCalleeSaves, any vector register is
marked
as saved if any of its subregister is clobbered, this is not correct in
vector registers. We only want the vector register to be marked as saved
only if all of its subregisters are clobbered.
This patch handles vector callee saved registers in target hook.
Commit: 6df012ab48ececd27359bdc9448ee101b39eea7a
https://github.com/llvm/llvm-project/commit/6df012ab48ececd27359bdc9448ee101b39eea7a
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
A llvm/test/CodeGen/Hexagon/swp-load-to-store-forward.mir
Log Message:
-----------
[MachinePipeliner] Fix incorrect dependency direction (#149436)
This patch fixes a bug introduced in #145878. A dependency was added in
the wrong direction, causing an assertion failure due to broken
topological order.
Commit: 6f240d5a7d22e4c9b4adc6a1508ff83efd461050
https://github.com/llvm/llvm-project/commit/6f240d5a7d22e4c9b4adc6a1508ff83efd461050
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
Log Message:
-----------
[LV][EVL] Remove interleave count from the test case for EVL tail-folding. nfc (#149834)
Remove the interleave count since we have not supported it when EVL
tail-folding.
Commit: 675236913974293e838c38b7ef801285c6c2f1fd
https://github.com/llvm/llvm-project/commit/675236913974293e838c38b7ef801285c6c2f1fd
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Unify interleaved load handling for fixed and scalable VFs. nfc (#146914)
This patch modifies VPInterleaveRecipe::execute to handle both fixed and
scalable VFs using a single loop.
Commit: fcdcc4ea7ac960c79246b3bd428f14ea350e63e2
https://github.com/llvm/llvm-project/commit/fcdcc4ea7ac960c79246b3bd428f14ea350e63e2
Author: Fabio D'Urso <fdurso at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
Log Message:
-----------
[scudo] Make Ptr volatile so that the malloc and free calls are not optimized out (#149944)
This fixes the test failure seen in the discussion about
https://github.com/llvm/llvm-project/pull/148066.
Commit: 4d48996ff05305d4a5774f3e232c2ee4a06c3d2a
https://github.com/llvm/llvm-project/commit/4d48996ff05305d4a5774f3e232c2ee4a06c3d2a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.h
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/unittests/Format/BracesInserterTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestSelective.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format][NFC] Clean up around StringRef initializations (#149765)
Consistently use `constexpr StringRef Code("string literal");`.
Commit: 9ed8816dc63776259d2190bdc8a7a29698c62749
https://github.com/llvm/llvm-project/commit/9ed8816dc63776259d2190bdc8a7a29698c62749
Author: mintsuki <36459316+mintsuki at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/test/CodeGen/LoongArch/target-abi-from-triple-edge-cases.ll
Log Message:
-----------
LoongArch: Improve detection of valid TripleABI (#147952)
If the environment is considered to be the triple component as a whole,
so, including the object format, if any, and if that is the intended
behaviour, then the loongarch64 function `computeTargetABI()` should be
changed to not rely on `hasEnvironment()`, but, rather, to check if
there is a non-unknown environment set.
Without this change, using a (ideally valid) target of
loongarch64-unknown-none-elf, with a manually specified ABI of lp64s,
will result in a completely superfluous warning:
```
warning: triple-implied ABI conflicts with provided target-abi 'lp64s', using target-abi
```
Commit: 739e76454f7bcee0cffb2f86221080f92b64a5f1
https://github.com/llvm/llvm-project/commit/739e76454f7bcee0cffb2f86221080f92b64a5f1
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
Log Message:
-----------
[Tooling][Inclusions][NFC] Reformat C++ code
Commit: 8b9e7602714a2651e5540a4322907738997f1775
https://github.com/llvm/llvm-project/commit/8b9e7602714a2651e5540a4322907738997f1775
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Don't use RVInstIBase for P-ext plui/pli. NFC (#149940)
These instructions don't have an rs1 field unlike other instructions
that use RVInstIBase.
Rename the classes to not use Unary since we have historically used that
for a single register operand.
Commit: cae7650558080b858788af1b8cd940d47673893b
https://github.com/llvm/llvm-project/commit/cae7650558080b858788af1b8cd940d47673893b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/llvm.exp10.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
Log Message:
-----------
[LoongArch] Optimize inserting fp element to vector (#149302)
Co-authored-by: tangaac <tangyan01 at loongson.cn>
Commit: b956f049b186fafafebc88b861982644ec3f5291
https://github.com/llvm/llvm-project/commit/b956f049b186fafafebc88b861982644ec3f5291
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
A mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
Log Message:
-----------
[mlir][linalg] Vectorize directly to a named contraction (#147296)
Extends linalg vectorizer with a path to lower contraction ops directly
into `vector.contract`.
The direct rewriting preserves high-level op semantics and provides more
progressive lowering compared to reconstructing contraction back from
multi dimensional reduction.
The added lowering focuses on named linalg ops and leverages their well
defined semantics to avoid complex precondition verification.
The new path is optional and disabled by default to avoid changing the
default vectorizer behavior.
Commit: 03a170837e78e56e1876c681a4bf95957adc73fd
https://github.com/llvm/llvm-project/commit/03a170837e78e56e1876c681a4bf95957adc73fd
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
Log Message:
-----------
[libc++] Enable some tests on `android` (#149899)
Android compiler was updated to r563880:
https://github.com/llvm/llvm-project/pull/148998
Commit: 3408f7b42f7af7c38d8054067c7dcad82df99b2f
https://github.com/llvm/llvm-project/commit/3408f7b42f7af7c38d8054067c7dcad82df99b2f
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT] Guard llvm-bolt-wrapper logic of NFC-Mode behind a flag (#146209)
Buildbot (`BOLTBuilder`) no longer relies on a wrapper script to run
tests. This
patch guards the wrapper logic under a flag that is disabled by default.
This
it allows to:
- Eliminate the need for special handling in some tests.
- Fix the issue of a wrapper loop (described below)
- Simplify the NFC-Mode setup.
**Background:**
Previously, tests ran unconditionally, which also compiled any missing
utilities
and the unit tests.
The `nfc-check-setup.py` created:
- `llvm-bolt.new`, renamed from the current compilation
- `llvm-bolt.old`, built from the previous SHA
- `llvm-bolt`: a python wrapper pointing to `llvm-bolt.new`
Current behaviour and wrapper issue:
As before, the old/new binaries identify whether a patch affects BOLT.
If so,
`ninja check-bolt` builds missing dependencies and run tests,
overwriting the
`llvm-bolt` wrapper with a binary.
However, if Ninja reports:
```
ninja: no work to do.
```
the wrapper remains in place. If the next commit also does no work,
`nfc-check-setup.py` renames the existing wrapper to `llvm-bolt.new`,
causing an
infinite loop.
Allowing to disable the wrapper logic prevents this scenario and
simplifies the flow.
**Test plan:**
Creates llvm-bolt.new and llvm-bolt.old and stays on previous revision:
```
./nfc-check-setup.py build
```
Creates llvm-bolt.new and llvm-bolt.old and returns on current revision:
```
./nfc-check-setup.py build --switch-back
```
Creates llvm-bolt.new and llvm-bolt.old, returns on current revision,
and
creates a wrapper:
```
./nfc-check-setup.py build --switch-back --create-wrapper
```
Creates llvm-bolt.new and llvm-bolt.old, and passes an invalid argument
to the
wrapper:
```
./nfc-check-setup.py build --switch-back --create-wrapper --random-arg
```
Commit: 8e4e1c104d88e193d5977e0136509f8c76dde43e
https://github.com/llvm/llvm-project/commit/8e4e1c104d88e193d5977e0136509f8c76dde43e
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Log Message:
-----------
MIPS: Stable sort relocations
There might be more than one relocations at an offset with composed
relocations or .reloc directive. llvm::sort output is unstable, and if
EXPENSIVE_CHECKS, also undeterministic, causing
MC/Mips/reloc-directive.s to fail.
Commit: 597f3c1bd5f9f940d6a62adfe053f28559ea0a72
https://github.com/llvm/llvm-project/commit/597f3c1bd5f9f940d6a62adfe053f28559ea0a72
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT] Improve exception handling in NFC-Mode (#146513)
This patch introduces the following improvements:
- Catch an exception when the CMakeCache.txt is not present
- Bail out gracefully when llvm-bolt did not build successfully the
current or previous revision.
- Always do a `--switch-back` even if building the old revision failed
Commit: d8adb57b440b8b502e3f308675699b7c26b8da86
https://github.com/llvm/llvm-project/commit/d8adb57b440b8b502e3f308675699b7c26b8da86
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT][NFC] Update nfc-check-setup.py guidance (#146659)
Commit: 069f0fea00d3caf41fb9c3eaf81ee918c5c63a51
https://github.com/llvm/llvm-project/commit/069f0fea00d3caf41fb9c3eaf81ee918c5c63a51
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avg.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode - SSE PINSR/PEXTR vector element insert/extract are never out of bounds (#149822)
The immediate index is guaranteed to be treated as modulo
Commit: d87bf79a236f25bccebca9ceaff7fb51399df052
https://github.com/llvm/llvm-project/commit/d87bf79a236f25bccebca9ceaff7fb51399df052
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr149841.ll
Log Message:
-----------
[X86] isGuaranteedNotToBeUndefOrPoisonForTargetNode - X86ISD::GlobalBaseReg and X86ISD::Wrapper/WrapperRIP nodes are never poison (#149854)
Fixes #149841
Commit: d2a7f4e528c9a8a2ac480c13259bd6050f59d4a7
https://github.com/llvm/llvm-project/commit/d2a7f4e528c9a8a2ac480c13259bd6050f59d4a7
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
R llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-riscv-vector-reverse.ll
Log Message:
-----------
[NFC][LV] Refine the lit test case riscv-vector-reverse.ll (#149020)
This patch includes the following changes:
1. Merge riscv-vector-reverse-output.ll into riscv-vector-reverse.ll,
and only check the generated LLVM IR.
2. Add vplan-riscv-vector-reverse.ll to preserve the original debug
output checks from riscv-vector-reverse.ll.
Commit: 95201b2b6445e49cf9b470fe93d62e9b3f6efed5
https://github.com/llvm/llvm-project/commit/95201b2b6445e49cf9b470fe93d62e9b3f6efed5
Author: David Green <david.green at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
A llvm/test/CodeGen/AArch64/bsp_implicit_ops.mir
Log Message:
-----------
[AArch64] Ensure we transferImpOps on BSP pseudo expansions. (#149456)
This ensures that we transfer implicit operands to the new expanded
pseudos if necessary, similarly to other pseudo expansions.
Commit: eafe31b293a5166522fff4f3e2d88c2b5c881381
https://github.com/llvm/llvm-project/commit/eafe31b293a5166522fff4f3e2d88c2b5c881381
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-vmerge-to-vmv.ll
Log Message:
-----------
[RISCV] Don't lose elements from False in vmerge -> vmv peephole (#149720)
In the vmerge peephole, we currently allow different AVLs for the vmerge
and its true operand.
If vmerge's VL > true's VL, vmerge can "preserve" elements from false
that would otherwise be clobbered with a tail agnostic policy on true.
mask 1 1 1 1 0 0 0 0
true x x x x|. . . . AVL=4
vmerge x x x x f f|. . AVL=6
If we convert this to vmv.v.v we will lose those false elements:
mask 1 1 1 1 0 0 0 0
true x x x x|. . . . AVL=4
vmv.v.v x x x x . .|. . AVL=6
Fix this by checking that vmerge's AVL is <= true's AVL.
Should fix #149335
Commit: e644f5fd9e9b0dfdbf02357260908160d23c5b28
https://github.com/llvm/llvm-project/commit/e644f5fd9e9b0dfdbf02357260908160d23c5b28
Author: Timothy Herchen <timothy.herchen at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/prefetchi-error.c
Log Message:
-----------
[clang] [Sema] Check argument range for prefetchi* intrinsics (#149745)
Fixes https://github.com/llvm/llvm-project/issues/144857 . I can create
a test if desired, but I think the fix is trivial enough.
<img width="805" height="105" alt="image"
src="https://github.com/user-attachments/assets/aaee8e5f-6e65-4f04-b8b9-e4ae1434d958"
/>
Commit: f20130a8d494b94d0842cd165e9b7a83ef3aee4a
https://github.com/llvm/llvm-project/commit/f20130a8d494b94d0842cd165e9b7a83ef3aee4a
Author: gulfemsavrun <gulfem at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
Log Message:
-----------
[Fuchsia] Don't use LLVM build for PGO data (#149788)
Commit: 314ce691df0d699234c871a1772470b5e4aed892
https://github.com/llvm/llvm-project/commit/314ce691df0d699234c871a1772470b5e4aed892
Author: Pete Chou <petechou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
Log Message:
-----------
[GlobalISel] Allow Legalizer to lower volatile memcpy family. (#145997)
This change updates legalizer to allow lowering volatile memcpy family
as a target might rely on lowering to legalize them.
Commit: 307256ecbd858bc2df5fa9342c67a8205691ade9
https://github.com/llvm/llvm-project/commit/307256ecbd858bc2df5fa9342c67a8205691ade9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/GVNSink/lifetime.ll
Log Message:
-----------
[GVNSink] Do not sink lifetimes of different allocas (#149818)
This was always undesirable, and after #149310 it is illegal and will
result in a verifier error.
Fix this by moving SimplifyCFG's check for this into
canReplaceOperandWithVariable(), so it's shared with GVNSink.
Commit: a7a1df8f72ac6e3a68ec53584107be6542d6666b
https://github.com/llvm/llvm-project/commit/a7a1df8f72ac6e3a68ec53584107be6542d6666b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Log Message:
-----------
[CodeGen] Remove handling for lifetime.start/end on non-alloca (#149838)
After https://github.com/llvm/llvm-project/pull/149310 we are guaranteed
that the argument is an alloca, so we don't need to look at underlying
objects (which was not a correct thing to do anyway).
This also drops the offset argument for lifetime nodes in SDAG. The
offset is fixed to zero now. (Peculiarly, while SDAG pretended to have
an offset, it just gets silently dropped during selection.)
Commit: 34f59d79209268eca9c63ccc7646128f2dc52fe3
https://github.com/llvm/llvm-project/commit/34f59d79209268eca9c63ccc7646128f2dc52fe3
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/ARM.cpp
M clang/test/Preprocessor/arm-acle-6.4.c
Log Message:
-----------
[Clang][ARM] Fix __ARM_FEATURE_LDREX on Armv8-M (#149538)
The Armv8-M architecture doesn't have the LDREXD and STREXD
instructions, for exclusive load/store of a 64-bit quantity split across
two registers. But the `__ARM_FEATURE_LDREX` macro was set to a value
that claims it does, because the case for Armv8 was missing a check for
M profile.
The Armv7 case got it right, so I've just made the two cases the same.
Commit: 8c14d3f44f51be053e91612f4ad2d77bf04b6b3a
https://github.com/llvm/llvm-project/commit/8c14d3f44f51be053e91612f4ad2d77bf04b6b3a
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[MISched] Use SchedRegion in overrideSchedPolicy and overridePostRASchedPolicy (#149297)
This patch updates `overrideSchedPolicy` and `overridePostRASchedPolicy`
to take a
`SchedRegion` parameter instead of just `NumRegionInstrs`. This provides
access to both the
instruction range and the parent `MachineBasicBlock`, which enables
looking up function-level
attributes.
With this change, targets can select post-RA scheduling direction per
function using a function
attribute. For example:
```cpp
void overridePostRASchedPolicy(MachineSchedPolicy &Policy,
const SchedRegion &Region) const {
const Function &F = Region.RegionBegin->getMF()->getFunction();
Attribute Attr = F.getFnAttribute("amdgpu-post-ra-direction");
...
}
Commit: 07527596f3dc5f7180cfee79f217cf784b43f059
https://github.com/llvm/llvm-project/commit/07527596f3dc5f7180cfee79f217cf784b43f059
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Support store merge with non-consecutive parts (#149807)
This is a minor extension of #147540, resolving one of the FIXMEs. If
the collected parts contain some non-consecutive elements, we can still
handle smaller ranges that *are* consecutive.
This is not common in practice and mostly shows up when the same value
is stored at two different offsets.
Commit: ddf34b4c97f9b047827379329118d485072f1cdf
https://github.com/llvm/llvm-project/commit/ddf34b4c97f9b047827379329118d485072f1cdf
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/llvm.exp10.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
Log Message:
-----------
[LoongArch] Optimize general fp build_vector lowering (#149486)
Commit: cb8b0cd2cfbe817253f2679df53dd7926a7e1894
https://github.com/llvm/llvm-project/commit/cb8b0cd2cfbe817253f2679df53dd7926a7e1894
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
Log Message:
-----------
[LV] Precommit test changes for #148686. NFC
Namely explicitly adding -force-tail-folding-style=data to existing RUN
lines so that we don't lose them when we switch to data-with-evl by
default.
Commit: 03b90486daf9473de266161f3910e13a92ed15b8
https://github.com/llvm/llvm-project/commit/03b90486daf9473de266161f3910e13a92ed15b8
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A llvm/test/CodeGen/WebAssembly/memory-interleave.ll
Log Message:
-----------
[WebAssembly] Memory interleave test (#149045)
Precommit codegen test for vectorization cost modelling.
Commit: 81651e9fd0a744423fc0435f199ef79fb3a91f02
https://github.com/llvm/llvm-project/commit/81651e9fd0a744423fc0435f199ef79fb3a91f02
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
Remove extraneous addition of `-X` flag in baremetal toolchain (#148855)
Commit 597ee88 moved the -X flag to a new position in the baremetal
toolchain's linker job, but unintentionally left the original instance in place.
This patch removes the redundant flag, ensuring -X is passed only once.
Commit: 73b85f87e4771d04e02912a8c2f39ab67910a04d
https://github.com/llvm/llvm-project/commit/73b85f87e4771d04e02912a8c2f39ab67910a04d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
R mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp
A mlir/test/Dialect/Vector/CPU/ArmSVE/vector-bfmmla.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Lower `vector.contract` to SVE FEAT_BF16 operations (#147052)
This patch adds lowering of Bfloat16 widening matrix multiply and
accumulate `vector.contract`, by parametrising and refactoring the
pattern for 8-bit integers.
Commit: 3e7433d75a0c03a84e6b1c8e5e5eda347d72a8ff
https://github.com/llvm/llvm-project/commit/3e7433d75a0c03a84e6b1c8e5e5eda347d72a8ff
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
Log Message:
-----------
[mlir][linalg] Fix to Elementwise Fusion when preserving results (#149843)
In the linalg ElementwiseOpFusion transform, a pre-requisite for the
fusion between a producer and consumer op is that the producer's output
indexing map associated to the result to be fused must be invertible
(e.g. a simple permutation).
Before this patch, only the first output indexing map was being checked;
this bug produced issues when the operand to fuse was not the 1st result
of the producer op. For example, this situation arises when the producer
op has multiple results because it's the result of previous fusions
where the original result had been preserved: in these cases, the pass
ought to check the indexing map of the result being fused, which is not
necessarily the 1st one.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: 4b0625f05114af908283b4bc78321babfc03e252
https://github.com/llvm/llvm-project/commit/4b0625f05114af908283b4bc78321babfc03e252
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] isNonZeroModBitWidthOrUndef - fix bugprone-argument-comment analyzer warning. NFC.
matchUnaryPredicate argument is AllowUndefs not AllowUndef
Commit: b487f9a7bd15e453a3ff7fcbfbc54e54eecf26d3
https://github.com/llvm/llvm-project/commit/b487f9a7bd15e453a3ff7fcbfbc54e54eecf26d3
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct02.f90
A flang/test/Lower/OpenMP/unroll-heuristic01.f90
A flang/test/Lower/OpenMP/unroll-heuristic02.f90
A flang/test/Parser/OpenMP/unroll-heuristic.f90
A flang/test/Parser/OpenMP/unroll-partial.f90
R flang/test/Parser/OpenMP/unroll.f90
Log Message:
-----------
[Flang] Implement !$omp unroll using omp.unroll_heuristic (#144785)
Add support for `!$omp unroll` in Flang and basic MLIR
`omp.canonical_loop` modeling.
First step to add `omp.canonical_loop` modeling to the MLIR OpenMP
dialect with the goal of being more general than the current
`omp.loop_nest` approach:
* Support for non-perfectly nested loops
* Support for non-rectangular loops
* Support for arbitrary compositions of loop transformations
This patch is functional end-to-end and adds support for `!$omp unroll`
to Flang. `!$omp unroll` is lowered to `omp.new_cli`,
`omp.canonical_loop`, and `omp.unroll_heuristic` in MLIR, which are
lowered to LLVM-IR using the OpenMPIRBuilder
(https://reviews.llvm.org/D107764).
Commit: 579a80784d43f4c21ac4ee2df221ba4f3b98fd70
https://github.com/llvm/llvm-project/commit/579a80784d43f4c21ac4ee2df221ba4f3b98fd70
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
[Clang][Driver][ARM] Forward `-Os` and `-Oz` as multilib flags (#149819)
Pass along `-Os` and `-Oz` as multilib flags under ARM and AArch64 so
that they can be used as criteria for multilib selection.
Commit: 9fc7c6cbd2e2f5c67b2572aa6ca636f8dfad1cb3
https://github.com/llvm/llvm-project/commit/9fc7c6cbd2e2f5c67b2572aa6ca636f8dfad1cb3
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
Log Message:
-----------
[AArch64] Allow splitting bitmasks for ANDS. (#149095)
This is already done for AND; we can reuse the existing infrastructure
for ANDS so long as the second instruction of the pair is ANDS.
Commit: c14c0a195c11cad1106c0d7457ef2bc83095f5da
https://github.com/llvm/llvm-project/commit/c14c0a195c11cad1106c0d7457ef2bc83095f5da
Author: Remy Farley <one-d-wide at protonmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/docs/TestingGuide.rst
Log Message:
-----------
[lit][docs] Mention LIT_OPTS instead of LIT_ARGS (#147494)
Noticed that the current
[docs](https://llvm.org/docs/TestingGuide.html#unit-and-regression-tests)
recommend using LIT_ARGS (config option in cmake script), rather than
LIT_OPTS (environment variable interpreted by lit directly). While
LIT_ARGS doesn't do anything at all when set with make, at least not in
a way outlined in the docs.
Commit: 688ea048affe8e79221ea1a8c376bcf20ef8f3bb
https://github.com/llvm/llvm-project/commit/688ea048affe8e79221ea1a8c376bcf20ef8f3bb
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Revamp test suite using unittests (#149158)
Refactor the Lifetime Safety Analysis infrastructure to support unit testing.
- Created a public API class `LifetimeSafetyAnalysis` that encapsulates the analysis functionality
- Added support for test points via a special `TestPointFact` that can be used to mark specific program points
- Added unit tests that verify loan propagation in various code patterns
Commit: 87d73ff7fdc8fa7acdc2137654f4c4d8b051c423
https://github.com/llvm/llvm-project/commit/87d73ff7fdc8fa7acdc2137654f4c4d8b051c423
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
Log Message:
-----------
[Flang] Regenerate unroll test
Commit: c51b48be4785f104f3aff2ba4a839a5f54778c5b
https://github.com/llvm/llvm-project/commit/c51b48be4785f104f3aff2ba4a839a5f54778c5b
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
Log Message:
-----------
[AMDGPU] Recognise bitmask operations as srcmods on integer types (#149110)
Add to the VOP patterns to recognise when or/xor/and are masking only
the most significant bit of i32/v2i32/i64 and replace with the appropriate source modifier.
Commit: b3e016e05f1d21428298760db82b26fd0266f8bb
https://github.com/llvm/llvm-project/commit/b3e016e05f1d21428298760db82b26fd0266f8bb
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
R llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
Log Message:
-----------
Revert "[AMDGPU] Recognise bitmask operations as srcmods" (#150000)
Reverts llvm/llvm-project#149110 due to various buildbot failures.
Commit: 020856eec528975cf472b35bf2a7cf38809bf34e
https://github.com/llvm/llvm-project/commit/020856eec528975cf472b35bf2a7cf38809bf34e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][vector][spirv] Fix a crash in `VectorLoadOpConverter` (#149964)
This PR adds null check for `spirvVectorType` in VectorLoadOpConverter
to prevent a crash. Fixes #149956.
Commit: 7d9f913bb4164b8aaecfc17accebd44044592115
https://github.com/llvm/llvm-project/commit/7d9f913bb4164b8aaecfc17accebd44044592115
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
Update comment on getCustomDiagID; NFC
These APIs should almost never be used in Clang, so documenting that
more clearly. The problem is that the diagnostics are never associated
with a diagnostic group, so users have no way to control warning
behavior associated with the diagnostic. That makes for a poor user
experience. Instead, use a real diagnostic whenever possible or the API
taking a CustomDiagDesc as a last resort.
Commit: f78c4ce55bc4c47625d0e780f38522938920e329
https://github.com/llvm/llvm-project/commit/f78c4ce55bc4c47625d0e780f38522938920e329
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlAtomic.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/atomic/TestDataFormatterStdAtomic.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::atomic (#149801)
Adds synthetic children and a summary provider for `std::atomic` on
MSVC's STL. This currently only supports DWARF because it relies on the
template argument. Once there are PDB tests, this will probably use the
return type of some method like `value()` because template types aren't
available there.
Towards #24834.
Commit: a807e8ea9f6ecf151e2ccc84af05431e54be8dda
https://github.com/llvm/llvm-project/commit/a807e8ea9f6ecf151e2ccc84af05431e54be8dda
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Frontend/CheckerRegistry.h
M clang/lib/Analysis/plugins/CheckerDependencyHandling/CheckerDependencyHandling.cpp
M clang/lib/Analysis/plugins/CheckerOptionHandling/CheckerOptionHandling.cpp
M clang/lib/Analysis/plugins/SampleAnalyzer/MainCallChecker.cpp
M clang/unittests/StaticAnalyzer/BlockEntranceCallbackTest.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/ConflictingEvalCallsTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
M clang/unittests/StaticAnalyzer/MemRegionDescriptiveNameTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/ObjcBug-124477.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
M clang/unittests/StaticAnalyzer/SValSimplifyerTest.cpp
M clang/unittests/StaticAnalyzer/SValTest.cpp
M clang/unittests/StaticAnalyzer/TestReturnValueUnderConstruction.cpp
Log Message:
-----------
[analyzer] Prettify checker registration and unittest code (#147797)
This commit tweaks the interface of `CheckerRegistry::addChecker` to
make it more practical for plugins and tests:
- The parameter `IsHidden` now defaults to `false` even in the
non-templated overload (because setting it to true is unusual,
especially in plugins).
- The parameter `DocsUri` defaults to the dummy placeholder string
`"NoDocsUri"` because (as of now) nothing queries its value from the
checker registry (it's only used by the logic that generates the
clang-tidy documentation, but that loads it directly from `Checkers.td`
without involving the `CheckerRegistry`), so there is no reason to
demand specifying this value.
In addition to propagating these changes, this commit clarifies,
corrects and extends lots of comments and performs various minor code
quality improvements in the code of unit tests and example plugins.
I originally wrote the bulk of this commit when I was planning to add an
extra parameter to `addChecker` in order to implement some technical
details of the CheckerFamily framework. At the end I decided against
adding that extra parameter, so this cleanup was left out of the PR
https://github.com/llvm/llvm-project/pull/139256 and I'm merging it now
as a separate commit (after minor tweaks).
This commit is mostly NFC: the only functional change is that the
analyzer will be compatible with plugins that rely on the default
argument values and don't specify `IsHidden` or `DocsUri`. (But existing
plugin code will remain valid as well.)
Commit: e96230607cad9d30670ce55ef1cb9dd3fe1e21d7
https://github.com/llvm/llvm-project/commit/e96230607cad9d30670ce55ef1cb9dd3fe1e21d7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
Log Message:
-----------
[clang] Fix printing null MemberPointer APValues (#149995)
The decl can be null and this used to crash.
Commit: d54400559bb6181566030d5f99c6716ea2b2f0a9
https://github.com/llvm/llvm-project/commit/d54400559bb6181566030d5f99c6716ea2b2f0a9
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/main.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Allow returning multiple breakpoints in "stopped" event (#149133)
Currently, the "stopped" event returned when a breakpoint is hit will
always return only the ID of first breakpoint returned from
`GetStopReasonDataAtIndex`. This is slightly different from the
behaviour in `lldb`, where multiple breakpoints can exist at a single
instruction address and all are returned as part of the stop reason when
that address is hit.
This patch allows all multiple hit breakpoints to be returned in the
"stopped" event, both in the hitBreakpointIds field and in the
description, using the same formatting as lldb e.g. "breakpoint 1.1
2.1". I'm not aware of any effect this will have on debugger plugins; as
far as I can tell, it makes no difference within the VS Code UI - this
just fixes a minor issue encountered while writing an `lldb-dap` backend
for Dexter.
Commit: 54b50681ca0fd1c0c6ddb059c88981a45e2f1b19
https://github.com/llvm/llvm-project/commit/54b50681ca0fd1c0c6ddb059c88981a45e2f1b19
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
R clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
Revert "[LifetimeSafety] Revamp test suite using unittests (#149158)"
This reverts commit 688ea048affe8e79221ea1a8c376bcf20ef8f3bb.
Commit: da06b45d27f70485857dae6a1298350045dc25bd
https://github.com/llvm/llvm-project/commit/da06b45d27f70485857dae6a1298350045dc25bd
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaRISCV.h
M clang/include/clang/Sema/SemaX86.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
Log Message:
-----------
[NFC][Clang][FMV] Refactor sema checking of target_version/clones attributes. (#149067)
Sema currently has checkTargetVersionAttr and
checkTargetClonesAttrString to diagnose the said attributes. However the
code tries to handle all of AArch64, RISC-V and X86 targets at once
which is hard to maintain, therefore I am splitting these functions.
Unfortunately I could not use polymorphism because all of Sema, SemaARM,
SemaRISCV and SemaX86 inherit from SemaBase. The Sema instance itself
contains instances of every other target specific Sema.
Commit: 37f0f10a857dad83dce225408fbd3c269b15bede
https://github.com/llvm/llvm-project/commit/37f0f10a857dad83dce225408fbd3c269b15bede
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
A llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
Log Message:
-----------
[LV] Don't vectorize epilogue with scalable VF if no iterations remain. (#149789)
Currently we may try to vectorize the epilogue with a scalable VF, even
if there are no remaining iterations after the main vector loop with a
fixed VF.
Update selectEpilogueVectorizationFactor to always compute the number of
remaining iterations and exit early if no epilogue iterations remain.
Fixes https://github.com/llvm/llvm-project/issues/149726
PR: https://github.com/llvm/llvm-project/pull/149789
Commit: 972ac59c9af4ad47af0b3542ae936b3470727e5f
https://github.com/llvm/llvm-project/commit/972ac59c9af4ad47af0b3542ae936b3470727e5f
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorInterfaces.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseSpaceCollapse.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseStorageSpecifierToLLVM.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/StageSparseOperations.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (21/n) (#149928)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: f904cdd6c3049e605d24ed17680e80e7133908a0
https://github.com/llvm/llvm-project/commit/f904cdd6c3049e605d24ed17680e80e7133908a0
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBitCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorGather.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateMaskedLoadStore.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorMaskElimination.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (24/n) (#149931)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 4ae9fdca8af095afd91705f8dd143e93b304b6fb
https://github.com/llvm/llvm-project/commit/4ae9fdca8af095afd91705f8dd143e93b304b6fb
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/IndexToLLVM/IndexToLLVM.cpp
M mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/PrintCallHelper.cpp
M mlir/lib/Conversion/LLVMCommon/StructBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/OpenACCToSCF/OpenACCToSCF.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (6/n) (#149888)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: a5d9ba66258e452e4658281bbbd07a2214d4dc51
https://github.com/llvm/llvm-project/commit/a5d9ba66258e452e4658281bbbd07a2214d4dc51
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Error on bitcasts to bool that aren't 0 or 1 (#149996)
This is also what the current interpreter does.
Commit: 76ab6a2a76cbd547a354ff51229ab45934c6cfff
https://github.com/llvm/llvm-project/commit/76ab6a2a76cbd547a354ff51229ab45934c6cfff
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port f78c4ce55bc4
Commit: 28ca5bedd54679a62e96c013a530b2550c0d33f4
https://github.com/llvm/llvm-project/commit/28ca5bedd54679a62e96c013a530b2550c0d33f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang-c/Index.h
Log Message:
-----------
[clang-c] Don't deprecate CXRemapping as well as its users (#149975)
#149079 deprecated CXRemapping and all its methods, however MSVC warns
when a deprecated method is using a deprecated variable (and breaks our
Werror builds) - best way to avoid this is to only deprecate the methods
directly.
Commit: b692b239f037ebdc5a4501884a7f57a19afa33fd
https://github.com/llvm/llvm-project/commit/b692b239f037ebdc5a4501884a7f57a19afa33fd
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Rename var used to retry with RT-checks (NFC) (#147307)
FoundNonConstantDistanceDependence is a misleading name for a variable
that determines whether we retry with runtime checks. Rename it.
Commit: 2914a488c7f49c4817bbfb86f74da04fd338b4eb
https://github.com/llvm/llvm-project/commit/2914a488c7f49c4817bbfb86f74da04fd338b4eb
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Lower/OpenMP/map-modifiers.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
A flang/test/Semantics/OpenMP/map-modifiers-v60.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
Log Message:
-----------
[flang][OpenMP] Sema checks, lowering with new format of MAP modifiers (#149137)
OpenMP 6.0 has changed the modifiers on the MAP clause. Previous patch
has introduced parsing support for them. This patch introduces
processing of the new forms in semantic checks and in lowering. This
only applies to existing modifiers, which were updated in the 6.0 spec.
Any of the newly introduced modifiers (SELF and REF) are ignored.
Commit: 2736fbd8324bf21a130c8abd4bd0e7d3aa840ac1
https://github.com/llvm/llvm-project/commit/2736fbd8324bf21a130c8abd4bd0e7d3aa840ac1
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/IR/BuiltinDialect.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/lib` create APIs (26/n) (#149933)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 7cfd32a1d5f3bee1de58129eecac51e074d19dad
https://github.com/llvm/llvm-project/commit/7cfd32a1d5f3bee1de58129eecac51e074d19dad
Author: Zack Johnson <zacklj89 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt][MSVC] Conditionally remove emupac.cpp for msvc (#149823)
#148094 introduces logic for emulated PAC, which utilizes language
extensions not available on MSVC.
Commit: 38318dd05615a2f38abdeeae99e7423165308902
https://github.com/llvm/llvm-project/commit/38318dd05615a2f38abdeeae99e7423165308902
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)
In preparation to eventually make EVL tail folding the default, this
patch sets DataWithEVL as the preferred tail folding style for RISC-V,
but doesn't enable tail folding by default.
And although tail folding isn't enabled by default, the loop vectorizer
will actually tail fold loops with a small trip count, so this will
cause some EVL vectorized loops to be generated in the default
configuration.
The EVL tail folding work is still not complete, e.g. we still need to
handle interleave groups etc., see #123069, but a lot of these missing
features also apply to the data (masked) tail folding strategy, which is
the default anyway.
The actual overall performance picture is much better, on TSVC EVL tail
folding is faster than data on every benchmark on the spacemit-x60[^1]:
https://lnt.lukelau.me/db_default/v4/nts/755?compare_to=756
And on SPEC CPU 2017 we see a geomean improvement[^2]:
https://lnt.lukelau.me/db_default/v4/nts/751?compare_to=753
This is likely due to masked instructions generally being less
performant on the spacemit-x60, up to twice as slow:
https://camel-cdr.github.io/rvv-bench-results/bpi_f3/index.html
[^1]: These benchmarks don't exactly give the same performance numbers
as this patch, but it's a good indicator that EVL tail folding is
generally faster than masked tail folding.
[^2]: The large code size increase in 505.mcf_r is due to a function
being inlined now
Commit: 287b9447cc128d2218d148062d545a8633e37a4b
https://github.com/llvm/llvm-project/commit/287b9447cc128d2218d148062d545a8633e37a4b
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlUnordered.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL unordered containers (#149519)
Adds formatters for MSVC STL's unordered containers. This one is
relatively simple, because it can reuse the `std::list` synthetic
children. The unordered containers (aka
[`_Hash`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xhash#L327))
contain a
[`_List`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xhash#L2012)
which contains all elements (and is used for iterating through the
container).
Towards https://github.com/llvm/llvm-project/issues/24834.
Commit: 33df8882172dc3eb06db9846250de03dd3f7fff3
https://github.com/llvm/llvm-project/commit/33df8882172dc3eb06db9846250de03dd3f7fff3
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Teach RISCVTargetLowering::isFPImmLegal about fli+fneg (#149075)
There was a mismatch between isFPImmlegal and the cases that are handled
by lowerConstantFP. isFPImmLegal didn't check for the case where we
support `fli` of a negated constant (and so can lower to fli+fneg). This
has very minimal impact (42 insertion, 47 deletions across an
rv22u64_zfa llvm-test-suite build including SPEC CPU 2017) but is added
here for completeness.
See the PR thread https://github.com/llvm/llvm-project/pull/149075 for furrther discussion about the degree to which isFPImmLegal and lowerConstantFP are consistent. We ultimately agreed it makes sense to add fli+fneg, but there may be other future cases where it doesn't make sense to match.
Commit: 30d3bb598f3950b4b71830ff59624bcc7e408931
https://github.com/llvm/llvm-project/commit/30d3bb598f3950b4b71830ff59624bcc7e408931
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Tweak cmake formatting
No behavior change. For easier extraction of sources by grepping
(such as done by llvm/utils/gn/build/sync_source_lists_from_cmake.py).
Commit: a1bf0d1394e48894be05d274d3942ff77c35ce87
https://github.com/llvm/llvm-project/commit/a1bf0d1394e48894be05d274d3942ff77c35ce87
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port 287b9447cc12
Commit: 58be6226eb897f53185851283f25bd6d25ec74fa
https://github.com/llvm/llvm-project/commit/58be6226eb897f53185851283f25bd6d25ec74fa
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
Reapply "[LifetimeSafety] Revamp test suite using unittests (#149158)"
This reverts commit 54b50681ca0fd1c0c6ddb059c88981a45e2f1b19.
Commit: 0a8ddd396546bec7eaa4c3b7ef2f495e52bca0b8
https://github.com/llvm/llvm-project/commit/0a8ddd396546bec7eaa4c3b7ef2f495e52bca0b8
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Interpret boolean values correctly (#149312)
Previously the `ClampOp::verify` would sign extend boolean values,
leading "true" to be casted to a value of -1 instead of 1. This PR
ensures i1 values are zero extended, since i1 is used as a boolean value
in TOSA.
Commit: d8857d55d3a397ba047cbe9e8b11cecf3e1cedfd
https://github.com/llvm/llvm-project/commit/d8857d55d3a397ba047cbe9e8b11cecf3e1cedfd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
[mlir][tosa] Check for isolated regions in `tosa.while_loop` (#144865)
Similarly to `tosa.cond_if`, this patch checks that the cond/body
regions of `tosa.while_loop` are isolated from above. This is required
since the specification requires all values used in the cond/body
regions are explicitly declared within the regions.
Commit: 33bfbacdcba2ec9f81162637a7cf15c13975af0b
https://github.com/llvm/llvm-project/commit/33bfbacdcba2ec9f81162637a7cf15c13975af0b
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 58be6226eb89
Commit: 04107209856bb39e041aa38cf40de0afa90a6b2d
https://github.com/llvm/llvm-project/commit/04107209856bb39e041aa38cf40de0afa90a6b2d
Author: Justus Klausecker <117751770+Justus2308 at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
A llvm/test/Transforms/LoopSimplifyCFG/enter-through-indirectbr.ll
Log Message:
-----------
[LoopSimplifyCFG] Add check for missing loop preheader (#149743)
Closes #147869
Closes #149679
Adds a check for a missing loop preheader during analysis. This fixes a
nullptr dereference that happened whenever LoopSimplify was unable to
generate a preheader because the loop was entered by an indirectbr
instruction (as stated in the LoopSimplify.cpp doc comment).
Commit: f7a3be7311c11871ae19b2fa370fd6a72532c8fe
https://github.com/llvm/llvm-project/commit/f7a3be7311c11871ae19b2fa370fd6a72532c8fe
Author: flovent <flbven at protonmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/infinite-loop.cpp
Log Message:
-----------
[clang-tidy] Improve `bugprone-infinite-loop` check by adding handing for structured bindings (#144213)
Before this patch, this check only handles `VarDecl` as varaibles
declaration in statement, but this will ignore variables in structured
bindings (`BindingDecl` in AST), which leads to false positives.
Closes #138842.
Commit: 3855c49f28d5ee4b32bf1478d0a50ca191bcf2b6
https://github.com/llvm/llvm-project/commit/3855c49f28d5ee4b32bf1478d0a50ca191bcf2b6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Fix build break with -Werror
llvm-project/flang/lib/Semantics/resolve-directives.cpp:753:7: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
753 | default:
| ^
1 error generated.
https://lab.llvm.org/buildbot/#/builders/53/builds/17917
Commit: dc87a14efb381d960c8fbf988221f31216d7f5fd
https://github.com/llvm/llvm-project/commit/dc87a14efb381d960c8fbf988221f31216d7f5fd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Fix sanitizer failure on DenseMap sentinel value enum
Summary:
This triggers UBSan because the sentinel value `-1` is outside the range
of accepted enum values. Just replace this with a small set.
Commit: b0312be6aa664e4cb9abec6d080e971493093d05
https://github.com/llvm/llvm-project/commit/b0312be6aa664e4cb9abec6d080e971493093d05
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/lib/Dialect/MLProgram/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/NVGPU/Transforms/CreateAsyncGroups.cpp
M mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
M mlir/lib/Dialect/Quant/Transforms/LowerQuantOps.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (19/n) (#149926)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 6e723d2de85cd93d5a16230c20f5c79dc7b49c49
https://github.com/llvm/llvm-project/commit/6e723d2de85cd93d5a16230c20f5c79dc7b49c49
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
Log Message:
-----------
[VPlan] Remove loop region in simplifyBranchConditionForVFAndUF with EVL PHI (#150016)
Previously we fell back to just simplifying the branch cond to true
since one of the phis was a VPEVLBasedIVPHIRecipe. However this should
be fine to replace with its start value.
Commit: 023566ab389ceae8f02a2d86babe90f8ce3bd57b
https://github.com/llvm/llvm-project/commit/023566ab389ceae8f02a2d86babe90f8ce3bd57b
Author: lntue <lntue at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/hdr/types/CMakeLists.txt
Log Message:
-----------
[libc] Add missing full build dependency for mbstate. (#150030)
Commit: a415d68e48c4672c63082192626fec9bf9ae9c2c
https://github.com/llvm/llvm-project/commit/a415d68e48c4672c63082192626fec9bf9ae9c2c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
Revert "[SLP]Initial support for copyable elements (non-schedulable only)"
This reverts commit e202dba288edd47f1b370cc43aa8cd36a924e7c1 to try to
resolve compile time issues, reported in https://llvm-compile-time-tracker.com/compare.php?from=36089e5d983fe9ae00f497c2d500f37227f82db1&to=e202dba288edd47f1b370cc43aa8cd36a924e7c1&stat=instructions%3Au&details=on
Commit: eaa67a3cf041009ae33a45159d0465262c3af5dc
https://github.com/llvm/llvm-project/commit/eaa67a3cf041009ae33a45159d0465262c3af5dc
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/lib/Conversion/ComplexToLibm/ComplexToLibm.cpp
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (5/n) (#149887)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c37942df00e0065c432099e041a04c4d4d148c3d
https://github.com/llvm/llvm-project/commit/c37942df00e0065c432099e041a04c4d4d148c3d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/SystemZ/pr60413.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/avg.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/freeze-vector.ll
M llvm/test/CodeGen/X86/setcc-non-simple-type.ll
Log Message:
-----------
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
This is a partial revert of #145939 (I've kept the BUILD_VECTOR(FREEZE(UNDEF), FREEZE(UNDEF), elt2, ...) canonicalization) as we're getting reports of infinite loops (#148084).
The issue appears to be due to deep chains of nodes and how visitFREEZE replaces all instances of an operand with a common frozen version - other users of the original frozen node then get added back to the worklist but might no longer be able to confirm a node isn't poison due to recursion depth limits on isGuaranteedNotToBeUndefOrPoison.
The issue still exists with the old implementation but by only allowing a single frozen operand it helps prevent cases of interdependent frozen nodes.
I'm still working on supporting multiple operands as its critical for topological DAG handling but need to get a fix in for trunk and 21.x.
Fixes #148084
Commit: 38976a03cd367b27437e0d1e81c0ccaee2777b47
https://github.com/llvm/llvm-project/commit/38976a03cd367b27437e0d1e81c0ccaee2777b47
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/ShapeToStandard/ConvertShapeConstraints.cpp
M mlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRV.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToMLProgram/TosaToMLProgram.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (7/n) (#149889)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: a969bc1e57dc1e2b34847bbe134c19e266fd3acf
https://github.com/llvm/llvm-project/commit/a969bc1e57dc1e2b34847bbe134c19e266fd3acf
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[dexter] Remove unused env vars from lit.cfg.py (#150031)
I believe these are relics from the days of dexter having the ability to
build your code
Commit: 25e97fc420f8ecc43fbabadfe9767b4163e6ee36
https://github.com/llvm/llvm-project/commit/25e97fc420f8ecc43fbabadfe9767b4163e6ee36
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
Revert "[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)"
This reverts commit 38318dd05615a2f38abdeeae99e7423165308902.
The clang-riscv-gauntlet buildbot is breaking with this commit:
https://lab.llvm.org/buildbot/#/builders/210/builds/371
Commit: 44a6e0099b0f6d0cc4a70210c12108cfa4dee9a7
https://github.com/llvm/llvm-project/commit/44a6e0099b0f6d0cc4a70210c12108cfa4dee9a7
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Pragma.cpp
A clang/test/Preprocessor/pragma-pushpop-macro-diag.c
M clang/test/Preprocessor/pragma-pushpop-macro.c
Log Message:
-----------
[clang] Check empty macro name in `#pragma push_macro("")` or `#pragma pop_macro("")` (#149982)
Fixes https://github.com/llvm/llvm-project/issues/149762.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: d5099722e8ae0972a4a95927cb8ed415eda17298
https://github.com/llvm/llvm-project/commit/d5099722e8ae0972a4a95927cb8ed415eda17298
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
Log Message:
-----------
[SPIRVPrepareFunctions] Report change when removing lifetime intrinsics
Should hopefully fix EXPENSIVE_CHECKS build.
Commit: 8d549cf036b6facf455b9add2d878012dfeb3d0d
https://github.com/llvm/llvm-project/commit/8d549cf036b6facf455b9add2d878012dfeb3d0d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Pass SDNodeFlags through getNode instead of setFlags. (#149852)
getNode updates flags correctly for CSE. Calling setFlags after getNode
may set the flags where they don't apply.
I've added a Flags argument to getSelectCC and the signature of getNode that takes
an ArrayRef of EVTs.
Commit: 1053a926ccc0d65784010ea2b4340a38138a6630
https://github.com/llvm/llvm-project/commit/1053a926ccc0d65784010ea2b4340a38138a6630
Author: Yu-Hui Wu <nosba0957 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
Log Message:
-----------
[RISCV][NFC] Replace reportError wrappers with direct reportFatalUsageError calls (#148142)
Remove the unnecessary reportError wrapper functions and call
reportFatalUsageError directly.
Commit: 90e632eb11a9ee49e8852c5356758024281fa26f
https://github.com/llvm/llvm-project/commit/90e632eb11a9ee49e8852c5356758024281fa26f
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
Log Message:
-----------
[MLIR][AArch64] Refactor lowering of vector.contract to Neon I8MM (#149810)
This patch refactors the pattern in
`Transforms/LowerContractionToNeonI8MMPattern.cpp` using similar
approach as in https://github.com/llvm/llvm-project/pull/147052 to
prepare for adding BF16 support.
Commit: dd36a6901249796a175c3058a50d97cc3a7ba52c
https://github.com/llvm/llvm-project/commit/dd36a6901249796a175c3058a50d97cc3a7ba52c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A llvm/test/CodeGen/SPARC/tls-sp.ll
Log Message:
-----------
[NFC][Sparc] Pre-commit a test showing inefficient and broken LD/GD TLS
Commit: 4b99eb2eb49d8fcdb29ba494501e481cf09831ae
https://github.com/llvm/llvm-project/commit/4b99eb2eb49d8fcdb29ba494501e481cf09831ae
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/tls-sp.ll
Log Message:
-----------
[Sparc] Remove bogus stack adjustment for LD/GD TLS (#149890)
This argument is the number of bytes to adjust the stack by for the
duration of the call. In most cases, PEI is able to eliminate the
corresponding call frame pseudos, folding them into the initial stack
frame allocation (rounded up to stack alignment), where it just ends up
allocating more space than needed. However, in the rare case where this
cannot be done, e.g. due to the use of a dynamic alloca, the 1 byte
stack adjustment persists and results in a misaligned stack for the
duration of the call. This has been the case ever since TLS support was
added in cb1dca602c43 ("[Sparc] Add support for TLS in sparc."), and I
can only assume that 1 was used erroneously thinking that it is the
number of arguments (as there is 1 register argument for the call), not
the number of bytes for on-stack arguments.
Fixes: https://github.com/llvm/llvm-project/issues/149808
Commit: 20c52e423161d3a70d58caf6b0298094cb62e4e7
https://github.com/llvm/llvm-project/commit/20c52e423161d3a70d58caf6b0298094cb62e4e7
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
Reapply "[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)"
This reverts commit 25e97fc420f8ecc43fbabadfe9767b4163e6ee36.
The original commit was reverted due to a crash in llvm-test-suite. The
crash stemmed from a multiply reduction, which isn't supported for
scalable VFs on RISC-V. But for EVL tail folding we only support
scalable VFs, so when -force-tail-folding-style=data-with-evl is
specified we check to see if there's a scalable VF, and fall back to
data-without-lane-mask if there isn't.
This is done in setTailFoldingStyles, but previously we were only
checking if the forced tail folding style was legal, not the style
returned by TTI.
This version fixes this by checking the actual computed tail folding
style and not just the forced one, and adds a test for the crash in
llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
Commit: 6db9b0d19cec17c28df07b14fbea9762e7857f24
https://github.com/llvm/llvm-project/commit/6db9b0d19cec17c28df07b14fbea9762e7857f24
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][rocdl] Add more gfx12 wait intrinsics (#149984)
Commit: 9f733f4324412ef89cc7729bf027cdcab912ceff
https://github.com/llvm/llvm-project/commit/9f733f4324412ef89cc7729bf027cdcab912ceff
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/test/COFF/thin-archive.s
Log Message:
-----------
[LLD][COFF] Make /wholearchive thin-archive member identifiers consistent (#145487)
A thin archive is an archive/library format where the archive itself
contains only references to member object files on disk, rather than
embedding the file contents.
For the non-/wholearchive case, we use the path to the archive member as
the identifier for thin-archive members (see comments in
`enqueueArchiveMember`). This patch modifies the /wholearchive path to
behave the same way.
Apart from consistency, my motivation for fixing this is DTLTO
(#126654), where having the member identifier be the path on disk allows
distribution of bitcode members during ThinLTO.
Commit: b933f0c376c983614a0701f3bfd4054cf8fe4386
https://github.com/llvm/llvm-project/commit/b933f0c376c983614a0701f3bfd4054cf8fe4386
Author: sivadeilra <ardavis at microsoft.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A clang/test/CodeGenCXX/microsoft-abi-eh-async.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.h
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/WinEH/wineh-noret-cleanup.ll
M llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/noreturn-call-win64.ll
M llvm/test/CodeGen/X86/seh-catch-all.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-finally.ll
M llvm/test/CodeGen/X86/seh-safe-div.ll
M llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
M llvm/test/CodeGen/X86/stack-coloring-wineh.ll
M llvm/test/CodeGen/X86/taildup-heapallocsite.ll
M llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
M llvm/test/CodeGen/X86/win-catchpad.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-eh-states.ll
M llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
M llvm/test/CodeGen/X86/wineh-coreclr.ll
M llvm/test/CodeGen/XCore/exception.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected
Log Message:
-----------
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
This changes how LLVM constructs certain data structures that relate to
exception handling (EH) on Windows. Specifically this changes how
IP2State tables for functions are constructed. The purpose of this
change is to align LLVM to the requires of the Windows AMD64 ABI, which
requires that the IP2State table entries point to the boundaries between
instructions.
On most Windows platforms (AMD64, ARM64, ARM32, IA64, but *not* x86-32),
exception handling works by looking up instruction pointers in lookup
tables. These lookup tables are stored in `.xdata` sections in
executables. One element of the lookup tables are the `IP2State` tables
(Instruction Pointer to State).
If a function has any instructions that require cleanup during exception
unwinding, then it will have an IP2State table. Each entry in the
IP2State table describes a range of bytes in the function's instruction
stream, and associates an "EH state number" with that range of
instructions. A value of -1 means "the null state", which does not
require any code to execute. A value other than -1 is an index into the
State table.
The entries in the IP2State table contain byte offsets within the
instruction stream of the function. The Windows ABI requires that these
offsets are aligned to instruction boundaries; they are not permitted to
point to a byte that is not the first byte of an instruction.
Unfortunately, CALL instructions present a problem during unwinding.
CALL instructions push the address of the instruction after the CALL
instruction, so that execution can resume after the CALL. If the CALL is
the last instruction within an IP2State region, then the return address
(on the stack) points to the *next* IP2State region. This means that the
unwinder will use the wrong cleanup funclet during unwinding.
To fix this problem, compilers should insert a NOP after a CALL
instruction, if the CALL instruction is the last instruction within an
IP2State region. The NOP is placed within the same IP2State region as
the CALL, so that the return address points to the NOP and the unwinder
will locate the correct region.
This PR modifies LLVM so that it inserts NOP instructions after CALL
instructions, when needed. In performance tests, the NOP has no
detectable significance. The NOP is rarely inserted, since it is only
inserted when the CALL is the last instruction before an IP2State
transition or the CALL is the last instruction before the function
epilogue.
NOP padding is only necessary on Windows AMD64 targets. On ARM64 and
ARM32, instructions have a fixed size so the unwinder knows how to "back
up" by one instruction.
Interaction with Import Call Optimization (ICO):
Import Call Optimization (ICO) is a compiler + OS feature on Windows
which improves the performance and security of DLL imports. ICO relies
on using a specific CALL idiom that can be replaced by the OS DLL
loader. This removes a load and indirect CALL and replaces it with a
single direct CALL.
To achieve this, ICO also inserts NOPs after the CALL instruction. If
the end of the CALL is aligned with an EH state transition, we *also*
insert a single-byte NOP. **Both forms of NOPs must be preserved.** They
cannot be combined into a single larger NOP; nor can the second NOP be
removed.
This is necessary because, if ICO is active and the call site is
modified by the loader, the loader will end up overwriting the NOPs that
were inserted for ICO. That means that those NOPs cannot be used for the
correct termination of the exception handling region (the IP2State
transition), so we still need an additional NOP instruction. The NOPs
cannot be combined into a longer NOP (which is ordinarily desirable)
because then ICO would split one instruction, producing a malformed
instruction after the ICO call.
Commit: bbe912f1e74252f1f57b5d6c6d97a418947f4aa0
https://github.com/llvm/llvm-project/commit/bbe912f1e74252f1f57b5d6c6d97a418947f4aa0
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/DebugInfo/KeyInstructions/asm.c
Log Message:
-----------
[KeyInstr] Inline asm atoms (#149076)
Commit: 75ec7250aaede77ba540ddde61a222f39b30008a
https://github.com/llvm/llvm-project/commit/75ec7250aaede77ba540ddde61a222f39b30008a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Use SDUse::get() instead of a static_cast to SDValue. NFC (#150043)
Commit: 115f768b68d290995b3d9129f44e33cd7c8a11a6
https://github.com/llvm/llvm-project/commit/115f768b68d290995b3d9129f44e33cd7c8a11a6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV] Correct alignment of one-active (de)interleave cases (#150052)
Noticed this while going to rewrite the load case as a DAG combine. I
don't have a test case which demonstrates this leading to a miscompile,
but it seems like it could be possible.
Commit: b3e720b4deb481df11cb6be09e5a2ad7a4d4a7eb
https://github.com/llvm/llvm-project/commit/b3e720b4deb481df11cb6be09e5a2ad7a4d4a7eb
Author: Danila Malyutin <danilaml at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/PassInstrumentation.h
M llvm/lib/IR/PassInstrumentation.cpp
Log Message:
-----------
[PassInstrumentation] Don't insert extra entries in getPassNameForClassName (#150029)
Don't modify ClassToPassName map unless ClassName is found. Instead,
just return empty StringRef if there is no matching entry. This will
prevent possible dangling references in ClassToPassName map in case of
ClassName being freed.
See https://github.com/llvm/llvm-project/pull/145059/files#r2219763671
for more context.
Commit: aa1b416065ec615e93c496bbb43c7c006a04553e
https://github.com/llvm/llvm-project/commit/aa1b416065ec615e93c496bbb43c7c006a04553e
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Remove dependency on `tooling::ToolAction` (#149904)
The dependency scanner was initially using a fair amount of
infrastructure provided by the `clangTooling` library. Over time, the
needs for bespoke handling of command lines grew and the overlap with
the tooling library kept shrinking. I don't think the library provides
any value anymore.
I decided to remove the dependency and only reimplement the small bits
required by the scanner.
This allowed for a nice simplification, where we no longer need to
create temporary dummy `FileManager` instances (mis-named as
`DriverFileMgr` in some parts) and `SourceManager` instances to attach
to the `DiagnosticsEngine`. That code was copied from the tooling
library to support `DiagnosticConsumers` that expect these to exist. The
scanner uses a closed set of consumers and none need these objects to
exist.
The motivation for this (hopefully NFC) patch are some new restrictions
to how VFS's can be propagated in Clang that I'm working on.
Commit: 999b35629f909d97471a8ba600e3c4cf1cbf1977
https://github.com/llvm/llvm-project/commit/999b35629f909d97471a8ba600e3c4cf1cbf1977
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/build/BUILD.gn
Log Message:
-----------
[gn build] Manually partially port #108276 (#149595)
Fixes windows gn clang build.
Don't worry about exporting clang symbols on windows in gn build for
now.
Commit: 9a7a6b24f8c88718ef1eea57bed07332e751c027
https://github.com/llvm/llvm-project/commit/9a7a6b24f8c88718ef1eea57bed07332e751c027
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
[clang][test] Fix failed tests on non-Windows platforms
- Use '--' to separate inputs from options due to `%clang_cl`.
Commit: c710d460a5623c8445fabccd5a88e51085541d5b
https://github.com/llvm/llvm-project/commit/c710d460a5623c8445fabccd5a88e51085541d5b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] expandVECTOR_COMPRESS - remove superfluous getFreeze. NFC. (#150062)
freeze(freeze(extract_vector_elt(x,i))) -> freeze(extract_vector_elt(x,i))
Commit: e789f8bdf3691e8e5c4b8d0c0d90fc46cd015fee
https://github.com/llvm/llvm-project/commit/e789f8bdf3691e8e5c4b8d0c0d90fc46cd015fee
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
A libc/src/__support/FPUtil/comparison_operations.h
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/comparison_operations_test.cpp
Log Message:
-----------
[libc][math] Add Generic Comparison Operations for floating point types (#144983)
The PR implements the following generic comparison operation functions
for floating point types along with unittests:
- `fputil::equals`
- `fputil::less_than`
- `fputil::less_than_or_equals`
- `fputil::greater_than`
- `fputil::greater_than_or_equals`
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 7cb256bcaa6acd4805e2fdcec4bf5a3704fed7b9
https://github.com/llvm/llvm-project/commit/7cb256bcaa6acd4805e2fdcec4bf5a3704fed7b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove FIXME and commented out code from 20 years ago. NFC (#150055)
Commit: 3fc723ec2cf1965aa4eec8883957fbbe1b2e7027
https://github.com/llvm/llvm-project/commit/3fc723ec2cf1965aa4eec8883957fbbe1b2e7027
Author: Deák Lajos <36414743+deaklajos at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt][sanitizer] fix msghdr for musl (#136195)
Ran into the issue on Alpine when building with TSAN that
`__sanitizer_msghdr` and the `msghdr` provided by musl did not match.
This caused lots of tsan reports and an eventual termination of the
application by the oom during a `sendmsg`.
Commit: 22b0835390516c2150c040521885c473f3a1e87e
https://github.com/llvm/llvm-project/commit/22b0835390516c2150c040521885c473f3a1e87e
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 688ea048affe8e79221ea1a8c376bcf20ef8f3bb
Commit: 0e00bc4f8324d207c1e00d27e0ebe6db67208f75
https://github.com/llvm/llvm-project/commit/0e00bc4f8324d207c1e00d27e0ebe6db67208f75
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] cleanup the print format for TensorDesc (#149182)
Commit: 006c0c876726d5c64f126af4b77ab9b1924238c1
https://github.com/llvm/llvm-project/commit/006c0c876726d5c64f126af4b77ab9b1924238c1
Author: int-zjt <zhangjiatong.0 at bytedance.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
Log Message:
-----------
[sanitizer] Fix libcxx cache existence check in symbolizer build (#149249)
The script incorrectly checked ${LLVM_BUILD}/build.ninja to determine if
cached libcxx is available, while it should be checking the actual
libcxx build directory at ${LIBCXX_BUILD}/build.ninja.
Commit: abdd654feb79f3125bcff7c939cad79b426c1aea
https://github.com/llvm/llvm-project/commit/abdd654feb79f3125bcff7c939cad79b426c1aea
Author: Matthias Braun <matze at braunis.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
Log Message:
-----------
build_symbolizer.sh: Ensure libcxx include path comes first (#149431)
libc++ expects to come first in the search path, before libc. See for
example:
https://github.com/llvm/llvm-project/blob/main/libcxx/include/cstddef#L45
Make sure the C++ include path comes first even if custom paths to libc
and other packages are passed in via the `FLAGS` variable.
Commit: 0d0478903474b2e53c874427e3d6eb2ed7567e50
https://github.com/llvm/llvm-project/commit/0d0478903474b2e53c874427e3d6eb2ed7567e50
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
Log Message:
-----------
[LifetimeSafety] Add language option for experimental lifetime safety (#149592)
Add a language option flag for experimental lifetime safety analysis in C++.
This change provides a language option to control the experimental lifetime safety analysis feature, making it more explicit and easier to enable/disable. Previously, the feature was controlled indirectly through a diagnostic warning flag, which we do not want to accidentally enable with `-Weverything` (atm)!
### Changes:
- Added a new language option `EnableLifetimeSafety` in `LangOptions.def` for experimental lifetime safety analysis in C++
- Added corresponding driver options `-fexperimental-lifetime-safety` and `-fno-experimental-lifetime-safety` in `Options.td`
- Modified `AnalysisBasedWarnings.cpp` to use the new language option flag instead of checking if a specific diagnostic is ignored
- Updated a test case to use the new flag instead of relying on the warning flag alone
Commit: 7234ae63e175af6bc16c87d870051d6cbd67fe7d
https://github.com/llvm/llvm-project/commit/7234ae63e175af6bc16c87d870051d6cbd67fe7d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/xtheadfmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Improves to xtheadmemidx.ll and xtheadfmemidx.ll. NFC
-Add a common check-prefix.
-Use iXLen for GEP indices except the tests for zero extended indices.
-Only extend i8/i16 load results to i32.
Commit: a0aebb1935c10ab945121d86df56914906d13cb0
https://github.com/llvm/llvm-project/commit/a0aebb1935c10ab945121d86df56914906d13cb0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
A llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
Log Message:
-----------
[AMDGPU] Select scale_offset with SMEM instructions (#150078)
Commit: d8e55c842bf4bb437c8aa94d38ef368b2f103aec
https://github.com/llvm/llvm-project/commit/d8e55c842bf4bb437c8aa94d38ef368b2f103aec
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A libc/shared/sign.h
Log Message:
-----------
[libc] Expose the Sign type for shared use (#150083)
This patch exposes the internal `Sign` type for shared use by other LLVM
subprojects, following the pattern established by `FPBits`.
The `FPBits` utility is exposed via `libc/shared/fp_bits.h`. However,
its public interface relies on the `Sign` type for, e.g., creating
signed infinities and returning the sign of a value. Currently, users of
the shared `FPBits` have no way to access the `Sign` type.
Following the existing pattern for sharing `libc` utilities, this patch
adds a new public header `libc/shared/sign.h`. This header simply
includes the internal `src/__support/sign.h` and brings the `Sign` type
into the `shared` namespace.
Commit: 921287e126465d6850954855ded640f0f78d72fd
https://github.com/llvm/llvm-project/commit/921287e126465d6850954855ded640f0f78d72fd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M .github/workflows/premerge.yaml
M polly/CMakeLists.txt
Log Message:
-----------
[CI] Enable sccache GCS on Linux premerge (#149923)
This patch enables sccache using GCS for Linux premerge.
Commit: 4977100624c5320e50d1adce341042b966b36124
https://github.com/llvm/llvm-project/commit/4977100624c5320e50d1adce341042b966b36124
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add `rocdl.s.waitcnt` wrapper (#149670)
The main motivations is to pass vmcnt/expcnt/lgkmcnt values directly
(similar to the asm format) and delegate architecture-dependent
bitpacking to the amdgpu->rocdl lowering.
---------
Signed-off-by: Ivan Butygin <ivan.butygin at gmail.com>
Commit: 15715f4089878640405ac897723f24b30e5f8e03
https://github.com/llvm/llvm-project/commit/15715f4089878640405ac897723f24b30e5f8e03
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.h
A llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[WebAssembly,llvm] Add llvm.wasm.ref.test.func intrinsic (#147486)
This adds an llvm intrinsic for WebAssembly to test the type of a
function. It is intended for adding a future clang builtin
` __builtin_wasm_test_function_pointer_signature` so we can test whether
calling a function pointer will fail with function signature mismatch.
Since the type of a function pointer is just `ptr` we can't figure out
the expected type from that.
The way I figured out to encode the type was by passing 0's of the
appropriate type to the intrinsic.
The first argument gives the expected type of the return type and the
later values give the expected
type of the arguments. So
```llvm
@llvm.wasm.ref.test.func(ptr %func, float 0.000000e+00, double 0.000000e+00, i32 0)
```
tests if `%func` is of type `(double, i32) -> (i32)`. It will lower to:
```wat
local.get $func
table.get $__indirect_function_table
ref.test (double, i32) -> (i32)
```
To indicate the function should be void, I somewhat arbitrarily picked
`token poison`, so the following tests for `(i32) -> ()`:
```llvm
@llvm.wasm.ref.test.func(ptr %func, token poison, i32 0)
```
To lower this intrinsic, we need some place to put the type information.
With `encodeFunctionSignature()` we encode the signature information
into an `APInt`. We decode it in `lowerEncodedFunctionSignature` in
`WebAssemblyMCInstLower.cpp`.
Commit: 45d0750dac528ea7e1fcfda34cc9faca3c5454e6
https://github.com/llvm/llvm-project/commit/45d0750dac528ea7e1fcfda34cc9faca3c5454e6
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcscspn.cpp
M libc/src/wchar/wcsspn.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Cleaned up wcsspn and wcscspn (#147408)
created internal wcsspn to avoid duplicated code
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 32ee7daa57ba747e0777eb38352e256e0e55947b
https://github.com/llvm/llvm-project/commit/32ee7daa57ba747e0777eb38352e256e0e55947b
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/lldb-enumerations.h
Log Message:
-----------
[lldb] Remove out of date comment. NFC (#149908)
Mojo already moved to the main list in 582582fb474b8
Commit: 0df537e5a3d3985e771776d0a3ace758cc096437
https://github.com/llvm/llvm-project/commit/0df537e5a3d3985e771776d0a3ace758cc096437
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M polly/CMakeLists.txt
Log Message:
-----------
[Polly] Remove Accidental Test Comment in CMakeLists.txt
This was accidentally introduced in 921287e126465d6850954855ded640f0f78d72fd
because I forgot to remove it before merging the patch...
Commit: 16b4fb50dd05fa4b31cfe702e3b1d1e1a55398f5
https://github.com/llvm/llvm-project/commit/16b4fb50dd05fa4b31cfe702e3b1d1e1a55398f5
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/cbrt_fuzz.cpp
Log Message:
-----------
[libc] cbrt fuzz test (#150063)
Implemented fuzz test for cbrt
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 160d46d4c3f456868c41d56d5819d7ae2a1ba5d5
https://github.com/llvm/llvm-project/commit/160d46d4c3f456868c41d56d5819d7ae2a1ba5d5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
Log Message:
-----------
[WebAssembly] Fix warnings
This patch fixes:
llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp:126:26:
error: lambda capture 'DAG' is not used
[-Werror,-Wunused-lambda-capture]
llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp:239:28:
error: unused variable 'Info' [-Werror,-Wunused-variable]
Commit: eb0d8f9272f7c734cdaf31bc33a18e1619e021e4
https://github.com/llvm/llvm-project/commit/eb0d8f9272f7c734cdaf31bc33a18e1619e021e4
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] Fix return type of `DwarfFDECache::findFDE()` in definition (#146308)
Needed to resolve this compilation error on some systems:
lib/libunwind/src/UnwindCursor.hpp:153:38: error: return type of
out-of-line definition of 'libunwind::DwarfFDECache::findFDE' differs
from that in the declaration
typename A::pint_t DwarfFDECache<A>::findFDE(pint_t mh, pint_t pc) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^
lib/libunwind/src/libunwind.cpp:31:10: note: in file included from
lib/libunwind/src/libunwind.cpp:31:
#include "UnwindCursor.hpp"
^
lib/libunwind/src/UnwindCursor.hpp:100:17: note: previous declaration is
here
static pint_t findFDE(pint_t mh, pint_t pc);
~~~~~~~^
Commit: a0973de745837d9144b058479cd798c9de5b430f
https://github.com/llvm/llvm-project/commit/a0973de745837d9144b058479cd798c9de5b430f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
Log Message:
-----------
[AMDGPU] Select scale_offset for global instructions on gfx1250 (#150107)
Also switches immediate offset to signed for the subtarget.
Commit: 5eecbc018bfdf6f262647de739f35230596a1b8f
https://github.com/llvm/llvm-project/commit/5eecbc018bfdf6f262647de739f35230596a1b8f
Author: Slava "nerfur" Voronzoff <nerfur at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/test/Driver/openbsd.c
Log Message:
-----------
Adding Loongarch64 to OpenBSD parts (#149737)
Adding Loongarch64 to OpenBSD parts
Commit: efbe98db0029a97109ec0b4db51f46af1ce8e581
https://github.com/llvm/llvm-project/commit/efbe98db0029a97109ec0b4db51f46af1ce8e581
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
[llvm] simplify and clean-up DemangleConfig.h (#149163)
## Purpose
Simplify `DEMANGLE_` macro definitions in
`llvm/Demangle/DemangleConfig.h` for clarity/maintainability.
## Overview
* Alias `DEMANGLE_DUMP_METHOD`, `DEMANGLE_FALLTHROUGH`, and
`DEMANGLE_UNREACHABLE` macros to their `LLVM_` counterparts defined in
`llvm/Support/Compiler.h`
* Remove several `DEMANGLE_`-prefixed macros that were only used within
`DemangleConfig.h`
## Background
* It should be safe for the `Demangle` component library to depend on
`Support`, so there is no need for it to maintain copies of macros
defined in `llvm/Support/Compiler.h`.
* Since the canonical copy `llvm/Demangle/ItaniumDemangle.h` lives under
`libcxxabi`, it cannot directly reference the `LLVM_`-prefixed macros so
we define `DEMANGLE_`-prefixed aliases.
## Validation
* Built llvm-project on Windows with `clang-cl` and MSVC `cl`.
* Built llvm-project on Linux with `clang` and `gcc`.
Commit: 2e2a8992f992b185483bb1b120b30eacb30700ca
https://github.com/llvm/llvm-project/commit/2e2a8992f992b185483bb1b120b30eacb30700ca
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Remove resriction on constant masks for shuffle lowering (#150098)
The point of this change is simply to show that the constant check was
not required for correctness. The mixed intrinsic and shuffle tests are
added purely to exercise the code. An upcoming change will add support
for shuffle matching in getMask to support non-constant fixed vector
cases.
Commit: c6e560a25bcc3050ff3a02677c8bc1a6f673b36f
https://github.com/llvm/llvm-project/commit/c6e560a25bcc3050ff3a02677c8bc1a6f673b36f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
Log Message:
-----------
[AMDGPU] Select scale_offset for scratch instructions on gfx1250 (#150111)
Commit: 5ecb58058d4578dd96e41fd038cf9d985a77d7aa
https://github.com/llvm/llvm-project/commit/5ecb58058d4578dd96e41fd038cf9d985a77d7aa
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/pr126337.ll
Log Message:
-----------
[NVPTX] Fix NVPTX builder test failures.
Fixed broken 'pr126337.ll' NVPTX related test (by #149393)
Commit: b13bca7387a7aad6eaf3fa1c55bd06fe091f65ed
https://github.com/llvm/llvm-project/commit/b13bca7387a7aad6eaf3fa1c55bd06fe091f65ed
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
A llvm/test/CodeGen/WebAssembly/removed-terminator.ll
Log Message:
-----------
[WebAssembly] Unstackify registers with no uses in ExplicitLocals (#149626)
There are cases we end up removing some intructions that use stackified
registers after RegStackify. For example,
```wasm
bb.0:
%0 = ... ;; %0 is stackified
br_if %bb.1, %0
bb.1:
```
In this code, br_if will be removed in CFGSort, so we should unstackify
%0 so that it can be correctly dropped in ExplicitLocals.
Rather than handling this in case-by-case basis, this PR just
unstackifies all stackifies register with no uses in the beginning of
ExplicitLocals, so that they can be correctly dropped.
Fixes #149097.
Commit: 10812eb7c9e9822078a109a98132b829c771c1a8
https://github.com/llvm/llvm-project/commit/10812eb7c9e9822078a109a98132b829c771c1a8
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NVPTX] Assert PRMT operands are of correct type (NFC) (#150104)
Commit: 681c2ee4dfbf10b3ef74afd1a2c72f844771e602
https://github.com/llvm/llvm-project/commit/681c2ee4dfbf10b3ef74afd1a2c72f844771e602
Author: Justin King <jcking at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_malloc_mac.cpp
M compiler-rt/lib/asan/asan_malloc_win.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/asan/tests/asan_noinst_test.cpp
Log Message:
-----------
asan: refactor interceptor allocation/deallocation functions (#145087)
Do some refactoring to allocation/deallocation interceptors. Expose
explicit per-alloc_type functions and stop accepting explicit AllocType.
This ensures we do not accidentally mix.
NOTE: This change rejects attempts to call `operator new(<some_size>,
static_cast<std::align_val_t>(0))`.
For https://github.com/llvm/llvm-project/issues/144435
Signed-off-by: Justin King <jcking at google.com>
Commit: 5edb845fcaafd56110670fb2f6eeac22cbb0afff
https://github.com/llvm/llvm-project/commit/5edb845fcaafd56110670fb2f6eeac22cbb0afff
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/wchar/mbtowc.cpp
M libc/test/src/wchar/mbrtowc_test.cpp
Log Message:
-----------
[libc] Fixed mbtowc functions (#150118)
mbrtowc was not handling null destination correctly
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: dbd9eae95a5ad113d4559c07839306bf68f1925c
https://github.com/llvm/llvm-project/commit/dbd9eae95a5ad113d4559c07839306bf68f1925c
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Support vp.store in lowerinterleavedStore (#149605)
Follow up to 28417e64, and the whole line of work started with 4b81dc7.
This change merges the handling for VPStore - currently in
lowerInterleavedVPStore - into the existing dedicated routine used in
the shuffle lowering path. This removes the last use of the dedicated
lowerInterleavedVPStore and thus we can remove it.
This contains two changes which are functional.
First, like in 28417e64, merging support for vp.store exposes the
strided store optimization for code using vp.store.
Second, it seems the strided store case had a significant missed
optimization. We were performing the strided store at the full unit
strided store type width (i.e. LMUL) rather than reducing it to match
the input width. This became obvious when I tried to use the mask
created by the helper routine as it caused a type incompatibility.
Normally, I'd try not to include an optimization in an API rework, but
structuring the code to both be correct for vp.store and not optimize
the existing case turned out be more involved than seemed worthwhile. I
could pull this part out as a pre-change, but its a bit awkward on it's
own as it turns out to be somewhat of a half step on the possible
optimization; the full optimization is complex with the old code
structure.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 2cb1ecb94bb4e7f89494e59d25707fd9787ff98a
https://github.com/llvm/llvm-project/commit/2cb1ecb94bb4e7f89494e59d25707fd9787ff98a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/Core/dwarf.h
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/AppleDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFAttribute.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugMacro.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDeclContext.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBLocationToDWARFExpression.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/PostfixExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARF64UnitTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDebugNamesIndexTest.cpp
M lldb/unittests/SymbolFile/DWARF/SymbolFileDWARFTests.cpp
Log Message:
-----------
[lldb] Eliminate namespace lldb_private::dwarf (NFC) (#150073)
Eliminate the `lldb_private::dwarf` namespace, in favor of using
`llvm::dwarf` directly. The latter is shorter, and this avoids ambiguity
in the ABI plugins that define a `dwarf` namespace inside an anonymous
namespace.
Commit: 796f5512442782c7d37b8008740b3afcac1feb8b
https://github.com/llvm/llvm-project/commit/796f5512442782c7d37b8008740b3afcac1feb8b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI] Enable Windows Caching Through Sccache GCS (#150114)
Same as 921287e126465d6850954855ded640f0f78d72fd but for Windows.
Commit: eb554128acef5f814d02d357f10e4666e32a699b
https://github.com/llvm/llvm-project/commit/eb554128acef5f814d02d357f10e4666e32a699b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
Log Message:
-----------
[mlir][Arith] Prevent IR modification for non-matching pattern (#150103)
The F4E2M1 truncation emulation was expanding or truncating operations
to F32 even when the pattern did not apply, causing non-convergent
rewrites when operating on doubles.
Also, fix a pair of whitespace issues that snuck in.
Commit: c267928700778f01870094009fe6afdce79635a6
https://github.com/llvm/llvm-project/commit/c267928700778f01870094009fe6afdce79635a6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Use getIntNTy routines on builder to simplify code [nfc]
Addressing a suggestion from #149605 consistently throughout file.
Commit: 5ca40fa101df2b75e10c0c260192b653120a9b1d
https://github.com/llvm/llvm-project/commit/5ca40fa101df2b75e10c0c260192b653120a9b1d
Author: yonghong-song <yhs at fb.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
Log Message:
-----------
[BPF] Fix build warnings due to a static var in header file (#150128)
Simon Pilgrim ([1]) and Anton reported that the following warning will
appear when building clang compiler:
```
In file included from .../llvm-project/llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp:9: .../llvm-project/llvm/lib/Target/BPF/BPF.h:25:20: warning: ‘llvm::BPF_TRAP’ defined but not used [-Wunused-variable]
25 | static const char *BPF_TRAP = "__bpf_trap";
| ^~~~~~~~
...
In file included from .../llvm-project/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp:14:
.../llvm-project/llvm/lib/Target/BPF/BPF.h:25:20: warning: ‘llvm::BPF_TRAP’ defined but not used [-Wunused-variable]
25 | static const char *BPF_TRAP = "__bpf_trap";
| ^~~~~~~~
...
```
Instead of using static const variable, use macro to silence warnings.
[1] https://github.com/llvm/llvm-project/pull/131731
Commit: b2c38f153efe96e4a1497baed9fd25faa1e058c1
https://github.com/llvm/llvm-project/commit/b2c38f153efe96e4a1497baed9fd25faa1e058c1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Correct the immediate swizzling for P-ext plui.h/w. (#149945)
If I'm reading the spec correctly, plui.h/w encode the immediate
differently from pli.h/w. pli.h/w appear to rotate the immediate
left by 1 before encoding while plui.h/w rotates the immediate right
by 1 before encoding.
Since I was splitting the classes, I made the name closer to the
instruction names since the immediate width was ambiguous. I've
added an _i suffix to make it similar to base and Zb* class names.
Commit: fbeb801a718a13ca895ed3db23c6265e93bb9185
https://github.com/llvm/llvm-project/commit/fbeb801a718a13ca895ed3db23c6265e93bb9185
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_cvt_pk_bf16_f32` on gfx1250 (#150053)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 7fc65569c1d461682504a4552d872bb75b868b4f
https://github.com/llvm/llvm-project/commit/7fc65569c1d461682504a4552d872bb75b868b4f
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
Log Message:
-----------
[AMDGPU] Mark `amdgcn_tanh` as canonicalized (#150059)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: c3c72c1de9aece0b98a6f1c62d3883dde1a50fcd
https://github.com/llvm/llvm-project/commit/c3c72c1de9aece0b98a6f1c62d3883dde1a50fcd
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll
M llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
A llvm/test/tools/dxil-dis/lifetimes.ll
Log Message:
-----------
[DirectX] Legalize `llvm.lifetime.*` intrinsics in EmbedDXILPass (#150100)
Fixes #147395
This PR:
- Excludes lifetime intrinsics from the Int64Ops shader flags analysis
to match DXC behavior and pass DXIL validation.
- Performs legalization of `llvm.lifetime.*` intrinsics in the
EmbedDXILPass just before invoking the DXILBitcodeWriter.
- After invoking the DXILBitcodeWriter, all lifetime intrinsics and
associated bitcasts are removed from the module to keep the Module
Verifier happy. This is fine since lifetime intrinsics are not needed by
any passes after the EmbedDXILPass.
Commit: d1ca9847575ae94049c4877812cca96b7f3058f0
https://github.com/llvm/llvm-project/commit/d1ca9847575ae94049c4877812cca96b7f3058f0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Fix unittest (#150136)
Commit: 482ec90428017f986edc67644484555a367a624c
https://github.com/llvm/llvm-project/commit/482ec90428017f986edc67644484555a367a624c
Author: aankit-ca <aankit at codeaurora.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrFormats.td
R llvm/lib/Target/Hexagon/HexagonInstrFormatsV60.td
M llvm/lib/Target/Hexagon/HexagonInstrFormatsV65.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td
R llvm/lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td
Log Message:
-----------
[Hexagon] Remove unused td files (#150109)
Fixes https://github.com/llvm/llvm-project/issues/150094
Commit: dbc41dd5d827a3e13625a66fd2bfa83a8a4dfe83
https://github.com/llvm/llvm-project/commit/dbc41dd5d827a3e13625a66fd2bfa83a8a4dfe83
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][deps] Add a release note for fixing crashes in `clang-scan-deps`. (#149857)
Commit: bbbe69f5f3983e919ebceb5f702b248aff495a3a
https://github.com/llvm/llvm-project/commit/bbbe69f5f3983e919ebceb5f702b248aff495a3a
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/sinpi.f90
Log Message:
-----------
[flang] Implement `sinpi` (#149525)
Commit: 7dc9b433673e28f671894bd22c65f406ba9bea6f
https://github.com/llvm/llvm-project/commit/7dc9b433673e28f671894bd22c65f406ba9bea6f
Author: sivadeilra <arlie.davis at microsoft.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
Fix CI on non-Windows platforms, for #144745 (#150145)
Commit: e0dd22fab19df2c9370fc2e90bcf57eb0cf25bed
https://github.com/llvm/llvm-project/commit/e0dd22fab19df2c9370fc2e90bcf57eb0cf25bed
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-maximumnum-minimumnum.c
M clang/test/Sema/builtins-elementwise-math.c
Log Message:
-----------
[Clang] Add elementwise maximumnum/minimumnum builtin functions (#149775)
Addresses https://github.com/llvm/llvm-project/issues/112164. minimumnum
and maximumnum intrinsics were added in 5bf81e53dbea.
The new built-ins can be used for implementing OpenCL math function fmax
and fmin in #128506.
Commit: 726502d668d12d917411d48d0b2210f8592b23a9
https://github.com/llvm/llvm-project/commit/726502d668d12d917411d48d0b2210f8592b23a9
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Target/Language.cpp
Log Message:
-----------
[lldb] Fix UB cast when encountering DW_LANG_* >= eNumLanguageTypes (#150132)
LanguageType has two kinds of enumerators in it. The first is
DWARF-assigned enumerators which must be consecutive and match DW_LANG
values. The second is the vendor-assigned enumerators which must be
unique and must follow on from the DWARF-assigned values (i.e. the first
one is currently eLanguageTypeMojo + 1) even if that collides with
DWARF-assigned values that lldb is not yet aware of
Only the DWARF-assigned enumerators may be static_cast from DW_LANG
since their values match. The vendor-assigned enumerators must be
explicitly converted since their values do not match. This needs to
handle new languages added to DWARF and not yet implemented in lldb.
This fixes a crash when encountering a DW_LANG value >=
eNumLanguageTypes and wrong behaviour when encountering DW_LANG values
that have not yet been added to LanguageType but happen to coincide with
a vendor-assigned enumerator due to the consecutive values requirement
described above.
Another way to fix the crash is to add the language to LanguageType (and
fill any preceeding gaps in the number space) so that the DW_LANG being
encountered is correctly handled but this just moves the problem to a
new subset of DW_LANG values.
Also fix an unnecessary static-cast from LanguageType to LanguageType.
Commit: 8c26858f1a8bc5796c493f4f720552edbcb09fb4
https://github.com/llvm/llvm-project/commit/8c26858f1a8bc5796c493f4f720552edbcb09fb4
Author: Doug Gregor <dgregor at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[API Notes] Attach API notes to forward declarations of tags (#149951)
Forward declarations can still have useful API notes applied to them.
When the use of the tag is not a definition, apply the API notes
immediately.
Fixes rdar://156288588.
Commit: 471e59b858b1d2ee844cb527522e60ed03a1a1dc
https://github.com/llvm/llvm-project/commit/471e59b858b1d2ee844cb527522e60ed03a1a1dc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/TargetInfo.cpp
M clang/test/Layout/ms-no-unique-address.cpp
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
Log Message:
-----------
[clang] Set correct CXXABI for UEFI (#150115)
The target triple x86_64-uefi must be assumed to have Microsft ABI by
default.
Fixes: https://github.com/llvm/llvm-project/issues/150113
Commit: 8f410b491e55f3b91587da926a7a6fee99722df3
https://github.com/llvm/llvm-project/commit/8f410b491e55f3b91587da926a7a6fee99722df3
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/shared/sign.h
Log Message:
-----------
[libc] Fix incorrect macro usage in shared/sign.h (#150140)
This patch corrects the `using`-declaration in `libc/shared/sign.h`.
The previous change (#150083) incorrectly used the `LIBC_NAMESPACE_DECL`
macro. This is corrected to use `LIBC_NAMESPACE`.
Commit: 8c4fa11dd871ba747867d2e707d643664868837e
https://github.com/llvm/llvm-project/commit/8c4fa11dd871ba747867d2e707d643664868837e
Author: Zack Johnson <zacklj89 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt][MSVC] Update check to include clang-cl (#150108)
Follow up to #149823 to include `clang-cl` for AArch64 builtins sources.
Commit: efffa42f593739ea7d80a5be301b6f235e44f35a
https://github.com/llvm/llvm-project/commit/efffa42f593739ea7d80a5be301b6f235e44f35a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Add generated offloading Xarch args to synthesized args (#150142)
Summary:
The synthesized args contains a list of unique pointers, so this should
clean this generated argument up once created.
Commit: a69cddef43f64d5307c0d5f2f01e5176ac05729a
https://github.com/llvm/llvm-project/commit/a69cddef43f64d5307c0d5f2f01e5176ac05729a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
Log Message:
-----------
[RISCV] Add TUPLE_INSERT and TUPLE_EXTRACT to verifyTargetNode. (#150148)
Verify that the index is an i32 target constant which is what we get
from intrinsic lowering. All other inserts and extracts should be the
same.
Commit: 11fba3591692e339aa2d683c7bcc9eef66b78b88
https://github.com/llvm/llvm-project/commit/11fba3591692e339aa2d683c7bcc9eef66b78b88
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[NVPTX] Add SimplifyDemandedBitsForTargetNode for PRMT (#149395)
Commit: 92858528c2db534e4101b7ac6cd263ac7884764d
https://github.com/llvm/llvm-project/commit/92858528c2db534e4101b7ac6cd263ac7884764d
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Misc/time-passes.c
M clang/tools/driver/cc1_main.cpp
Log Message:
-----------
[clang][timers][stats] Add a flag to enable timers in the stats file (#149946)
As reported in #138173, enabling `-ftime-report` adds pass timing info
to the stats file if `-stats-file` is specified. This was determined to
be WAI. However, if one intentionally wants to put timer information in
the stats file, using `-ftime-report` may lead to a lot of logspam (that
can't be removed by directing stderr to `/dev/null` as that would also
redirect compiler errors). To address this, this PR adds a flag
`-stats-file-timers` that adds timer data to the stats file without
outputting to stderr.
Commit: 324773e238026c5d4f501213678a89bf411e1509
https://github.com/llvm/llvm-project/commit/324773e238026c5d4f501213678a89bf411e1509
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
Log Message:
-----------
[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)
This patch implement vector costs for `llvm.fptoui.sat()` in RISCV TTI.
Commit: eb0c863c447bf2ad4d35cfde39925a655c060fa5
https://github.com/llvm/llvm-project/commit/eb0c863c447bf2ad4d35cfde39925a655c060fa5
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port #147408 (#150154)
Add deps for 45d0750dac528ea7e1fcfda34cc9faca3c5454e6
Commit: 01b47eb86c991f88d3117f494ebd1826fd3ab41e
https://github.com/llvm/llvm-project/commit/01b47eb86c991f88d3117f494ebd1826fd3ab41e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Only implicitly start lifetime of trivially-default-constructible union members (#149835)
See
https://github.com/llvm/llvm-project/commit/faee39baa87e43f4b746dd77e479268391163658
Commit: 8937b61f21fcd60ab1b19db6e755053364584d18
https://github.com/llvm/llvm-project/commit/8937b61f21fcd60ab1b19db6e755053364584d18
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Fix cast incompatible type bug in `ShuffleOp::fold` (#150037)
This PR uses `dyn_cast` instead of `cast` to avoid a crash when the
constant attribute is not a `DenseElementsAttr`. Fixes #149325.
Commit: 0eafc737248f1232309cef6824a5a95d0747626e
https://github.com/llvm/llvm-project/commit/0eafc737248f1232309cef6824a5a95d0747626e
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
Revert "[llvm] simplify and clean-up DemangleConfig.h" (#150160)
Reverts llvm/llvm-project#149163 because it introduced a layering
violation.
Support depends on Demangle:
[llvm-project/llvm/lib/Support/Unix/Signals.inc](https://github.com/llvm/llvm-project/blob/324773e238026c5d4f501213678a89bf411e1509/llvm/lib/Support/Unix/Signals.inc#L38)
Line 38 in
[324773e](https://github.com/llvm/llvm-project/commit/324773e238026c5d4f501213678a89bf411e1509)
Commit: 23eef9a7c40f15fcf3cd393e7dc18f48c516bf7e
https://github.com/llvm/llvm-project/commit/23eef9a7c40f15fcf3cd393e7dc18f48c516bf7e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Activate primitive fields before initializing them (#149963)
The initializer itself might need the field to be active.
Commit: c9714d20350f5895f292794eb82bce4231b9472b
https://github.com/llvm/llvm-project/commit/c9714d20350f5895f292794eb82bce4231b9472b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Add profitability checks to SelectAddrRegRegScale. (#150135)
-Only fold if the ADD can be folded into all uses.
-Don't reassociate an ADDI if the shl+add can be a shxadd or similar
instruction.
-Only reassociate a single ADDI. If there are 2 addis it's the same
number of instructions as shl+add. If there are more than 2 that it
would increase instructions over folding the addis into the
loads/stores.
Commit: d8ea88f99a8093c018fa0680900682a562ac93a0
https://github.com/llvm/llvm-project/commit/d8ea88f99a8093c018fa0680900682a562ac93a0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[llvm] Proofread LangRef.rst (#150042)
Commit: 2edc730a687be160965e4b9026a55905f7dfeebe
https://github.com/llvm/llvm-project/commit/2edc730a687be160965e4b9026a55905f7dfeebe
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] auto update some tests to prepare for future changes
Commit: 5050a1507116735b5e7b6a6c7f7fcee49a8aa714
https://github.com/llvm/llvm-project/commit/5050a1507116735b5e7b6a6c7f7fcee49a8aa714
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Remove extra spaces from RISCVInstrInfoP.td. NFC
Commit: 7ad1d5bd34754fb909d7b58014372baddf94bfc7
https://github.com/llvm/llvm-project/commit/7ad1d5bd34754fb909d7b58014372baddf94bfc7
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
M mlir/test/Dialect/Mesh/forward-sharding-propagation.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
Log Message:
-----------
[mlir][mesh] removing partial/reduction axes from mesh.sharding (#149805)
[mlir][mesh] Removing partial axes from sharding annotations (discourse 87053)
Commit: 0b3579bedcb2ac608b1a68bf967386c4600554ea
https://github.com/llvm/llvm-project/commit/0b3579bedcb2ac608b1a68bf967386c4600554ea
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/MC/MCMachOStreamer.cpp
Log Message:
-----------
MCMachOStreamer: Call MCObjectStreamer::changeSection
We don't want to emit linker-local label `ltmpN` for addrsig and
cg_profile sections. Make the intention clear to prepare for the pending
refactoring that moves emitLabel from switchSection to changeSection.
Commit: 0f235695709d2505651a55ec7f3c8b7fba2b2dbb
https://github.com/llvm/llvm-project/commit/0f235695709d2505651a55ec7f3c8b7fba2b2dbb
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mcpu=ultrasparc3 on Solaris/SPARC (#149990)
Prompted by PR #149652, this patch changes the Solaris/SPARC default to
-mcpu, matching both the Oracle Studio 12.6 compilers and GCC 16:
[[PATCH] Default to -mcpu=ultrasparc3 on
Solaris/SPARC](https://gcc.gnu.org/pipermail/gcc-patches/2025-July/690191.html).
This is equivalent to enabling the `vis2` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: d385e9d86bce21679ac04b1c6abde0182f1d9e03
https://github.com/llvm/llvm-project/commit/d385e9d86bce21679ac04b1c6abde0182f1d9e03
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support V_PK_ADD_{MIN|MAX}_{I|U}16 and V_{MIN|MAX}3_{I|U}16 on gfx1250 (#150155)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 073460a2a35c7f0d9aa643e3043fccd62f094c9e
https://github.com/llvm/llvm-project/commit/073460a2a35c7f0d9aa643e3043fccd62f094c9e
Author: Jakub Chlanda <jakub at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/ROCm.h
Log Message:
-----------
[HIP][Clang][Driver] Move BC preference logic into ROCm detection (#149294)
This patch provides a single point for handling the logic behind
choosing common bitcode libraries. The intention is that the users of
ROCm installation detector will not have to rewrite options handling
code each time the bitcode libraries are queried. This is not too
distant from detectors for other architecture that encapsulate the
similar decision making process, providing cleaner interface. The only
flag left in `getCommonBitcodeLibs` (main point of entry) is
`NeedsASanRT`, this is deliberate, as in order to calculate it we need
to consult `ToolChain`.
Commit: 1e24b53534ed4043562ae32bb16c55b7820a3aed
https://github.com/llvm/llvm-project/commit/1e24b53534ed4043562ae32bb16c55b7820a3aed
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] Add limit for expansion of gep chains (#147065)
When converting gep subtraction / comparison to offset subtraction /
comparison, avoid expanding very long multi-use gep chains.
Commit: b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
https://github.com/llvm/llvm-project/commit/b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
Log Message:
-----------
[Sanitizers] Remove handling for lifetimes on non-alloca insts (NFC) (#149994)
After #149310 the pointer argument of lifetime.start/lifetime.end is
guaranteed to be an alloca, so we don't need to go through
findAllocaForValue() anymore, and don't have to have special handling
for the case where it fails.
Commit: 0cfea5b73cadfcf408f3549ff209fba4f56f9138
https://github.com/llvm/llvm-project/commit/0cfea5b73cadfcf408f3549ff209fba4f56f9138
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[BitcodeReader] Avoid quadratic complexity in intrinsic upgrade (#150032)
When materializing a function, we'd upgrade all calls to all upgraded
intrinsics. However, this would operate on all calls to the intrinsic
(including previously materialized ones), which leads to quadratic
complexity.
Instead, only upgrade the calls that are in the materialized function.
This fixes a compile-time regression introduced by #149310.
Commit: b7889a65a8e54f2d9c7f578a515a7bf970044bfe
https://github.com/llvm/llvm-project/commit/b7889a65a8e54f2d9c7f578a515a7bf970044bfe
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
Log Message:
-----------
[lldb][SBType] GetBasicType to unwrap canonical type (#149112)
`SBType::GetBasicType` fails on typedefs to primitive types. The docs
for `GetBasicType` state:
```
Returns the BasicType value that is most appropriate to this type
```
But, e.g., for `uint64_t` this would currently return
`eBasicTypeInvalid`.
`TypeSystemClang::GetBasicTypeEnumeration` (which is what
`SBType::GetBasicType` uses) doesn't see through typedefs. Inside LLDB
we almost always call `GetBasicTypeEnumeration` on the canonical type.
In the cases we don't I suspect those were just subtle bugs. This patch
gets the canonical type inside of `GetBasicTypeEnumeration` instead.
rdar://155829208
Commit: 7e878aaf23dd559fa491a0bf6168f15f939c5965
https://github.com/llvm/llvm-project/commit/7e878aaf23dd559fa491a0bf6168f15f939c5965
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[PatternMatch] Add support for capture-and-match (NFC) (#149825)
When using PatternMatch, there is a common problem where we want to both
match something against a pattern, but also capture the
value/instruction for various reasons (e.g. to access flags).
Currently the two ways to do that is to either capture using
m_Value/m_Instruction and do a separate match on the result, or to use
the somewhat awkward `m_CombineAnd(m_XYZ, m_Value(V))` pattern.
This PR introduces to add a variant of `m_Value`/`m_Instruction` which
does both a capture and a match. `m_Value(V, m_XYZ)` is basically
equivalent to `m_CombineAnd(m_XYZ, m_Value(V))`.
I've ported two InstCombine files to this pattern as a sample.
Commit: b17f4d3366cd3a6a276b825342c270a839b849db
https://github.com/llvm/llvm-project/commit/b17f4d3366cd3a6a276b825342c270a839b849db
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use AA during store merge (#149992)
This is a small extension of #147540, resolving one of the FIXMEs.
Instead of bailing out on any instruction that may read/write memory,
use AA to check whether it can alias the stored parts. Do this using a
crude check based on the underlying object only.
This pattern occurs rarely in practice, but at the same time it also doesn't
seem to add any compile-time cost, so it's probably worth handling.
Commit: c3a9e69737c0577cacddff1a2b4cfd2209fb3706
https://github.com/llvm/llvm-project/commit/c3a9e69737c0577cacddff1a2b4cfd2209fb3706
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/pr148084.ll
Log Message:
-----------
[RISCV] Add test coverage for #148084
Commit: 0586067cf07bef0f04fd1dc7135a9b773ebaa07a
https://github.com/llvm/llvm-project/commit/0586067cf07bef0f04fd1dc7135a9b773ebaa07a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Semantics/canonicalize-omp.cpp
Log Message:
-----------
[Flang] Build fix without precompiled headers
The header semantics.h is added implitly in the precompiled headers, but
the build was failing when precompiled headers are disabled (e.g.
using CMAKE_DISABLE_PRECOMPILE_HEADERS=ON):
```
../_src/flang/lib/Semantics/canonicalize-omp.cpp: In constructor ‘Fortran::semantics::CanonicalizationOfOmp::CanonicalizationOfOmp(Fortran::semantics::SemanticsContext&)’:
../_src/flang/lib/Semantics/canonicalize-omp.cpp:31:38: error: invalid use of incomplete type ‘class Fortran::semantics::SemanticsContext’
31 | : context_{context}, messages_{context.messages()} {}
| ^~~~~~~
In file included from ../_src/flang/lib/Semantics/canonicalize-omp.cpp:9:
../_src/flang/lib/Semantics/canonicalize-omp.h:17:7: note: forward declaration of ‘class Fortran::semantics::SemanticsContext’
17 | class SemanticsContext;
| ^~~~~~~~~~~~~~~~
compilation terminated due to -fmax-errors=1.
```
Commit: 39b9891fc9adb23a1894b2aeea1f5577892a40fe
https://github.com/llvm/llvm-project/commit/39b9891fc9adb23a1894b2aeea1f5577892a40fe
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Make RISCVVPseudo extend Pseudo. NFC (#149785)
This PR makes RISCVVPseudo extend Pseudo so that we don't forget to
define a record for RISCVVPseudo.
Commit: 6c50e2b2dda185816b3a4d65cef6771dad5113d8
https://github.com/llvm/llvm-project/commit/6c50e2b2dda185816b3a4d65cef6771dad5113d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
Log Message:
-----------
[SCEV] Don't require NUW at first add when checking A+C1 < (A+C2)<nuw> (#149795)
Relax the NUW requirements for isKnownPredicateViaNoOverflow, if the
second operand (Y) is an ADD. The code only simplifies the condition if
C1 < C2, so if the second ADD is NUW, it doesn't matter whether the
first operand also has the NUW flag, as it cannot wrap if C1 < C2.
https://alive2.llvm.org/ce/z/b3dM7N
PR: https://github.com/llvm/llvm-project/pull/149795
Commit: b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
https://github.com/llvm/llvm-project/commit/b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
Author: Ralf Jung <post at ralfj.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: allocated objects can grow (#141338)
This enables the (reasonably common) pattern of using `mmap` to reserve
but not actually map a wide range of pages, and then only adding in more
pages as memory is actually needed. Effectively, that region of memory
is one big allocated object for LLVM, but crucially, that allocated
object *changes its size*.
Having an allocated object grow seems entirely compatible with what LLVM
optimizations assume, *except* that when LLVM sees an `alloca` or
similar instruction, it will assume that a pointer that has been
`getelementptr inbounds` by more than the size of the allocated object
cannot alias that `alloca`. But for allocated objects that are created
e.g. by `mmap`, where LLVM does not know their size, this cannot happen
anyway.
The other main point to be concerned about is having a `getelementptr
inbounds` that is moved up across an operation that grows an allocated
object: this should be legal as `getelementptr` is freely reorderable.
We achieve that by saying that for allocated objects that change their
size, "inbounds" means "inbounds of their maximal size", not "inbounds
of their current size".
It would be nice to also allow shrinking allocations (e.g. by
`munmap`ing pages at the end), but that is more tricky. Consider an
example like this:
- load 4 bytes from `ptr`
- call some function
- load 1 byte from `ptr`
Right now, LLVM could argue that since `ptr` clearly has not been
deallocated, there must be at least 4 bytes of dereferenceable memory
behind `ptr` after the call. If allocations can shrink, this kind of
reasoning is no longer valid. I don't know if LLVM actually does
reasoning like that -- I think it should not, since I think it should be
possible to have allocations that shrink -- but to remain conservative I
am not proposing that as part of this patch.
Commit: 52737ea6d69d79fb104480d9cd67bf85711fc939
https://github.com/llvm/llvm-project/commit/52737ea6d69d79fb104480d9cd67bf85711fc939
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
[clang][test] Require x86 target for new Windows EH tests
Added by https://github.com/llvm/llvm-project/pull/144745.
These tests cause Clang -cc1 to generate the option
-x86-asm-syntax=intel, which is only available if you have
included the x86 target.
<<<<<<
1: clang: warning: argument unused during compilation: '-c' [-Wunused-command-line-argument]
label:38'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
label:38'1 ? possible intended match
2: clang (LLVM option parsing): Unknown command line argument '-x86-asm-syntax=intel'. Try: 'clang (LLVM option parsing) --help'
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3: clang (LLVM option parsing): Did you mean '--asan-stack=intel'?
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>
Commit: 2a5cd50c469891a0bc918b42785cbf6fd6132a50
https://github.com/llvm/llvm-project/commit/2a5cd50c469891a0bc918b42785cbf6fd6132a50
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/test/ELF/loongarch-relax-tlsdesc.s
Log Message:
-----------
[lld][LoongArch] Support relaxation during TLSDESC GD/LD to IE/LE conversion (#123730)
Complement https://github.com/llvm/llvm-project/pull/123715. When
relaxation enable, remove redundant NOPs.
Commit: c295f050633ba4feb3e2ed74811b9c9d7add758d
https://github.com/llvm/llvm-project/commit/c295f050633ba4feb3e2ed74811b9c9d7add758d
Author: Aaron Danen <aaron.danen at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Improve error message on failed undos (#149396)
Updated error message logic for undo function. Throws different errors
for the case of there being nothing to undo, and for the case of
requesting more undos than there are operations to undo.
Fixes https://github.com/llvm/llvm-project/issues/143668
Commit: 61ce6d70a2fe309d65fe3b7db5b94c17067b9628
https://github.com/llvm/llvm-project/commit/61ce6d70a2fe309d65fe3b7db5b94c17067b9628
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmNeon/Transforms.h
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/Transforms/LowerContractToNeonPatterns.cpp
R mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
A mlir/test/Dialect/ArmNeon/vector-bfmmla.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Lower vector.contract to Neon FEAT_BF16 operations (#148198)
This builds upon the framework established by
https://github.com/llvm/llvm-project/pull/149810
to add lowering to `bfmmla`.
Commit: 77b1b956da234d3b3be31c4f04e6af3173b306a1
https://github.com/llvm/llvm-project/commit/77b1b956da234d3b3be31c4f04e6af3173b306a1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[LV] Also clamp MaxVF by trip count when maximizing vector bandwidth. (#149794)
Also clamp the max VF when maximizing vector bandwidth by the maximum
trip count. Otherwise we may end up choosing a VF for which the vector
loop never executes.
PR: https://github.com/llvm/llvm-project/pull/149794
Commit: 36c37b019b5daae79785e8558d693e6ec42b0ebd
https://github.com/llvm/llvm-project/commit/36c37b019b5daae79785e8558d693e6ec42b0ebd
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
Log Message:
-----------
[flang][OpenMP] Restore reduction processor behavior broken by #145837 (#150178)
Fixes #149089 and #149700.
Before #145837, when processing a reduction symbol not yet supported by
OpenMP lowering, the reduction processor would simply skip filling in
the reduction symbols and variables. With #145837, this behvaior was
slightly changed because the reduction symbols are populated before
invoking the reduction processor (this is more convenient to shared the
code with `do concurrent`).
This PR restores the previous behavior.
Commit: 3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
https://github.com/llvm/llvm-project/commit/3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
Log Message:
-----------
[NFC][Clang][FMV] Make FMV priority data type future proof. (#150079)
FMV priority is the returned value of a polymorphic function. On RISC-V
and X86 targets a 32-bit value is enough. On AArch64 we currently need
64 bits and we will soon exceed that. APInt seems to be a suitable
replacement for uint64_t, presumably with minimal compile time overhead.
It allows bit manipulation, comparison and variable bit width.
Commit: 2726b7fb1c0768bf404a712e5940b64db9fed5e1
https://github.com/llvm/llvm-project/commit/2726b7fb1c0768bf404a712e5940b64db9fed5e1
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Event.td
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/event/olDestroyEvent.cpp
A offload/unittests/OffloadAPI/event/olSyncEvent.cpp
R offload/unittests/OffloadAPI/event/olWaitEvent.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
A offload/unittests/OffloadAPI/queue/olSyncQueue.cpp
R offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
Log Message:
-----------
[Offload] Rename olWaitEvent/Queue to olSyncEvent/Queue (#150023)
This more closely matches the nomenclature used by CUDA, AMDGPU and
the plugin interface.
Commit: ffdada166689172e54bd664ff3e43c824c22c69b
https://github.com/llvm/llvm-project/commit/ffdada166689172e54bd664ff3e43c824c22c69b
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Add loan expiry analysis (#148712)
This PR adds the `ExpiredLoansAnalysis` class to track which loans have expired. The analysis uses a dataflow lattice (`ExpiredLattice`) to maintain the set of expired loans at each program point.
This is a very light weight dataflow analysis and is expected to reach fixed point in ~2 iterations.
In principle, this does not need a dataflow analysis but is used for convenience in favour of lean code.
Commit: 5de443a4d37e1b7580f9ccee389572aef7233a85
https://github.com/llvm/llvm-project/commit/5de443a4d37e1b7580f9ccee389572aef7233a85
Author: Andrey Karlov <dein.negativ at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
Log Message:
-----------
[clang-tidy] Make copy-and-swap idiom more general for `bugprone-unhandled-self-assignment` (#147066)
This change enhances the `bugprone-unhandled-self-assignment` checker by
adding an additional matcher that generalizes the copy-and-swap idiom
pattern detection.
# What Changed
Added a new matcher that checks for:
- An instance of the current class being created in operator=
(regardless of constructor arguments)
- That instance being passed to a `swap` function call
# Problem Solved
This fix reduces false positives in PMR-like scenarios where "extended"
constructors are used (typically taking an additional allocator
argument). The checker now properly recognizes copy-and-swap
implementations that use extended copy/move constructors instead of
flagging them as unhandled self-assignment cases.
Fixes #146324
---------
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
https://github.com/llvm/llvm-project/commit/a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Optimize stripAndAccumulateConstantOffsets() for common case (NFC)
For the common case where we don't have bit width changing address
space casts, we can directly call accumulateConstantOffset() on the
original Offset. Skip the bit width reconciliation logic in that
case.
Commit: 33455825428f9e1b7998a66e228da7f6d483acf8
https://github.com/llvm/llvm-project/commit/33455825428f9e1b7998a66e228da7f6d483acf8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vec_extract.ll
Log Message:
-----------
[X86] getTargetConstantBitsFromNode - early-out if the element bitsize doesn't align with the source bitsize (#150184)
As we use getTargetConstantBitsFromNode in a wider variety of places we can't guarantee that all the sources match (or are legal) anymore - better to early out than assert.
Fixes #150117
Commit: 756ac65987b84b7427c25d76f069a04a4a817a5c
https://github.com/llvm/llvm-project/commit/756ac65987b84b7427c25d76f069a04a4a817a5c
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Passes/PassBuilder.cpp
A llvm/test/CodeGen/AMDGPU/finalizebundle.mir
Log Message:
-----------
[CodeGen] Add a pass for testing finalizeBundle (#149813)
This allows for unit testing of finalizeBundle with standard MIR tests
using update_mir_test_checks.py.
Commit: d449d3dc13daff388cbf6a7bb910e0511804eb84
https://github.com/llvm/llvm-project/commit/d449d3dc13daff388cbf6a7bb910e0511804eb84
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
Log Message:
-----------
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
Replace its only use in the AMDGPU R600 backend with a call to
finalizeBundles.
Commit: 283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
https://github.com/llvm/llvm-project/commit/283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Use get() to get raw pointer (#150205)
Fix issue reported in #150136. `createAllocatable` returns an OwingPtr.
Use `get()` to get the raw pointer has it is done in the
`flang-rt/unittests/Runtime/CUDA/Memory.cpp` tests.
Commit: f992ae4fd16357116b341a1c8291b970787dc462
https://github.com/llvm/llvm-project/commit/f992ae4fd16357116b341a1c8291b970787dc462
Author: Luke Drummond <luke.drummond at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/tools/bugpoint/bugpoint.cpp
M polly/include/polly/LinkAllPasses.h
Log Message:
-----------
Slightly improve the getenv("bar") linking problem
There's been a variation of the following in the code since 2005:
if (unoptimizable_true)
return;
use_this_symbol_to_force_linking(); // unreachable but never removed
Way back in 00d5508496c it was the win32 call `GetCurrentProcess`
but switched to `getenv("bar")` fairly soon after in 63e504ff43. While
that pulled in fewer dependencies and made the code portable, it's a
bit of a weird construct. The environment variable used for the `getenv`
call is "bar", which is particularly weird to see fly past when you run
`ltrace` on a binary linked against LLVM.
In this patch I don't try to replace this construct wholesale - it's
still required for architectural reasons I'm not able to tackle right
now, but I did try and make it slightly less weird and opaque:
- It gives the construct a name
- The environment variable hints where this comes from and that its
value is ignored
Combined, this should be a bit of improvement for the next person who
wonders what LLVM is up to when they trace their process or see
smatterings of `getenv("bar")` dotted around the source.
Commit: 3affbce84342a80a0d869720353786d0db62ff4b
https://github.com/llvm/llvm-project/commit/3affbce84342a80a0d869720353786d0db62ff4b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix a crash on invalid concept (#150186)
Fixes #149986
Commit: cc380f6e9ba48bfc7fad932d3031141ca88dde53
https://github.com/llvm/llvm-project/commit/cc380f6e9ba48bfc7fad932d3031141ca88dde53
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
Log Message:
-----------
[LLDB] Add formatters for MSVC STL map-like types (#148385)
This PR adds formatters for `std::map`, `std::set`, `std::multimap`,
`std::multiset` as well as their iterators. It's done in one PR because
the types are essentially the same (a tree) except for their value type.
The iterators are required because of the tests.
`MsvcStlTreeIterSyntheticFrontEnd` is based on the libc++ equivalent. As
opposed to `std::list`, there aren't that many duplicates, so I didn't
create a generic type.
For reference, the tree is implemented in
https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xtree.
Towards #24834.
Commit: 411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
https://github.com/llvm/llvm-project/commit/411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port cc380f6e9ba4
Commit: d65cc97ab1bdc61b22e853f3882c9ba267764e53
https://github.com/llvm/llvm-project/commit/d65cc97ab1bdc61b22e853f3882c9ba267764e53
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Fix build on 32-bit platforms after #125556
Commit: 114d74e39151ea60afd211a307011f3943ecc9a9
https://github.com/llvm/llvm-project/commit/114d74e39151ea60afd211a307011f3943ecc9a9
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Expand VPBlendRecipes to select instructions. NFC (#133993)
When looking at some EVL tail folded code in SPEC CPU 2017 I noticed we
sometimes have both VPBlendRecipes and select VPInstructions in the same
plan:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
BLEND ir<%8> = ir<%n.015> ir<%foo>/vp<%8>
EMIT vp<%9> = select vp<%active.lane.mask>, ir<%8>, ir<%n.015>
Since a blend will ultimately generate a chain of selects, we could fold
the blend into the select:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
EMIT ir<%8> = select vp<%8>, ir<%foo>, ir<%n.015>
So as a first step, this patch expands blends to a series of select
instructions, which may allow them to be simplified further with other
select instructions.
Commit: bdd638a89763046d9cbd8493c8801ef0898c8555
https://github.com/llvm/llvm-project/commit/bdd638a89763046d9cbd8493c8801ef0898c8555
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Remove handling for lifetime intrinsic on non-alloca (NFC)
After #149310 this is guaranteed to be an alloca.
Commit: 18edd82716a710e40cbed3bd81b8c9e64060c171
https://github.com/llvm/llvm-project/commit/18edd82716a710e40cbed3bd81b8c9e64060c171
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll
Log Message:
-----------
[Inline] Regenerate test checks (NFC)
Do not omit check lines for any functions, to avoid spurious diffs
on regeneration. Also update to a newer UTC version which properly
generates the metadata checks.
Commit: 2147e29f641f22822e2b0e10c978b28b06db1aeb
https://github.com/llvm/llvm-project/commit/2147e29f641f22822e2b0e10c978b28b06db1aeb
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Tests for unnecessary S_WAIT_XCNT insertion (#145688)
Hardware does an implicit "S_WAIT_XCNT 0" between SMEM and VMEM
instructions, so there will never be outstanding address translations
for both SMEM and VMEM at the same time.
Commit: efa25c4737440887772e6c6ed72029afa0bf05ca
https://github.com/llvm/llvm-project/commit/efa25c4737440887772e6c6ed72029afa0bf05ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Clang] Fix new driver device only compilation for `amdgcnspirv` target (#150110)
Summary:
This is broken with the current target because it was not bundling the
output as HIP likes and this would fail if targeting both at the same
time.
Commit: 01e23c3d626c30000820465f029793e44e2062e4
https://github.com/llvm/llvm-project/commit/01e23c3d626c30000820465f029793e44e2062e4
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
Log Message:
-----------
[HIPSTDPAR] Add support for globals (#146813)
This (mostly) removes one of the largest remaining limitations of
`hipstdpar` based algorithm acceleration, by adding support for global
variable usage in offloaded algorithms. It is mean to compose with a run
time component that will live in the support library, and fires iff a
special variable is provided by the latter. In short, things work as
follows:
- We replace uses some global `G` with an indirect access via an
implicitly created anonymous global `F`, which is of pointer type and is
expected to hold the program-wide address of `G`;
- We append 'F', alongside 'G''s name, to an table structure;
- At run-time, the support library uses the table to look-up the
program-wide address of a contained symbol based on its name, and then
stores the address via the paired pointer.
This doesn't handle internal linkage symbols (`static foo` or `namespace
{ foo }`) if they are not unique i.e. if there's a name clash that is
solved by the linker, as the resolution would not be visible. Also,
initially we will only support "true" globals in RDC mode. Things would
be much simpler if we had direct access to the accelerator loader, but
since the expectation is to compose at the HIP RT level we have to jump
through additional hoops.
Commit: 6ed921f9675b7f1bb840f115d81cede4d182cdc2
https://github.com/llvm/llvm-project/commit/6ed921f9675b7f1bb840f115d81cede4d182cdc2
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
Log Message:
-----------
Reland "[mlir][vector] Use vector.broadcast in place of vector.splat" (#150138)
This reverts commit 228c45f13dc92546661b6825b7b32c3808b0d2eb (PR
#148937) . Now that #148027 is landed, I think it is safe to "reland"
the original PR: #148028
Commit: 2c6eec219d7791cb083d8add242f0b1d2a0e3160
https://github.com/llvm/llvm-project/commit/2c6eec219d7791cb083d8add242f0b1d2a0e3160
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/GVN/lifetime-simple.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/NewGVN/verify-memoryphi.ll
M llvm/test/Transforms/SROA/alloca-address-space.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/ignore-droppable.ll
M llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/invoke_unwind_lifetime.ll
Log Message:
-----------
[Tests] Avoid lifetime intrinsics on non-allocas (NFC)
Don't rely on auto-upgrade, instead either remove unnecessary
casts or remove no longer applicable tests.
Commit: 081b74caf5fbfe04abc372c453cb1d6fc8f781a7
https://github.com/llvm/llvm-project/commit/081b74caf5fbfe04abc372c453cb1d6fc8f781a7
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/sequence.c
A offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
Log Message:
-----------
[Offload] Add olWaitEvents (#150036)
This function causes a queue to wait until all the provided events have
completed before running any future scheduled work.
Commit: 43db6c5cc1a81b540ddca49bee197895c420ec2d
https://github.com/llvm/llvm-project/commit/43db6c5cc1a81b540ddca49bee197895c420ec2d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A flang/include/flang/Parser/openmp-utils.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] General utility to get directive id from AST node (#150121)
Fortran::parser::omp::GetOmpDirectiveName(t) will get the
OmpDirectiveName object that corresponds to construct t. That object (an
AST node) contains the enum id and the source information of the
directive.
Replace uses of extractOmpDirective and getOpenMPDirectiveEnum with the
new function.
Commit: 8e072b9d495293b08d939c880d185025751b4269
https://github.com/llvm/llvm-project/commit/8e072b9d495293b08d939c880d185025751b4269
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
Log Message:
-----------
[sanitizer_common][nfc] Rename `tid_t` to avoid conflicting declarations (#149011)
`tid_t` is also defined in the AIX header `/usr/include/sys/types.h`
which is included by system `pthread.h`. The use of `tid_t` by AIX is
conforming according to
[POSIX](https://pubs.opengroup.org/onlinepubs/9799919799/functions/V2_chap02.html):
> Implementations may add symbols to the headers shown in the following
table [ ... ]
Commit: f1bb5de611922bfd76846d0b36a9b92a1dfce80e
https://github.com/llvm/llvm-project/commit/f1bb5de611922bfd76846d0b36a9b92a1dfce80e
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/tanpi.f90
Log Message:
-----------
[flang] Implement `tanpi` (#149527)
Commit: 594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
https://github.com/llvm/llvm-project/commit/594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math][c++23] Implement comparison operations operator overloads for BFloat16 (#150087)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: fc0a978327215aa8883ae6f18d1e316f3c04520a
https://github.com/llvm/llvm-project/commit/fc0a978327215aa8883ae6f18d1e316f3c04520a
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/assign-statement.f90
Log Message:
-----------
[Flang] Fix ASSIGN statement (#149941)
Handle the case where the assigned variable also has a pointer
attribute.
Fixes #121721
Commit: 8fff238b2c363b036ce9e7bf7abab3acafc87ab2
https://github.com/llvm/llvm-project/commit/8fff238b2c363b036ce9e7bf7abab3acafc87ab2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/EmptyOpPatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/ExtractSliceFromReshapeUtils.cpp
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Tensor/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
https://github.com/llvm/llvm-project/commit/c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/IO.cpp
A flang/test/Lower/equivalence-3.f
Log Message:
-----------
[Flang] Fix a crash when equivalence and namelist statements are used (#150081)
Check for equivalence when generating namelist descriptors in IO.cpp.
Fixes #124489
Commit: 72df5464eda2c0986200a4bfb30e086ee59fe1d6
https://github.com/llvm/llvm-project/commit/72df5464eda2c0986200a4bfb30e086ee59fe1d6
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math] Remove constexpr from bfloat16 comparison operations (#150227)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: dfd3935e4ff72ab85bab758e297f93e04f8effed
https://github.com/llvm/llvm-project/commit/dfd3935e4ff72ab85bab758e297f93e04f8effed
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add regbanklegalize rules for uniform global loads (#145909)
Commit: 9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
https://github.com/llvm/llvm-project/commit/9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[VPlan] Mark VPInstruction::ExplicitVectorLength as single scalar. NFC (#150221)
This allows it to be broadcasted without an explicit
VPInstruction::Broadcast in #150202
Commit: 5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
https://github.com/llvm/llvm-project/commit/5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
Log Message:
-----------
AMDGPU/GlobalISel: Add tests for missing readanylane combines (#145910)
Commit: 933ba273063f5a4289f0fce109f8f8c17124aa41
https://github.com/llvm/llvm-project/commit/933ba273063f5a4289f0fce109f8f8c17124aa41
Author: Martin Wehking <martin.wehking at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/AArch64/neon-intrinsics.c
Log Message:
-----------
Fix implicit vector conversion (#149970)
Previously, the unsigned NEON intrinsic variants of 'vqshrun_high_n' and
'vqrshrun_high_n' were using signed integer types for their first
argument and return values.
These should be unsigned according to developer.arm.com, however.
Adjust the test cases accordingly.
Commit: 4bdef46fe89a3359a2eec631c0f6722a736aae0c
https://github.com/llvm/llvm-project/commit/4bdef46fe89a3359a2eec631c0f6722a736aae0c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
Log Message:
-----------
AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (#145911)
Commit: 3564cfa211e932e4a9d19096ead9a241539e6bb9
https://github.com/llvm/llvm-project/commit/3564cfa211e932e4a9d19096ead9a241539e6bb9
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
Commit: e0a48bb256ffa380d226d9cc50b29196ef587741
https://github.com/llvm/llvm-project/commit/e0a48bb256ffa380d226d9cc50b29196ef587741
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/rounding_mode.h
Log Message:
-----------
[libc] Make FPUtils' rounding_mode.h functions constexpr. (#149167)
Commit: 5ebbc258d4f410c45f247eb53bc722798b4d4f45
https://github.com/llvm/llvm-project/commit/5ebbc258d4f410c45f247eb53bc722798b4d4f45
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
Log Message:
-----------
[mlir][ArithToAMDGPU][NFC] Add PatternBenefit (#150091)
Since there may be caseses where these patterns are run alongside the
generic patterns from ArithExpandOps, add a PatternBenefit argument to
allow these architecture-specific patterns to be prioritized.
Commit: d2dedcd11f51c23d8401b7e5eff11b23faea652b
https://github.com/llvm/llvm-project/commit/d2dedcd11f51c23d8401b7e5eff11b23faea652b
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
A llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Delete empty autoreleasepools with no autoreleases in them (#144788)
Erase empty autorelease pools that have no autorelease in them
Commit: 38a977d00c4e22f4a2a21e5f577c57df2053872e
https://github.com/llvm/llvm-project/commit/38a977d00c4e22f4a2a21e5f577c57df2053872e
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Interpreter/fail.cpp
Log Message:
-----------
[clang-repl] Always clean up scope and context for TopLevelStmtDecl (#150215)
This fixes an issue introduced by
https://github.com/llvm/llvm-project/pull/84150, where failing to pop
compound scope, function scope info, and decl context after a failed
statement could lead to an inconsistent internal state.
Commit: 06233892e84f96a3b4e05338cd4f6c12b8f5a185
https://github.com/llvm/llvm-project/commit/06233892e84f96a3b4e05338cd4f6c12b8f5a185
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mv8plus on 32-bit Solaris/SPARC (#150176)
While investigating PR #149990, I noticed that while both the Oracle
Studio compilers and GCC default to `-mv8plus` on 32-bit Solaris/SPARC,
Clang does not.
This patch fixes this by enabling the `v8plus` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: 97eec759e69e7534e020b4e2ad1858842eec50ee
https://github.com/llvm/llvm-project/commit/97eec759e69e7534e020b4e2ad1858842eec50ee
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/bitfields.c
Log Message:
-----------
[CIR] Add support for binary operations on bitfield members (#149676)
This PR introduces support for binary operations on bitfield members.
Commit: f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
https://github.com/llvm/llvm-project/commit/f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Fold icmp of gep chains (#146714)
This extends https://github.com/llvm/llvm-project/pull/144065 to the
general case of an icmp between two GEP chains that have a common base.
Commit: d5c8303af86f8f4f50320b831c027df4febcd5ea
https://github.com/llvm/llvm-project/commit/d5c8303af86f8f4f50320b831c027df4febcd5ea
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::deque (#150097)
This PR adds synthetic children for std::deque from MSVC's STL.
Similar to libstdc++ and libc++, the elements are in a `T**`, so we need
to "subscript" twice. The [NatVis for
deque](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/debugger/STL.natvis#L1103-L1112)
uses `_EEN_DS` which contains the block size. We can't access this, but
we can access the [constexpr
`_Block_size`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/deque#L641).
Towards #24834.
Commit: 05f0dd2e917e90579ac49f94b29d12099d489efd
https://github.com/llvm/llvm-project/commit/05f0dd2e917e90579ac49f94b29d12099d489efd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port d5c8303af86f
Commit: dbc63f1e3724b6f2348c431dc1216537d9c042e8
https://github.com/llvm/llvm-project/commit/dbc63f1e3724b6f2348c431dc1216537d9c042e8
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
A mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` into `amdgpu.gather_to_lds` (#149851)
This PR adds a new optimization pass to fold
`memref.subview/expand_shape/collapse_shape` ops into consumer
`amdgpu.gather_to_lds` operations.
* Implements a new pass `AmdgpuFoldMemRefOpsPass` with pattern
`FoldMemRefOpsIntoGatherToLDSOp`
* Adds corresponding folding tests
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 7dcd90df454e47a8db17c5ec956222e6b7858945
https://github.com/llvm/llvm-project/commit/7dcd90df454e47a8db17c5ec956222e6b7858945
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
[lld][ELF] Allow `data.rel.ro.hot` and `.data.rel.ro.unlikely` to be RELRO (#148920)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition a static data section (like `.data.rel.ro`) into
two sections, one grouping the cold ones and the other grouping the
rest.
lld requires all relro sections to be contiguous. To place
`.data.rel.ro.unlikely` in the middle of all relro sections, this change
proposes to add `.data.rel.ro.unlikely` explicitly as RELRO section.
---------
Co-authored-by: Sam Elliott <quic_aelliott at quicinc.com>
Commit: 97faab7bc279516a31001621203f4ff5a158ed13
https://github.com/llvm/llvm-project/commit/97faab7bc279516a31001621203f4ff5a158ed13
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Lower/Bridge.cpp:2128:10: error: unused variable 'result'
[-Werror,-Wunused-variable]
Commit: f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
https://github.com/llvm/llvm-project/commit/f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[NFC][AMDGPU] Re-run update_test_checks over some tests (#150231)
Commit: a7867fcd94555fb056bcaac66de45d4635da99bf
https://github.com/llvm/llvm-project/commit/a7867fcd94555fb056bcaac66de45d4635da99bf
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
A llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[FileCheck] Limit quadratic partial-match search behavior (#147833)
Commit: 56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
https://github.com/llvm/llvm-project/commit/56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add transformation pattern for vector.broadcast in Wg to Sg pass (#144417)
This PR adds transformation pattern for vector.broadcast op in
xegpu-wg-to-sg-distribute pass
Commit: 10c38943a074033143cfb86118e4e6251db97e9a
https://github.com/llvm/llvm-project/commit/10c38943a074033143cfb86118e4e6251db97e9a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Refactor the tablegen classes for P-ext shift instructions. NFC (#150175)
-Rename based on element size suffix rather than immediate size.
-Use _ri suffix like we do for shifts in the base ISA.
-Push some common code to the base class.
-Use shamt for the field name to enable more sharing.
-Add funct3 as a parameter which we'll need for right shifts.
Commit: b0434925c98c9a8906afea60a1304c870b1f574a
https://github.com/llvm/llvm-project/commit/b0434925c98c9a8906afea60a1304c870b1f574a
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (4/n) (#149879)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 4471d59a10f70b502b036f57f4728f2411442fc4
https://github.com/llvm/llvm-project/commit/4471d59a10f70b502b036f57f4728f2411442fc4
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/acospi.f90
Log Message:
-----------
[flang] Implement `acospi` (#150234)
Commit: 01b23c8d81662ed8383df78c2de0ea100d92d503
https://github.com/llvm/llvm-project/commit/01b23c8d81662ed8383df78c2de0ea100d92d503
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/asinpi.f90
Log Message:
-----------
[flang] Implement `asinpi` (#150238)
Commit: 90944b85c5331a4cf8b720b5a966bc2c735499d7
https://github.com/llvm/llvm-project/commit/90944b85c5331a4cf8b720b5a966bc2c735499d7
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add offset operands to load_nd/store_nd/prefetch_nd (#149424)
This PR allows load_nd/store_nd/prefetch_nd to take an additional offset
operand.
It is based on this PR https://github.com/llvm/llvm-project/pull/148335.
Now user can create a nd_tdesc with no offset, and instead set the
offset with the load_nd operation.
Commit: f97adea477069e57422a2446162fe41feb4e1277
https://github.com/llvm/llvm-project/commit/f97adea477069e57422a2446162fe41feb4e1277
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-data-section-prefix.s
R lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
ELF: Simplify isRelRoDataSection and rename the text file
PR #148920 was merged before I could share my comments.
* Fix the text filename. There are other minor suggestions, but can be
done in #148985
* Make `isRelRoDataSection` concise, to be consistent with the majority of
helper functions.
Commit: 317dae1a7e5fb81038177d8c58ee1e376d50ea5c
https://github.com/llvm/llvm-project/commit/317dae1a7e5fb81038177d8c58ee1e376d50ea5c
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
Log Message:
-----------
[mlir][xegpu] Add initial skeleton implementation for lowering ConvertLayoutOp (#146176)
This PR adds initial skeleton implementation for lowering
ConvertLayoutOp. It currently only supports cases where SLM is not
needed.
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: 5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
https://github.com/llvm/llvm-project/commit/5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
Author: Fazlay Rabbi <106703039+mdfazlay at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
Log Message:
-----------
[OpenMP 6.0] Allow only byref arguments with `need_device_addr` modifier on `adjust_args` clause (#149586)
If the need_device_addr adjust-op modifier is present, each list item
that appears in the clause must refer to an argument in the declaration
of the function variant that has a reference type.
Reference:
OpenMP 6.0 [Sec 9.6.2, page 332, line 31-33, adjust_args clause,
Restrictions]
Commit: d174743674fe06833a79d59e9ffcffb3048de524
https://github.com/llvm/llvm-project/commit/d174743674fe06833a79d59e9ffcffb3048de524
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150087 and #144983 (#150255)
Commit: ce9d515813f8e1fe8578a3f889abe5325250309e
https://github.com/llvm/llvm-project/commit/ce9d515813f8e1fe8578a3f889abe5325250309e
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Commit: 9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
https://github.com/llvm/llvm-project/commit/9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
R mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
Revert "[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` in… (#150256)
…to `amdgpu.gather_to_lds` (#149851)"
This reverts commit dbc63f1e3724b6f2348c431dc1216537d9c042e8.
Having build deps issue.
Commit: e3b79afa673a029b3b6f546ba59d2998f9cff681
https://github.com/llvm/llvm-project/commit/e3b79afa673a029b3b6f546ba59d2998f9cff681
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[WebAssembly,llvm] Fix buildbot problems with llvm.wasm.ref.test.func (#150116)
PR #147486 broke the sanitizer and expensive-checks buildbot.
These captures were needed when toWasmValType emitted a diagnostic but
are no longer needed since we changed it to an assertion failure. This
removes the unneeded captures and should fix the sanitizer-buildbot.
I also fixed the codegen in the wasm64 target: table.get requires an i32
but in wasm64 the function pointer is an i64. We need an additional
`i32.wrap_i64` to convert it. I also added `-verify-machineinstrs` to
the tests so that the test suite validates this fix.
Finally, I noticed that #150201 uses a feature of the intrinsic that is
not covered by the tests, namely `ptr` arguments. So I added one
additional test case to ensure that it works properly.
cc @dschuff
Commit: 30a6644ffbc479a9a75f840e48dc42aa29f377e5
https://github.com/llvm/llvm-project/commit/30a6644ffbc479a9a75f840e48dc42aa29f377e5
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[Interp] Mark the test unsupported with Asan (#150242)
See https://github.com/llvm/llvm-project/pull/148701
The test is very flaky with asan
Fail: https://lab.llvm.org/buildbot/#/builders/52/builds/9890
Pass: https://lab.llvm.org/buildbot/#/builders/52/builds/9891
Fail again: https://lab.llvm.org/buildbot/#/builders/52/builds/9892
Commit: 108023b7b16297291553650ea6aea809bd7eb78b
https://github.com/llvm/llvm-project/commit/108023b7b16297291553650ea6aea809bd7eb78b
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
Revert "[test][FileCheck] Disable color output in FileCheck test. NFC"
This reverts commit ce9d515813f8e1fe8578a3f889abe5325250309e.
I applied it to the wrong FileCheck invocation.
Commit: 9a12037c573e884b8f027654b56a6151bd5c0a56
https://github.com/llvm/llvm-project/commit/9a12037c573e884b8f027654b56a6151bd5c0a56
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Second try, applied it to the wrong FileCheck invocation last time:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109427750
Commit: 7baf4bdd164cad61f8f3e34ed833a695c4033250
https://github.com/llvm/llvm-project/commit/7baf4bdd164cad61f8f3e34ed833a695c4033250
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
[llvm] Add CalleeTypeIds field to CallSiteInfo
Introducing `EnableCallGraphSection` target option to add
CalleeTypeIds field in CallSiteInfo. Read the callee type ids
in and out by the MIR parser/printer.
Reviewers: ilovepi
Reviewed By: ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/87574
Commit: 8ef0c50ecac8f1e707c02bee855f43eda114f8db
https://github.com/llvm/llvm-project/commit/8ef0c50ecac8f1e707c02bee855f43eda114f8db
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/macros/attributes.h
Log Message:
-----------
[libc] Fix problem with older compilers that do not have __has_builtin. (#150264)
Fixing bot failures:
https://lab.llvm.org/buildbot/#/builders/10/builds/10025
Commit: e67f3237d6242d1c362fa52e782ddfd5ae54a8af
https://github.com/llvm/llvm-project/commit/e67f3237d6242d1c362fa52e782ddfd5ae54a8af
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
Log Message:
-----------
[mlir][armsme][vector] Replace splat with broadcast (#148024)
Part of deprecation of vector.splat
RFC: https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: eb817c7950d3f7b555034a983240a11b8c693dc4
https://github.com/llvm/llvm-project/commit/eb817c7950d3f7b555034a983240a11b8c693dc4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/complex-cast.cpp
Log Message:
-----------
[CIR] Upstream Cast kinds for ComplexType (#149717)
This change adds support for cast kinds for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 32c985485500b214d57cb25306734eb73833d59b
https://github.com/llvm/llvm-project/commit/32c985485500b214d57cb25306734eb73833d59b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
A flang/test/Transforms/external-name-interop-symref-array.fir
Log Message:
-----------
[flang] Extend symbol update to ArrayAttrext in `external-name-interop` (#150061)
In the `external-name-interop` pass, when a symbol is changed, all the
uses of the renamed symbols should also be updated. The update was only
applied to the `SymbolRefAttr` type. With this change, the update will
be applied to `ArrayAttr` containing elements of type `SymbolRefAttr`.
---------
Co-authored-by: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Commit: 81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
https://github.com/llvm/llvm-project/commit/81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Add packed fp32 instructions for gfx1250 (#150253)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
https://github.com/llvm/llvm-project/commit/5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
Log Message:
-----------
[ASan][Darwin][GCD] Add interceptor for dispatch_apply (#149238)
ASan had a gap in coverage for wqthreads blocks submitted by
dispatch_apply
This adds interceptor for dispatch_apply and dispatch_apply_f and adds a
test that a failure in a dispatch apply block contains thread and stack
info.
rdar://139660648
Commit: e89e678839f48d54dc906e8ebed370a6e304083e
https://github.com/llvm/llvm-project/commit/e89e678839f48d54dc906e8ebed370a6e304083e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
R llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
R llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
A llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
Log Message:
-----------
[test] Split SDNodeInfoEmitter tests into multiple files
To simplify updating.
Commit: a36508483e1a36612175500d2dc4754f9aadacc2
https://github.com/llvm/llvm-project/commit/a36508483e1a36612175500d2dc4754f9aadacc2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][python,CAPI] expose Op::isBeforeInBlock (#150271)
Commit: fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
https://github.com/llvm/llvm-project/commit/fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
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M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
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M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
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M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
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M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
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M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
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M llvm/test/CodeGen/AMDGPU/local-atomics.ll
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M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
Log Message:
-----------
[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMDGPU/*.ll` (#150024)
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
Commit: f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
https://github.com/llvm/llvm-project/commit/f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/test/MC/ELF/AArch64/cfi.s
M llvm/test/MC/ELF/cfi.s
Log Message:
-----------
Support SFrame command-line and .cfi_section syntax (#149935)
This PR adds support for the llvm-mc command-line flag "--gsframe" and
adds ".sframe" to the legal values passed ".cfi_section". It plumbs the
option through the cfi handling code a fair amount. Code to support
actual section generation follows in a future PR.
These options match the gnu-assembler's support syntax for sframes, on
both the command line and in assembly files.
First in a series of changes that will allow llvm-mc to produce sframe
.cfi sections. For more information about sframes, see
https://sourceware.org/binutils/docs-2.44/sframe-spec.html
and the llvm-RFC here:
https://discourse.llvm.org/t/rfc-adding-sframe-support-to-llvm/86900
Commit: 45d99c26c3513945a454e90b69d48257886f8284
https://github.com/llvm/llvm-project/commit/45d99c26c3513945a454e90b69d48257886f8284
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] In 6.0, can omit length in array section (#148048)
In OpenMP 6.0 specification, section 5.2.5 Array Sections, page 166,
lines 28-28:
When the length is absent and the size of the dimension is not known,
the array section is an assumed-size array.
Testing
- Updated LIT test
- check-all
- OpenMP_VV (formerly sollve) test case
tests/6.0/target/test_target_assumed_array_size.c
Commit: 65dec9956273309158f3feba6ea8f150ce995a2a
https://github.com/llvm/llvm-project/commit/65dec9956273309158f3feba6ea8f150ce995a2a
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for subgroup_id_range (#148661)
This PR adds a new attribute to the xegpu dialect called xegpu.range.
One use case of this attribute can be to attach subgroup_id_range to
scf.if of to drive the execution.
Commit: 6a9817113838a3f87e803ac71aab46b3ccf24686
https://github.com/llvm/llvm-project/commit/6a9817113838a3f87e803ac71aab46b3ccf24686
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy] Speed up `misc-header-include-cycle` (#148757)
Performance optimization of misc-header-include-cycle
based on clangd test on Sema.cpp. Check were slow due
calls to SM.translateFile. Cost reduction (+-) from 11% to 3%.
Commit: df1dd803b6a1b1dd514da5e7c1257c0b75592452
https://github.com/llvm/llvm-project/commit/df1dd803b6a1b1dd514da5e7c1257c0b75592452
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Cache the most recently used slot for a chunk size (#149751)
Summary:
This patch changes the `find_slab` logic to simply cache the most
successful slot. This means the happy fast path is now a single atomic
load on this index. I removed the SIMT shuffling logic that did slab
lookups wave-parallel. Here I am considering the actual traversal to be
comparatively unlikely, so it's not overly bad that it takes longer.
ideally one thread finds a slot and shared it with the rest so we only
pay that cost once.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
https://github.com/llvm/llvm-project/commit/ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Search empty bits after failed allocation (#149910)
Summary:
The scheme we use to find a free bit is to just do a random walk. This
works very well up until you start to completely saturate the bitfield.
Because the result of the fetch_or yields the previous value, we can
search this to go to any known empty bits as our next guess. This
effectively increases our liklihood of finding a match after two tries
by 32x since the distribution is random.
This *massively* improves performance when a lot of memory is allocated
without freeing, as it now doesn't takea one in a million shot to fill
that last bit. A further change could improve this further by only
*mostly* filling the slab, allowing 1% to be free at all times.
Commit: 17e32c921acc856498ad13ade495374bed4605b2
https://github.com/llvm/llvm-project/commit/17e32c921acc856498ad13ade495374bed4605b2
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Prefix FileCheck test with %ProtectFileCheckOutput, per post-commit review feedback
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109470352
Commit: bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
https://github.com/llvm/llvm-project/commit/bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support packed bf16 instructions on gfx1250 (#150283)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 9d11accf95db0ed08bd3181c25dd75fc793d089d
https://github.com/llvm/llvm-project/commit/9d11accf95db0ed08bd3181c25dd75fc793d089d
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
A mlir/test/Dialect/SCF/if-cond-prop.mlir
Log Message:
-----------
[mlir] move if-condition propagation to a standalone pass (#150278)
This offers a significant speedup over running this as a
canonicalizaiton pattern, up to 10x improvement when running on large
(>100k operations) inputs coming from Polygeist.
It is also not clear whether this transformation is a reasonable
canonicalization as it performs non-local rewrites.
Commit: 07af7409997887883ab701acc2dc5659144b0cf2
https://github.com/llvm/llvm-project/commit/07af7409997887883ab701acc2dc5659144b0cf2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing parse headers deps (#150295)
I believe this is from #150087 and #144983, but I didn't confirm
specific commits.
Commit: df2d2d125beffb76d5c526a5661fbb11cbcff83b
https://github.com/llvm/llvm-project/commit/df2d2d125beffb76d5c526a5661fbb11cbcff83b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
A llvm/test/Transforms/PGOProfile/prof-verify-as-needed.ll
A llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
A llvm/test/Transforms/PGOProfile/prof-verify.ll
Log Message:
-----------
[PGO] Add ProfileInjector and ProfileVerifier passes (#147388)
Adding 2 passes, one to inject `MD_prof` and one to check its presence. A subsequent patch will add these (similar to debugify) to `opt` (and, eventually, a variant of this, to `llc`)
Tracking issue: #147390
Commit: 20a79027ca58bbde563f9a914e4ada71301eb50a
https://github.com/llvm/llvm-project/commit/20a79027ca58bbde563f9a914e4ada71301eb50a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port df2d2d125bef
Commit: 478130545bc41a8bb80304e5d931559a9d2b6171
https://github.com/llvm/llvm-project/commit/478130545bc41a8bb80304e5d931559a9d2b6171
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
Log Message:
-----------
[clang-tidy] Ignore pure-virtual in portability-template... (#150290)
Ignore pure virtual member functions in
portability-template-virtual-member-function check.
Those functions will be represented in vtable
as __cxa_pure_virtual or something similar.
Fixes #139031.
Commit: 4db2f3ac89b1e62af4893b647d77f3ab1f390066
https://github.com/llvm/llvm-project/commit/4db2f3ac89b1e62af4893b647d77f3ab1f390066
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc] refactor JSON for better Mustache compatibility (#149588)
This patch contains changes for the JSON generator that will enable compatibility with Mustache templates, like booleans to check for the existence and bounds of arrays to avoid duplication.
Commit: 6925caee4bbb4f1352a347c9c05c999e86a3c61e
https://github.com/llvm/llvm-project/commit/6925caee4bbb4f1352a347c9c05c999e86a3c61e
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[Docs][DirectX] Add relevant documentation of Root Signature (#149608)
This pr adds documentation of root signatures for reference of an LLVM
user.
The target audience is an LLVM user that wants to build a custom tool,
or front-end, that requires constructing a root signature part (RTS0)
for a `DXContainer`.
With that in mind, this pr adds documentation of the metadata
representation of root signatures implemented in LLVM and utilized in
Clang.
Commit: b7ba23f91512b2e703e21e693950dc6086bb51f0
https://github.com/llvm/llvm-project/commit/b7ba23f91512b2e703e21e693950dc6086bb51f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Rename RVPUnaryWUF to RVPUnary_ri for consistency. NFC
Commit: 23469688076b334dbcf796bb2079efebf6ddf62a
https://github.com/llvm/llvm-project/commit/23469688076b334dbcf796bb2079efebf6ddf62a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
Log Message:
-----------
[AMDGPU] Add V_ADD|SUB|MUL_U64 gfx1250 opcodes (#150291)
Commit: c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
https://github.com/llvm/llvm-project/commit/c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
A llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
Log Message:
-----------
[DirectX] Support ConstExpr GEPs (#150082)
- Fixes #150050
- Address the issue of many nested geps
- Check for ConstantExpr GEP if we see it check if it needs a global
replacement with a new type. Create the new constExpr Gep and set the
pointer operand to it. Finally cleanup and remove the old nested geps.
Commit: 898bba311f180ed54de33dc09e7071c279a4942a
https://github.com/llvm/llvm-project/commit/898bba311f180ed54de33dc09e7071c279a4942a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
[SLP]Initial support for copyable elements (non-schedulable only)
Adds initial support for copyable elements. This patch only models adds
and model copyable elements as add <element>, 0, i.e. uses identity
constants for missing lanes.
Only support for elements, which do not require scheduling, is added to
reduce size of the patch.
Fixed compile time regressions, updated release notes
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/140279
Commit: d1ff9713bddf98eb5b3b751ba53e3db896f424ca
https://github.com/llvm/llvm-project/commit/d1ff9713bddf98eb5b3b751ba53e3db896f424ca
Author: David Green <david.green at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/urem-lkk.ll
Log Message:
-----------
[AArch64][GISel] Add test coverage for urem-lkk.ll. NFC
Commit: 1206a6165e372c904566163d50911f30809185f3
https://github.com/llvm/llvm-project/commit/1206a6165e372c904566163d50911f30809185f3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Clang] Fix new driver HIP SPIR-V compilation in device only mode (#150309)
Summary:
This should emit LLVM-IR. Add to the extremely ugly if statement so that
this happens correctly.
Commit: 203ea0a97e827f68b406ca0f350e971a132e58b9
https://github.com/llvm/llvm-project/commit/203ea0a97e827f68b406ca0f350e971a132e58b9
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
A llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support V_PK_MAXIMUM3_F16 and V_PK_MINIMUM3_F16 on gfx1250 (#150307)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 34447efd4614cfc8f17aa5cb7305f76ebaf6eaf5
https://github.com/llvm/llvm-project/commit/34447efd4614cfc8f17aa5cb7305f76ebaf6eaf5
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Driver/offload-target.c
Log Message:
-----------
[clang][test] Specify value of `-fopenmp=libomp` for test. (#150301)
`libomp` is the default value when unconfigured in cmake, but llvm can
be configured to have `libgomp` be the default instead. Explicitly
specify this value so the test does not fail when it assumes libomp is
always the default.
Commit: 52499bbd90b13be8f1f95b980c13c0b044a1a049
https://github.com/llvm/llvm-project/commit/52499bbd90b13be8f1f95b980c13c0b044a1a049
Author: David Green <david.green at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/arith.ll
Log Message:
-----------
[ARM] Test all cost kinds in arith.ll. NFC
Commit: 6bc54a4874eeaddf2a1f7c75aed53d9d38ed313c
https://github.com/llvm/llvm-project/commit/6bc54a4874eeaddf2a1f7c75aed53d9d38ed313c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Make SPIR-V handling only for HIPSPRV
Commit: f443f561331dc54aaed6897f51d7632d62a5ea95
https://github.com/llvm/llvm-project/commit/f443f561331dc54aaed6897f51d7632d62a5ea95
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][Sema][NFC] Fixed incorrect assert messages in SemaOpenMP (#150305)
Commit: 49de210d24f616d8b4eff7656be9a27d7db5135d
https://github.com/llvm/llvm-project/commit/49de210d24f616d8b4eff7656be9a27d7db5135d
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/RPC/rpc_server.h
M libc/src/__support/macros/attributes.h
Log Message:
-----------
[libc] Add support for __builtin_is_constant_evaluated for GCC 9+. (#150322)
https://lab.llvm.org/buildbot/#/builders/10/builds/10047/steps/5/logs/stdio
Commit: 1b7aa4edda2b3020f0e10f5a34e707fcadc2587d
https://github.com/llvm/llvm-project/commit/1b7aa4edda2b3020f0e10f5a34e707fcadc2587d
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.c
Log Message:
-----------
[clang-repl] Disable new test after #148701 (#150294)
https://github.com/llvm/llvm-project/pull/148701 adds new tests.
However, these tests never pass on msan buildbots.
https://lab.llvm.org/buildbot/#/builders/94/builds/9132
https://lab.llvm.org/buildbot/#/builders/94/builds/9131
https://lab.llvm.org/buildbot/#/builders/94/builds/9130
Commit: ad36e4284d66c3609ef8675ef02ff1844bc1951d
https://github.com/llvm/llvm-project/commit/ad36e4284d66c3609ef8675ef02ff1844bc1951d
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/test/MC/ELF/AArch64/cfi.s
M llvm/test/MC/ELF/cfi.s
Log Message:
-----------
Revert "Support SFrame command-line and .cfi_section syntax (#149935)" (#150316)
This reverts commit f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78.
Commit: 71c06d7a5f99ef7039b024d75cbdcddd71872602
https://github.com/llvm/llvm-project/commit/71c06d7a5f99ef7039b024d75cbdcddd71872602
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Type.cpp
Log Message:
-----------
[IR] Remove unnecessary casts from IntegerType::get. NFC (#150299)
Commit: 9a563b08e20423d848e318e0a8891205bd673724
https://github.com/llvm/llvm-project/commit/9a563b08e20423d848e318e0a8891205bd673724
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Support V_PK_MIN3/MAX3_NUM_F16 on gfx1250 (#150326)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 21118dbbb8718313b2dc45a7913781750edea6e1
https://github.com/llvm/llvm-project/commit/21118dbbb8718313b2dc45a7913781750edea6e1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Log Message:
-----------
[AsmPrinter] Remove an unnecessary cast (NFC) (#150257)
getTag already returns dwarf::Tag.
Commit: 31281da34b7f1445ce9e39bbb8707f4eacd24e58
https://github.com/llvm/llvm-project/commit/31281da34b7f1445ce9e39bbb8707f4eacd24e58
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[Analysis] Drop const from return types (NFC) (#150258)
We don't need const on APFloat.
Commit: 3e53d4d386626d78bf930307f0a65b6aebb48ee9
https://github.com/llvm/llvm-project/commit/3e53d4d386626d78bf930307f0a65b6aebb48ee9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFExpression.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
Log Message:
-----------
[llvm] Remove unused includes (NFC) (#150265)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: 0925d7572acee311bf596db294bc818536722150
https://github.com/llvm/llvm-project/commit/0925d7572acee311bf596db294bc818536722150
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineParallelize.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/IRDL/IRDLVerifiers.cpp
M mlir/lib/Dialect/Index/IR/InferIntRangeInterfaceImpls.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/Transforms/ReifyResultShapes.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
Log Message:
-----------
[mlir] Remove unused includes (NFC) (#150266)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: 9d9d971f71d3659cca7b5076b7cc8861bad176bd
https://github.com/llvm/llvm-project/commit/9d9d971f71d3659cca7b5076b7cc8861bad176bd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[llvm] Proofread AMDGPUUsage.rst (#150273)
Commit: 6d90715019d54376523163a7e1d588e1068cfca2
https://github.com/llvm/llvm-project/commit/6d90715019d54376523163a7e1d588e1068cfca2
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/enum-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/assets/namespace-template.mustache
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/mustache-index.cpp
M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
M clang-tools-extra/unittests/clang-doc/HTMLMustacheGeneratorTest.cpp
Log Message:
-----------
[clang-doc] integrate JSON as the source for Mustache templates (#149589)
This patch integrates JSON as the source to generate HTML Mustache templates. The Mustache generator calls the JSON generator and reads JSON files on the disk to produce HTML serially.
Commit: 11d97b3b58687bf4db978d3ba3c15fd6177549fa
https://github.com/llvm/llvm-project/commit/11d97b3b58687bf4db978d3ba3c15fd6177549fa
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Config/abi-breaking.h.cmake
Log Message:
-----------
[llvm] annotate ABIBreakingChecks symbols for DLL export (#149198)
## Purpose
This PR is a re-application of #145575 with independent definition of
`ABI_BREAKING_EXPORT_ABI` that does not depend on
`llvm/Support/Compiler.h`. It is one in a series of code-mods that
annotate LLVM’s public interface for export. This patch annotates the
ABI Breaking Checks interface in llvm/config. The annotations currently
have no meaningful impact on the LLVM build; however, they are a
prerequisite to support an LLVM Windows DLL (shared library) build.
## Background
The effort to build LLVM as a Windows DLL is tracked in #109483.
Additional context is provided in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 05e08cdb3e576cc0887d1507ebd2f756460c7db7
https://github.com/llvm/llvm-project/commit/05e08cdb3e576cc0887d1507ebd2f756460c7db7
Author: Haowei <haowei at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
R llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
R llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
R llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
Revert "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335)
Reverts llvm/llvm-project#87574, which breaks LLVM ::
CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir tests
on linux-arm64 builders.
Commit: 7b66629497ea5b6cde1772fab161c028e8c972a7
https://github.com/llvm/llvm-project/commit/7b66629497ea5b6cde1772fab161c028e8c972a7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Type.cpp
Log Message:
-----------
[IR] Remove static variables from Type::getWasm_ExternrefTy/getWasm_FuncrefTy. (#150323)
These were caching pointers to memory owned by LLVMContext and can
outlive the LLVMContext. The LLVMContext already caches pointer types so
we shouldn't need any caching here.
Commit: 7ae371548f05a94f933db691424b662515afc5a7
https://github.com/llvm/llvm-project/commit/7ae371548f05a94f933db691424b662515afc5a7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
Log Message:
-----------
[NFC][FIX] Add `-verify-machineinstrs=0` explicitly to some test files
They had it before but that was removed in #150024. They need to disable the check explicitly to pass expensive checks.
Commit: c21e2a5e24c7bc55767055e25bb2fb40cbec68c3
https://github.com/llvm/llvm-project/commit/c21e2a5e24c7bc55767055e25bb2fb40cbec68c3
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
Log Message:
-----------
[DirectX] Moving Root Signature Metadata Parsing in to Shared Root Signature Metadata lib (#149221)
This PR, moves the existing Root Signature Metadata Parsing logic used
in `DXILRootSignature` to the common library used by both frontend and
backend. Closes:
[#145942](https://github.com/llvm/llvm-project/issues/145942)
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 66603dd1f10e0f6c0510273378334971159f6b69
https://github.com/llvm/llvm-project/commit/66603dd1f10e0f6c0510273378334971159f6b69
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/benchmarks/gpu/BenchmarkLogger.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
M libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/CMakeLists.txt
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/config/CMakeLists.txt
M libc/config/gpu/app.h
M libc/config/linux/app.h
M libc/config/uefi/app.h
M libc/hdr/CMakeLists.txt
A libc/hdr/stdint_proxy.h
M libc/hdr/types/CMakeLists.txt
M libc/include/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/functional.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/arm/FEnvImpl.h
M libc/src/__support/FPUtil/bfloat16.h
M libc/src/__support/FPUtil/riscv/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/lseekImpl.h
M libc/src/__support/GPU/CMakeLists.txt
M libc/src/__support/GPU/allocator.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/bitmask.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/arg_list.h
M libc/src/__support/big_int.h
M libc/src/__support/block.h
M libc/src/__support/blockstore.h
M libc/src/__support/detailed_powers_of_ten.h
M libc/src/__support/endian_internal.h
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/__support/float_to_string.h
M libc/src/__support/hash.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/ryu_constants.h
M libc/src/__support/ryu_long_double_constants.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/futex_word.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/mbstate.h
M libc/src/arpa/inet/CMakeLists.txt
M libc/src/arpa/inet/htonl.h
M libc/src/arpa/inet/htons.h
M libc/src/arpa/inet/ntohl.h
M libc/src/arpa/inet/ntohs.h
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/inttypes/CMakeLists.txt
M libc/src/inttypes/strtoimax.h
M libc/src/inttypes/strtoumax.h
M libc/src/link/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_setstack.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/CMakeLists.txt
M libc/src/spawn/file_actions.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/fgets.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
M libc/src/stdlib/bsearch.cpp
M libc/src/stdlib/l64a.cpp
M libc/src/stdlib/qsort.cpp
M libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/quick_sort.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/CMakeLists.txt
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/string_utils.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/kernel_statx.h
M libc/src/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/time/linux/nanosleep.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/core_structs.h
M libc/src/time/time_constants.h
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/ftruncate.cpp
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/src/unistd/linux/truncate.cpp
M libc/startup/baremetal/CMakeLists.txt
M libc/startup/baremetal/fini.cpp
M libc/startup/baremetal/init.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/RoundingModeUtils.h
M libc/test/UnitTest/ScanfMatcher.cpp
M libc/test/UnitTest/TestLogger.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_equal_test.cpp
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/pthread/pthread_once_test.cpp
M libc/test/integration/src/pthread/pthread_test.cpp
M libc/test/integration/src/spawn/CMakeLists.txt
M libc/test/integration/src/spawn/posix_spawn_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/HashTable/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/str_to_float_comparison_test.cpp
M libc/test/src/fenv/feclearexcept_test.cpp
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf16_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/erff_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/in_float_range_test_helper.h
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log10f_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/logf_test.cpp
M libc/test/src/math/performance_testing/Timer.h
M libc/test/src/math/performance_testing/fmodf16_perf.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sdcomp26094.h
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/cospif_test.cpp
M libc/test/src/math/smoke/erff_test.cpp
M libc/test/src/math/smoke/exp10_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/exp_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
M libc/test/src/math/smoke/log10_test.cpp
M libc/test/src/math/smoke/log10f_test.cpp
M libc/test/src/math/smoke/log1pf_test.cpp
M libc/test/src/math/smoke/log2_test.cpp
M libc/test/src/math/smoke/log2f_test.cpp
M libc/test/src/math/smoke/log_test.cpp
M libc/test/src/math/smoke/logf_test.cpp
M libc/test/src/math/smoke/powf_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
M libc/test/src/math/smoke/sinpif_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/spawn/CMakeLists.txt
M libc/test/src/spawn/posix_spawn_file_actions_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/memalignment_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/string/memory_utils/CMakeLists.txt
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/protected_pages.h
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
M libc/utils/MPCWrapper/MPCUtils.h
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][NFC] Add stdint.h proxy header to fix dependency issue with <stdint.h> includes. (#150303)
https://github.com/llvm/llvm-project/issues/149993
Commit: fd86b2e26c0933c2af61fc50a674f668a7991f66
https://github.com/llvm/llvm-project/commit/fd86b2e26c0933c2af61fc50a674f668a7991f66
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
Log Message:
-----------
[RISCV][llvm-exegesis] Add missing operand frm for FCVT_D_W (#149989)
We encountered the index of operand out of bounds crash because FCVT_D_W
lacks frm operand.
Commit: b61695e3ebe66b96172b7f49069c8d2c26e28b23
https://github.com/llvm/llvm-project/commit/b61695e3ebe66b96172b7f49069c8d2c26e28b23
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port #149221 (#150347)
Commit: 22fef005225b129d73ade4ed995fc0ec0c7be044
https://github.com/llvm/llvm-project/commit/22fef005225b129d73ade4ed995fc0ec0c7be044
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/wreturn-always-throws.cpp
Log Message:
-----------
[clang] Avoid inheriting [[noreturn]] in explicit function template specializations (#150003)
This patch fixes incorrect behavior in Clang where [[noreturn]] (either
spelled or inferred) was being inherited by explicit specializations of
function templates or member function templates, even when those
specializations returned normally.
Follow up on https://github.com/llvm/llvm-project/pull/145166
Commit: 68c8c8ceeba6da96189335236e3ec80a082e4d7b
https://github.com/llvm/llvm-project/commit/68c8c8ceeba6da96189335236e3ec80a082e4d7b
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/test/CMakeLists.txt
A lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
A lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
A lldb/test/Shell/RPC/Generator/lit.local.cfg
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/RPCCommon.cpp
A lldb/tools/lldb-rpc-gen/RPCCommon.h
A lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
A lldb/tools/lldb-rpc/CMakeLists.txt
A lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
A lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
R lldb/tools/lldb-rpc/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.h
Log Message:
-----------
Reland "[lldb][RPC] Upstream lldb-rpc-gen tool" (#146969)" Attempt 2 (#148996)
Second attempt at relanding the lldb-rpc-gen tool. This should fix 2
issues:
- An assert that was hitting when building on Linux. The assert would
hit in the server source emitter, specifically when attemping to
determine the storage size for a return type is that is a pointer, but
isn't a const char *, const char ** or void pointer.
The assert would hit when attempting to generate
SBAttachInfo::GetProcessPluginName, which returns a const char *
(meaning it shouldn't have been in the code block for the assert at
all). The reason that it was hitting the assert when generating this
function is that lldb_rpc_gen::TypeIsConstCharPtr was returning false
for this function even though it did return a const char *. This was
happening because when checking the return type for a const char *,
TypeIsConstCharPtr would only check that the underlying type was a
signed char. This failed on Linux (but was fine on Darwin), as the
underlying type also needs to be checked for being an unsigned char.
- Cross compiling support
The build for lldb-rpc-gen had no support for cross compiling and as
such, the sources generated for lldb-rpc-gen would get compiled too
early in phase 2 when cross compiling, before the Clang toolchain was
built and this led to an error when trying to include stdlib files. This
reland splits this build into 2 by building the tool first and then
compiling the sources in the second stage of the cross-compiled build.
Original PR Description:
This commit upstreams the lldb-rpc-gen tool, a ClangTool that generates
the LLDB RPC client and server interfaces. This tool, as well as LLDB
RPC itself is built by default. If it needs to be disabled, put
-DLLDB_BUILD_LLDBRPC=OFF in your CMake invocation.
https://discourse.llvm.org/t/rfc-upstreaming-lldb-rpc/85804
Original PR Link:
github.com/llvm/llvm-project/pull/138031
Commit: 2238365a6589fcdb196c850520585a8ec466e09c
https://github.com/llvm/llvm-project/commit/2238365a6589fcdb196c850520585a8ec466e09c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects_test.py
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Minor script cleanups
The metrics script did not have a license header or a docstring. The
compute_projects_test.py file had a placeholder module level docstring
that I edited into something more reasonable.
Commit: f509b0c33aebc264c379fd66c25fa48ee61f7ec1
https://github.com/llvm/llvm-project/commit/f509b0c33aebc264c379fd66c25fa48ee61f7ec1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150303 (#150351)
Commit: 7f66a83c1224ccef066625f01223d8aa6c0c03c2
https://github.com/llvm/llvm-project/commit/7f66a83c1224ccef066625f01223d8aa6c0c03c2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
[bazel] Port #149198 (#150352)
Commit: dfe9fcc9a6b40dfa01ce5884fdc185912ccda8e3
https://github.com/llvm/llvm-project/commit/dfe9fcc9a6b40dfa01ce5884fdc185912ccda8e3
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/API/CMakeLists.txt
M lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
Log Message:
-----------
[lldb][headers] Fix header staging target for RPC (#150355)
This commit fixes the target that stages headers in the build dir's
include directory so that the headers are staged correctly so that the
target for liblldbrpc-headers can depend on it properly
Commit: 8e9912a1a264e294ecf48dd8bf7d642d41aa5829
https://github.com/llvm/llvm-project/commit/8e9912a1a264e294ecf48dd8bf7d642d41aa5829
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/string/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150303 some more (#150358)
Commit: 5024fc18b87561af45323db38ee93c1d57565772
https://github.com/llvm/llvm-project/commit/5024fc18b87561af45323db38ee93c1d57565772
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/docs/Rationale/RationaleLinalgDialect.md
Log Message:
-----------
[mlir][docs] Fix broken links of LIFT (#150152)
Fixes #150080.
Commit: 3eb49c482c3d14d5e0c192434980aa57fe87c453
https://github.com/llvm/llvm-project/commit/3eb49c482c3d14d5e0c192434980aa57fe87c453
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/Parser/Parser.h
M mlir/lib/Analysis/SliceAnalysis.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/GPU/Transforms/EliminateBarriers.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Shape/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/IR/SymbolTable.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Transforms/CSE.cpp
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/test/lib/Analysis/TestCFGLoopInfo.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][NFC] Use `hasOneBlock` instead of `llvm::hasSingleElement(region)` (#149809)
Commit: 1b901e956b1fab56f4457c97c4d6cb43d0076abf
https://github.com/llvm/llvm-project/commit/1b901e956b1fab56f4457c97c4d6cb43d0076abf
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
Log Message:
-----------
MC: Declare MCFragment before MCSection
... so that we can restore `MCFragment DummyFragment;` within
`MCSection` (reverting part of
eedc72b45e953bd21cb5c772b8fd24b414894042).
This is required to remove `allocInitialFragment` from `MCContext`
and postpone initial fragment creation to `changeSection`
to address some design issues.
Pull Request: https://github.com/llvm/llvm-project/pull/150180
Commit: 992118cb4deab139ae384bb85f03225a9a21b008
https://github.com/llvm/llvm-project/commit/992118cb4deab139ae384bb85f03225a9a21b008
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Add masked.load/store support for shuffle (de)interleave load/store (#150241)
This completes the basic support for masked.laod and masked.store in
InterleaveAccess. The backend already added via the intrinsic lowering
path and the common code structure (in RISCV at least).
Note that this isn't enough to enable in LV yet. We still need support
for recognizing an interleaved mask via a shufflevector in getMask.
Commit: 5f35f06e5f50f5e2797cebf1e6204e1a15fc83bc
https://github.com/llvm/llvm-project/commit/5f35f06e5f50f5e2797cebf1e6204e1a15fc83bc
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/tools/lldb-rpc-gen/RPCCommon.cpp
M lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
Log Message:
-----------
[lldb] Fix warnings
This patch fixes:
lldb/tools/lldb-rpc-gen/RPCCommon.cpp:197:13: error: unused variable
'CheckTypeForLLDBPrivate' [-Werror,-Wunused-variable]
lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp:105:18: error: unused
variable 'HasCallbackParameter' [-Werror,-Wunused-variable]
Commit: afbf86e719e11aeb9e2b944cd5cf914bdab12426
https://github.com/llvm/llvm-project/commit/afbf86e719e11aeb9e2b944cd5cf914bdab12426
Author: Qi Zhao <zhaoqi01 at loongson.cn>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for build_vector with undef elements inserting
Commit: 42017c661c131ff85aa70345e100fa486db66bfa
https://github.com/llvm/llvm-project/commit/42017c661c131ff85aa70345e100fa486db66bfa
Author: lntue <lntue at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M libc/include/CMakeLists.txt
M libc/src/stdio/printf_core/CMakeLists.txt
Log Message:
-----------
[libc] Add missing libc.include.inttypes for targets including <inttypes.h>. (#150345)
Commit: 3e4be55c6b942fdcf1732b1a537e2477567ece54
https://github.com/llvm/llvm-project/commit/3e4be55c6b942fdcf1732b1a537e2477567ece54
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/test/Dialect/Affine/loop-fusion-4.mlir
Log Message:
-----------
[MLIR][Affine] Improve sibling fusion - handle memrefs from memref defining nodes (#149641)
Improve sibling fusion - handle memrefs from memref defining nodes which
were not being considered.
Remove the unnecessary restriction from MDG memref edge iteration to
restrict to affine.for ops. Nodes in the MDG could be other ops as well.
Fixes: https://github.com/llvm/llvm-project/issues/61825
Commit: 0a2b97931014c34bef02700a9e9f42c304b54390
https://github.com/llvm/llvm-project/commit/0a2b97931014c34bef02700a9e9f42c304b54390
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
Log Message:
-----------
[RISCV] Add missing Zvl dependencies for XSfvqmaccdod/XSfvqmaccqoq/XSfvfwmaccqqq. (#150346)
These have an LMUL=1 operand that must have a multiple of 16 or 32
elements in it. This places a lower bound on the VLEN.
Commit: 5bbf01f7cbd98f9bf79eeaeecd43c28e38cb94fa
https://github.com/llvm/llvm-project/commit/5bbf01f7cbd98f9bf79eeaeecd43c28e38cb94fa
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/MC/ELF/section-sym-err.s
R llvm/test/MC/ELF/section-sym-err2.s
M llvm/test/MC/ELF/section-sym2.s
Log Message:
-----------
MC,test: Improve section symbol test
Commit: 75e60e745b029a3aaa199e8848e5542fd8a80395
https://github.com/llvm/llvm-project/commit/75e60e745b029a3aaa199e8848e5542fd8a80395
Author: hidekisaito <hidekido at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[AMDGPU][Offload][LIT] Run unified_shared_memory tests on gfx950 (#150372)
Enables 9 more tests
Commit: b4edd827e4f71c2a0fcb13f79de7eae4545f0aea
https://github.com/llvm/llvm-project/commit/b4edd827e4f71c2a0fcb13f79de7eae4545f0aea
Author: Amina Chabane <amina.chabane at arm.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
Log Message:
-----------
[AArch64] Remove redundant FMOV for zero-extended i32/i16 loads to f64 (#146920)
Previously, a separate load, zext and FMOV instruction was emitted. This
patch adds a new TableGen pattern to avoid the unnecessary FMOV. A test
is included in test/CodeGen/AArch64/load_u64_from_u32.ll
Commit: 31db0f0a7ae43981fdfadc693662c239f921a05b
https://github.com/llvm/llvm-project/commit/31db0f0a7ae43981fdfadc693662c239f921a05b
Author: Shashi Shankar <shashishankar1687 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaAvailability.cpp
A clang/test/Sema/implicit-special-member-deprecated.cpp
Log Message:
-----------
[Clang] Suppress deprecated field warnings in implicit functions definitions (#147400)
Do not warn on deprecated member used in an implicit definition (such as a defaulted special member function).
Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
Fixes #147293
Commit: eb43b79765ad8218aa5061fe4e695e8da4b5d849
https://github.com/llvm/llvm-project/commit/eb43b79765ad8218aa5061fe4e695e8da4b5d849
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
Log Message:
-----------
[AMDGPU] Disable SGPR read hazard mitigation for gfx1250 (#150344)
Co-authored-by: Jay Foad <Jay.Foad at amd.com>
Commit: 07faafe4a4d0a5bd82b648aa9717783f001ddfae
https://github.com/llvm/llvm-project/commit/07faafe4a4d0a5bd82b648aa9717783f001ddfae
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
Log Message:
-----------
[Clang] Fix a partial ordering bug involving CTAD injected template arguments (#149782)
The synthesized deduction guides use injected template arguments for
distinguishment of explicit and implicit deduction guides.
In partial ordering, we may substitute into these injected types when
checking consistency. Properly substituting them needs the instantiated
class template specializations which isn't the case at that point. So
instead, we check their template specialization types.
No release note because I think we want a backport, after baking it for
a couple of days.
Fixes https://github.com/llvm/llvm-project/issues/134613
Commit: 78ccaf1295b35a62d3d5bcda76d83eae788a6f48
https://github.com/llvm/llvm-project/commit/78ccaf1295b35a62d3d5bcda76d83eae788a6f48
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/utils/update_mir_test_checks.py
Log Message:
-----------
[update_mir_test_checks] Add missing MIFlags (#150012)
If the update_mir_test_checks.py script is aware of MIFlags, it can produce
meaningful identifiers in generated FileCheck lines. A few MIFlags that were
introduced more recently have been missing from the script.
Ideally, the MIFlags would be specified in a single place and automatically
made known to the script to avoid this divergence, but for now adding a comment
pointing to the script at the place where the MIFlags are printed seems like a
reasonable trade-off.
This PR only regenerates check lines for a single test as an example of the
effect; other affected tests are not regenerated for now to avoid unnecessary
test churn.
Commit: 531cf8298b08eacdf670bac8c28db97a5dc8cb01
https://github.com/llvm/llvm-project/commit/531cf8298b08eacdf670bac8c28db97a5dc8cb01
Author: Eric Li <li.zhe.hua at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Stop ctor initializer from being inlined (#150361)
The colon in a constructor's initializer list triggers the inlining of a
nested block as if it was a conditional operator expression. This
prevents line breaks under certain circumstances when the initializer
list contains braced initializers, which in turn prevents the line
formatter from finding a solution.
In this commit we exclude colons that are a constructor initializer
colon from consideration of nested block inlining.
Fixes #97242.
Fixes #81822.
Commit: e9de32fd159d30cfd6fcc861b57b7e99ec2742ab
https://github.com/llvm/llvm-project/commit/e9de32fd159d30cfd6fcc861b57b7e99ec2742ab
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/test/Transforms/LICM/PR116813-memoryssa-outdated.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested2.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/guards.ll
M llvm/test/Transforms/SimpleLoopUnswitch/inject-invariant-conditions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/invalidate-block-and-loop-dispositions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-loop-and-block-dispositions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
A llvm/test/Transforms/SimpleLoopUnswitch/pr138509.ll
M llvm/test/Transforms/SimpleLoopUnswitch/update-scev-3.ll
Log Message:
-----------
[SimpleLoopUnswitch] Record loops from unswitching non-trivial conditions
Track newly-cloned loops coming from unswitching non-trivial invariant
conditions, so as to prevent conditions in such cloned blocks from
being unswitched again.
Fixes: https://github.com/llvm/llvm-project/issues/138509.
Commit: c049732d7f946492ec3f6f5e7c3b845b7133fca8
https://github.com/llvm/llvm-project/commit/c049732d7f946492ec3f6f5e7c3b845b7133fca8
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaDeclAttr.cpp
A clang/test/Sema/unsupported-arm-streaming.cpp
Log Message:
-----------
[clang] Fix crash when diagnosing unsupported attributes (#150333)
In #141305, the attribute argument was (unintentionally) removed from
the diagnostic emission.
Fixes #150237
Commit: 98562ffaaa74ebebfcfaf42f6604c736637e0d46
https://github.com/llvm/llvm-project/commit/98562ffaaa74ebebfcfaf42f6604c736637e0d46
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
Log Message:
-----------
[AArch64] Fix the type of NZCV operands/results (#150313)
Consistently use `FlagsVT` for operands/results of nodes that
consume/produce NZCV flags.
Previously, some of the operands/results had incorrect `MVT::Glue` type
while others had `MVT_CC` type, which is supposed to be used for
condition codes (`AArch64CC::CondCode` enum).
Found by #150125.
Commit: be6bed4dc6e346d316a910ee7cb742ece791d855
https://github.com/llvm/llvm-project/commit/be6bed4dc6e346d316a910ee7cb742ece791d855
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
A llvm/test/Transforms/InstCombine/pr150338.ll
Log Message:
-----------
[InstCombine] Remove instructions before+after unreachable at same time
There is no need to first remove the instructions before and then
the ones after in two different worklist iterations. We don't need
to worry about change reporting here, as the functions do that
themselves.
This avoids the issue in #150338, but not really in a principled
way. It's possible that we will have to allow poison arguments
to lifetime.start/lifetime.end again if this turns out to be a
recurring problem.
Commit: 53dfbe83861cdb2948ac25376ec6524bc68e8c3e
https://github.com/llvm/llvm-project/commit/53dfbe83861cdb2948ac25376ec6524bc68e8c3e
Author: x12301450 <x12301450 at 163.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/lib/Target/LLVM/CMakeLists.txt
Log Message:
-----------
[CMake]fix CUDAToolkit_LIBRARY_ROOT DEFINED check (#146472)
This PR fixes #146344 by remove the brace of `CUDAToolkit_LIBRARY_ROOT`.
Commit: 3d8db8ef50b7e59d5a1943ddc14597327eff88fd
https://github.com/llvm/llvm-project/commit/3d8db8ef50b7e59d5a1943ddc14597327eff88fd
Author: Tobias Hieta <tobias at hieta.se>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/docs/ReleaseNotes.rst
M flang/docs/ReleaseNotes.md
M lld/docs/ReleaseNotes.rst
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
Clear release notes on main for LLVM 22
Commit: a073cbbb1aeaaeac01b12e818fe47e4c04080aac
https://github.com/llvm/llvm-project/commit/a073cbbb1aeaaeac01b12e818fe47e4c04080aac
Author: circuit10 <heath.mitchell27 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
A llvm/test/MC/X86/intel-syntax-parentheses.s
Log Message:
-----------
[X86] Fix misassemble due to not storing registers to state machine on RParen (#150252)
This fixes #116883.
The x86 parser saves any register it encounters to a TmpReg field in its
state machine, then on encountering the next valid token immediately
afterwards saves it to either BaseReg, or IndexReg if BaseReg was
already filled. However, this saving logic was missing on the RParen
token handler, causing the parser to "forget" the register immediately
beforehand. This also would prevent later validation logic from
detecting the addressing mode as invalid, leading to a silent
misassembly rather than an error.
Commit: d52675e0a7daac028612c34530fbcbd6ca62a1fb
https://github.com/llvm/llvm-project/commit/d52675e0a7daac028612c34530fbcbd6ca62a1fb
Author: Mark Murray <mark.murray at arm.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M lld/ELF/InputFiles.cpp
A lld/test/ELF/aarch64-build-attributes-be.s
A lld/test/ELF/aarch64-build-attributes-err.s
A lld/test/ELF/aarch64-build-attributes-invalid.s
A lld/test/ELF/aarch64-build-attributes-malformed.s
A lld/test/ELF/aarch64-build-attributes-mixed.s
M lld/test/ELF/aarch64-build-attributes.s
M llvm/include/llvm/Support/AArch64AttributeParser.h
M llvm/lib/Support/AArch64AttributeParser.cpp
Log Message:
-----------
[lld][AArch64][Build Attributes] Add support for AArch64 Build Attributes (#147970)
This patch enables lld to read AArch64 Build Attributes and convert them
into GNU Properties.
Changes:
- Parses AArch64 Build Attributes from input object files.
- Converts known attributes into corresponding GNU Properties.
- Merges attributes when linking multiple objects.
Spec reference:
https://github.com/ARM-software/abi-aa/pull/230/files#r1030
Co-authored-by: Sivan Shani <sivan.shani at arm.com>
---------
Co-authored-by: Sivan Shani <sivan.shani at arm.com>
Commit: 94aa08a3b0e979e6977619064a27ca74bb15fcf6
https://github.com/llvm/llvm-project/commit/94aa08a3b0e979e6977619064a27ca74bb15fcf6
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-fold-lshr.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Don't combine shifts at the expense of addressing modes. (#149873)
Fixes https://github.com/llvm/llvm-project/issues/149654
Commit: 1a32bcb4379fb90d2b764ac33b917de1431c6b16
https://github.com/llvm/llvm-project/commit/1a32bcb4379fb90d2b764ac33b917de1431c6b16
Author: cvspvr <csprv at outlook.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Host/windows/PipeWindows.cpp
Log Message:
-----------
[lldb] Allow building using Mingw-w64 on Windows. (#150398)
I wasn't able to build lldb using Mingw-w64 on Windows without changing
these 3 lines. It seems like `std::atomic<bool>` wasn't being found
without `#include <atomic>` and `ceil` was defaulting to `std::ceil`
instead of `std::chrono::ceil`, but I'm not smart enough to know the
root cause. I'm sure I'm not the first people to try and compile lldb
(and clang and lld) with Mingw-w64 and I don't know if something is
wrong with my Mingw-w64, but my changes shouldn't have any affect if
they aren't needed.
Commit: cd1b84caa852bb3f5469ab3da93ccb9dfafa7089
https://github.com/llvm/llvm-project/commit/cd1b84caa852bb3f5469ab3da93ccb9dfafa7089
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
Log Message:
-----------
[NFC][AMDGPU] Rename "amdgpu-as" to "amdgpu-synchronize-as" (#148627)
"amdgpu-as" is way too vague and doesn't give enough context.
We may want to support it on normal atomics too, to control the synchronized (ordered) AS.
If we do that, the name has to be less vague.
Commit: 9c5f8ec561e059bdaa585e75209cb5c658953e90
https://github.com/llvm/llvm-project/commit/9c5f8ec561e059bdaa585e75209cb5c658953e90
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
Log Message:
-----------
[NFC][AMDGPU] Refactor handling of `amdgpu-synchronize-as` MD on fences (#148630)
Directly plug it into the MMO instead, which is much cleaner.
Commit: 04f5198e3ecb5592cec3297a782b8179f95434bf
https://github.com/llvm/llvm-project/commit/04f5198e3ecb5592cec3297a782b8179f95434bf
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M libcxxabi/src/demangle/DemangleConfig.h
M libcxxabi/src/demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
Log Message:
-----------
[llvm] annotate interfaces in Demangle for DLL export (#147564)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `Demangle` interface with
a new `DEMANGLE_ABI` annotation, which behaves like the `LLVM_ABI`. This
annotation currently has no meaningful impact on the LLVM build;
however, it is a prerequisite to support an LLVM Windows DLL (shared
library) build.
## Overview
1. Add a new `Demangle/Visibility.h` header file that defines a new
`DEMANGLE_ABI` macro. The macro resolves to the proper DLL export/import
annotation on Windows and a "default" visibility annotation elsewhere.
2. Add a new `LLVM_ENABLE_DEMANGLE_EXPORT_ANNOTATIONS ` `#cmakedefine`
that is used to gate the definition of `DEMANGLE_ABI`.
3. Code-mod annotate the public `Demangle` interface using the
[Interface Definition Scanner (IDS)](https://github.com/compnerd/ids)
tool.
4. Manually fix-up `#include` statements for consistency.
5. Format the changes with `clang-format`.
6. Add a "stub" version of `Visibility.h` under `libcxxabi/src/demangle`
that always defines `DEMANGLE_ABI` to nothing.
7. Update the canonical `libcxxabi/src/demangle/ItaniumDemangle.h`
instead of the llvm copy, and run `cp-to-llvm.sh` to ensure the llvm
copy matches. NOTE: we rely on `ccp-to-llvm.sh` not copying
`Visibillity.h` as is already the case for `DemangleConfig.h`.
## Background
This PR follows the pattern established with the `llvm-c` changes made
in #141701.
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: db8a389f889c4eeaf024da117102a33aa3f577b7
https://github.com/llvm/llvm-project/commit/db8a389f889c4eeaf024da117102a33aa3f577b7
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Docs] Add back lost release notes; NFC
When release notes were cleared on ``main``, there were some notes lost
because the changes happened after the branch point for 21.x. This
restores the lost notes.
Commit: bfd73a5161608e6355f7db87dc5f5afee56d7e2f
https://github.com/llvm/llvm-project/commit/bfd73a5161608e6355f7db87dc5f5afee56d7e2f
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
R clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
R clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
Log Message:
-----------
Revert "[clangd] Add tweak to override pure virtuals (#139348)" (#150404)
This reverts commit 7355ea3f6b214d1569da43d02f9a166ff15012e6.
Buildbot failures:
UBsan
https://lab.llvm.org/buildbot/#/builders/25/builds/10010
Fast
https://lab.llvm.org/buildbot/#/builders/169/builds/13150
Commit: 633948f5cbb08295fff4704146c42fff524929a4
https://github.com/llvm/llvm-project/commit/633948f5cbb08295fff4704146c42fff524929a4
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tools-extra][Docs][NFC] Add back lost release notes (#150409)
When release notes were cleared on ``main``, clang-tools-extra project
already cleared release notes and commit
3d8db8ef50b7e59d5a1943ddc14597327eff88fd flushed them. This patch
restores lost release notes.
Commit: d5d8eaf5e05e88c9b5873ad2383de67a7683db1b
https://github.com/llvm/llvm-project/commit/d5d8eaf5e05e88c9b5873ad2383de67a7683db1b
Author: Nathan Gauër <brioche at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[utils] Add spirv triple to update_llc_test_checks (#150223)
The 32bit and 64bit flavors of SPIR-V were supported, but the logical
version of the triple was lacking. Adding it.
Commit: 588845defd09359a8b87db339b563af848cf45a7
https://github.com/llvm/llvm-project/commit/588845defd09359a8b87db339b563af848cf45a7
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
M mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
M mlir/lib/Dialect/SCF/Transforms/WrapInZeroTripCheck.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SMT/IR/SMTDialect.cpp
M mlir/lib/Dialect/SMT/IR/SMTOps.cpp
M mlir/lib/Dialect/Shape/IR/Shape.cpp
M mlir/lib/Dialect/Shape/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (20/n) (#149927)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 8fcbd06b25fd0c1b4bc4a4c8775129f7dab1affd
https://github.com/llvm/llvm-project/commit/8fcbd06b25fd0c1b4bc4a4c8775129f7dab1affd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Semantics/OpenMP/assumed-size-array.f90
Log Message:
-----------
[flang][OpenMP] Avoid analyzing assumed-size array bases (#150324)
A check for character substrings masquerading as array sections was
using expression analyzer on the array base. When this array happened to
be an assumed-size array, the analyzer emitted a semantic error that did
not correspond to any issue with the source code.
To avoid that, check whether the object is an assumed-size array before
using the expression analyzer on it.
While at it, replace the call to GetShape with a simple check for rank,
since that's the only information needed.
Fixes https://github.com/llvm/llvm-project/issues/150297
Commit: 9df8bc953d72eb4b6401ebe210a347ba3956350a
https://github.com/llvm/llvm-project/commit/9df8bc953d72eb4b6401ebe210a347ba3956350a
Author: Igor Wodiany <igor.wodiany at imgtec.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Dialect/SPIRV/IR/types.mlir
Log Message:
-----------
[mlir][spirv][nfc] Refactor member decorations in StructType (#150218)
This patch makes `==` and `<` for MemberDecorationInfo a friend function
and removes a `hasValue` field. `decorationValue` is also made an
`mlir::Attribute` so `UnitAttr` can be used to represent no-value. This
is consistent with how OpDecorate is handled in the deserializer. Using
`Attribute` will also enable handling non-integer values, however, there
seem to be no such decorations for struct members now.
Commit: bcca57b1f34475e3db74377a1c00a4683a75cf82
https://github.com/llvm/llvm-project/commit/bcca57b1f34475e3db74377a1c00a4683a75cf82
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
Log Message:
-----------
[RISCV] Simplify mask operand check in VLOptimizer. NFC (#150373)
We don't need to lookup the reg class because the MCInstDesc already
gives us this information.
With that we can remove some helper methods, and tighten the assert in
isCandidate because all pseudos at this stage should be defining virtual
registers.
Commit: a647bb4a7ba23b5a7c7484fd5162fef2d10c7068
https://github.com/llvm/llvm-project/commit/a647bb4a7ba23b5a7c7484fd5162fef2d10c7068
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
[Coroutines] Restore accidentally dropped intrinsic IDs
These were unintentionally dropped in #145518. These intrinsics
are not overloaded, so should be part of this list.
Commit: bbc570eef686cffba6c226d78588d930d619e176
https://github.com/llvm/llvm-project/commit/bbc570eef686cffba6c226d78588d930d619e176
Author: Björn Svensson <bjorn.a.svensson at est.tech>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-char-misuse-c23.c
Log Message:
-----------
[clang-tidy] Fix false positives on C23 enums in `bugprone-signed-char-misuse` (#149790)
Ignore false positives on C23 enums which allows setting the fixed
underlying type to signed char.
The AST tree for C enums includes a ImplicitCastExp
(that was matched) but this is not the case for C++ enums.
Fixes #145651
---------
Signed-off-by: Björn Svensson <bjorn.a.svensson at est.tech>
Commit: 7ba948004130610ecb3014ce5eab85d730b5be9b
https://github.com/llvm/llvm-project/commit/7ba948004130610ecb3014ce5eab85d730b5be9b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/unittests/CMakeLists.txt
Log Message:
-----------
[Flang] Assign unittests to flang_compile pool (#150041)
#127364 added the FLANG_PARALLEL_COMPILE_JOBS option to limit the number
of parallel compilations of Flang sources which require an unusal amount
of memory. This patch also adds Flang's unittests to this pool that use
about the same amount of memory due to including the same headers.
Commit: 0e42eaa668bc9d0cfd18b20cdd95917af7ea0d26
https://github.com/llvm/llvm-project/commit/0e42eaa668bc9d0cfd18b20cdd95917af7ea0d26
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
Log Message:
-----------
[RISCV] Add type based RUN line for vector intrinsic cost model tests. NFC
Commit: baa19c05a3565c930f47ecdbc7fc6693ec1a7c2e
https://github.com/llvm/llvm-project/commit/baa19c05a3565c930f47ecdbc7fc6693ec1a7c2e
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
Log Message:
-----------
[NFC][analyzer] Document optin.portability.UnixAPI (#150005)
This commit provides a brief documentation for the checker
optin.portability.UnixAPI.
Unfortunately the name of this checker is meaninglessly vague and its
functionality is very closely related to unix.Malloc, so it should be
eventually "rebranded" to a more user-friendly presentation.
Commit: 1c3e4e994b4affc7f0314bb3dbecf467fbfcab3e
https://github.com/llvm/llvm-project/commit/1c3e4e994b4affc7f0314bb3dbecf467fbfcab3e
Author: Alan Li <me at alanli.org>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
A mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
Reapply "[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` into `amdgpu.gather_to_lds`" (#150334)
This is a reapply of patch #149851. The reapply also fixes a CMake/Bazel
build issue, which was the reason of the revert. (Thanks @rupprecht )
Original patch (#149851) message:
-----
This PR adds a new optimization pass to fold
`memref.subview/expand_shape/collapse_shape` ops into consumer
`amdgpu.gather_to_lds` operations.
* Implements a new pass `AmdgpuFoldMemRefOpsPass` with pattern
`FoldMemRefOpsIntoGatherToLDSOp`
* Adds corresponding folding tests
Commit: 675d7e19a73143cc624092c7ed12fd5f89416d47
https://github.com/llvm/llvm-project/commit/675d7e19a73143cc624092c7ed12fd5f89416d47
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
A .github/workflows/check-ci.yml
Log Message:
-----------
[CI][Github] Add Workflow to Run Python Tests in CI Folder (#148696)
This patch adds a new GHA workflow that runs pytest inside of the .ci
directory to test all of the CI infrastructure. This is to make it more
visible to new contributors that these tests exist and also to ensure
that they are passing before merge. There have been several instances
already where someone neglected to update these tests and we should have
automation to enforce this.
Commit: 690c3ee5be51bf0b6598b1a202ceb7dec6acebbd
https://github.com/llvm/llvm-project/commit/690c3ee5be51bf0b6598b1a202ceb7dec6acebbd
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M offload/liboffload/API/Event.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/API/Memory.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
A offload/unittests/OffloadAPI/event/olCreateEvent.cpp
M offload/unittests/OffloadAPI/event/olDestroyEvent.cpp
M offload/unittests/OffloadAPI/event/olSyncEvent.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
Log Message:
-----------
[Offload] Replace "EventOut" parameters with `olCreateEvent` (#150217)
Rather than having every "enqueue"-type function have an output pointer
specifically for an output event, just provide an `olCreateEvent`
entrypoint which pushes an event to the queue.
For example, replace:
```cpp
olMemcpy(Queue, ..., EventOut);
```
with
```cpp
olMemcpy(Queue, ...);
olCreateEvent(Queue, EventOut);
```
Commit: b5c879515350a2cfac3567839f471182333ab4be
https://github.com/llvm/llvm-project/commit/b5c879515350a2cfac3567839f471182333ab4be
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects.py
Log Message:
-----------
[CI] Refactor compute_projects to Introduce Meta Projects
This patch introduces the concept of meta projects into the
compute_projects script. Meta projects are projects like CIR and
GoogleTest where they do not have their own top level project. This
patch adds a little bit of extra code in exchange for making meta
projects a first level concept that can be configured almost entirely by
changing around the mappings at the top of the file. This patch also
refactors the project skipping functionality to use meta projects.
This (arguably) makes the CIR support a little bit cleaner and is
necessary for some future improvements like running all the tests on
Github workflow changes and running tests when third-party changes.
Reviewers: Endilll, andykaylor, lnihlen, gburgessiv, dschuff, Keenuts, cmtice
Reviewed By: andykaylor
Pull Request: https://github.com/llvm/llvm-project/pull/150249
Commit: 08e7c17c7aa923f057d3769457eaa267da37bb96
https://github.com/llvm/llvm-project/commit/08e7c17c7aa923f057d3769457eaa267da37bb96
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Test All Projects On Workflow Changes
This patch makes it so that we actually run all the tests when we touch
the workflow file in .github/workflows/premerge.yaml. Before this we
would not run any tests and it was annoying to have to manually touch a
file to get something to trigger.
Reviewers: Keenuts, lnihlen, cmtice, dschuff, gburgessiv
Reviewed By: gburgessiv
Pull Request: https://github.com/llvm/llvm-project/pull/150250
Commit: 2149d6d1c9a1ad62761dc007ec6c6dedf6eb2fc0
https://github.com/llvm/llvm-project/commit/2149d6d1c9a1ad62761dc007ec6c6dedf6eb2fc0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
Log Message:
-----------
[CI] Run All Tests When Changing third-party
This patch ensures that we run all the tests when someone touches
third-party. Some of the projects (like SipHash and Benchmark) do not
get used by every project and we could get away with testing less.
However, it takes quite a bit of effort to tease out what actually does
depend on which library, it is liable to becoming out of date, and it
adds complexity. Just testing all the projects is simple. Given the
commit frequency to third-party is pretty low (a couple commits per
month), we should have no capacity problems here.
Fixes #149154
Reviewers: dschuff, gburgessiv, Keenuts, lnihlen, dpaoliello, cmtice
Reviewed By: dpaoliello
Pull Request: https://github.com/llvm/llvm-project/pull/150251
Commit: 889faabe78d2cb182414430601d6da2ed6619be3
https://github.com/llvm/llvm-project/commit/889faabe78d2cb182414430601d6da2ed6619be3
Author: Julian Brown <julian.brown at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
A clang/test/OpenMP/copy-gaps-1.cpp
A clang/test/OpenMP/copy-gaps-2.cpp
A clang/test/OpenMP/copy-gaps-3.cpp
A clang/test/OpenMP/copy-gaps-4.cpp
A clang/test/OpenMP/copy-gaps-5.cpp
A clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/target_map_codegen_35.cpp
Log Message:
-----------
[OpenMP] Don't emit redundant zero-sized mapping nodes for overlapped structs (#148947)
The handling of overlapped structure mapping in CGOpenMPRuntime.cpp can
lead to redundant zero-sized mapping nodes at runtime. This patch fixes
it using a combination of approaches: trivially adjacent struct members
won't have a mapping node created between them, and for more complicated
cases (inheritance) the physical layout of the struct/class is used to
make sure that elements aren't missed.
I've introduced a new class to track the state whilst iterating over the
struct. This reduces a bit of redundancy in the code (accumulating
CombinedInfo both during and after the loop), which I think is a bit
neater.
Before:
omptarget --> Entry 0: Base=0x00007fff8d483830, Begin=0x00007fff8d483830, Size=48, Type=0x20, Name=unknown
omptarget --> Entry 1: Base=0x00007fff8d483830, Begin=0x00007fff8d483830, Size=0, Type=0x1000000000003, Name=unknown
omptarget --> Entry 2: Base=0x00007fff8d483830, Begin=0x00007fff8d483834, Size=0, Type=0x1000000000003, Name=unknown
omptarget --> Entry 3: Base=0x00007fff8d483830, Begin=0x00007fff8d483838, Size=0, Type=0x1000000000003, Name=unknown
omptarget --> Entry 4: Base=0x00007fff8d483830, Begin=0x00007fff8d48383c, Size=20, Type=0x1000000000003, Name=unknown
omptarget --> Entry 5: Base=0x00007fff8d483830, Begin=0x00007fff8d483854, Size=0, Type=0x1000000000003, Name=unknown
omptarget --> Entry 6: Base=0x00007fff8d483830, Begin=0x00007fff8d483858, Size=0, Type=0x1000000000003, Name=unknown
omptarget --> Entry 7: Base=0x00007fff8d483830, Begin=0x00007fff8d48385c, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 8: Base=0x00007fff8d483830, Begin=0x00007fff8d483830, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 9: Base=0x00007fff8d483830, Begin=0x00007fff8d483834, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 10: Base=0x00007fff8d483830, Begin=0x00007fff8d483838, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 11: Base=0x00007fff8d483840, Begin=0x00005e7665275130, Size=32, Type=0x1000000000013, Name=unknown
omptarget --> Entry 12: Base=0x00007fff8d483830, Begin=0x00007fff8d483850, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 13: Base=0x00007fff8d483830, Begin=0x00007fff8d483854, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 14: Base=0x00007fff8d483830, Begin=0x00007fff8d483858, Size=4, Type=0x1000000000003, Name=unknown
After:
omptarget --> Entry 0: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f562e0, Size=48, Type=0x20, Name=unknown
omptarget --> Entry 1: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f562ec, Size=20, Type=0x1000000000003, Name=unknown
omptarget --> Entry 2: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f5630c, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 3: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f562e0, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 4: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f562e4, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 5: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f562e8, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 6: Base=0x00007fffd0f562f0, Begin=0x000058b6013fb130, Size=32, Type=0x1000000000013, Name=unknown
omptarget --> Entry 7: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f56300, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 8: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f56304, Size=4, Type=0x1000000000003, Name=unknown
omptarget --> Entry 9: Base=0x00007fffd0f562e0, Begin=0x00007fffd0f56308, Size=4, Type=0x1000000000003, Name=unknown
For code:
#include <cstdlib>
#include <cstdio>
struct S {
int x;
int y;
int z;
int *p1;
int *p2;
};
struct T : public S {
int a;
int b;
int c;
};
int main() {
T v;
v.p1 = (int*) calloc(8, sizeof(int));
v.p2 = (int*) calloc(8, sizeof(int));
#pragma omp target map(tofrom: v, v.x, v.y, v.z, v.p1[:8], v.a, v.b, v.c)
{
v.x++;
v.y += 2;
v.z += 3;
v.p1[0] += 4;
v.a += 7;
v.b += 5;
v.c += 6;
}
return 0;
}
Commit: 3feb6f971577701713034d3404b6737fe6462d43
https://github.com/llvm/llvm-project/commit/3feb6f971577701713034d3404b6737fe6462d43
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
A clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/use-new-mlir-op-builder.rst
A clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
Log Message:
-----------
[clang-tidy] Add MLIR check for old op builder usage. (#149148)
Upstream is moving towards new create method invocation, add check to flag old
usage that will be deprecated.
---------
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: 38f82534bbe9e1c9f5edd975a72e07beb7048423
https://github.com/llvm/llvm-project/commit/38f82534bbe9e1c9f5edd975a72e07beb7048423
Author: James Y Knight <jyknight at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/include/clang/Basic/Specifiers.h
M llvm/include/llvm/ADT/DenseMapInfo.h
Log Message:
-----------
Reject out-of-bounds enum sentinels in DenseMap/DenseSet. (#150308)
This makes the bug in PR #125556 which was fixed by
dc87a14efb381d960c8fbf988221f31216d7f5fd into a compile-time error.
...and fix a newly-discovered instance of this issue, triggered by a
`llvm::MapVector<AccessSpecifier, ...>` in
clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp.
Commit: 3003e4e8616015cd247ccbede67598ac544825da
https://github.com/llvm/llvm-project/commit/3003e4e8616015cd247ccbede67598ac544825da
Author: Dan Gohman <dev at sunfishcode.online>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
Fix formatting in llvm/Maintainers.md. (#147545)
Add a backslash to fix the formatting in llvm/Maintainers.md.
Commit: 1ba3859cdbf263182502b1c00546e985bdb633da
https://github.com/llvm/llvm-project/commit/1ba3859cdbf263182502b1c00546e985bdb633da
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Parser/OpenMP/block-construct.f90
A flang/test/Parser/OpenMP/construct-prefix-conflict.f90
Log Message:
-----------
[flang][OpenMP] Parse strictly- and loosely-structured blocks (#150298)
Block-associated constructs have, as their body, either a strictly- or a
loosely-structured block. In the former case the end-directive is
optional.
The existing parser required the end-directive to be present in all
cases.
Note:
The definitions of these blocks in the OpenMP spec exclude cases where
the block contains more than one construct, and the first one is
BLOCK/ENDBLOCK. For example, the following is invalid:
```
!$omp target
block ! This cannot be a strictly-structured block, but
continue ! a loosely-structured block cannot start with
endblock ! BLOCK/ENDBLOCK
continue !
!$omp end target
```
Commit: 3d5b18af1752ad4b859de6bdba4b25ef040a3dce
https://github.com/llvm/llvm-project/commit/3d5b18af1752ad4b859de6bdba4b25ef040a3dce
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/llvm/use-new-mlir-op-builder.rst
Log Message:
-----------
[clang-tidy] Fix typo in doc (#150424)
Commit: 61110e0f62ddf9bacb42975fa0a4cdef1a83746b
https://github.com/llvm/llvm-project/commit/61110e0f62ddf9bacb42975fa0a4cdef1a83746b
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI] Share value and type based llvm.vector.reverse cost (#150415)
We currently provide a generic cost for llvm.vector.reverse in BasicTTI
by reusing the reverse shuffle cost, but only for the value based cost.
Since the argument values aren't actually used, move this into the type
based costing method so that type based costing can also reuse it.
Commit: 0c4d56a6747b0f9677b47cba82053ac92ba67962
https://github.com/llvm/llvm-project/commit/0c4d56a6747b0f9677b47cba82053ac92ba67962
Author: parabola94 <heavybaby5000 at toki.waseda.jp>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Driver.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/UEFI.cpp
Log Message:
-----------
[clang][Driver] Add a new member for CLANG_DEFAULT_LINKER to clang::driver::Driver (NFC) (#149784)
The default linker can be changed by a CMake variable
CLANG_DEFAULT_LINKER, but it is shared in all toolchains. This patch
intends to resolve this.
Commit: deede2b2db262a932f07a386e59c2ca0b1a798d1
https://github.com/llvm/llvm-project/commit/deede2b2db262a932f07a386e59c2ca0b1a798d1
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/malloc.c
Log Message:
-----------
[analyzer] Eliminate unique release point assertion (#150240)
MallocChecker.cpp has a complex heuristic that supresses reports where
the memory release happens during the release of a reference-counted
object (to suppress a significant amount of false positives).
Previously this logic asserted that there is at most one release point
corresponding to a symbol, but it turns out that there is a rare corner
case where the symbol can be released, forgotten and then released
again. This commit removes that assertion to avoid the crash. (As this
issue just affects a bug suppression heuristic, I didn't want to dig
deeper and modify the way the state of the symbol is changed.)
Fixes #149754
Commit: 74505806b6446d1868c1e07cbaebfaa29291beb5
https://github.com/llvm/llvm-project/commit/74505806b6446d1868c1e07cbaebfaa29291beb5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI][Github] Bump runner version in CI containers
v2.327.0 is the latest version. Bump the version in the containers to
keep them up to date.
Commit: 628cfe0e0a491a61ab8e85c371eb73e67d693712
https://github.com/llvm/llvm-project/commit/628cfe0e0a491a61ab8e85c371eb73e67d693712
Author: Julian Brown <julian.brown at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[OpenMP] Fix initialization order for CopyOverlappedEntryGaps (#150431)
NFC.
Commit: 34986003d14704c5e4926859249995d9628f89d8
https://github.com/llvm/llvm-project/commit/34986003d14704c5e4926859249995d9628f89d8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[AArch64] Predicate should be NE for CBNZW (#150287)
Unable to reproduce yet, but this definitely seems wrong. Better safe
than sorry.
No effect on codegen as far as I know (because I have not been able to
repro).
Commit: f45e6a2834b4e7a9128b93702821a4ae944ed57b
https://github.com/llvm/llvm-project/commit/f45e6a2834b4e7a9128b93702821a4ae944ed57b
Author: Nathan Gauër <brioche at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
Log Message:
-----------
[SPIR-V] Fix emit intrinsic for resource type (#150224)
This is a quick fix to make progress to the backend until we get a
proper type scavenging system.
The previous code was only checking the type if the resource was used
once. Slightly changed the code to look to all usages, and get the first
type.
This will certainly break in other cases, but it allows us to move
forward for now until we rewrite the type scavenging to handle untyped
GEP/ptradd correctly.
Related to #145002
Commit: c2c881fcc85e0c2d7a050b0199d4dadf8f556b9e
https://github.com/llvm/llvm-project/commit/c2c881fcc85e0c2d7a050b0199d4dadf8f556b9e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
Log Message:
-----------
[mlir][tosa] Fix integer-to-boolean cast folder (#150370)
According to the TOSA spec, casting to boolean should produce true if
the input is non-zero, and false otherwise — i.e., `out = (in != 0) ?
true : false`. Previous behavior incorrectly relied on truncation, which
could yield incorrect results for non-zero values whose least
significant bit is zero. Fixes #150302.
Commit: d82d502ae5cec8bb43092869fd4fa9b9e74a3e61
https://github.com/llvm/llvm-project/commit/d82d502ae5cec8bb43092869fd4fa9b9e74a3e61
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
[bazel] Port #149148 (#150435)
Commit: 8f8b436c2b914a8abcee12b8a3bf45aec9fa627e
https://github.com/llvm/llvm-project/commit/8f8b436c2b914a8abcee12b8a3bf45aec9fa627e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
Log Message:
-----------
[flang][OpenMP] Silence warning in openmp-parsers.cpp
flang/lib/Parser/openmp-parsers.cpp:1655:43: warning
: logical not is only applied to the left hand side of comparison [-Wlogical-not
-parentheses]
1655 | TYPE_PARSER(!StandaloneDirectiveLookahead >=
| ^~
Commit: 3ebe5d661f7829b2ffe1b422ec7d00d3213c9730
https://github.com/llvm/llvm-project/commit/3ebe5d661f7829b2ffe1b422ec7d00d3213c9730
Author: Ian Wood <ianwood2024 at u.northwestern.edu>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
Log Message:
-----------
[mlir][linalg] Drop unit dims on IndexingMapOpInterface (#150280)
Generalizes `dropUnitDims` to operate on any op implementing the
`IndexingMapOpInterface`. Operation specific creation is handled by
passing a builder that will construct the new operation based on the
dropped dimensions.
---------
Signed-off-by: Ian Wood <ianwood at u.northwestern.edu>
Co-authored-by: Kunwar Grover <groverkss at gmail.com>
Commit: 3bd34ec924dbba1bde3856fdc31748200ccfd53f
https://github.com/llvm/llvm-project/commit/3bd34ec924dbba1bde3856fdc31748200ccfd53f
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaOpenACCAtomic.cpp
M clang/test/SemaOpenACC/atomic-construct.cpp
Log Message:
-----------
[OpenACC] Fix checking of sub-expressions in cache
Running an external test suite (UDel) showed that our expression
comparison for the 'cache' rule checking was overly strict in the
presence of irrelevant parens/casts/etc. This patch ensures we skip
them when checking.
This also changes the diagnostic to say 'sub-expression' instead of
variable, which is more correct.
Commit: 862b9ea805511774a00348bc4477b09aa78ca711
https://github.com/llvm/llvm-project/commit/862b9ea805511774a00348bc4477b09aa78ca711
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[AMDGPU] Remove AAInstanceInfo from the AMDGPUAttributor (#150232)
Related to compile-time issue SWDEV-543240 and functional issue
SWDEV-544256
Commit: 3e9d369c5c8ebc8c1568a288672236195b2e3685
https://github.com/llvm/llvm-project/commit/3e9d369c5c8ebc8c1568a288672236195b2e3685
Author: Morris Hafner <mmha at users.noreply.github.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
A clang/test/CIR/CodeGen/array-ctor.cpp
A clang/test/CIR/IR/array-ctor.cir
Log Message:
-----------
[CIR] Add support for array constructors (#149142)
This patch upstreams support for creating arrays of classes that require
calling a constructor.
* Adds the ArrayCtor operation
* New lowering pass for lowering ArrayCtor to a loop
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Co-authored-by: Henrich Lauko <xlauko at mail.muni.cz>
Commit: f79efa986d61700d3fcfd22390bc1aa17d0d454c
https://github.com/llvm/llvm-project/commit/f79efa986d61700d3fcfd22390bc1aa17d0d454c
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M lld/test/ELF/aarch64-build-attributes-malformed.s
Log Message:
-----------
[lld][test] Fix unintentional write to a non-writeable dir (#150436)
The test added in #147970 fails trying to write `a.out` when run in a
non-writeable directory. I believe the intent was to write to /dev/null
as the output, but `-o` was omitted, so it's actually linking *in*
/dev/null and writing to `a.out`.
Commit: 0f40efd567a94f4a64047b8a06ae51f831aec82a
https://github.com/llvm/llvm-project/commit/0f40efd567a94f4a64047b8a06ae51f831aec82a
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
Log Message:
-----------
Fix test for some builds
Somehow, on some of my builds, `llvm::` prefixes are dropped from some
symbol names in the printed past list.
Commit: 2791a1cf419701df667a27c6a9505bca1136c214
https://github.com/llvm/llvm-project/commit/2791a1cf419701df667a27c6a9505bca1136c214
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/metrics/metrics.py
A .github/workflows/check-ci.yml
M .github/workflows/containers/github-action-ci-windows/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M bolt/utils/nfc-check-setup.py
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/enum-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/assets/namespace-template.mustache
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/clang-tidy/llvm/CMakeLists.txt
M clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
A clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.cpp
A clang-tools-extra/clang-tidy/llvm/UseNewMLIROpBuilderCheck.h
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.h
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
R clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
R clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/llvm/use-new-mlir-op-builder.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/test/clang-doc/mustache-index.cpp
M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/infinite-loop.cpp
A clang-tools-extra/test/clang-tidy/checkers/bugprone/signed-char-misuse-c23.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
A clang-tools-extra/test/clang-tidy/checkers/llvm/use-new-mlir-op-builder.cpp
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
M clang-tools-extra/unittests/clang-doc/HTMLMustacheGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang-c/Index.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaRISCV.h
M clang/include/clang/Sema/SemaX86.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Frontend/CheckerRegistry.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Analysis/plugins/CheckerDependencyHandling/CheckerDependencyHandling.cpp
M clang/lib/Analysis/plugins/CheckerOptionHandling/CheckerOptionHandling.cpp
M clang/lib/Analysis/plugins/SampleAnalyzer/MainCallChecker.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/ROCm.h
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/UEFI.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.h
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaOpenACCAtomic.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/swift-import-as.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/Analysis/malloc.c
M clang/test/C/C2y/n3353.c
A clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/bitfields.c
A clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/destructors.cpp
A clang/test/CIR/IR/array-ctor.cir
M clang/test/CodeGen/AArch64/neon-intrinsics.c
R clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
M clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
A clang/test/CodeGen/X86/prefetchi-error.c
A clang/test/CodeGen/builtin-maximumnum-minimumnum.c
M clang/test/CodeGenCXX/builtin-amdgcn-fence.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-async.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
A clang/test/DebugInfo/KeyInstructions/asm.c
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/cuda-phases.cu
M clang/test/Driver/hip-inputs.hip
M clang/test/Driver/hip-invalid-target-id.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/invalid-offload-options.cpp
M clang/test/Driver/nvptx-cuda-system-arch.c
A clang/test/Driver/offload-target.c
M clang/test/Driver/openbsd.c
M clang/test/Driver/openmp-offload.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/sparc-target-features.c
M clang/test/Interpreter/fail.cpp
M clang/test/Interpreter/pretty-print.c
M clang/test/Interpreter/pretty-print.cpp
M clang/test/Layout/ms-no-unique-address.cpp
M clang/test/Misc/time-passes.c
A clang/test/OpenMP/copy-gaps-1.cpp
A clang/test/OpenMP/copy-gaps-2.cpp
A clang/test/OpenMP/copy-gaps-3.cpp
A clang/test/OpenMP/copy-gaps-4.cpp
A clang/test/OpenMP/copy-gaps-5.cpp
A clang/test/OpenMP/copy-gaps-6.cpp
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_codegen_35.cpp
M clang/test/OpenMP/target_map_messages.cpp
M clang/test/Preprocessor/arm-acle-6.4.c
M clang/test/Preprocessor/init-mips.c
A clang/test/Preprocessor/pragma-pushpop-macro-diag.c
M clang/test/Preprocessor/pragma-pushpop-macro.c
M clang/test/Preprocessor/stdint.c
M clang/test/Sema/builtins-elementwise-math.c
A clang/test/Sema/implicit-special-member-deprecated.cpp
A clang/test/Sema/unsupported-arm-streaming.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
M clang/test/SemaCXX/wreturn-always-throws.cpp
M clang/test/SemaOpenACC/atomic-construct.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/deduction-guide.cpp
M clang/tools/driver/cc1_main.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Format/BracesInserterTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestSelective.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/StaticAnalyzer/BlockEntranceCallbackTest.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/ConflictingEvalCallsTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
M clang/unittests/StaticAnalyzer/MemRegionDescriptiveNameTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/ObjcBug-124477.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
M clang/unittests/StaticAnalyzer/SValSimplifyerTest.cpp
M clang/unittests/StaticAnalyzer/SValTest.cpp
M clang/unittests/StaticAnalyzer/TestReturnValueUnderConstruction.cpp
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_malloc_mac.cpp
M compiler-rt/lib/asan/asan_malloc_win.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
M compiler-rt/lib/asan/tests/asan_noinst_test.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
M cross-project-tests/lit.cfg.py
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/docs/ReleaseNotes.md
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Parser/dump-parse-tree.h
A flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertProcedureDesignator.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/Complex.cpp
M flang/lib/Optimizer/Builder/DoLoopHelper.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/Builder/Runtime/Assign.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/EnvironmentDefaults.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Pointer.cpp
M flang/lib/Optimizer/Builder/Runtime/Ragged.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/lib/Optimizer/Builder/Runtime/Support.cpp
M flang/lib/Optimizer/Builder/Runtime/TemporaryStack.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/Transforms/AbstractResult.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CharacterConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Driver/intrinsic-module-path.f90
A flang/test/Lower/Intrinsics/acospi.f90
A flang/test/Lower/Intrinsics/asinpi.f90
A flang/test/Lower/Intrinsics/sinpi.f90
A flang/test/Lower/Intrinsics/tanpi.f90
M flang/test/Lower/OpenMP/map-modifiers.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct02.f90
A flang/test/Lower/OpenMP/unroll-heuristic01.f90
A flang/test/Lower/OpenMP/unroll-heuristic02.f90
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
A flang/test/Lower/assign-statement.f90
A flang/test/Lower/equivalence-3.f
A flang/test/Parser/OpenMP/block-construct.f90
A flang/test/Parser/OpenMP/construct-prefix-conflict.f90
A flang/test/Parser/OpenMP/map-modifiers-v60.f90
A flang/test/Parser/OpenMP/unroll-heuristic.f90
A flang/test/Parser/OpenMP/unroll-partial.f90
R flang/test/Parser/OpenMP/unroll.f90
A flang/test/Semantics/OpenMP/assumed-size-array.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
A flang/test/Semantics/OpenMP/map-modifiers-v60.f90
A flang/test/Transforms/external-name-interop-symref-array.fir
A flang/test/Transforms/tbaa-local-alloc-threshold.fir
M flang/unittests/CMakeLists.txt
M libc/benchmarks/gpu/BenchmarkLogger.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
M libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/CMakeLists.txt
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/config/CMakeLists.txt
M libc/config/gpu/app.h
M libc/config/linux/app.h
M libc/config/uefi/app.h
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/cbrt_fuzz.cpp
M libc/hdr/CMakeLists.txt
A libc/hdr/stdint_proxy.h
M libc/hdr/types/CMakeLists.txt
M libc/include/CMakeLists.txt
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/acosf16.h
A libc/shared/math/acoshf.h
A libc/shared/math/acoshf16.h
A libc/shared/math/erff.h
M libc/shared/math/exp10f16.h
A libc/shared/sign.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/functional.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/arm/FEnvImpl.h
M libc/src/__support/FPUtil/bfloat16.h
A libc/src/__support/FPUtil/comparison_operations.h
M libc/src/__support/FPUtil/riscv/FEnvImpl.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/FPUtil/x86_64/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/lseekImpl.h
M libc/src/__support/GPU/CMakeLists.txt
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/GPU/allocator.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/bitmask.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/src/__support/big_int.h
M libc/src/__support/block.h
M libc/src/__support/blockstore.h
M libc/src/__support/detailed_powers_of_ten.h
M libc/src/__support/endian_internal.h
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/__support/float_to_string.h
M libc/src/__support/hash.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosf.h
A libc/src/__support/math/acosf16.h
A libc/src/__support/math/acosh_float_constants.h
A libc/src/__support/math/acoshf.h
A libc/src/__support/math/acoshf16.h
A libc/src/__support/math/acoshf_utils.h
M libc/src/__support/math/asin_utils.h
A libc/src/__support/math/erff.h
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/__support/ryu_constants.h
M libc/src/__support/ryu_long_double_constants.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/futex_word.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/__support/wchar/mbstate.h
M libc/src/arpa/inet/CMakeLists.txt
M libc/src/arpa/inet/htonl.h
M libc/src/arpa/inet/htons.h
M libc/src/arpa/inet/ntohl.h
M libc/src/arpa/inet/ntohs.h
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/inttypes/CMakeLists.txt
M libc/src/inttypes/strtoimax.h
M libc/src/inttypes/strtoumax.h
M libc/src/link/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf16.cpp
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/acoshf16.cpp
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/asinhf16.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/common_constants.h
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/expxf16.h
M libc/src/math/generic/log1pf.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_setstack.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/CMakeLists.txt
M libc/src/spawn/file_actions.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/fgets.cpp
M libc/src/stdio/printf_core/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
M libc/src/stdlib/bsearch.cpp
M libc/src/stdlib/l64a.cpp
M libc/src/stdlib/qsort.cpp
M libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/quick_sort.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/CMakeLists.txt
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/string_utils.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/kernel_statx.h
M libc/src/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/time/linux/nanosleep.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/core_structs.h
M libc/src/time/time_constants.h
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/ftruncate.cpp
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/src/unistd/linux/truncate.cpp
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/mbtowc.cpp
A libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcscspn.cpp
M libc/src/wchar/wcsspn.cpp
M libc/startup/baremetal/CMakeLists.txt
M libc/startup/baremetal/fini.cpp
M libc/startup/baremetal/init.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/CMakeLists.txt
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/RoundingModeUtils.h
M libc/test/UnitTest/ScanfMatcher.cpp
M libc/test/UnitTest/TestLogger.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_equal_test.cpp
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/pthread/pthread_once_test.cpp
M libc/test/integration/src/pthread/pthread_test.cpp
M libc/test/integration/src/spawn/CMakeLists.txt
M libc/test/integration/src/spawn/posix_spawn_test.cpp
A libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/comparison_operations_test.cpp
M libc/test/src/__support/HashTable/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/str_to_float_comparison_test.cpp
M libc/test/src/fenv/feclearexcept_test.cpp
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf16_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/erff_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/explogxf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/in_float_range_test_helper.h
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log10f_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/logf_test.cpp
M libc/test/src/math/performance_testing/Timer.h
M libc/test/src/math/performance_testing/fmodf16_perf.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sdcomp26094.h
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/cospif_test.cpp
M libc/test/src/math/smoke/erff_test.cpp
M libc/test/src/math/smoke/exp10_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/exp_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
M libc/test/src/math/smoke/log10_test.cpp
M libc/test/src/math/smoke/log10f_test.cpp
M libc/test/src/math/smoke/log1pf_test.cpp
M libc/test/src/math/smoke/log2_test.cpp
M libc/test/src/math/smoke/log2f_test.cpp
M libc/test/src/math/smoke/log_test.cpp
M libc/test/src/math/smoke/logf_test.cpp
M libc/test/src/math/smoke/powf_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
M libc/test/src/math/smoke/sinpif_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/spawn/CMakeLists.txt
M libc/test/src/spawn/posix_spawn_file_actions_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/memalignment_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/string/memory_utils/CMakeLists.txt
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/protected_pages.h
M libc/test/src/wchar/mbrtowc_test.cpp
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
M libc/utils/MPCWrapper/MPCUtils.h
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.h
M libclc/cmake/modules/AddLibclc.cmake
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.plus_equals.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/shared_ptr_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
M libcxxabi/src/demangle/DemangleConfig.h
M libcxxabi/src/demangle/ItaniumDemangle.h
M libunwind/src/UnwindCursor.hpp
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/InputFiles.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Writer.cpp
M lld/docs/ReleaseNotes.rst
R lld/test/COFF/exported-dllmain.test
A lld/test/COFF/imported-dllmain-i386.test
A lld/test/COFF/imported-dllmain.test
M lld/test/COFF/thin-archive.s
A lld/test/ELF/aarch64-build-attributes-be.s
A lld/test/ELF/aarch64-build-attributes-err.s
A lld/test/ELF/aarch64-build-attributes-invalid.s
A lld/test/ELF/aarch64-build-attributes-malformed.s
A lld/test/ELF/aarch64-build-attributes-mixed.s
M lld/test/ELF/aarch64-build-attributes.s
A lld/test/ELF/keep-data-section-prefix.s
M lld/test/ELF/loongarch-relax-tlsdesc.s
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/include/lldb/Core/dwarf.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/API/CMakeLists.txt
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Host/windows/PipeWindows.cpp
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlAtomic.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlUnordered.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/AppleDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFAttribute.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugMacro.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDeclContext.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBLocationToDWARFExpression.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/PostfixExpression.cpp
M lldb/source/Target/Language.cpp
M lldb/source/Target/Target.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/atomic/TestDataFormatterStdAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/main.cpp
M lldb/test/CMakeLists.txt
A lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
A lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
A lldb/test/Shell/RPC/Generator/lit.local.cfg
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
M lldb/tools/lldb-dap/JSONUtils.cpp
A lldb/tools/lldb-rpc-gen/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/RPCCommon.cpp
A lldb/tools/lldb-rpc-gen/RPCCommon.h
A lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
A lldb/tools/lldb-rpc/CMakeLists.txt
A lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
A lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
R lldb/tools/lldb-rpc/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.h
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARF64UnitTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDebugNamesIndexTest.cpp
M lldb/unittests/SymbolFile/DWARF/SymbolFileDWARFTests.cpp
M llvm/Maintainers.md
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/TestingGuide.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/Config/abi-breaking.h.cmake
M llvm/include/llvm/Demangle/Demangle.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangle.h
M llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/include/llvm/IR/PassInstrumentation.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/AArch64AttributeParser.h
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFExpression.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/PassInstrumentation.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/AArch64AttributeParser.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/HexagonInstrFormats.td
R llvm/lib/Target/Hexagon/HexagonInstrFormatsV60.td
M llvm/lib/Target/Hexagon/HexagonInstrFormatsV65.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
R llvm/lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
M llvm/test/Analysis/CostModel/ARM/arith.ll
M llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/Assembler/difile-empty-source.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/arm64-fold-lshr.ll
A llvm/test/CodeGen/AArch64/bsp_implicit_ops.mir
A llvm/test/CodeGen/AArch64/load-zext-bitcast.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/urem-lkk.ll
R llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
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M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
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M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
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M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
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M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
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M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
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M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
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M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
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M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
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M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
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A llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
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A llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
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M llvm/test/CodeGen/AMDGPU/fdot2.ll
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A llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
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M llvm/test/CodeGen/AMDGPU/fma-combine.ll
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M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
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M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
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M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
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M llvm/test/CodeGen/AMDGPU/fpext.ll
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M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
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M llvm/test/CodeGen/AMDGPU/fptrunc.ll
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M llvm/test/CodeGen/AMDGPU/fract.ll
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M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
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M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
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M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
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M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
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M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
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M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
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M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
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M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
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M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
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M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
A llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
A llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
A llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
A llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
A llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
M llvm/test/CodeGen/DirectX/UAddc.ll
A llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
M llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
A llvm/test/CodeGen/Hexagon/swp-load-to-store-forward.mir
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/llvm.exp10.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/target-abi-from-triple-edge-cases.ll
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
A llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-vmerge-to-vmv.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadfmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
A llvm/test/CodeGen/SPARC/tls-sp.ll
A llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
M llvm/test/CodeGen/SystemZ/pr60413.ll
A llvm/test/CodeGen/WebAssembly/memory-interleave.ll
A llvm/test/CodeGen/WebAssembly/ref-test-func.ll
A llvm/test/CodeGen/WebAssembly/removed-terminator.ll
M llvm/test/CodeGen/WebAssembly/simd-conversions.ll
M llvm/test/CodeGen/WebAssembly/simd-extending-convert.ll
M llvm/test/CodeGen/WinEH/wineh-noret-cleanup.ll
M llvm/test/CodeGen/WinEH/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/avg.ll
M llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/freeze-vector.ll
M llvm/test/CodeGen/X86/noreturn-call-win64.ll
A llvm/test/CodeGen/X86/pr149841.ll
M llvm/test/CodeGen/X86/seh-catch-all.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-finally.ll
M llvm/test/CodeGen/X86/seh-safe-div.ll
M llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
M llvm/test/CodeGen/X86/setcc-non-simple-type.ll
M llvm/test/CodeGen/X86/stack-coloring-wineh.ll
M llvm/test/CodeGen/X86/taildup-heapallocsite.ll
M llvm/test/CodeGen/X86/vec_extract.ll
M llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
M llvm/test/CodeGen/X86/win-catchpad.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-eh-states.ll
M llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
M llvm/test/CodeGen/X86/wineh-coreclr.ll
M llvm/test/CodeGen/XCore/exception.ll
M llvm/test/DebugInfo/Generic/mixed-source.ll
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
A llvm/test/FileCheck/long-check.txt
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
A llvm/test/MC/AMDGPU/gfx1250_asm_smem_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
M llvm/test/MC/ELF/section-sym-err.s
R llvm/test/MC/ELF/section-sym-err2.s
M llvm/test/MC/ELF/section-sym2.s
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
A llvm/test/MC/X86/intel-syntax-parentheses.s
A llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
R llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
R llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
A llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/GVN/lifetime-simple.ll
A llvm/test/Transforms/GVNSink/lifetime.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll
A llvm/test/Transforms/InstCombine/AMDGPU/wmma-f8f6f4.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
A llvm/test/Transforms/InstCombine/pr150338.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/LICM/PR116813-memoryssa-outdated.ll
A llvm/test/Transforms/LoopSimplifyCFG/enter-through-indirectbr.ll
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
A llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
R llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
M llvm/test/Transforms/NewGVN/verify-memoryphi.ll
A llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
A llvm/test/Transforms/PGOProfile/prof-verify-as-needed.ll
A llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
A llvm/test/Transforms/PGOProfile/prof-verify.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/block_scaling_decompr_8bit.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/predicated-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SROA/alloca-address-space.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/ignore-droppable.ll
A llvm/test/Transforms/Scalarizer/extractvalue-struct-of-vectors.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested2.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/guards.ll
M llvm/test/Transforms/SimpleLoopUnswitch/inject-invariant-conditions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/invalidate-block-and-loop-dispositions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-select.ll
M llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-loop-and-block-dispositions.ll
M llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
A llvm/test/Transforms/SimpleLoopUnswitch/pr138509.ll
M llvm/test/Transforms/SimpleLoopUnswitch/update-scev-3.ll
M llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/invoke_unwind_lifetime.ll
A llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
A llvm/test/Verifier/AMDGPU/wmma-f8f6f4.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected
A llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s
M llvm/tools/bugpoint/bugpoint.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
M llvm/utils/UpdateTestChecks/asm.py
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/BinaryFormat/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
A llvm/utils/update_mir_regclass_numbers
M llvm/utils/update_mir_test_checks.py
M mlir/docs/Rationale/RationaleLinalgDialect.md
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmNeon/Transforms.h
M mlir/include/mlir/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/LLVMIR/BasicPtxBuilderInterface.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorType.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
Log Message:
-----------
Merge branch 'main' into pgo-estimated-trip-count
Commit: 6148922ff7cd9ead73ce42988828e01f4adca794
https://github.com/llvm/llvm-project/commit/6148922ff7cd9ead73ce42988828e01f4adca794
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
Apply some small reviewer suggestions
Compare: https://github.com/llvm/llvm-project/compare/4c4669a8bce3...6148922ff7cd
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