[all-commits] [llvm/llvm-project] 149aa7: [clang-tools-extra][NFC] Fix link to code review i...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Thu Jul 24 04:28:07 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/slpinitial-support-for-copyable-elements
Home: https://github.com/llvm/llvm-project
Commit: 149aa7679457e4c434374076fa3ad6d02efbe414
https://github.com/llvm/llvm-project/commit/149aa7679457e4c434374076fa3ad6d02efbe414
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang-tools-extra/README.txt
Log Message:
-----------
[clang-tools-extra][NFC] Fix link to code review in README.txt (#148384)
Commit: 84d65e9d19ab577027238d38d053e293ba656e32
https://github.com/llvm/llvm-project/commit/84d65e9d19ab577027238d38d053e293ba656e32
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/test/CIR/CodeGen/complex-builtins.cpp
Log Message:
-----------
[CIR] Upstream builtin_conj for ComplexType (#149170)
This change adds support for builtin_conj for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: a7f595efd840f7ed2210f2703048fad4d0027fac
https://github.com/llvm/llvm-project/commit/a7f595efd840f7ed2210f2703048fad4d0027fac
Author: nvptm <pmathew at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-host-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
A flang/test/Lower/OpenACC/acc-use-device.f90
Log Message:
-----------
[flang][acc] Create UseDeviceOp for both results of hlfir.declare (#148017)
A sample such as
```
program test
integer :: N = 100
real*8 :: b(-1:N)
!$acc data copy(b)
!$acc host_data use_device(b)
call vadd(b)
!$acc end host_data
!$acc end data
end
```
is lowered to
```
%13:2 = hlfir.declare %11(%12) {uniq_name = "_QFEb"} : (!fir.ref<!fir.array<?xf64>>, !fir.shapeshift<1>) -> (!fir.box<!fir.array<?xf64>>, !fir.ref<!fir.array<?xf64>>)
%14 = acc.copyin var(%13#0 : !fir.box<!fir.array<?xf64>>) -> !fir.box<!fir.array<?xf64>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
acc.data dataOperands(%14 : !fir.box<!fir.array<?xf64>>) {
%15 = acc.use_device var(%13#0 : !fir.box<!fir.array<?xf64>>) -> !fir.box<!fir.array<?xf64>> {name = "b"}
acc.host_data dataOperands(%15 : !fir.box<!fir.array<?xf64>>) {
fir.call @_QPvadd(%13#1) fastmath<contract> : (!fir.ref<!fir.array<?xf64>>) -> ()
acc.terminator
}
acc.terminator
}
acc.copyout accVar(%14 : !fir.box<!fir.array<?xf64>>) to var(%13#0 : !fir.box<!fir.array<?xf64>>) {dataClause = #acc<data_clause acc_copy>, name = "b"}
```
Note that while the use_device clause is applied to %13#0, the argument
passed to vadd is %13#1. To avoid problems later in lowering, this
change additionally applies the use_device clause to %13#1, so that the
resulting MLIR is
```
%13:2 = hlfir.declare %11(%12) {uniq_name = "_QFEb"} : (!fir.ref<!fir.array<?xf64>>, !fir.shapeshift<1>) -> (!fir.box<!fir.array<?xf64>>, !fir.ref<!fir.array<?xf64>>)
%14 = acc.copyin var(%13#0 : !fir.box<!fir.array<?xf64>>) -> !fir.box<!fir.array<?xf64>> {dataClause = #acc<data_clause acc_copy>, name = "b"}
acc.data dataOperands(%14 : !fir.box<!fir.array<?xf64>>) {
%15 = acc.use_device var(%13#0 : !fir.box<!fir.array<?xf64>>) -> !fir.box<!fir.array<?xf64>> {name = "b"}
%16 = acc.use_device varPtr(%13#1 : !fir.ref<!fir.array<?xf64>>) -> !fir.ref<!fir.array<?xf64>> {name = "b"}
acc.host_data dataOperands(%15, %16 : !fir.box<!fir.array<?xf64>>, !fir.ref<!fir.array<?xf64>>) {
fir.call @_QPvadd(%13#1) fastmath<contract> : (!fir.ref<!fir.array<?xf64>>) -> ()
acc.terminator
}
acc.terminator
}
acc.copyout accVar(%14 : !fir.box<!fir.array<?xf64>>) to var(%13#0 : !fir.box<!fir.array<?xf64>>) {dataClause = #acc<data_clause acc_copy>, name = "b"}
```
Commit: 7caf12da0bb09d6b6992bf42afd256d453753dcb
https://github.com/llvm/llvm-project/commit/7caf12da0bb09d6b6992bf42afd256d453753dcb
Author: Jeremy Kun <jkun at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/PatternMatch.h
M mlir/lib/IR/CMakeLists.txt
A mlir/lib/IR/PatternLoggingListener.cpp
M mlir/lib/Rewrite/PatternApplicator.cpp
A mlir/test/IR/test-pattern-logging-listener.mlir
M mlir/test/lit.cfg.py
Log Message:
-----------
[mlir][core] Add an MLIR "pattern catalog" generator (#146228)
This PR adds a feature that attaches a listener to all RewritePatterns that
logs information about the modified operations.
When the MLIR test suite is run, these debug outputs can
be filtered and combined into an index linking operations to the
patterns that insert, modify, or replace them. This index is intended to
be used to create a website that allows one to look up patterns from an
operation name.
The debug logs emitted can be viewed with --debug-only=generate-pattern-catalog,
and the lit config is modified to do this when the env var MLIR_GENERATE_PATTERN_CATALOG is set.
Example usage:
```
mkdir build && cd build
cmake -G Ninja ../llvm \
-DLLVM_ENABLE_PROJECTS="mlir" \
-DLLVM_TARGETS_TO_BUILD="host" \
-DCMAKE_BUILD_TYPE=DEBUG
ninja -j 24 check-mlir
MLIR_GENERATE_PATTERN_CATALOG=1 bin/llvm-lit -j 24 -v -a tools/mlir/test | grep 'pattern-logging-listener' | sed 's/^# | [pattern-logging-listener] //g' | sort | uniq > pattern_catalog.txt
```
Sample pattern catalog output (that fits in a gist):
https://gist.github.com/j2kun/02d1ab8d31c10d71027724984c89905a
---------
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: d97c224e8cbba9158ebda6f12f9a06b09534ae29
https://github.com/llvm/llvm-project/commit/d97c224e8cbba9158ebda6f12f9a06b09534ae29
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/test/src/math/cospif_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinpif_test.cpp
Log Message:
-----------
[libc][NFC]: Correct some comments about SDCOMP-26094. (#149317)
Commit: 011d38bdac95647a872a5faa339465e26535df35
https://github.com/llvm/llvm-project/commit/011d38bdac95647a872a5faa339465e26535df35
Author: erichkeane <ekeane at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/test/Driver/openacc.c
M clang/test/Preprocessor/openacc.c
Log Message:
-----------
[OpenACC] Update OpenACC macro, remove override macro
As we are now Sema-complete for OpenACC 3.4 (and thus have a conforming
implementation, in all modes), we can now set the _OPENACC macro
correctly.
Additionally, we remove the temporary 'override' functionality, which
was intended to allow people to experiment with this. We aren't having a
deprecation period as OpenACC support is still considered experimental.
Commit: a6fb3b3c18fd48a2eaaa8c969edbc013b9276a09
https://github.com/llvm/llvm-project/commit/a6fb3b3c18fd48a2eaaa8c969edbc013b9276a09
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
A lldb/test/Shell/Minidump/missing-memory-region.yaml
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
Log Message:
-----------
[LLDB] Process minidump better error messages (#149206)
Prior, Process Minidump would return
```
Status::FromErrorString("could not parse memory info");
```
For any unsuccessful memory read, with no differentiation between an
error in LLDB and the data simply not being present. This lead to a lot
of user confusion and overall pretty terrible user experience. To fix
this I've refactored the APIs so we can pass an error back in an llvm
expected.
There were also no shell tests for memory read and process Minidump so I
added one.
Commit: e8a891b0f9d2a742ac3904116aaec2c7c9231b24
https://github.com/llvm/llvm-project/commit/e8a891b0f9d2a742ac3904116aaec2c7c9231b24
Author: Jonathan Cohen <joncoh at apple.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
A llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
M llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/llvm.frexp.ll
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/nontemporal.ll
Log Message:
-----------
[AArch64][Machine-Combiner] Split gather patterns into neon regs to multiple vectors (#142941)
This changes optimizes gather-like sequences, where we load values
separately into lanes of a neon vector. Since each load has serial
dependency, when performing multiple i32 loads into a 128 bit vector for example, it
is more profitable to load into separate vector registers and zip them.
rdar://151851094
Commit: 661cbd5a5254de22ba87a49e89f54b30e2874fb3
https://github.com/llvm/llvm-project/commit/661cbd5a5254de22ba87a49e89f54b30e2874fb3
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/unittests/Frontend/OpenMPDirectiveNameParserTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[utils][TableGen] Make some non-bitmask enums iterable (#148647)
Additionally, add sentinel values <Enum>::First_ and <Enum>::Last_ to
each one of those enums.
This will allow using `enum_seq_inclusive` to generate the list of
enum-typed values of any generated scoped (non-bitmask) enum.
Commit: 0dae924c1f668f74370b642ba91f818b728aca40
https://github.com/llvm/llvm-project/commit/0dae924c1f668f74370b642ba91f818b728aca40
Author: delaram-talaashrafi <dtalaashrafi at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-routine03.f90
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/unittests/Dialect/OpenACC/OpenACCOpsTest.cpp
Log Message:
-----------
[openacc][flang] Support two type bindName representation in acc routine (#149147)
Based on the OpenACC specification — which states that if the bind name
is given as an identifier it should be resolved according to the
compiled language, and if given as a string it should be used unmodified
— we introduce two distinct `bindName` representations for `acc routine`
to handle each case appropriately: one as an array of `SymbolRefAttr`
for identifiers and another as an array of `StringAttr` for strings.
To ensure correct correspondence between bind names and devices, this
patch also introduces two separate sets of device attributes. The
routine operation is extended accordingly, along with the necessary
updates to the OpenACC dialect and its lowering.
Commit: b3a8d0efc907aae8198ff16e5bfb8dc48f08b6ca
https://github.com/llvm/llvm-project/commit/b3a8d0efc907aae8198ff16e5bfb8dc48f08b6ca
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
Log Message:
-----------
[RISCV] Add additional coverage for one hot interleave load cases [nfc]
Add coverage for fixed vector vp.load, and the deinterleave intrinsic paths.
Commit: e4a3541ff88af03c01007a94b6b5f5cea95ecf33
https://github.com/llvm/llvm-project/commit/e4a3541ff88af03c01007a94b6b5f5cea95ecf33
Author: Akshay Khadse <akshayskhadse at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/Bindings/Python/Pass.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
M mlir/test/python/ir/operation.py
M mlir/test/python/pass_manager.py
Log Message:
-----------
[MLIR][Python] Support eliding large resource strings in PassManager (#149187)
- Introduces a `large_resource_limit` parameter across Python bindings,
enabling the eliding of resource strings exceeding a specified character
limit during IR printing.
- To maintain backward compatibilty, when using `operation.print()` API,
if `large_resource_limit` is None and the `large_elements_limit` is set,
the later will be used to elide the resource string as well. This change
was introduced by https://github.com/llvm/llvm-project/pull/125738.
- For printing using pass manager, the `large_resource_limit` and
`large_elements_limit` are completely independent of each other.
Commit: d35931c49e5b37243ace2b79bec87463772b6c94
https://github.com/llvm/llvm-project/commit/d35931c49e5b37243ace2b79bec87463772b6c94
Author: T0b1-iOS <T0b1-iOS at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/X86/i128-debuginfo.c
M clang/test/CodeGen/X86/x86_64-arguments.c
M clang/test/CodeGen/alloc-align-attr.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/extend-arg-64.c
Log Message:
-----------
[Clang][CodeGen][X86] don't coerce int128 into `{i64,i64}` for SysV-like ABIs (#135230)
Currently, clang coerces (u)int128_t to two i64 IR parameters when they
are passed in registers. This leads to broken debug info for them after
applying SROA+InstCombine. SROA generates IR like this
([godbolt](https://godbolt.org/z/YrTa4chfc)):
```llvm
define dso_local { i64, i64 } @add(i64 noundef %a.coerce0, i64 noundef %a.coerce1) {
entry:
%a.sroa.2.0.insert.ext = zext i64 %a.coerce1 to i128
%a.sroa.2.0.insert.shift = shl nuw i128 %a.sroa.2.0.insert.ext, 64
%a.sroa.0.0.insert.ext = zext i64 %a.coerce0 to i128
%a.sroa.0.0.insert.insert = or i128 %a.sroa.2.0.insert.shift, %a.sroa.0.0.insert.ext
#dbg_value(i128 %a.sroa.0.0.insert.insert, !17, !DIExpression(), !18)
// ...
!17 = !DILocalVariable(name: "a", arg: 1, scope: !10, file: !11, line: 1, type: !14)
// ...
```
and InstCombine then removes the `or`, moving it into the
`DIExpression`, and the `shl` at which point the debug info salvaging in
`Transforms/Local` replaces the arguments with `poison` as it does not
allow constants larger than 64 bit in `DIExpression`s.
I'm working under the assumption that there is interest in fixing this.
If not, please tell me.
By not coercing `int128_t`s into `{i64, i64}` but keeping them as
`i128`, the debug info stays intact and SelectionDAG then generates two
`DW_OP_LLVM_fragment` expressions for the two corresponding argument
registers.
Given that the ABI code for x64 seems to not coerce the argument when it
is passed on the stack, it should not lead to any problems keeping it as
an `i128` when it is passed in registers.
Alternatively, this could be fixed by checking if a constant value fits
in 64 bits in the debug info salvaging code and then extending the value
on the expression stack to the necessary width. This fixes InstCombine
breaking the debug info but then SelectionDAG removes the expression and
that seems significantly more complex to debug.
Another fix may be to generate `DW_OP_LLVM_fragment` expressions when
removing the `or` as it gets marked as disjoint by InstCombine. However,
I don't know if the KnownBits information is still available at the time
the `or` gets removed and it would probably require refactoring of the
debug info salvaging code as that currently only seems to replace single
expressions and is not designed to support generating new debug records.
Converting `(u)int128_t` arguments to `i128` in the IR seems like the
simpler solution, if it doesn't cause any ABI issues.
Commit: ff5784bb9094f6035851dc7abc4a5760fdc21e45
https://github.com/llvm/llvm-project/commit/ff5784bb9094f6035851dc7abc4a5760fdc21e45
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] Move extractOmpDirective to Utils.cpp, NFC (#148653)
Commit: 871d65bfdd580cec349e63d687e6829e0ef62824
https://github.com/llvm/llvm-project/commit/871d65bfdd580cec349e63d687e6829e0ef62824
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI] Migrate monolithic-linux script to sccache
This is in preparation for migrating to Google Cloud Storage (GCS) based
caching soon which is only supported by sccache.
Reviewers: Keenuts, gburgessiv, dschuff, lnihlen, cmtice
Reviewed By: cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/149195
Commit: fcb7ed69d0b4b0eb6cf7802b660d92a29bca718f
https://github.com/llvm/llvm-project/commit/fcb7ed69d0b4b0eb6cf7802b660d92a29bca718f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[CI][Github] Use newer sccache version in CI container
I was having trouble with the version that ships in the ubuntu apt repository
and GCS based caching. The newer version works, so reintroduce the infra that
we had in 2c1d4b0404187f0162d3b2df64dae062e53c3c79 to download it.
Reviewers: tstellar, lnihlen, gburgessiv, dschuff, cmtice, Keenuts
Reviewed By: cmtice, Keenuts
Pull Request: https://github.com/llvm/llvm-project/pull/149196
Commit: b84f72a7f51e2ea829feb12ecbb8be0cfc835e2c
https://github.com/llvm/llvm-project/commit/b84f72a7f51e2ea829feb12ecbb8be0cfc835e2c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
Log Message:
-----------
[CIR] Upstream Unary Inc/Dec for ComplexType (#149162)
This change adds support for unary inc/dec operators for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 46c059f925d18afc99db90dd9b9be989f7f62536
https://github.com/llvm/llvm-project/commit/46c059f925d18afc99db90dd9b9be989f7f62536
Author: Robert Konicar <rkonicar at mail.muni.cz>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Dialect/LLVMIR/ifunc.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
A mlir/test/Target/LLVMIR/Import/ifunc.ll
A mlir/test/Target/LLVMIR/ifunc.mlir
Log Message:
-----------
[mlir][LLVMIR] Add IFuncOp to LLVM dialect (#147697)
Add IFunc to LLVM dialect and add support for lifting/exporting LLVMIR
IFunc.
Commit: b8bc3ff9bedf0b8f1d38273f7920cb0bba1a5a9e
https://github.com/llvm/llvm-project/commit/b8bc3ff9bedf0b8f1d38273f7920cb0bba1a5a9e
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/exp10f.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp10f.h
A libc/src/__support/math/exp10f_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/coshf.cpp
M libc/src/math/generic/exp10f.cpp
R libc/src/math/generic/exp10f_impl.h
R libc/src/math/generic/explogxf.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/sinhf.cpp
M libc/test/src/math/explogxf_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor exp10f implementation to header-only in src/__support/math folder. (#148405)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 13549fd90af45d2200159cac14a12cf01db56aa1
https://github.com/llvm/llvm-project/commit/13549fd90af45d2200159cac14a12cf01db56aa1
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
Log Message:
-----------
MCAssembler: Modify Contents when VarFixups is not empty
When there is no VarFixup, VarContentStart is zero.
`slice(F.VarContentStart - Contents.size(), F.getSize())`
might lead to "runtime error: addition of unsigned offset to" in ubsan builds after #148544
Commit: 6f28eec6dc68c64ebe108be3fdb7d0affb1e3349
https://github.com/llvm/llvm-project/commit/6f28eec6dc68c64ebe108be3fdb7d0affb1e3349
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libc/src/__support/wchar/string_converter.h
M libc/test/src/__support/wchar/string_converter_test.cpp
Log Message:
-----------
[libc] Fixed StringConverter Error Edge Case (#149356)
Fixed StringConverter edge case related to destination limit
If we call pop() but there is no space in the dest array, we should
always return the "no space in destination" error even if the following
character is invalid (since we shouldn't really have to look at the next
character)
Commit: 163da8796bed51f82d7c07d0ac6db6de7879bd21
https://github.com/llvm/llvm-project/commit/163da8796bed51f82d7c07d0ac6db6de7879bd21
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/docs/LibClang.rst
Log Message:
-----------
[Docs] Mention security of libclang (#149357)
Libclang is a wrapper around the Clang frontend, and frontends are not
security-sensitive components of the LLVM project. However, libclang is
often embedded in people's downstream tools, so it's best to mention
that explicitly.
Commit: aa3978573e15205b43c6a7e3b4a6f940ccded7a2
https://github.com/llvm/llvm-project/commit/aa3978573e15205b43c6a7e3b4a6f940ccded7a2
Author: tyb0807 <sontuan.vu119 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/IR/CommonAttrConstraints.td
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/MemRef/ops.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
Log Message:
-----------
[mlir][vector][memref] Add `alignment` attribute to memory access ops (#144344)
Alignment information is important to allow LLVM backends such as AMDGPU
to select wide memory accesses (e.g., dwordx4 or b128). Since this info
is not always inferable, it's better to inform LLVM backends explicitly
about it. Furthermore, alignment is not necessarily a property of the
element type, but of each individual memory access op (we can have
overaligned and underaligned accesses compared to the natural/preferred
alignment of the element type).
This patch introduces `alignment` attribute to memref/vector.load/store
ops.
Follow-up PRs will
1. Propagate the attribute to LLVM/SPIR-V.
2. Introduce `alignment` attribute to other vector memory access ops:
vector.gather + vector.scatter
vector.transfer_read + vector.transfer_write
vector.compressstore + vector.expandload
vector.maskedload + vector.maskedstore
3. Replace `--convert-vector-to-llvm='use-vector-alignment=1` with a
simple pass to populate alignment attributes based on the vector
types.
Commit: e73d1a5341fafb1eadb77b787eb6e65630b4db3a
https://github.com/llvm/llvm-project/commit/e73d1a5341fafb1eadb77b787eb6e65630b4db3a
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512-gfni-intrinsics.ll
Log Message:
-----------
[msan] Add tests for avx512-gfni-intrinsics (#149258)
Gluten-free, nuts included or something
Commit: 3b11aaaf94fe6c7b4ccfd031f952265f706c1b68
https://github.com/llvm/llvm-project/commit/3b11aaaf94fe6c7b4ccfd031f952265f706c1b68
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg] Add support for scalable vectorization of linalg.mmt4d (#146531)
This patch adds support for scalable vectorization of linalg.mmt4d. The
key design change is the introduction of a new vectorizer state variable:
* `assumeDynamicDimsMatchVecSizes`
...along with the corresponding Transform dialect attribute:
* `assume_dynamic_dims_match_vec_sizes`.
This flag instructs the vectorizer to assume that dynamic memref/tensor
dimensions match the corresponding vector sizes (fixed or scalable). With this
assumption, masking becomes unnecessary, which simplifies the lowering pipeline
significantly.
While this assumption is not universally valid, it typically holds for
`linalg.mmt4d`. Inputs and outputs are explicitly packed using `linalg.pack`,
and this packing includes padding, ensuring that dimension sizes align with
vector sizes (*).
* Related discussion: https://github.com/llvm/llvm-project/issues/143920
An upcoming patch will include an end-to-end test that leverages scalable
vectorization of linalg.mmt4d to demonstrate the newly enabled functionality.
This would not be feasible without the changes introduced here, as it would
otherwise require additional logic to handle complex - but ultimately redundant
- masks.
(*) This holds provided that the tile sizes used for packing match the vector
sizes used during vectorization. It is the user’s responsibility to enforce
this.
Commit: f480e1b8258eac3565b3ffaf3f8ed0f77eb87fee
https://github.com/llvm/llvm-project/commit/f480e1b8258eac3565b3ffaf3f8ed0f77eb87fee
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
A llvm/test/CodeGen/NVPTX/prmt-const-folding.ll
Log Message:
-----------
[NVPTX] Add PRMT constant folding and cleanup usage of PRMT node (#148906)
Commit: 3fa07ed5b38774656a2cff1bebc1785ce8e7feb8
https://github.com/llvm/llvm-project/commit/3fa07ed5b38774656a2cff1bebc1785ce8e7feb8
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M compiler-rt/lib/tysan/lit.cfg
M compiler-rt/test/asan/lit.cfg.py
M compiler-rt/test/asan_abi/lit.cfg.py
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/builtins/lit.cfg.py
M compiler-rt/test/ctx_profile/lit.cfg.py
M compiler-rt/test/dfsan/lit.cfg.py
M compiler-rt/test/fuzzer/lit.cfg.py
M compiler-rt/test/gwp_asan/lit.cfg.py
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lsan/lit.common.cfg.py
M compiler-rt/test/memprof/lit.cfg.py
M compiler-rt/test/metadata/lit.cfg.py
M compiler-rt/test/msan/lit.cfg.py
M compiler-rt/test/nsan/lit.cfg.py
M compiler-rt/test/orc/lit.cfg.py
M compiler-rt/test/orc/lit.site.cfg.py.in
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/rtsan/Unit/lit.site.cfg.py.in
M compiler-rt/test/rtsan/lit.cfg.py
M compiler-rt/test/safestack/lit.cfg.py
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
M compiler-rt/test/scudo/lit.cfg.py
M compiler-rt/test/shadowcallstack/lit.cfg.py
M compiler-rt/test/tsan/Unit/lit.site.cfg.py.in
M compiler-rt/test/tsan/libdispatch/lit.local.cfg.py
M compiler-rt/test/tsan/lit.cfg.py
M compiler-rt/test/tysan/lit.cfg.py
M compiler-rt/test/ubsan/TestCases/TypeCheck/Function/lit.local.cfg.py
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan_minimal/lit.common.cfg.py
M compiler-rt/test/xray/lit.cfg.py
M compiler-rt/unittests/lit.common.unit.cfg.py
M compiler-rt/unittests/lit.common.unit.configured.in
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
Log Message:
-----------
Rename config.host_os to config.target_os.
config.host_os is derived from CMAKE_SYSTEM_NAME
which specifies the target. See:
https://cmake.org/cmake/help/latest/variable/CMAKE_SYSTEM_NAME.html
To reduce confusion, rename it to config.target_os.
The variable name config.target_os was already being used by the Orc
tests. Rename it to config.orc_test_target_os with a FIXME to remove.
Reviewers: JDevlieghere, MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/149015
Commit: afff28e4cb4b56dc5c77ecdb5aad9ec10e170999
https://github.com/llvm/llvm-project/commit/afff28e4cb4b56dc5c77ecdb5aad9ec10e170999
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI][Github] Enable CIR CI build and test (#147430)
This change modifies CI scripts to add a pseudo-project for CIR and
detect when CIR-specific files are modified. It also enables building
clang with CIR enabled whenever both the clang and mlir projects are
being built.
Building and testing CIR is only enabled on Linux at this time, as CIR
doesn't properly support Windows or MacOS yet.
Commit: 413e71b700562f914b369c7eab6ad41c18910bdf
https://github.com/llvm/llvm-project/commit/413e71b700562f914b369c7eab6ad41c18910bdf
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/docs/Extensions.md
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/test/Driver/cuda-option.f90
M flang/test/Driver/unparse-use-analyzed.f95
M flang/test/Driver/unparse-with-modules.f90
M flang/test/Integration/debug-common-block-1.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Lower/CUDA/cuda-derived.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/HLFIR/procedure-pointer-component-structure-constructor.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/atomic-write.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-3.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-lb.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-lb2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/basic-program.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/location.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/pre-fir-tree03.f90
M flang/test/Lower/pre-fir-tree06.f90
M flang/test/Lower/program-units-fir-mangling.f90
M flang/test/Lower/return-statement.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile3.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/OpenACC/acc-symbols01.f90
M flang/test/Semantics/OpenMP/critical_within_default.f90
M flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
M flang/test/Semantics/OpenMP/declare-reduction-mangled.f90
M flang/test/Semantics/OpenMP/declare-reduction-operators.f90
M flang/test/Semantics/OpenMP/declare-reduction-renamedop.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
M flang/test/Semantics/OpenMP/declare-target03.f90
M flang/test/Semantics/OpenMP/do-schedule03.f90
M flang/test/Semantics/OpenMP/do01-positivecase.f90
M flang/test/Semantics/OpenMP/do04-positivecase.f90
M flang/test/Semantics/OpenMP/do05-positivecase.f90
M flang/test/Semantics/OpenMP/do06-positivecases.f90
M flang/test/Semantics/OpenMP/do11.f90
M flang/test/Semantics/OpenMP/do12.f90
M flang/test/Semantics/OpenMP/do14.f90
M flang/test/Semantics/OpenMP/do17.f90
M flang/test/Semantics/OpenMP/map-clause-symbols.f90
M flang/test/Semantics/OpenMP/reduction08.f90
M flang/test/Semantics/OpenMP/reduction09.f90
M flang/test/Semantics/OpenMP/reduction11.f90
M flang/test/Semantics/OpenMP/scan2.f90
M flang/test/Semantics/OpenMP/symbol01.f90
M flang/test/Semantics/OpenMP/symbol05.f90
M flang/test/Semantics/OpenMP/symbol07.f90
M flang/test/Semantics/OpenMP/symbol09.f90
M flang/test/Semantics/OpenMP/threadprivate03.f90
M flang/test/Semantics/getsymbols03-a.f90
M flang/test/Semantics/long-name.f90
M flang/test/Semantics/modproc01.f90
M flang/test/Semantics/multi-programs04.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/procinterface01.f90
M flang/test/Semantics/resolve05.f90
M flang/test/Semantics/resolve125.f90
M flang/test/Semantics/symbol03.f90
M flang/test/Semantics/symbol06.f90
M flang/test/Semantics/symbol07.f90
M flang/test/Semantics/symbol08.f90
M flang/test/Semantics/symbol15.f90
M flang/test/Semantics/symbol16.f90
M flang/test/Semantics/symbol17.f90
M flang/test/Semantics/symbol18.f90
M flang/test/Semantics/symbol20.f90
M flang/test/Semantics/symbol25.f90
M flang/test/Semantics/symbol26.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
Log Message:
-----------
[flang] Main program symbol no longer conflicts with the other symbols (#149169)
The following code is now accepted:
```
module m
end
program m
use m
end
```
The PROGRAM name doesn't really have an effect on the compilation
result, so it shouldn't result in symbol name conflicts.
This change makes the main program symbol name all uppercase in the
cooked character stream. This makes it distinct from all other symbol
names that are all lowercase in cooked character stream.
Modified the tests that were checking for lower case main program name.
Commit: 2c0c87be1258c36a177bfd47f272f8dffca366f4
https://github.com/llvm/llvm-project/commit/2c0c87be1258c36a177bfd47f272f8dffca366f4
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M compiler-rt/test/lit.common.configured.in
Log Message:
-----------
Speculative buildbot fix.
Commit: 73d4cea68cce998b1349e3820dc5d80e1096b015
https://github.com/llvm/llvm-project/commit/73d4cea68cce998b1349e3820dc5d80e1096b015
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/test/Lower/OpenMP/taskgroup02.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.h
Log Message:
-----------
[flang][OpenMP] Generalize isOpenMPPrivatizingConstruct (#148654)
Instead of treating all block and all loop constructs as privatizing,
actually check if the construct allows a privatizing clause.
Commit: fd5fc76c91538871771be2c3be2ca3a5f2dcac31
https://github.com/llvm/llvm-project/commit/fd5fc76c91538871771be2c3be2ca3a5f2dcac31
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_cos_bf16` on gfx1250 (#149355)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: d994487db780d5b3ec4286391598684d99e9c9c3
https://github.com/llvm/llvm-project/commit/d994487db780d5b3ec4286391598684d99e9c9c3
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/lit.cfg.py
A llvm/test/tools/llvm-ir2vec/triplets.ll
A llvm/tools/llvm-ir2vec/CMakeLists.txt
A llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[IR2Vec] Add llvm-ir2vec tool for generating triplet embeddings (#147842)
Add a new LLVM tool `llvm-ir2vec`. This tool is primarily intended to generate triplets for training the vocabulary (#141834) and to potentially generate the embeddings in a stand alone manner.
This PR introduces the tool with triplet generation functionality. In the upcoming PRs I'll add scripts under `utils/mlgo` to complete the vocabulary tooling. #147844 adds embedding generation logic to the tool.
(Tracking issue - #141817)
Commit: 70e2319e9a0f65d8cac666a16a432501261e16a8
https://github.com/llvm/llvm-project/commit/70e2319e9a0f65d8cac666a16a432501261e16a8
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/lit.cfg.py
A llvm/test/tools/llvm-ir2vec/embeddings.ll
M llvm/test/tools/llvm-ir2vec/triplets.ll
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[IR2Vec] Add embeddings mode to llvm-ir2vec tool (#147844)
Add embedding generation functionality to the llvm-ir2vec tool, complementing the existing triplet generation mode.
This change completes the IR2Vec tool by adding the embedding generation functionality, which was previously mentioned as a TODO item. The tool now supports both triplet generation for vocabulary training and embedding generation using a trained vocabulary.
Commit: f2956173aea4ff0fe0b823be1953d1968f91fb98
https://github.com/llvm/llvm-project/commit/f2956173aea4ff0fe0b823be1953d1968f91fb98
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/docs/CommandGuide/index.rst
A llvm/docs/CommandGuide/llvm-ir2vec.rst
M llvm/docs/MLGO.rst
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[IR2Vec] Adding documentation for llvm-ir2vec tool (#148719)
Tracking issues - #141817, #141834
Commit: e68efed71ba818a9eb18a2baede922e1e2ff9a46
https://github.com/llvm/llvm-project/commit/e68efed71ba818a9eb18a2baede922e1e2ff9a46
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Windows/lit.local.cfg.py
M compiler-rt/test/builtins/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/cfi/cross-dso/lit.local.cfg.py
M compiler-rt/test/hwasan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/hwasan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/lsan/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/lsan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/lsan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/msan/Linux/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/FreeBSD/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/Windows/lit.local.cfg.py
M compiler-rt/test/profile/AIX/lit.local.cfg.py
M compiler-rt/test/profile/Darwin/lit.local.cfg.py
M compiler-rt/test/profile/Linux/lit.local.cfg.py
M compiler-rt/test/profile/Posix/lit.local.cfg.py
M compiler-rt/test/profile/Windows/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/FreeBSD/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/NetBSD/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/tsan/Darwin/lit.local.cfg.py
M compiler-rt/test/tsan/Linux/lit.local.cfg.py
M compiler-rt/test/tsan/libcxx/lit.local.cfg.py
M compiler-rt/test/ubsan/TestCases/Misc/Posix/lit.local.cfg.py
M compiler-rt/test/ubsan/TestCases/TypeCheck/Linux/lit.local.cfg.py
Log Message:
-----------
Fix more compiler-rt tests after #149015.
Commit: 7e105fbdbe3167d0724a64601a0e72923ed5e021
https://github.com/llvm/llvm-project/commit/7e105fbdbe3167d0724a64601a0e72923ed5e021
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_tanh_f32` on gfx1250 (#149360)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 4e6b843cf59735ffb7092edd178e4b03433a44df
https://github.com/llvm/llvm-project/commit/4e6b843cf59735ffb7092edd178e4b03433a44df
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_descriptions.cpp
Log Message:
-----------
[asan] Revert global check for non-AIX (#149245)
287b24e1899eb6ce62eb9daef5a24faae5e66c1e moved the
`GetGlobalAddressInformation` call earlier, but this broke a chromium
test, so make this workaround for AIX only.
Commit: a8880265e1755b346fe6c3e7e93b57381d8c9eb8
https://github.com/llvm/llvm-project/commit/a8880265e1755b346fe6c3e7e93b57381d8c9eb8
Author: Jeremy Kun <jkun at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/test/IR/test-pattern-logging-listener.mlir
Log Message:
-----------
[mlir] Fix CI breakage from https://github.com/llvm/llvm-project/pull/146228 (#149378)
Some platforms print `{anonymous}` instead of the other two forms
accepted by the test regex. This PR just removes the attempt to guess
how the anonymous namespace will be printed.
@Kewen12 is there a way to trigger the particular CIs that failed in
https://github.com/llvm/llvm-project/pull/146228 on this PR?
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: 48cd22c5661ea454f4ff189c21a8f01c426eb1aa
https://github.com/llvm/llvm-project/commit/48cd22c5661ea454f4ff189c21a8f01c426eb1aa
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
Log Message:
-----------
[NFC] simplify LowerAllowCheckPass::printPipeline (#149374)
Commit: e8182fb501622840e7b0a981506f71188fdaeb61
https://github.com/llvm/llvm-project/commit/e8182fb501622840e7b0a981506f71188fdaeb61
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/config/windows/entrypoints.txt
M libc/config/windows/headers.txt
M libc/include/CMakeLists.txt
A libc/include/wctype.yaml
M libc/src/CMakeLists.txt
A libc/src/wctype/CMakeLists.txt
A libc/src/wctype/iswalpha.cpp
A libc/src/wctype/iswalpha.h
M libc/test/src/CMakeLists.txt
A libc/test/src/wctype/CMakeLists.txt
A libc/test/src/wctype/iswalpha_test.cpp
Log Message:
-----------
[libc] add wctype.h header (#149202)
Add basic configurations to generate wctype.h header file. To begin with
this header file just exposes one function iswalpha.
Commit: 6a60f18997d62b0e2842a921fcb6beb3e52ed823
https://github.com/llvm/llvm-project/commit/6a60f18997d62b0e2842a921fcb6beb3e52ed823
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/constexpr-never-constant.cpp
Log Message:
-----------
[clang] Fix potential constant expression checking with constexpr-unknown. (#149227)
071765749a70b22fb62f2efc07a3f242ff5b4c52 improved constexpr-unknown
diagnostics, but potential constant expression checking broke in the
process: we produce diagnostics in more cases. Suppress the diagnostics
as appropriate.
This fix affects -Winvalid-constexpr and the enable_if attribute. (The
-Winvalid-constexpr diagnostic isn't really important right now, but it
will become important if we allow constexpr-unknown with pre-C++23
standards.)
Fixes #149041. Fixes #149188.
Commit: 284dd5ba84ade5891ab9d68f00e335b37c0f1a1f
https://github.com/llvm/llvm-project/commit/284dd5ba84ade5891ab9d68f00e335b37c0f1a1f
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/X86/invalid-operand-bundle-call.ll
Log Message:
-----------
[SelectionDAG] Fix misplaced commas in operand bundle errors (#149331)
Commit: b0c6148584854af3d7ed2425034c3b5252f6b769
https://github.com/llvm/llvm-project/commit/b0c6148584854af3d7ed2425034c3b5252f6b769
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
Log Message:
-----------
[DWARFLinker] Use different addresses to distinguish invalid DW_AT_LLVM_stmt_sequence offset (#149376)
It'd be helpful (especially when `llvm-dwarfdump ... | grep
<invalid_address>`) to separate two different invalid reasons for
debugging.
Commit: 1e7ec351c40af981e299743a955d71c7d70753a8
https://github.com/llvm/llvm-project/commit/1e7ec351c40af981e299743a955d71c7d70753a8
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/source/Target/TargetProperties.td
A lldb/test/Shell/Settings/TestChildDepthTruncation.test
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/class_layout.lldbinit
Log Message:
-----------
[lldb] Adjust default target.max-children-depth (#149282)
Deeply nested structs can be noisy, so Apple's LLDB fork sets the
default to `4`:
https://github.com/swiftlang/llvm-project/blob/9c93adbb283005ab416fd155b75fd43e6a8288ca/lldb/source/Target/TargetProperties.td#L134-L136
Thought it would be useful to upstream this. Though happy to pick a
different default or keep it as-is.
Commit: 867ff3001e4e1e68b3f26c5ead281ea2208c4c48
https://github.com/llvm/llvm-project/commit/867ff3001e4e1e68b3f26c5ead281ea2208c4c48
Author: Tobias Hieta <tobias at hieta.se>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/utils/release/export.sh
Log Message:
-----------
Use Parallel xz for test-suite sources. (#149389)
Commit: aea2d5396187cf19447cc80716fd483dd4b634dc
https://github.com/llvm/llvm-project/commit/aea2d5396187cf19447cc80716fd483dd4b634dc
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[MLIR][XeGPU] make offsets optional for create_nd_tdesc (#148335)
Commit: 61a45d20cfe7f93ec1b73dc2dd776f493af2a7cc
https://github.com/llvm/llvm-project/commit/61a45d20cfe7f93ec1b73dc2dd776f493af2a7cc
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR2Vec][NFC] Add helper methods for numeric ID mapping in Vocabulary (#149212)
Add helper methods to IR2Vec's Vocabulary class for numeric ID mapping and vocabulary size calculation. These APIs will be useful in triplet generation for `llvm-ir2vec` tool (See #149214).
(Tracking issue - #141817)
Commit: 202f30ede1bc4ceb2480db3c93440d999da9f24b
https://github.com/llvm/llvm-project/commit/202f30ede1bc4ceb2480db3c93440d999da9f24b
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
Log Message:
-----------
[IR2Vec][llvm-ir2vec] Add support for reading from stdin (#149213)
Add support for reading LLVM IR from stdin in the llvm-ir2vec tool.
This allows usage of the tool in pipelines where LLVM IR is generated or transformed on-the-fly just like the other llvm tools. Useful in upcoming PRs.
(Tracking issue - #141817)
Commit: 64c7e7efebcdd5bccae4a44d414ef686357fc509
https://github.com/llvm/llvm-project/commit/64c7e7efebcdd5bccae4a44d414ef686357fc509
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add tools/llvm-ir2vec to pr-subscribes-mlgo (#149405)
Commit: 7e220630d28741b30bb4423e34e76654c7d9d1f7
https://github.com/llvm/llvm-project/commit/7e220630d28741b30bb4423e34e76654c7d9d1f7
Author: Jian Cai <jiancai at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
M mlir/include/mlir/IR/OpBase.td
Log Message:
-----------
[mlir][docs] Rename OpTrait to Trait in ODS doc (#148276)
This makes the doc consistent with the code base.
Commit: 8de61eb01c9752f0488ed8b52d01fe3d0873ff6c
https://github.com/llvm/llvm-project/commit/8de61eb01c9752f0488ed8b52d01fe3d0873ff6c
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Support/BLAKE3/blake3_dispatch.c
M llvm/lib/Support/BLAKE3/blake3_impl.h
Log Message:
-----------
[Support/BLAKE3] quick fix for Cygwin build (#148635)
BLAKE3 1.8.2 ( imported in d2ad63a193216d008c8161879a59c5f42e0125cc )
fails to build for the Cygwin target.
see: https://github.com/BLAKE3-team/BLAKE3/issues/494
As a temporary workaround, add `&& !defined(__CYGWIN__)` to BLAKE3
locally.
resolves https://github.com/llvm/llvm-project/issues/148365
Commit: 422a250b0b8fce3e7ff20c400b5ab2837a7baeae
https://github.com/llvm/llvm-project/commit/422a250b0b8fce3e7ff20c400b5ab2837a7baeae
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
A llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu-flat.mir
Log Message:
-----------
[AMDGPU] add tests for Change FLAT SADDR to VADDR form in moveToVALU. NFC. (#149392)
Commit: be3d614cc13f016b16634e18e10caed508d183d2
https://github.com/llvm/llvm-project/commit/be3d614cc13f016b16634e18e10caed508d183d2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libcxx/include/ext/hash_map
M libcxx/include/ext/hash_set
A libcxx/test/extensions/gnu/hash_multimap/insert.pass.cpp
A libcxx/test/extensions/gnu/hash_multiset/insert.pass.cpp
Log Message:
-----------
[libc++] Fix hash_multi{map,set}::insert (#149290)
Commit: 70046cd2b5f4302146d7ea79497b84748f606c77
https://github.com/llvm/llvm-project/commit/70046cd2b5f4302146d7ea79497b84748f606c77
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
Log Message:
-----------
AMDGPU: Remove the dot4 test in insert-delay-alu-wmma-xdl.mir, NFC (#149375)
This is irrelevant, and caused a failure in downstream.
Fixes: SWDEV-544025
Commit: b8264293a714347a77f150b109cfdde8665eeadc
https://github.com/llvm/llvm-project/commit/b8264293a714347a77f150b109cfdde8665eeadc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/test/Shell/Settings/TestChildDepthTruncation.test
Log Message:
-----------
[lldb][test] TestChildDepthTruncation: don't force DWARF
Fixes test on Windows. Same reason as https://github.com/llvm/llvm-project/pull/149322
Commit: 6b29ee9d9a8dc6eaf1f47b4d66b4c569e00a112f
https://github.com/llvm/llvm-project/commit/6b29ee9d9a8dc6eaf1f47b4d66b4c569e00a112f
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/load_lds.mlir
M mlir/test/Dialect/AMDGPU/invalid.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Properly handle mismatching memref ranks in `amdgpu.gather_to_lds` (#149407)
This op doesn't have any rank or indices restrictions on src/dst
memrefs, but was using `SameVariadicOperandSize` which was causing
issues. Also fix some other issues while we at it.
Commit: 25619c406ee2590f7b18364a5c88c7492bba3508
https://github.com/llvm/llvm-project/commit/25619c406ee2590f7b18364a5c88c7492bba3508
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Remove unused VGLOBAL_Real_AllAddr_gfx12. NFC. (#149398)
Commit: 5d78332e8aa8c2542aae80fd580c8137a060cb6b
https://github.com/llvm/llvm-project/commit/5d78332e8aa8c2542aae80fd580c8137a060cb6b
Author: S. VenkataKeerthy <31350914+svkeerthy at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add llvm-ir2vec.rst to pr-subscribes-mlgo (#149412)
Commit: 689e95817e1671b0ed6c7f2031fbcf2f81632978
https://github.com/llvm/llvm-project/commit/689e95817e1671b0ed6c7f2031fbcf2f81632978
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/test/CodeGen/DirectX/legalize-load-store-array-alloca.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-store.ll
Log Message:
-----------
[DirectX] Add a GEP to scalar load/store on globals and remove incorrect assertion (#149191)
Fixes #149180
This PR removes an assertion that triggered on valid IR. It has been
replaced with an if statement that returns early if the conditions are
not correct.
This PR also adds GEPs to scalar loads and stores from/to global
variables.
Commit: fae8df2b82692ec8f69ba578847713f0da6e1ddc
https://github.com/llvm/llvm-project/commit/fae8df2b82692ec8f69ba578847713f0da6e1ddc
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/test/CodeGen/DirectX/flatten-array.ll
Log Message:
-----------
[DirectX] Fix GEP flattening with 0-indexed GEPs on global variables (#149211)
Fixes #149179
The issue is that `Builder.CreateGEP` does not return a GEP Instruction
or GEP ContantExpr when the pointer operand is a global variable and all
indices are constant zeroes.
This PR ensures that a GEP instruction is created if `Builder.CreateGEP`
did not return a GEP.
Commit: 72a2d8220ade3f9ac96f5424f803c774499cf54c
https://github.com/llvm/llvm-project/commit/72a2d8220ade3f9ac96f5424f803c774499cf54c
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libc/include/CMakeLists.txt
R libc/include/dlfcn.h.def
M libc/include/dlfcn.yaml
R libc/include/llvm-libc-macros/dlfcn-macros.h
Log Message:
-----------
[libc] Convert dlfcn.h to pure YAML (#149362)
Remove the unnecessary .h.def file and move all the macro
definitions directly into dlfcn.yaml.
Commit: fc3781853ba1b456429a908e5604589c68878ab8
https://github.com/llvm/llvm-project/commit/fc3781853ba1b456429a908e5604589c68878ab8
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/subgroup-distribute.mlir
Log Message:
-----------
[mlir][xegpu] Minor fixes in XeGPU subgroup distribution. (#147846)
This PR addresses the following issues.
1. Add the missing attributes when creating a new GPU funcOp in
`MoveFuncBodyToWarpExecuteOnLane0` pattern.
2. Bug fix in LoadNd distribution to make sure LoadOp is the last op in
warpOp region before it is distributed (needed for preserving the memory
op ordering during distribution).
3. Add utility for removing OpOperand or OpResult layout attributes.
Commit: 2a7328dacae39e87ca4cc7548b9abcdba60b946b
https://github.com/llvm/llvm-project/commit/2a7328dacae39e87ca4cc7548b9abcdba60b946b
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/unittests/Optimizer/Builder/CharacterTest.cpp
M flang/unittests/Optimizer/Builder/ComplexTest.cpp
M flang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
M flang/unittests/Optimizer/Builder/HLFIRToolsTest.cpp
M flang/unittests/Optimizer/Builder/Runtime/RuntimeCallTestBase.h
M flang/unittests/Optimizer/FortranVariableTest.cpp
Log Message:
-----------
[flang] Migrate away from ArrayRef(std::nullopt_t) (#149337)
ArrayRef(std::nullopt_t) has been deprecated. This patch replaces
std::nullopt with {}.
A subsequence patch will address those places where we need to replace
std::nullopt with mlir::TypeRange{} or mlir::ValueRange{}.
Commit: f48e2bbe9844540a7164eb62ab8bf5f2cd56743d
https://github.com/llvm/llvm-project/commit/f48e2bbe9844540a7164eb62ab8bf5f2cd56743d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/AST/StmtPrinter.cpp
Log Message:
-----------
[AST] Remove an unnecessary cast (NFC) (#149338)
getFinallyStmt() already returns ObjCAtFinallyStmt *.
Commit: be6893af87e7fb0b09ab9bb5360997f28150fd34
https://github.com/llvm/llvm-project/commit/be6893af87e7fb0b09ab9bb5360997f28150fd34
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
Log Message:
-----------
[CodeGen] Remove an unnecessary cast (NFC) (#149339)
getExceptionMode() already returns LangOptions::FPExceptionModeKind.
Commit: 2d7ff097f22660311a01c25e6ff001192dd385c4
https://github.com/llvm/llvm-project/commit/2d7ff097f22660311a01c25e6ff001192dd385c4
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
Log Message:
-----------
[Sema] Remove unnecessary casts (NFC) (#149340)
getArrayIndex(), getArrayRangeStart(), and getArrayRangeEnd() already
return Expr *.
Commit: 2da59287aa22a81bb07da07bd1ff8759d08a3368
https://github.com/llvm/llvm-project/commit/2da59287aa22a81bb07da07bd1ff8759d08a3368
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
[Target] Remove unnecessary casts (NFC) (#149342)
getFunction().getParent() already returns Module *.
Commit: 100d8f7cc72328d7f0dfabb1128b35865fd653aa
https://github.com/llvm/llvm-project/commit/100d8f7cc72328d7f0dfabb1128b35865fd653aa
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/docs/SanitizerSpecialCaseList.rst
Log Message:
-----------
[clang][docs] Fix example in SanitizerSpecialCaseList.rst (#149244)
As-ie example suppresses buffer overflow in
malloc, and leave memory leak in place. It can be
confusing.
Fixes #62421.
Commit: 8f4deff5d51ac190e056a6738018fc8aa3114151
https://github.com/llvm/llvm-project/commit/8f4deff5d51ac190e056a6738018fc8aa3114151
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libcxx/include/fstream
Log Message:
-----------
[libcxx][fstream][NFC] Make __failed helper lambda a member function (#149390)
This patch makes the `__failed` lambda a member function on `fstream`.
This fixes two LLDB expression evaluation test failures that got
introduced with https://github.com/llvm/llvm-project/pull/147389:
```
16:22:51 ********************
16:22:51 Unresolved Tests (2):
16:22:51 lldb-api :: commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentListFromStdModule.py
16:22:51 lldb-api :: commands/expression/import-std-module/list/TestListFromStdModule.py
```
The expression evaluator is asserting in the Clang parser:
```
Assertion failed: (capture_size() == Class->capture_size() && "Wrong number of captures"), function LambdaExpr, file ExprCXX.cpp, line 1277.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
```
Ideally we'd figure out why LLDB is falling over on this lambda. But to
unblock CI for now, make this a member function.
In the long run we should figure out the LLDB bug here so libc++ doesn't
need to care about whether it uses lambdas like this or not.
Commit: 6ff471883f7e716fe2a993f4d393c65f003994b4
https://github.com/llvm/llvm-project/commit/6ff471883f7e716fe2a993f4d393c65f003994b4
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][linalg] Improve linalg.pack consumer fusion. (#148993)
If a dimension is not tiled, it is always valid to fuse the pack op,
even if it has padding semantics. Because it always generates a full
slice along the dimension.
If a dimension is tiled and it does not need extra padding, the fusion
is valid.
The revision also formats corresponding tests for consistency.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: c15a50ad22efde55f2db46ca389735cacb92a2ad
https://github.com/llvm/llvm-project/commit/c15a50ad22efde55f2db46ca389735cacb92a2ad
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
Log Message:
-----------
[AMDGPU] More flatGVS gfx1250 patterns (#149410)
Commit: 0b6df5485ef77e76fcb09a349b5e1c39d926de5f
https://github.com/llvm/llvm-project/commit/0b6df5485ef77e76fcb09a349b5e1c39d926de5f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
Log Message:
-----------
[AMDGPU] Reenable tanh real-true16 run line. NFC. (#149411)
Commit: cf36f49c042f93e4e204ee434173f1c6a6ad4cac
https://github.com/llvm/llvm-project/commit/cf36f49c042f93e4e204ee434173f1c6a6ad4cac
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libclc/clc/lib/generic/math/clc_native_divide.inc
M libclc/clc/lib/generic/math/clc_native_recip.inc
M libclc/clc/lib/generic/math/clc_native_rsqrt.inc
M libclc/clc/lib/generic/math/clc_native_tan.inc
Log Message:
-----------
[libclc] Enable `clang fp reciprocal` in clc_native_divide/recip/rsqrt/tan (#149269)
The pragma adds `arcp` flag to `fdiv` instruction in these functions.
The flag can provide better performance.
Commit: 45477add8dfe9851605697bd908b49f0ec244625
https://github.com/llvm/llvm-project/commit/45477add8dfe9851605697bd908b49f0ec244625
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
RuntimeLibcalls: Add methods to recognize libcall names (#149001)
Also replace the current static DenseMap of preserved symbol
names in the Symtab hack with this. That was broken statefulness
across compiles, so this at least fixes that. However this is
still broken, llvm-as shouldn't really depend on the triple.
Commit: 547a49f6b6fd96deacd0234b19e59612c9034c8a
https://github.com/llvm/llvm-project/commit/547a49f6b6fd96deacd0234b19e59612c9034c8a
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[LangRef] fix non-existant `icmp gte` -> `icmp sge` (#149420)
Commit: a131ce960332db56cd1729c4829bf2694ddcb3ea
https://github.com/llvm/llvm-project/commit/a131ce960332db56cd1729c4829bf2694ddcb3ea
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir
Log Message:
-----------
AMDGPU: Handle av imm pseudo in si-fix-sgpr-copies phi fold (#149263)
Commit: 3abecfe9e35ba79926e59dedb85174400f677a2d
https://github.com/llvm/llvm-project/commit/3abecfe9e35ba79926e59dedb85174400f677a2d
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libclc/clc/include/clc/relational/binary_decl.inc
M libclc/clc/include/clc/relational/clc_isfinite.h
M libclc/clc/include/clc/relational/clc_isgreater.h
M libclc/clc/include/clc/relational/clc_isgreaterequal.h
M libclc/clc/include/clc/relational/clc_isless.h
M libclc/clc/include/clc/relational/clc_islessequal.h
M libclc/clc/include/clc/relational/clc_islessgreater.h
M libclc/clc/include/clc/relational/clc_isnormal.h
M libclc/clc/include/clc/relational/clc_isnotequal.h
M libclc/clc/include/clc/relational/clc_isordered.h
M libclc/clc/include/clc/relational/clc_isunordered.h
M libclc/clc/include/clc/relational/clc_signbit.h
R libclc/clc/include/clc/relational/floatn.inc
M libclc/clc/include/clc/relational/unary_decl.inc
M libclc/opencl/include/clc/opencl/relational/isfinite.h
M libclc/opencl/include/clc/opencl/relational/isgreater.h
M libclc/opencl/include/clc/opencl/relational/isgreaterequal.h
M libclc/opencl/include/clc/opencl/relational/isless.h
M libclc/opencl/include/clc/opencl/relational/islessequal.h
M libclc/opencl/include/clc/opencl/relational/islessgreater.h
M libclc/opencl/include/clc/opencl/relational/isnormal.h
M libclc/opencl/include/clc/opencl/relational/isnotequal.h
M libclc/opencl/include/clc/opencl/relational/isordered.h
M libclc/opencl/include/clc/opencl/relational/isunordered.h
M libclc/opencl/include/clc/opencl/relational/signbit.h
M libclc/opencl/lib/generic/relational/binary_def.inc
M libclc/opencl/lib/generic/relational/isequal.cl
M libclc/opencl/lib/generic/relational/isfinite.cl
M libclc/opencl/lib/generic/relational/isgreater.cl
M libclc/opencl/lib/generic/relational/isgreaterequal.cl
M libclc/opencl/lib/generic/relational/isinf.cl
M libclc/opencl/lib/generic/relational/isless.cl
M libclc/opencl/lib/generic/relational/islessequal.cl
M libclc/opencl/lib/generic/relational/islessgreater.cl
M libclc/opencl/lib/generic/relational/isnan.cl
M libclc/opencl/lib/generic/relational/isnormal.cl
M libclc/opencl/lib/generic/relational/isnotequal.cl
M libclc/opencl/lib/generic/relational/isordered.cl
M libclc/opencl/lib/generic/relational/isunordered.cl
M libclc/opencl/lib/generic/relational/signbit.cl
M libclc/opencl/lib/generic/relational/unary_def.inc
Log Message:
-----------
[NFC][libclc] Delete clc/include/clc/relational/floatn.inc (#149252)
llvm-diff shows no change to amdgcn--amdhsa.bc.
Commit: 8813fc07f2a0d8f7a196ca0a64477b14feb2c166
https://github.com/llvm/llvm-project/commit/8813fc07f2a0d8f7a196ca0a64477b14feb2c166
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
github: Add libclc to PR autolabeler (#149274)
Commit: c0294f497d65da998e39882c234f157daecebfa8
https://github.com/llvm/llvm-project/commit/c0294f497d65da998e39882c234f157daecebfa8
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
A libclc/clc/include/clc/integer/clc_bit_reverse.h
A libclc/clc/include/clc/integer/clc_bitfield_extract_decl.inc
A libclc/clc/include/clc/integer/clc_bitfield_extract_signed.h
A libclc/clc/include/clc/integer/clc_bitfield_extract_unsigned.h
A libclc/clc/include/clc/integer/clc_bitfield_insert.h
A libclc/clc/include/clc/integer/clc_bitfield_insert.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/integer/clc_bit_reverse.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_signed.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_signed.inc
A libclc/clc/lib/generic/integer/clc_bitfield_extract_unsigned.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_unsigned.inc
A libclc/clc/lib/generic/integer/clc_bitfield_insert.cl
A libclc/clc/lib/generic/integer/clc_bitfield_insert.inc
A libclc/opencl/include/clc/opencl/integer/bit_reverse.h
A libclc/opencl/include/clc/opencl/integer/bitfield_extract_signed.h
A libclc/opencl/include/clc/opencl/integer/bitfield_extract_unsigned.h
A libclc/opencl/include/clc/opencl/integer/bitfield_insert.h
M libclc/opencl/lib/generic/SOURCES
A libclc/opencl/lib/generic/integer/bit_reverse.cl
A libclc/opencl/lib/generic/integer/bitfield_extract_def.inc
A libclc/opencl/lib/generic/integer/bitfield_extract_signed.cl
A libclc/opencl/lib/generic/integer/bitfield_extract_unsigned.cl
A libclc/opencl/lib/generic/integer/bitfield_insert.cl
A libclc/opencl/lib/generic/integer/bitfield_insert.inc
Log Message:
-----------
[libclc] Add generic implementation of bitfield_insert/extract,bit_reverse (#149070)
The implementation is based on reference implementation in
OpenCL-CTS/test_integer_ops. The generic implementations pass
OpenCL-CTS/test_integer_ops tests on Intel GPU.
Commit: 64205adc3bfdaab0f35f7909de59dadd20ef6e6a
https://github.com/llvm/llvm-project/commit/64205adc3bfdaab0f35f7909de59dadd20ef6e6a
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/Headers/__clang_spirv_builtins.h
M clang/test/Headers/spirv_ids.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/test/CodeGen/SPIRV/transcoding/builtin_calls.ll
Log Message:
-----------
[SPIR-V] Map SPIR-V friendly work-item function to built-in variables (#148567)
The mapping ensures the function is lowered to SPIR-V built-in variables
in SPIR-V. This can fix pre-commit CI fail in https://github.com/intel/llvm/pull/19359
Also add BuiltIn to SPIR-V Builtin function name in __clang_spirv_builtins.h to align with
https://github.com/llvm/llvm-project/blob/main/llvm/docs/SPIRVUsage.rst#builtin-variables
Commit: 9c26f37ce34de3be3550cbd67fcea534721724fd
https://github.com/llvm/llvm-project/commit/9c26f37ce34de3be3550cbd67fcea534721724fd
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
A libclc/clc/include/clc/atomic/atomic_decl.inc
A libclc/clc/include/clc/atomic/clc_atomic_compare_exchange.h
A libclc/clc/include/clc/atomic/clc_atomic_dec.h
A libclc/clc/include/clc/atomic/clc_atomic_exchange.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_add.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_and.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_max.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_min.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_or.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_sub.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_xor.h
A libclc/clc/include/clc/atomic/clc_atomic_inc.h
A libclc/clc/include/clc/atomic/clc_atomic_load.h
A libclc/clc/include/clc/atomic/clc_atomic_store.h
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.cl
A libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
A libclc/clc/lib/generic/atomic/clc_atomic_dec.cl
A libclc/clc/lib/generic/atomic/clc_atomic_def.inc
A libclc/clc/lib/generic/atomic/clc_atomic_exchange.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_add.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_and.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_max.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_min.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_or.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_sub.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_xor.cl
A libclc/clc/lib/generic/atomic/clc_atomic_inc.cl
A libclc/clc/lib/generic/atomic/clc_atomic_load.cl
A libclc/clc/lib/generic/atomic/clc_atomic_store.cl
M libclc/opencl/include/clc/opencl/atomic/atomic_add.h
M libclc/opencl/include/clc/opencl/atomic/atomic_and.h
A libclc/opencl/include/clc/opencl/atomic/atomic_compare_exchange_strong.h
A libclc/opencl/include/clc/opencl/atomic/atomic_compare_exchange_weak.h
M libclc/opencl/include/clc/opencl/atomic/atomic_decl.inc
A libclc/opencl/include/clc/opencl/atomic/atomic_decl_legacy.inc
A libclc/opencl/include/clc/opencl/atomic/atomic_exchange.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_add.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_and.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_max.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_min.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_or.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_sub.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_xor.h
A libclc/opencl/include/clc/opencl/atomic/atomic_load.h
M libclc/opencl/include/clc/opencl/atomic/atomic_max.h
M libclc/opencl/include/clc/opencl/atomic/atomic_min.h
M libclc/opencl/include/clc/opencl/atomic/atomic_or.h
A libclc/opencl/include/clc/opencl/atomic/atomic_store.h
M libclc/opencl/include/clc/opencl/atomic/atomic_sub.h
M libclc/opencl/include/clc/opencl/atomic/atomic_xchg.h
M libclc/opencl/include/clc/opencl/atomic/atomic_xor.h
M libclc/opencl/lib/generic/SOURCES
A libclc/opencl/lib/generic/atomic/atomic_compare_exchange_strong.cl
A libclc/opencl/lib/generic/atomic/atomic_compare_exchange_weak.cl
M libclc/opencl/lib/generic/atomic/atomic_dec.cl
A libclc/opencl/lib/generic/atomic/atomic_def.inc
A libclc/opencl/lib/generic/atomic/atomic_exchange.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_and.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_max.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_min.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_or.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_inc.cl
A libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
A libclc/opencl/lib/generic/atomic/atomic_load.cl
A libclc/opencl/lib/generic/atomic/atomic_store.cl
Log Message:
-----------
[libclc] Add generic implementation of some atomic functions in OpenCL spec section 6.15.12.7 (#146814)
Add corresponding clc functions, which are implemented with clang
__scoped_atomic builtins. OpenCL functions are implemented as a wrapper
over clc functions.
Also change legacy atomic_inc and atomic_dec to re-use the newly added
clc_atomic_inc/dec implementations. llvm-diff only no change to
atomic_inc and atomic_dec in bitcode.
Notes:
* Generic OpenCL built-ins functions uses __ATOMIC_SEQ_CST and
__MEMORY_SCOPE_DEVICE for memory order and memory scope parameters.
* OpenCL atomic_*_explicit, atomic_flag* built-ins are not implemented
yet.
* OpenCL built-ins of atomic_intptr_t, atomic_uintptr_t, atomic_size_t
and atomic_ptrdiff_t types are not implemented yet.
* llvm-diff shows no change to nvptx64--nvidiacl.bc and
amdgcn--amdhsa.bc since __opencl_c_atomic_order_seq_cst and
__opencl_c_atomic_scope_device are not defined in these two targets.
Commit: cd6311b50d4b9d87d986213db76d9810efd7df7e
https://github.com/llvm/llvm-project/commit/cd6311b50d4b9d87d986213db76d9810efd7df7e
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/cospi.f90
Log Message:
-----------
[flang] Implement `COSPI` (#149343)
This feature is added in the Fortran 2023 standard.
Commit: 28417e6459bb5174b9502f440e3dbb86f7a0046e
https://github.com/llvm/llvm-project/commit/28417e6459bb5174b9502f440e3dbb86f7a0046e
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Support vp.load in lowerInterleavedLoad [nfc-ish] (#149174)
This continues in the direction started by commit 4b81dc7. We
essentially merges the handling for VPLoad - currently in
lowerInterleavedVPLoad - into the existing dedicated routine. This
removes the last use of the dedicate lowerInterleavedVPLoad and thus we
can remove it.
This isn't quite NFC as the main callback has support for the strided
load optimization whereas the VPLoad specific version didn't. So this
adds the ability to form a strided load for a vp.load deinterleave with
one shuffle used.
Commit: 4a9eaad9e1283b872788832d5bce7e7945b97c78
https://github.com/llvm/llvm-project/commit/4a9eaad9e1283b872788832d5bce7e7945b97c78
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/MoveForwardingReferenceCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedAliasDeclsCheck.cpp
M clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/DumpAST.cpp
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang/include/clang/AST/AbstractBasicReader.h
M clang/include/clang/AST/AbstractBasicWriter.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Tooling/Refactoring/RecursiveSymbolVisitor.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Index/IndexTypeSourceInfo.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
Log Message:
-----------
[Clang][AST][NFC] Introduce `NamespaceBaseDecl` (#149123)
Add `NamespaceBaseDecl` as common base class of `NamespaceDecl` and
`NamespaceAliasDecl`. This simplifies `NestedNameSpecifier` a bit.
Co-authored-by: Matheus Izvekov <mizvekov at gmail.com>
Commit: 8aa4fc0a9f80475dc0efb2ce14a860f86147d52d
https://github.com/llvm/llvm-project/commit/8aa4fc0a9f80475dc0efb2ce14a860f86147d52d
Author: Ryan Prichard <rprichard at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.comp/is_bounded_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.compile.pass.cpp
Log Message:
-----------
[libc++][Android] Reenable 2 tests for Android (#149415)
Now that the Android clang has been upgraded to clang-r563880
(llvm.org/pr148998), these two tests pass again.
Commit: baa291bfb58e73a253669b86ac604cf8e6792b6c
https://github.com/llvm/llvm-project/commit/baa291bfb58e73a253669b86ac604cf8e6792b6c
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/Transforms/Simplifications.h
M mlir/test/Dialect/Mesh/simplifications.mlir
Log Message:
-----------
[mlir][mesh] Add null check for dyn_cast to prevent crash (#149266)
This PR adds a null check for dyn_cast result before use to prevent
crash, and use `isa` instead `dyn_cast` to make code clean. Fixes
#148619.
Commit: c27e283cfbca2bd22f34592430e98ee76ed60ad8
https://github.com/llvm/llvm-project/commit/c27e283cfbca2bd22f34592430e98ee76ed60ad8
Author: YexuanXiao <bizwen at nykz.org>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/ScanfFormatString.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/ast-dump-array.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/AST/ast-dump-expr-json.cpp
M clang/test/AST/ast-dump-expr.c
M clang/test/AST/ast-dump-expr.cpp
M clang/test/AST/ast-dump-openmp-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-stmt-json.cpp
M clang/test/AST/ast-dump-stmt.cpp
M clang/test/AST/ast-dump-traits.cpp
M clang/test/AST/ast-dump-types-errors-json.cpp
M clang/test/Analysis/cfg.cpp
M clang/test/Analysis/explain-svals.cpp
M clang/test/Analysis/std-c-library-functions-arg-weakdeps.c
M clang/test/Analysis/std-c-library-functions-lookup.c
M clang/test/Analysis/std-c-library-functions-vs-stream-checker.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p2.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/FixIt/fixit-format-ios-nopedantic.m
M clang/test/FixIt/format.m
M clang/test/Sema/format-strings-fixit-ssize_t.c
M clang/test/Sema/format-strings-int-typedefs.c
M clang/test/Sema/format-strings-scanf.c
M clang/test/Sema/format-strings-size_t.c
M clang/test/Sema/matrix-type-builtins.c
M clang/test/Sema/ptrauth-atomic-ops.c
M clang/test/Sema/ptrauth.c
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/enum-scoped.cpp
M clang/test/SemaCXX/microsoft-varargs-diagnostics.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/type-aware-new-delete-basic-free-declarations.cpp
M clang/test/SemaCXX/unavailable_aligned_allocation.cpp
M clang/test/SemaHLSL/Language/AssignArray.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
M clang/test/SemaObjC/format-size-spec-nsinteger.m
M clang/test/SemaObjC/matrix-type-builtins.m
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/libclang/CIndex.cpp
M libcxx/test/libcxx/containers/sequences/deque/spare_block_handling.pass.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[Clang] Make the SizeType, SignedSizeType and PtrdiffType be named sugar types instead of built-in types (#143653)
Including the results of `sizeof`, `sizeof...`, `__datasizeof`,
`__alignof`, `_Alignof`, `alignof`, `_Countof`, `size_t` literals, and
signed `size_t` literals, the results of pointer-pointer subtraction and
checks for standard library functions (and their calls).
The goal is to enable clang and downstream tools such as clangd and
clang-tidy to provide more portable hints and diagnostics.
The previous discussion can be found at #136542.
This PR implements this feature by introducing a new subtype of `Type`
called `PredefinedSugarType`, which was considered appropriate in
discussions. I tried to keep `PredefinedSugarType` simple enough yet not
limited to `size_t` and `ptrdiff_t` so that it can be used for other
purposes. `PredefinedSugarType` wraps a canonical `Type` and provides a
name, conceptually similar to a compiler internal `TypedefType` but
without depending on a `TypedefDecl` or a source file.
Additionally, checks for the `z` and `t` format specifiers in format
strings for `scanf` and `printf` were added. It will precisely match
expressions using `typedef`s or built-in expressions.
The affected tests indicates that it works very well.
Several code require that `SizeType` is canonical, so I kept `SizeType`
to its canonical form.
The failed tests in CI are allowed to fail. See the
[comment](https://github.com/llvm/llvm-project/pull/135386#issuecomment-3049426611)
in another PR #135386.
Commit: 52a9c493e62c8af8f1299cae0babb92f2693065b
https://github.com/llvm/llvm-project/commit/52a9c493e62c8af8f1299cae0babb92f2693065b
Author: Liao Chunyu <chunyu at iscas.ac.cn>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
A llvm/test/CodeGen/RISCV/rvv/reproducer-pr146855.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
Log Message:
-----------
Reland "[RISCV] AddEdge between mask producer and user of V0 (#146855)" (#148566)
The defmask vector cannot contain instructions that use V0.
for `MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/mesh.cpp`
Save `%173:vrm2nov0 = PseudoVMERGE_VVM_M2 undef %173:vrm2nov0(tied-def
0), %116:vrm2, %173:vrm2nov0, killed $v0, -1, 5 `to def mask caused crash.
Commit: df56b1a2cf06d1954a9cd1a290a264375f47440d
https://github.com/llvm/llvm-project/commit/df56b1a2cf06d1954a9cd1a290a264375f47440d
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Lower/forall/character-1.f90
Log Message:
-----------
[flang] handle allocation of zero-sized objects (#149165)
This PR handles the allocation of zero-sized objects for different
implementations. One byte is allocated for the zero-sized objects.
Commit: 4c85bf2fe8042c855c9dd5be4b02191e9d071ffd
https://github.com/llvm/llvm-project/commit/4c85bf2fe8042c855c9dd5be4b02191e9d071ffd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/ScanfFormatString.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/ast-dump-array.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/AST/ast-dump-expr-json.cpp
M clang/test/AST/ast-dump-expr.c
M clang/test/AST/ast-dump-expr.cpp
M clang/test/AST/ast-dump-openmp-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-stmt-json.cpp
M clang/test/AST/ast-dump-stmt.cpp
M clang/test/AST/ast-dump-traits.cpp
M clang/test/AST/ast-dump-types-errors-json.cpp
M clang/test/Analysis/cfg.cpp
M clang/test/Analysis/explain-svals.cpp
M clang/test/Analysis/std-c-library-functions-arg-weakdeps.c
M clang/test/Analysis/std-c-library-functions-lookup.c
M clang/test/Analysis/std-c-library-functions-vs-stream-checker.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p2.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/FixIt/fixit-format-ios-nopedantic.m
M clang/test/FixIt/format.m
M clang/test/Sema/format-strings-fixit-ssize_t.c
M clang/test/Sema/format-strings-int-typedefs.c
M clang/test/Sema/format-strings-scanf.c
M clang/test/Sema/format-strings-size_t.c
M clang/test/Sema/matrix-type-builtins.c
M clang/test/Sema/ptrauth-atomic-ops.c
M clang/test/Sema/ptrauth.c
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/enum-scoped.cpp
M clang/test/SemaCXX/microsoft-varargs-diagnostics.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/type-aware-new-delete-basic-free-declarations.cpp
M clang/test/SemaCXX/unavailable_aligned_allocation.cpp
M clang/test/SemaHLSL/Language/AssignArray.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
M clang/test/SemaObjC/format-size-spec-nsinteger.m
M clang/test/SemaObjC/matrix-type-builtins.m
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/libclang/CIndex.cpp
M libcxx/test/libcxx/containers/sequences/deque/spare_block_handling.pass.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Revert "[Clang] Make the SizeType, SignedSizeType and PtrdiffType be named sugar types instead of built-in types (#143653)"
This reverts commit c27e283cfbca2bd22f34592430e98ee76ed60ad8.
A builbot failure has been reported:
https://lab.llvm.org/buildbot/#/builders/186/builds/10819/steps/10/logs/stdio
I'm also getting a large number of warnings related to %zu and %zx.
Commit: aecd44818adcc26c0535e779629682c76ea44832
https://github.com/llvm/llvm-project/commit/aecd44818adcc26c0535e779629682c76ea44832
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_tanh_f16` on gfx1250 (#149439)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: fb81a0dd9ebe42702190a56db5c9dae7a3dbaec7
https://github.com/llvm/llvm-project/commit/fb81a0dd9ebe42702190a56db5c9dae7a3dbaec7
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
A llvm/test/Transforms/LoopInterchange/fp-reductions.ll
M llvm/test/Transforms/LoopInterchange/reductions-non-wrapped-operations.ll
Log Message:
-----------
[LoopInterchange][NFCI] Split reductions-non-wrapped-operations.ll (#149449)
This test has grown too big. Having one for float for int would be more
manageable.
Commit: 3eb07996b1d6874e4c288a49712d2a5ada57cd2d
https://github.com/llvm/llvm-project/commit/3eb07996b1d6874e4c288a49712d2a5ada57cd2d
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN][NFCI] Use early return in phiTranslateImpl() (#149273)
Commit: 4e6157f7844cc801bc84ac06f53052e8c6d6c478
https://github.com/llvm/llvm-project/commit/4e6157f7844cc801bc84ac06f53052e8c6d6c478
Author: Baranov Victor <bar.victor.2002 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy][NFC] Add mention of running 'clang-tidy' on changes in Contributing.rst (#148547)
Follow up to https://github.com/llvm/llvm-project/pull/147793.
_Originally suggested by carlosgalvezp in
https://github.com/llvm/llvm-project/pull/147793#issuecomment-3059021433_
Commit: a8f5e9ed6b44562938ce07e2790be90be8f0a6b5
https://github.com/llvm/llvm-project/commit/a8f5e9ed6b44562938ce07e2790be90be8f0a6b5
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a regression of annotating PointerOrReference (#149039)
Fixes #149010
Commit: 03fe1a493d55cfc27a32ee3064639b86cb54d16a
https://github.com/llvm/llvm-project/commit/03fe1a493d55cfc27a32ee3064639b86cb54d16a
Author: Jorn Tuyls <jorn.tuyls at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
A llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.ll
A llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.mir
Log Message:
-----------
[AMDGPU] Fix sgpr to vreg_1 copy analysis (#149181)
Commit: de453e86977adf4f418b003b5c25931b8365c9cc
https://github.com/llvm/llvm-project/commit/de453e86977adf4f418b003b5c25931b8365c9cc
Author: Wanyi <wanyi at meta.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
Log Message:
-----------
[lldb-dap] Fix type req->arguments == "disconnect" (#149446)
This typo was introduced in PR #140331. This branch will never get
executed. We also set the `disconnecting = true` in the
`DAP::Disconnect()` so I am not sure if we need it in both places.
Commit: f761d73265119eeb3b1ab64543e6d3012078ad13
https://github.com/llvm/llvm-project/commit/f761d73265119eeb3b1ab64543e6d3012078ad13
Author: Shoreshen <372660931 at qq.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
Log Message:
-----------
[AMDGPU] Add freeze for LowerSELECT (#148796)
Trying to solve https://github.com/llvm/llvm-project/issues/147635
Add freeze for legalizer when breaking i64 select to 2 i32 select.
Several tests changed, still need to investigate why.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 5fe9b5235298dc67864e947ea23df201aec177fc
https://github.com/llvm/llvm-project/commit/5fe9b5235298dc67864e947ea23df201aec177fc
Author: Shoreshen <372660931 at qq.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
Log Message:
-----------
Add FABS to canCreateUndefOrPoison (#149440)
FABS will not create undef/poison, add it into canCreateUndefOrPoison
return false
Commit: 06528070fce04d580821b3448f1d5321e0a9a97b
https://github.com/llvm/llvm-project/commit/06528070fce04d580821b3448f1d5321e0a9a97b
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/CodeGen/MachineFunctionAnalysis.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/tools/llc/new-pm/start-stop.ll
Log Message:
-----------
[CodeGen][NPM] Clear MachineFunctions without using PA (#148113)
same as https://github.com/llvm/llvm-project/pull/139517
This replaces the InvalidateAnalysisPass<MachineFunctionAnalysis> pass.
There are no cross-function analysis requirements right now, so clearing
all analyses works for the last pass in the pipeline.
Having the InvalidateAnalysisPass<MachineFunctionAnalysis>() is causing
a problem with ModuleToCGSCCPassAdaptor by deleting machine functions
for other functions and ending up with exactly one correctly compiled
MF, with the rest being vanished.
This is because ModuleToCGSCCPAdaptor propagates PassPA (received from
the CGSCCToFunctionPassAdaptor that runs the actual codegen pipeline on
MFs) to the next SCC. That causes MFA invalidation on functions in the
next SCC.
For us, PassPA happens to be returned from
invalidate<machine-function-analysis> which abandons the
MachineFunctionAnalysis. So while the first function runs through the
pipeline normally, invalidate also deletes the functions in the next SCC
before its pipeline is run. (this seems to be the intended mechanism of
the CG adaptor to allow cross-SCC invalidations.
Co-authored-by : Oke, Akshat
<[Akshat.Oke at amd.com](mailto:Akshat.Oke at amd.com)>
Commit: 1614c3b3c74b50dc6d5a7f359897bca221de931b
https://github.com/llvm/llvm-project/commit/1614c3b3c74b50dc6d5a7f359897bca221de931b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir
M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
M llvm/test/CodeGen/AMDGPU/swdev502267-use-after-free-last-chance-recoloring-alloc-succeeds.mir
Log Message:
-----------
AMDGPU: Always use AV spill pseudos on targets with AGPRs (#149099)
This increases allocator freedom to inflate register classes
to the AV class, we don't need to introduce a new restriction
by basing the opcode on the current virtual register class.
Ideally we would avoid this if we don't have any allocatable
AGPRs for the function, but it probably doesn't make much
difference in the end result if they are excluded from the
final allocation order.
Commit: c435cd173059863b44262ace75e0f381bbc6cb86
https://github.com/llvm/llvm-project/commit/c435cd173059863b44262ace75e0f381bbc6cb86
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/switch-dup-bbs.ll
M llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll
Log Message:
-----------
[SimplifyCFG] Cache unique predecessors in `simplifyDuplicateSwitchArms`
Avoid repeatedly querying `getUniquePredecessor` for already-visited
switch successors so as not to incur quadratic runtime.
Fixes: https://github.com/llvm/llvm-project/issues/147239.
Commit: 176ae32de060d8c4767904bf16fbde3faa59b60a
https://github.com/llvm/llvm-project/commit/176ae32de060d8c4767904bf16fbde3faa59b60a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
Log Message:
-----------
AMDGPU: Fix introducing use of killed vgpr in gfx908 agpr copy (#149291)
When searching for an existing VGPR source for an AGPR to AGPR
copy on gfx908, this wasn't verifying the vgpr wasn't killed by
other prior uses.
Commit: 90f733ce6eaea6930c31d7aa320e18a5ef00ac75
https://github.com/llvm/llvm-project/commit/90f733ce6eaea6930c31d7aa320e18a5ef00ac75
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopUnroll/AArch64/apple-unrolling.ll
A llvm/test/Transforms/LoopUnroll/partial-unroll-reductions.ll
A llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions.ll
Log Message:
-----------
[LoopUnroll] Add tests for unrolling loops with reductions.
Add tests for unrolling loops with reductions. In some cases, multiple
parallel reduction phis could be retained to improve performance.
Commit: 5bac67d9213da8afa0e35199395774ca3c7daa39
https://github.com/llvm/llvm-project/commit/5bac67d9213da8afa0e35199395774ca3c7daa39
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
Log Message:
-----------
[AMDGPU] Use SIRegisterInfo to compute used registers. NFCI (#149051)
Simplify the code in AMDGPUResourceUsageAnalysis to rely more
on the TargetRegisterInfo for computing the number of used SGPRs and
AGPRs. This is a preliminary refactoring split out from #144855.
(While we could technically use TRI to compute the used number of VGPRs
at this point too, I'm leaving some of the original code in since for
VGPRs we're going to introduce some special cases).
Commit: beec840822867079b829f35cbd4b360aa8971438
https://github.com/llvm/llvm-project/commit/beec840822867079b829f35cbd4b360aa8971438
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts-using-decl.cpp
Log Message:
-----------
[Clang] Ensure correct parameters are in the scope for constraint equivalence checking (#149264)
This is another case where untransformed constraint expressions led to
inconsistent transforms.
We did fix some of those issues by looking at parent scopes, however the
parent instantiation scope is not always available because we could also
reach here after the parents get instantiated.
Fixes #146614
Commit: 2a1869b9815c1f59af9eae91a3ef7e7d78e8f4f2
https://github.com/llvm/llvm-project/commit/2a1869b9815c1f59af9eae91a3ef7e7d78e8f4f2
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/unittests/Transforms/Utils/DebugifyTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[DebugInfo] Shave even more users of DbgVariableIntrinsic from LLVM (#149136)
At this stage I'm just opportunistically deleting any code using
debug-intrinsic types, largely adjacent to calls to findDbgUsers. I'll
get to deleting that in probably one or more two commits.
Commit: 74c396afb26dec74c0b799e218c63f1a26e90d21
https://github.com/llvm/llvm-project/commit/74c396afb26dec74c0b799e218c63f1a26e90d21
Author: clubby789 <jamie at hill-daniel.co.uk>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/test/Transforms/DeadStoreElimination/zeroed-missing.ll
Log Message:
-----------
[DSE] Remove `uninitialized` from `allockind` when creating dummy zeroed variant function (#149336)
cc https://github.com/llvm/llvm-project/pull/138299
rustc sets `allockind("uninitialized")` - if we copy the attributes
as-is when creating a dummy function, Verify complains about
`allockind("uninitialized,zeroed")` conflicting, so we need to clear the
flag.
Co-authored-by: Jamie Hill-Daniel <jamie at osec.io>
Commit: 3f991f5067bd45064af4afb0594ab5d614e357df
https://github.com/llvm/llvm-project/commit/3f991f5067bd45064af4afb0594ab5d614e357df
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unused includes (#149460)
Commit: 1e7446fe45f2de473fe180a065733f68ced8e653
https://github.com/llvm/llvm-project/commit/1e7446fe45f2de473fe180a065733f68ced8e653
Author: Trevor Gross <tmgross at umich.edu>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86CallingConv.cpp
Log Message:
-----------
[X86] Correct an assertion message (NFC) (#149386)
I introduced this in a78a0f8d2043 ("[X86] Align f128 and i128 to 16
bytes"). Correct the message here.
Commit: cda28e203d8f396af65cd4e19c62cfaa58480280
https://github.com/llvm/llvm-project/commit/cda28e203d8f396af65cd4e19c62cfaa58480280
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
A clang/test/Analysis/div-zero-cxx20.cpp
M clang/test/Analysis/div-zero.cpp
Log Message:
-----------
[analyzer] Support parenthesized list initialization (CXXParenListInitExpr) (#148988)
This patch addresses the lack of support for parenthesized
initialization in the Clang Static Analyzer's `ExprEngine`. Previously,
initializations such as `V v(1, 2);` were not modeled properly, which
could lead to false negatives in analyses like `DivideZero`.
```cpp
struct A {
int x;
A(int v) : x(v) {}
};
int t() {
A a(42);
return 1 / (a.x - 42); // expected-warning {{Division by zero}}
}
```
Fixes #148875
Commit: daa6de37bac9e547d37a3c5f2c9a51559679a7ed
https://github.com/llvm/llvm-project/commit/daa6de37bac9e547d37a3c5f2c9a51559679a7ed
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU][SDAG] Add target-specific ISD::PTRADD combines (#143673)
This patch adds several (AMDGPU-)target-specific DAG combines for
ISD::PTRADD nodes that reproduce existing similar transforms for
ISD::ADD nodes. There is no functional change intended for the existing
target-specific PTRADD combine.
For SWDEV-516125.
Commit: efedd49a22832f8b0981a084c503cdcdf4ed8e65
https://github.com/llvm/llvm-project/commit/efedd49a22832f8b0981a084c503cdcdf4ed8e65
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll
Log Message:
-----------
[AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (#143880)
Pre-committing tests to show improvements in a follow-up PR.
Commit: 64a0478e08829ec6bcae2b05e154aa58c2c46ac0
https://github.com/llvm/llvm-project/commit/64a0478e08829ec6bcae2b05e154aa58c2c46ac0
Author: tangaac <tangyan01 at loongson.cn>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
M llvm/test/CodeGen/LoongArch/calling-conv-common.ll
M llvm/test/CodeGen/LoongArch/calling-conv-half.ll
M llvm/test/CodeGen/LoongArch/can-not-realign-stack.ll
M llvm/test/CodeGen/LoongArch/emergency-spill-slot.ll
M llvm/test/CodeGen/LoongArch/frame.ll
M llvm/test/CodeGen/LoongArch/intrinsic-memcpy.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
A llvm/test/CodeGen/LoongArch/lsx/pr146455.ll
M llvm/test/CodeGen/LoongArch/stack-realignment-with-variable-sized-objects.ll
M llvm/test/CodeGen/LoongArch/stack-realignment.ll
M llvm/test/CodeGen/LoongArch/unaligned-memcpy-inline.ll
M llvm/test/CodeGen/LoongArch/vararg.ll
Log Message:
-----------
[LoongArch] Strengthen stack size estimation for LSX/LASX extension (#146455)
This patch adds an emergency spill slot when ran out of registers.
PR #139201 introduces `vstelm` instructions with only 8-bit imm offset,
it causes no spill slot to store the spill registers.
Commit: a96121089b9c94e08c6632f91f2dffc73c0ffa28
https://github.com/llvm/llvm-project/commit/a96121089b9c94e08c6632f91f2dffc73c0ffa28
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Object/IRSymtab.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
Revert "RuntimeLibcalls: Add methods to recognize libcall names (#149001)"
This reverts commit 45477add8dfe9851605697bd908b49f0ec244625.
This causes a significant LTO compile-time regression.
Commit: 8f3e78f9715cb7085d03686c7bd72e20ce248b04
https://github.com/llvm/llvm-project/commit/8f3e78f9715cb7085d03686c7bd72e20ce248b04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
Log Message:
-----------
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
If we have a v_mov_b32 or v_accvgpr_write_b32 with an inline immediate,
replace it with a pseudo which writes to the combined AV_* class. This
relaxes the operand constraints, which will allow the allocator to
inflate the register class to AV_* to potentially avoid spilling.
The allocator does not know how to replace an instruction to enable
the change of register class. I originally tried to do this by changing
all of the places we introduce v_mov_b32 with immediate, but it's along
tail of niche cases that require manual updating. Plus we can restrict
this to only run on functions where we know we will be allocating AGPRs.
Commit: 20fc297ce3c2a2151bf618cf515f2b1981d4821c
https://github.com/llvm/llvm-project/commit/20fc297ce3c2a2151bf618cf515f2b1981d4821c
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
A llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
Log Message:
-----------
[LoopVectorizer] Only check register pressure for VFs that have been enabled via maxBandwidth (#149056)
Currently if MaxBandwidth is enabled, the register pressure is checked
for each VF. This changes that to only perform said check if the VF
would not have otherwise been considered by the LoopVectorizer if
maxBandwidth was not enabled.
Theoretically this allows for higher VFs to be considered than would
otherwise be deemed "safe" (from a regpressure perspective), but more
concretely this reduces the amount of work done at compile-time when
maxBandwidth is enabled.
Commit: 88721d63d482cf8f95deb66e74462b2cf583be8f
https://github.com/llvm/llvm-project/commit/88721d63d482cf8f95deb66e74462b2cf583be8f
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/test/Shell/SymbolFile/PDB/Inputs/UdtLayoutTest.script
Log Message:
-----------
[lldb][test] Fix PDB UdtLayoutTest
https://github.com/llvm/llvm-project/pull/149282 changed
the max children depth and that caused one part of the
output to become `{...}`.
The original PR set a higher limit for a different test,
so I'm doing the same here.
Commit: 3ce06b8c2196be6368f0e06862ac1849379cce41
https://github.com/llvm/llvm-project/commit/3ce06b8c2196be6368f0e06862ac1849379cce41
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
[Clang][Driver] Expose relocation model as multilib flags (#149132)
If a multilib collection contains libraries built for different methods
of accessing global data (via absolute address, or via a GOT in -fPIC
style, or as an offset from a fixed register in Arm -frwpi style), then
`multilib.yaml` will need to know which relocation model an application
is using in order to select the right library.
Even if a multilib collection only supports one relocation model, it's
still useful for `multilib.yaml` to be able to tell if the user has
selected the right one, so as to give a useful error message if they
haven't, instead of silently selecting a library that won't work.
In this commit we determine the PIC / ROPI / RWPI status using the
existing logic in `ParsePICArgs`, and translate it back into a canonical
set of multilib selection flags.
Commit: 28208c8e2713cdbc3ad39314e1cbd5c9efbe48d7
https://github.com/llvm/llvm-project/commit/28208c8e2713cdbc3ad39314e1cbd5c9efbe48d7
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
Log Message:
-----------
[DebugInfo] Remove debug-intrinsic coroutine codepaths (#149068)
There are a few duplicate paths/facilities in the coroutine code to deal
with both intrinsics and debug-records; we can now delete the intrinsic
version.
Commit: d883d5fecf8aa7db6daa0b163599d42ca00c5808
https://github.com/llvm/llvm-project/commit/d883d5fecf8aa7db6daa0b163599d42ca00c5808
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/bad-agpr-vgpr-regalloc-priority.mir
Log Message:
-----------
AMDGPU: Add testcase with bad regalloc behavior
This demonstrates poor allocation due to not ordering
AV classes relative to the A and V classes
Commit: 534b9cdddde2d4f11516a8f689c6ba23a29b8bdc
https://github.com/llvm/llvm-project/commit/534b9cdddde2d4f11516a8f689c6ba23a29b8bdc
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LoopVectorizer][NFC] Update comment regarding VF register pressure. (#149478)
Commit: df9a864b046bb716e56f81409f6a01a17f3181d6
https://github.com/llvm/llvm-project/commit/df9a864b046bb716e56f81409f6a01a17f3181d6
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/event/olWaitEvent.cpp
Log Message:
-----------
[Offload] Implement event sync in amdgpu (#149300)
Commit: 3121cc31baa1aed697cc07c72d283891ffa529f6
https://github.com/llvm/llvm-project/commit/3121cc31baa1aed697cc07c72d283891ffa529f6
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/test/API/functionalities/data-formatter/nsdictionarysynth/TestNSDictionarySynthetic.py
Log Message:
-----------
[lldb][test] TestNSDictionarySynthetic.py: adjust ptr depth in test
Fixes failure after we introduced a default limit in
https://github.com/llvm/llvm-project/pull/149282
We already did this test change on the Apple fork.
Commit: 0b7a95a6fd81b31634a3723a0bea6d9d91bbc230
https://github.com/llvm/llvm-project/commit/0b7a95a6fd81b31634a3723a0bea6d9d91bbc230
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
Partially Reapply "RuntimeLibcalls: Add methods to recognize libcall names (#149001)"
This partially reverts commit a96121089b9c94e08c6632f91f2dffc73c0ffa28.
Drop the IRSymtab changes for now
Commit: 3bb4355bb83692d9c859043076db16baa86431e1
https://github.com/llvm/llvm-project/commit/3bb4355bb83692d9c859043076db16baa86431e1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Report mutable reads when copying unions (#149320)
Commit: b7660a54157fd45e6276acf35176851196f5df71
https://github.com/llvm/llvm-project/commit/b7660a54157fd45e6276acf35176851196f5df71
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/mutable.cpp
Log Message:
-----------
[clang][bytecode] Fix const-in-mutable fields (#149286)
For mutable and const fields, we have two bits in InlineDescriptor,
which both get inherited down the hierarchy. When a field is both const
and mutable, we CAN read from it if it is a mutable-in-const field, but
we _can't_ read from it if it is a const-in-mutable field. We need
another bit to distinguish the two cases.
Commit: b5e3fffd20a72d3451e31ac37ca4930014044cd0
https://github.com/llvm/llvm-project/commit/b5e3fffd20a72d3451e31ac37ca4930014044cd0
Author: Nicholas Guy <nicholas.guy at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
Log Message:
-----------
[LoopVectorizer][NFC] Require asserts on maxbandwidth-regpressure.ll (#149484)
Fix for buildbot failure:
https://lab.llvm.org/buildbot/#/builders/11/builds/19837
Commit: ee8756e8551bc9ae5bf60e1ff16abaa95d61c234
https://github.com/llvm/llvm-project/commit/ee8756e8551bc9ae5bf60e1ff16abaa95d61c234
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
Log Message:
-----------
[LLVM] Make `MachineBlockFrequencyInfo`'s constructor arguments const (NFC) (#149279)
This avoids having to call `MachineBlockFrequencyInfo::calculate`
manually if one of the parameters is const.
Commit: 9e0c06d708a40bb3c8bd08acd982836cce718135
https://github.com/llvm/llvm-project/commit/9e0c06d708a40bb3c8bd08acd982836cce718135
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/test/CodeGen/64bit-swiftcall.c
M clang/test/CodeGen/AArch64/byval-temp.c
M clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
M clang/test/CodeGen/LoongArch/bitint.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/X86/cx-complex-range.c
M clang/test/CodeGen/X86/x86_32-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/aapcs64-align.cpp
M clang/test/CodeGen/arm-aapcs-vfp.c
M clang/test/CodeGen/arm-abi-vector.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm64-abi-vector.c
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/armv7k-abi.c
M clang/test/CodeGen/atomic-arm64.c
M clang/test/CodeGen/attr-noundef.cpp
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/ms_abi.c
M clang/test/CodeGen/pass-by-value-noalias.c
M clang/test/CodeGen/ptrauth-in-c-struct.c
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall2.c
M clang/test/CodeGen/regcall4.c
M clang/test/CodeGen/sparcv9-abi.c
M clang/test/CodeGen/vectorcall.c
M clang/test/CodeGen/win-fp128.c
M clang/test/CodeGen/win64-i128.c
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp
M clang/test/CodeGenCXX/copy-initialization.cpp
M clang/test/CodeGenCXX/debug-info.cpp
M clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp
M clang/test/CodeGenCXX/fastcall.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/inalloca-lambda.cpp
M clang/test/CodeGenCXX/inalloca-overaligned.cpp
M clang/test/CodeGenCXX/inalloca-vector.cpp
M clang/test/CodeGenCXX/inheriting-constructor.cpp
M clang/test/CodeGenCXX/member-function-pointer-calls.cpp
M clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
M clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/ms-property.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
M clang/test/CodeGenCXX/regparm.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/uncopyable-args.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/windows-x86-swiftcall.cpp
M clang/test/CodeGenObjC/nontrivial-c-struct-exception.m
M clang/test/CodeGenObjC/pass-by-value-noalias.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/property-objects.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/Headers/stdarg.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
Log Message:
-----------
[clang][CodeGen] Set `dead_on_return` when passing arguments indirectly
Let Clang emit `dead_on_return` attribute on pointer arguments
that are passed indirectly, namely, large aggregates that the
ABI mandates be passed by value; thus, the parameter is destroyed
within the callee. Writes to such arguments are not observable by
the caller after the callee returns.
This should desirably enable further MemCpyOpt/DSE optimizations.
Previous discussion: https://discourse.llvm.org/t/rfc-add-dead-on-return-attribute/86871.
Commit: 4fbe88fc46989b5b4e3b8913a915c7a3cd188bdf
https://github.com/llvm/llvm-project/commit/4fbe88fc46989b5b4e3b8913a915c7a3cd188bdf
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[NFC] Add parentheses around arithmetic operand (#149489)
Commit: c9d8b68676dbf51996a76475313088f750697343
https://github.com/llvm/llvm-project/commit/c9d8b68676dbf51996a76475313088f750697343
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/MachineDebugify.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/tools/llvm-dis/llvm-dis.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
Log Message:
-----------
[DebugInfo] Suppress lots of users of DbgValueInst (#149476)
This is another prune of dead code -- we never generate debug intrinsics
nowadays, therefore there's no need for these codepaths to run.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: 369f749dc434ec0339f5fb13376e1bc92e1d51d9
https://github.com/llvm/llvm-project/commit/369f749dc434ec0339f5fb13376e1bc92e1d51d9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
Log Message:
-----------
[SLP] Remove lifetime.start on null pointer in test (NFC)
Commit: 6c63316ee17462c97c722a960680b2b45d2fff4d
https://github.com/llvm/llvm-project/commit/6c63316ee17462c97c722a960680b2b45d2fff4d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
Log Message:
-----------
[flang][cuda] Support device component in a pointer or allocatable derived-type (#149418)
Commit: 4bbc70ed28a85036fb718e86424bb1d8a643005f
https://github.com/llvm/llvm-project/commit/4bbc70ed28a85036fb718e86424bb1d8a643005f
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
A llvm/utils/gn/secondary/llvm/tools/llvm-ir2vec/BUILD.gn
Log Message:
-----------
[gn] port d994487db78 (llvm-ir2vec)
Commit: 8b068149547cb3043e4427899851dc70ca1eb885
https://github.com/llvm/llvm-project/commit/8b068149547cb3043e4427899851dc70ca1eb885
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 8f3e78f9715c
Commit: 4c701956341ff88f580d240be072461a1ba6d7f5
https://github.com/llvm/llvm-project/commit/4c701956341ff88f580d240be072461a1ba6d7f5
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/docs/Tutorials/transform/Ch2.md
Log Message:
-----------
[mlir][transform] Fix ch2 and additional documentation (#148407)
Fixed error code in example.In addition to this, the content in the documentation has been improved by adding links to the code repository.
Commit: a9f81430725cb3d9a776d9b743078a452cd8e3aa
https://github.com/llvm/llvm-project/commit/a9f81430725cb3d9a776d9b743078a452cd8e3aa
Author: Sjoerd Meijer <smeijer at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/force-interchange.ll
Log Message:
-----------
[LoopInterchange] Ignore the cost-model, force interchange if legal (#148858)
This is and has been proven useful for testing purposes, to get more
test coverage.
Commit: 602d43cfd1fe7cc47146b6327d8df6e5e0ec47ae
https://github.com/llvm/llvm-project/commit/602d43cfd1fe7cc47146b6327d8df6e5e0ec47ae
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
Log Message:
-----------
[Clang][AMDGPU] Add the missing builtin `__builtin_amdgcn_sqrt_bf16` (#149447)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 311847be4ca911e191c67245799fafe2e4d8ba73
https://github.com/llvm/llvm-project/commit/311847be4ca911e191c67245799fafe2e4d8ba73
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[Offload] Allow "tagging" device info entries with offload keys (#147317)
When generating the device info tree, nodes can be marked with an
offload Device Info value. The nodes can also look up children based
on this value.
Commit: 03b7766dba2f63ee7c9e67f915ea8394f6426f9a
https://github.com/llvm/llvm-project/commit/03b7766dba2f63ee7c9e67f915ea8394f6426f9a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/source/Expression/IRExecutionUnit.cpp
Log Message:
-----------
[lldb][Expression][NFC] Make LoadAddressResolver::m_target a reference (#149490)
The only place that passes a target to `LoadAddressResolver` already
checks for pointer validity. And inside of the resolver we have been
dereferencing the target anyway without nullptr checks. So codify the
non-nullness of `m_target` by making it a reference.
Commit: 6112ebde0cdd31694536d0ac20a38e5f70f6185a
https://github.com/llvm/llvm-project/commit/6112ebde0cdd31694536d0ac20a38e5f70f6185a
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/short-forward-branch-opt.ll
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
Log Message:
-----------
[RISCV] Guard CFI emission code with MF.needsFrameMoves() (#136060)
Currently, AsmPrinter skips CFI instructions created by a backend if
they are not needed. I'd like to change that so that it always
prints/encodes CFI instructions if a backend created them.
This change should slightly (perhaps negligibly) improve compile time as
post-PEI passes no longer need to skip over these instructions in
no-exceptions no-debug builds, and will allow to simplify convoluted
logic in AsmPrinter once other targets stop emitting CFI instructions
when they are not needed (that's my final goal).
The changes in a test seem to be caused by slightly different post-RA
scheduling in the absence of CFI instructions.
Commit: 7b541c931e975840c0ef86d8ebd16856d17c0c85
https://github.com/llvm/llvm-project/commit/7b541c931e975840c0ef86d8ebd16856d17c0c85
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
Log Message:
-----------
[Github] Build CI Containers in Stacked PRs (#149346)
Currently the pull_request event on the build CI container workflows are
restricted to main. This prevents building them on stacked PRs. This is
a bit annoying because we do not get the CI to test that everything is
working until all of the base PRs have landed and the target branch
becomes main.
Commit: 5f531827a4b90f6e0051056fffd8642ae1c677e6
https://github.com/llvm/llvm-project/commit/5f531827a4b90f6e0051056fffd8642ae1c677e6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/X86/lifetime-use.ll
Log Message:
-----------
[LSR] Do not consider uses in lifetime intrinsics (#149492)
We should ignore uses of pointers in lifetime intrinsics, as these are
not actually materialized in the final code, so don't affect register
pressure or anything else LSR needs to model.
Handling these only results in peculiar rewrites where additional
intermediate GEPs are introduced.
Commit: 22076644645a7731f0ec7a81fe78168cf5c2ed63
https://github.com/llvm/llvm-project/commit/22076644645a7731f0ec7a81fe78168cf5c2ed63
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/test/Sema/dllexport.c
Log Message:
-----------
[Clang][Test] Add PS5 and WI cases to clang/test/Sema/dllexport.c (#148818)
Windows Itanium and PS5 are both Itanium C++ ABI variants which have the
goal of semantic compatibility with Microsoft C++ code that uses
dllimport/export.
This patch adds Windows Itanium and PS5 triple testing to
clang/test/Sema/dllexport.c. We have this testing in our downstream
toolchain - for some reason it was not added upstream when the work for
supporting dllimport/export was done.
Commit: 44cd5027f826d1bc82e5e851d1012cc321806d12
https://github.com/llvm/llvm-project/commit/44cd5027f826d1bc82e5e851d1012cc321806d12
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldst-ext.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] List MVTs that are desirable for extending loads. (#149153)
Extend AArch64TargetLowering::isVectorLoadExtDesirable to specify the
set of MVT for which load extension is desirable.
Fixes https://github.com/llvm/llvm-project/issues/148939
Commit: 37ea9d88a3b8224ffa3b117749a74b1f2f1cfb53
https://github.com/llvm/llvm-project/commit/37ea9d88a3b8224ffa3b117749a74b1f2f1cfb53
Author: lntue <lntue at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc] Fix tests' linking flags accidentally modified by #147931. (#149453)
https://github.com/llvm/llvm-project/pull/147931
Commit: 95b69e0e7014fd6eac98f53125857fddda022a62
https://github.com/llvm/llvm-project/commit/95b69e0e7014fd6eac98f53125857fddda022a62
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_prng_b32` on gfx1250 (#149450)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: de959569f7ae468736b5f98ae3ce69b9eb3825ec
https://github.com/llvm/llvm-project/commit/de959569f7ae468736b5f98ae3ce69b9eb3825ec
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
Log Message:
-----------
[AddressSanitizer] Generate test checks (NFC)
Commit: 6c705d11365b74b8207dc92f5c94ee7eb682a11b
https://github.com/llvm/llvm-project/commit/6c705d11365b74b8207dc92f5c94ee7eb682a11b
Author: Pengying Xu <xpy66swsry at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lld/ELF/BPSectionOrderer.cpp
M lld/test/ELF/bp-section-orderer.s
Log Message:
-----------
[lld][elf] Skip BP ordering input sections with null data (#149265)
Commit: fd12e9aed889e4b546a2d5c4d3c0c10582fe9148
https://github.com/llvm/llvm-project/commit/fd12e9aed889e4b546a2d5c4d3c0c10582fe9148
Author: Paul Kirth <paulkirth at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libcxx/test/libcxx/fuzzing/random.pass.cpp
M libcxx/test/std/depr/depr.c.headers/math_h.pass.cpp
M libcxx/test/std/numerics/c.math/cmath.pass.cpp
Log Message:
-----------
[libc++][tests] Update XFAIL annotations for some tests on Windows (#149124)
These tests still fail on Windows with clang-22, as reported in #70225.
This started failing due to the version bump to Clang 22.
Commit: fdce69a462101e1dce225014ee545858e363e4e2
https://github.com/llvm/llvm-project/commit/fdce69a462101e1dce225014ee545858e363e4e2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[llvm] Improve grammar and punctuation of LLVM Coding Standards (#149463)
Commit: 151fffccf1340d8a2800664cbcaaa579ba772a4c
https://github.com/llvm/llvm-project/commit/151fffccf1340d8a2800664cbcaaa579ba772a4c
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/unittests/Optimizer/FortranVariableTest.cpp
Log Message:
-----------
[flang] Migrate away from ArrayRef(std::nullopt_t) (#149454)
ArrayRef(std::nullopt_t) has been deprecated. This patch replaces
std::nullopt with mlir::TypeRange{} or mlir::ValueRange{} as
appropriate.
Commit: 724cfce5801829340b240ba62e82a7e7199e971d
https://github.com/llvm/llvm-project/commit/724cfce5801829340b240ba62e82a7e7199e971d
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
Log Message:
-----------
[Clang] Do not assume a perfect match is a better match than a non-template non-perfect match (#149504)
This fixes a regression introduced by the "perfect match" overload
resolution mechanism introduced in 8c5a307.
[This does regress the performance noticeably (-0.7% for a stage 2
build)](https://llvm-compile-time-tracker.com/compare.php?from=42d2ae1034b287eb60563c370dbf52c59b66db20&to=82303bbc3e003c937ded498ac9f94f49a3fc3d90&stat=instructions:u),
however, the original patch had a +4% performance impact, so we are only
losing some of the gain, and this has
the benefit of being correct and more robust.
Fixes #147374
Commit: 55305db90a3f329bdf7917d1c8bf36b318e33c72
https://github.com/llvm/llvm-project/commit/55305db90a3f329bdf7917d1c8bf36b318e33c72
Author: RolandF77 <froese at ca.ibm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/Maintainers.md
Log Message:
-----------
[PowerPC] Update maintainers (#149171)
Update PowerPC BE maintainers.
Commit: 0e4069580413f3869e94ec1f0f84a085b639226e
https://github.com/llvm/llvm-project/commit/0e4069580413f3869e94ec1f0f84a085b639226e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libcxx/include/__config_site.in
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[libc++] Remove unused _LIBCPP_HAS_NO_STD_MODULES macro from __config_site (#148902)
Since 1d6b6132f, that macro isn't used anywhere anymore.
Commit: f73e163278fd6e50fc7855e52625ddf2e537c912
https://github.com/llvm/llvm-project/commit/f73e163278fd6e50fc7855e52625ddf2e537c912
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
A llvm/test/CodeGen/NVPTX/trunc-tofp.ll
Log Message:
-----------
[DAGCombiner] Fold [us]itofp of truncate (#149391)
Commit: e73cb43b44ddd7aeae7217aa1c9e7f8364a5e6df
https://github.com/llvm/llvm-project/commit/e73cb43b44ddd7aeae7217aa1c9e7f8364a5e6df
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/VectorToXeGPU/VectorToXeGPU.h
Log Message:
-----------
[mlir][xegpu] Remove unused custom pass declaration (#149278)
Removes unused declaration for pass creation.
Only the create function auto-generated from tablegen should be used.
Commit: ff5f3ae02aeac848dbb80ad9c652eae3ec107201
https://github.com/llvm/llvm-project/commit/ff5f3ae02aeac848dbb80ad9c652eae3ec107201
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/test/Semantics/PowerPC/ppc-vector-types01.f90
M flang/test/Semantics/PowerPC/ppc-vector-types02.f90
Log Message:
-----------
[flang] convert program name to upper case (NFC) (#149508)
Commit: 5f001294b1d42a0b4146e0b08ccae72667de6a5d
https://github.com/llvm/llvm-project/commit/5f001294b1d42a0b4146e0b08ccae72667de6a5d
Author: Brad Smith <brad at comstyle.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/src/__support/macros/properties/architectures.h
M libcxx/include/__config
M libcxx/include/limits
M libcxx/src/random.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/traps.pass.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
Remove last few bits for Native Client support (#148983)
Commit: 32f0fc597f92f98f1be81abbd07f5164377668ef
https://github.com/llvm/llvm-project/commit/32f0fc597f92f98f1be81abbd07f5164377668ef
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/test/API/lang/cpp/frame-var-depth-and-elem-count/TestFrameVarDepthAndElemCount.py
Log Message:
-----------
[lldb] Correct spacing of = {...} when depth limit is hit (#149480)
In some places it was printing "= {...}" and some "={...}" with no
space. I think the space looks nicer so do that in both cases.
Commit: ac7ceb3dabfac548caa993e7b77bbadc78af4464
https://github.com/llvm/llvm-project/commit/ac7ceb3dabfac548caa993e7b77bbadc78af4464
Author: quic-areg <aregmi at quicinc.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lld/test/ELF/hexagon-plt.s
M lld/test/ELF/hexagon-shared.s
M lld/test/ELF/hexagon-tls-gd-xform.s
M llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/test/MC/Hexagon/two_ext.s
A llvm/test/tools/llvm-objdump/ELF/Hexagon/hexagon-bundles.s
M llvm/tools/llvm-mc/Disassembler.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[Hexagon][llvm-objdump] Improve disassembly of Hexagon bundles (#145807)
Hexagon instructions are VLIW "bundles" of up to four instruction words
encoded as a single MCInst with operands for each sub-instruction.
Previously, the disassembler's getInstruction() returned the full
bundle, which made it difficult to work with llvm-objdump.
For example, since all instructions are bundles, and bundles do not
branch, branch targets could not be printed.
This patch modifies the Hexagon disassembler to return individual
sub-instructions instead of entire bundles, enabling correct printing of
branch targets and relocations. It also introduces
`MCDisassembler::getInstructionBundle` for cases where the full bundle
is still needed.
By default, llvm-objdump separates instructions with newlines. However,
this does not work well for Hexagon syntax:
{ inst1
inst2
inst3
inst4 <branch> } :endloop0
Instructions may be followed by a closing brace, a closing brace with
`:endloop`, or a newline. Branches must appear within the braces.
To address this, `PrettyPrinter::getInstructionSeparator()` is added and
overridden for Hexagon.
Commit: a676ecd83fad9b04d315c4e667742d25679cbc9f
https://github.com/llvm/llvm-project/commit/a676ecd83fad9b04d315c4e667742d25679cbc9f
Author: lntue <lntue at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/include/llvm-libc-macros/math-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/math_constants_test.c
Log Message:
-----------
[libc][math] Add POSIX math constants to math.h header. (#149150)
https://pubs.opengroup.org/onlinepubs/9799919799/basedefs/math.h.html
Commit: d737fe2c91391a41a5b5ee8e3062d78a01936c61
https://github.com/llvm/llvm-project/commit/d737fe2c91391a41a5b5ee8e3062d78a01936c61
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
Log Message:
-----------
[libc++][NFC] Fix typos in the libc++ 21 release notes (#149536)
Commit: 148fd6ed0a21aaa540ad443b8108456b191dd485
https://github.com/llvm/llvm-project/commit/148fd6ed0a21aaa540ad443b8108456b191dd485
Author: Annu Singh <annu4444.as at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/freeze.ll
Log Message:
-----------
[DAG] Adding abdu/abds to canCreateUndefOrPoison (#149017)
Fixes #147695
- [Alive2 test - freeze abdu](https://alive2.llvm.org/ce/z/aafeJs)
- [Alive 2 test - freeze abds](https://alive2.llvm.org/ce/z/XrSmP4)
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: c244c3b2d95a1605337b1156fad412ee2c9cd8c9
https://github.com/llvm/llvm-project/commit/c244c3b2d95a1605337b1156fad412ee2c9cd8c9
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_tasking.cpp
Log Message:
-----------
[OpenMP] [NFC] Remove dead code: building task stack (#143589)
This code hasn't been enabled since the first code changes were
introduced. Remove the dead code.
Commit: a9147e64aa751caaa106953fded2d0f7223bb167
https://github.com/llvm/llvm-project/commit/a9147e64aa751caaa106953fded2d0f7223bb167
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
Log Message:
-----------
Revert "[DWARFLinker] Use different addresses to distinguish invalid … (#149422)
…DW_AT_LLVM_stmt_sequence offset (#149376)"
This reverts commit b0c6148584854af3d7ed2425034c3b5252f6b769.
Commit: 92e2d4e9e1ad7a8d66d481b4df3f971450f829f5
https://github.com/llvm/llvm-project/commit/92e2d4e9e1ad7a8d66d481b4df3f971450f829f5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitFREEZE - remove unused HadMaybePoisonOperands check. NFC. (#149517)
Redundant since #145939
Commit: 7d040d4675baf6881cf50c4dba78cc18af85f9ef
https://github.com/llvm/llvm-project/commit/7d040d4675baf6881cf50c4dba78cc18af85f9ef
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][linalg] Handle outer_dims_perm in linalg.pack consumer fusion. (#149426)
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 0c75e093813c86a1c99b75d2a46f56db7ab516dd
https://github.com/llvm/llvm-project/commit/0c75e093813c86a1c99b75d2a46f56db7ab516dd
Author: Shaoce SUN <sunshaoce at outlook.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenSchedule.cpp
Log Message:
-----------
[TableGen] Add `getName()` to error messages for better debugging (#149531)
Including the name helps quickly locate the corresponding Instruction
that caused the issue.
Commit: 01213141357e4a79d2d97187ff0cb89d8d173634
https://github.com/llvm/llvm-project/commit/01213141357e4a79d2d97187ff0cb89d8d173634
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
Log Message:
-----------
[MemoryTaggingSupport] Remove unnecessary bitcast (NFC)
As the comment indicates, this is no longer necessary with
opaque pointers.
Commit: 73e4b589ba9526c72f495ca6898ed18d730d2db4
https://github.com/llvm/llvm-project/commit/73e4b589ba9526c72f495ca6898ed18d730d2db4
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/test/MC/RISCV/Relocations/mc-dump.s
Log Message:
-----------
MC: Simplify fragment reuse determination
First, avoid checking MCSubtargetInfo by reducing unnecessary overhead
introduced in https://reviews.llvm.org/D44928 . That change passed STI
to both FT_Data and FT_Relaxable fragments, but STI is only necessary
for FT_Relaxable.
The use of STI in FT_Data was added for:
* Bundle alignment mode, which has been removed (#148781).
* ARM, which inappropriately uses STI in `ARMAsmBackend::applyFixup` due
to tech debt, unlike other targets. All tests passed even without the
`copySTI` change.
To ensure safety, `copySTI` now starts a new fragment to prevent mixed
STI values.
Second, avoid checking LinkerRelaxable by eagerly starting a new
fragment when a FT_Data/FT_Align fragment is marked linker-relaxable.
There is currently an extra empty FT_Data if an alignment immediately
follows a linker-relaxable fragment, which will be improved in the
future when FT_Align information is moved to the variable-tail.
Pull Request: https://github.com/llvm/llvm-project/pull/149471
Commit: 5138b61a25f11eb8675d0031712c1ee6b4cb8be4
https://github.com/llvm/llvm-project/commit/5138b61a25f11eb8675d0031712c1ee6b4cb8be4
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
A llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
Log Message:
-----------
[AMDGPU][True16][Codegen] remove packed build_vector pattern from true16 (#148715)
Some of the packed build_vector use vgpr_32 for i16/f16/bf16.
In gfx11, bf16 arithmetic get promoted to f32 and this is done via v2i16
pack. In true16 mode this v2i16 pack is selected to a
build_vector/v_lshlrev pattern which only accepts VGPR32. This causes
isel to insert an illegal copy "vgpr32 = copy vgpr16" between def and
use. In the end this illegal copy confuses cse pass and trigger wrong
code elimination.
Remove the packed build_vector pattern from true16. After removal, ISel
will use vgpr16 build_vector patterns instead.
Commit: 2c2567da95c64ee1ed9104ee2539894242922b83
https://github.com/llvm/llvm-project/commit/2c2567da95c64ee1ed9104ee2539894242922b83
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/lib/Semantics/check-do-forall.cpp
M flang/test/Semantics/resolve40.f90
Log Message:
-----------
[flang] Fixed a crash with undeclared variable in implicit-do loop (#149513)
Fixed a crash in the following example:
```
subroutine sub()
implicit none
print *, (i, i = 1, 2) ! Problem: using undefined var in implied-do loop
end subroutine sub
```
The error message was already generated, but the compiler crashed before
it could display it.
Commit: 10518c76de091bf23e72a8761c1eff561ce6e074
https://github.com/llvm/llvm-project/commit/10518c76de091bf23e72a8761c1eff561ce6e074
Author: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/Transforms/Passes.td
M mlir/lib/Dialect/SPIRV/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SPIRV/Transforms/ConvertToReplicatedConstantCompositePass.cpp
A mlir/test/Dialect/SPIRV/Transforms/replicated-const-composites.mlir
Log Message:
-----------
[mlir][spirv] Add conversion pass to rewrite splat constant composite… (#148910)
…s to replicated form
This adds a new SPIR-V dialect-level conversion pass
`ConversionToReplicatedConstantCompositePass`. This pass looks for splat
composite `spirv.Constant` or `spirv.SpecConstantComposite` and rewrites
them into `spirv.EXT.ConstantCompositeReplicate` or
`spirv.EXT.SpecConstantCompositeReplicate`, respectively.
---------
Signed-off-by: Mohammadreza Ameri Mahabadian <mohammadreza.amerimahabadian at arm.com>
Commit: 7e0ae019f854c99ae0d6a220aba7fcd5407f2494
https://github.com/llvm/llvm-project/commit/7e0ae019f854c99ae0d6a220aba7fcd5407f2494
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/exp10f16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/exp10_float16_constants.h
A libc/src/__support/math/exp10f16.h
A libc/src/__support/math/exp10f16_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp10m1f16.cpp
M libc/src/math/generic/expxf16.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor exp10f16 implementation to header-only in src/__support/math folder. (#148408)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: e11d28faee10dfb5ae6b8aaadadfd2ea1a2a446a
https://github.com/llvm/llvm-project/commit/e11d28faee10dfb5ae6b8aaadadfd2ea1a2a446a
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
Log Message:
-----------
[AMDGPU] Add support for `v_permlane16_swap_b32` on gfx1250 (#149518)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 2c50e4cac2c50dbbc9eb3ed78bc0178bfa26d23f
https://github.com/llvm/llvm-project/commit/2c50e4cac2c50dbbc9eb3ed78bc0178bfa26d23f
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_sat_pk4_i4_[i8,u8]` on gfx1250 (#149528)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Co-authored-by: Foad, Jay <Jay.Foad at amd.com>
Commit: ff225b5d88647448be8bbba54aaac3977a5485b5
https://github.com/llvm/llvm-project/commit/ff225b5d88647448be8bbba54aaac3977a5485b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
Log Message:
-----------
[SLP][NFC]Add a run line for the test, NFC
Commit: 7fd91bb6e89be39a130e04058a01d41ae5d600cb
https://github.com/llvm/llvm-project/commit/7fd91bb6e89be39a130e04058a01d41ae5d600cb
Author: Jaden Angella <ajaden at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc.mlir
Log Message:
-----------
[mlir][EmitC]Expand the MemRefToEmitC pass - Adding scalars (#148055)
This aims to expand the the MemRefToEmitC pass so that it can accept
global scalars.
From:
```
memref.global "private" constant @__constant_xi32 : memref<i32> = dense<-1>
func.func @globals() {
memref.get_global @__constant_xi32 : memref<i32>
}
```
To:
```
emitc.global static const @__constant_xi32 : i32 = -1
emitc.func @globals() {
%0 = get_global @__constant_xi32 : !emitc.lvalue<i32>
%1 = apply "&"(%0) : (!emitc.lvalue<i32>) -> !emitc.ptr<i32>
return
}
```
Commit: 87c2adbb589d4cd0b6dfb374fce24d29c6bafac0
https://github.com/llvm/llvm-project/commit/87c2adbb589d4cd0b6dfb374fce24d29c6bafac0
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
Log Message:
-----------
[RISCV][IA] Precommit tests for deinterleaveN of masked.load
Commit: 3ea6da59ecda0708d85f78f1feb4090a8551ce90
https://github.com/llvm/llvm-project/commit/3ea6da59ecda0708d85f78f1feb4090a8551ce90
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][linalg] Allow pack consumer fusion if the tile size is greater than dimension size. (#149438)
This happens only when you use larger tile size, which is greater than
or equal to the dimension size. In this case, it is a full slice, so it
is fusible.
The IR can be generated during the TileAndFuse process. It is hard to
fix in such driver, so we enable the naive fusion for the case.
---------
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Commit: 796d5a89a12407fb0fdf74ea063259b6ca7333d9
https://github.com/llvm/llvm-project/commit/796d5a89a12407fb0fdf74ea063259b6ca7333d9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/CombinationGenerator.h
Log Message:
-----------
[ADT] Use a range-based for loop instead of llvm::for_each (NFC) (#149542)
LLVM Coding Standards discourages llvm::for_each unless we already
have a callable.
Commit: b5e71d727b6624c160c9186b52d73bdb635770ed
https://github.com/llvm/llvm-project/commit/b5e71d727b6624c160c9186b52d73bdb635770ed
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/docs/Extensions.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/lib/Object/ELF.cpp
M llvm/test/MC/AsmParser/llvm_section_types.s
Log Message:
-----------
Add section type to support CFI jump table relaxation.
For context see main pull request: #147424.
Reviewers: MaskRay
Reviewed By: MaskRay
Pull Request: https://github.com/llvm/llvm-project/pull/149259
Commit: f6641e2f233b809958e4f558f5ad2514bc812cb8
https://github.com/llvm/llvm-project/commit/f6641e2f233b809958e4f558f5ad2514bc812cb8
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Factor out code for extracting operands from mem insts [nfc] (#149344)
We're going to end up repeating the operand extraction four times once
all of the routines have been updated to support both plain load/store
and vp.load/vp.store. I plan to add masked.load/masked.store in the near
future, and we'd need to add that to each of the four cases. Instead,
factor out a single copy of the operand normalization.
Commit: 4bf4e87576688c942b7b337f24fb098247dc4642
https://github.com/llvm/llvm-project/commit/4bf4e87576688c942b7b337f24fb098247dc4642
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang-rt/lib/runtime/descriptor.cpp
Log Message:
-----------
Static_cast std::size_t to build flang_rt in 32-bit. (#149529)
Commit: 10b0dee97dd7e5a122116f7ccb26a19b081db9fd
https://github.com/llvm/llvm-project/commit/10b0dee97dd7e5a122116f7ccb26a19b081db9fd
Author: Tobias Decking <Tobias.Decking at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-bitreverse.ll
Log Message:
-----------
[X86] Ensure that bit reversals of byte vectors are properly lowered on pure GFNI targets (#148304)
Fixes #148238.
When GFNI is present, custom bit reversal lowerings for scalar integers
become active. They work by swapping the bytes in the scalar value and
then reversing bits in a vector of bytes. However, the custom bit
reversal lowering for a vector of bytes is disabled if GFNI is present
in isolation, resulting messed up code.
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 6acc6991f83409be3ca6315edf8c7f381ebe4d40
https://github.com/llvm/llvm-project/commit/6acc6991f83409be3ca6315edf8c7f381ebe4d40
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/unittests/ADT/STLForwardCompatTest.cpp
Log Message:
-----------
[STLForwardCompat] Improve category handling in transformOptional (#149539)
The old version would prefer the "const &" overload over the "&&" one
unless the former was not allowed in the given situation. In particular,
if the function passed was "[](auto &&)" the argument would be "const &"
even if the value passed to transformOptional was an rvalue reference.
This version improves the handling of expression categories, and the
lambda argument category will reflect the argument category in the above
scenario.
Commit: 13f7786f72d13a84dfc3d49d87a70e6a05f21fd4
https://github.com/llvm/llvm-project/commit/13f7786f72d13a84dfc3d49d87a70e6a05f21fd4
Author: Roland McGrath <mcgrathr at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
R libc/include/dirent.h.def
M libc/include/dirent.yaml
R libc/include/search.h.def
M libc/include/search.yaml
R libc/include/setjmp.h.def
M libc/include/setjmp.yaml
R libc/include/spawn.h.def
M libc/include/spawn.yaml
R libc/include/string.h.def
M libc/include/string.yaml
R libc/include/strings.h.def
M libc/include/strings.yaml
R libc/include/sys/sendfile.h.def
M libc/include/sys/sendfile.yaml
R libc/include/sys/statvfs.h.def
M libc/include/sys/statvfs.yaml
M libc/include/sys/types.yaml
R libc/include/sys/uio.h.def
M libc/include/sys/uio.yaml
R libc/include/sys/utsname.h.def
M libc/include/sys/utsname.yaml
R libc/include/threads.h.def
M libc/include/threads.yaml
R libc/include/uchar.h.def
M libc/include/uchar.yaml
Log Message:
-----------
[libc] Remove trivial .h.def files (#149466)
Remove all the .h.def files that already express nothing
whatsoever not already expressed in YAML. Clean up a few YAML
files without materially changing any generated header output.
Many more .h.def files remain that need a bit of conversion in
YAML to express macro requirements and such.
Commit: cfa918bec18c012a89a36b5a7ddceacb8e6c9ed7
https://github.com/llvm/llvm-project/commit/cfa918bec18c012a89a36b5a7ddceacb8e6c9ed7
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/FLATInstructions.td
A llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
Log Message:
-----------
[AMDGPU] Select flat GVS atomics on gfx1250 (#149554)
Commit: de59e7b86cd349f9f74b7561594aeae410477326
https://github.com/llvm/llvm-project/commit/de59e7b86cd349f9f74b7561594aeae410477326
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/src/math/atan2_benchmark.cpp
A libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/src/math/sin_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
Log Message:
-----------
[libc] Fix GPU benchmarking
Commit: 6a7f572ef9758f49fcf9e178ce1cb95aa3069415
https://github.com/llvm/llvm-project/commit/6a7f572ef9758f49fcf9e178ce1cb95aa3069415
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
M lldb/include/lldb/API/SBMemoryRegionInfoList.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Symbol/SaveCoreOptions.h
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Symbol/SaveCoreOptions.cpp
A lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump64b.py
M lldb/test/API/python_api/sbsavecoreoptions/TestSBSaveCoreOptions.py
Log Message:
-----------
[LLDB] Fix Memory64 BaseRVA, move all non-stack memory to Mem64. (#146777)
### Context
Over a year ago, I landed support for 64b Memory ranges in Minidump
(#95312). In this patch we added the Memory64 list stream, which is
effectively a Linked List on disk. The layout is a sixteen byte header
and then however many Memory descriptors.
### The Bug
This is a classic off-by one error, where I added 8 bytes instead of 16
for the header. This caused the first region to start 8 bytes before the
correct RVA, thus shifting all memory reads by 8 bytes. We are correctly
writing all the regions to disk correctly, with no physical corruption
but the RVA is defined wrong, meaning we were incorrectly reading memory
### Why wasn't this caught?
One problem we've had is forcing Minidump to actually use the 64b mode,
it would be a massive waste of resources to have a test that actually
wrote >4.2gb of IO to validate the 64b regions, and so almost all
validation has been manual. As a weakness of manual testing, this issue
is psuedo non-deterministic, as what regions end up in 64b or 32b is
handled greedily and iterated in the order it's laid out in
/proc/pid/maps. We often validated 64b was written correctly by
hexdumping the Minidump itself, which was not corrupted (other than the
BaseRVA)
### Why is this showing up now?
During internal usage, we had a bug report that the Minidump wasn't
displaying values. I was unable to repro the issue, but during my
investigation I saw the variables were in the 64b regions which resulted
in me identifying the bug.
### How do we prevent future regressions?
To prevent regressions, and honestly to save my sanity for figuring out
where 8 bytes magically came from, I've added a new API to
SBSaveCoreOptions.
```SBSaveCoreOptions::GetMemoryRegionsToSave()```
The ability to get the memory regions that we intend to include in the Coredump. I added this so we can compare what we intended to include versus what was actually included. Traditionally we've always had issues comparing regions because Minidump includes `/proc/pid/maps` and it can be difficult to know what memoryregion read failure was a genuine error or just a page that wasn't meant to be included.
We are also leveraging this API to choose the memory regions to be generated, as well as for testing what regions should be bytewise 1:1.
After much debate with @clayborg, I've moved all non-stack memory to the Memory64 List. This list doesn't incur us any meaningful overhead and Greg originally suggested doing this in the original 64b PR. This also means we're exercising the 64b path every single time we save a Minidump, preventing regressions on this feature from slipping through testing in the future.
Snippet produced by [minidump.py](https://github.com/clayborg/scripts)
```
MINIDUMP_MEMORY_LIST:
NumberOfMemoryRanges = 0x00000002
MemoryRanges[0] = [0x00007f61085ff9f0 - 0x00007f6108601000) @ 0x0003f655
MemoryRanges[1] = [0x00007ffe47e50910 - 0x00007ffe47e52000) @ 0x00040c65
MINIDUMP_MEMORY64_LIST:
NumberOfMemoryRanges = 0x000000000000002e
BaseRva = 0x0000000000042669
MemoryRanges[0] = [0x00005584162d8000 - 0x00005584162d9000)
MemoryRanges[1] = [0x00005584162d9000 - 0x00005584162db000)
MemoryRanges[2] = [0x00005584162db000 - 0x00005584162dd000)
MemoryRanges[3] = [0x00005584162dd000 - 0x00005584162ff000)
MemoryRanges[4] = [0x00007f6100000000 - 0x00007f6100021000)
MemoryRanges[5] = [0x00007f6108800000 - 0x00007f6108828000)
MemoryRanges[6] = [0x00007f6108828000 - 0x00007f610899d000)
MemoryRanges[7] = [0x00007f610899d000 - 0x00007f61089f9000)
MemoryRanges[8] = [0x00007f61089f9000 - 0x00007f6108a08000)
MemoryRanges[9] = [0x00007f6108bf5000 - 0x00007f6108bf7000)
```
### Misc
As a part of this fix I had to look at LLDB logs a lot, you'll notice I added `0x` to many of the PRIx64 `LLDB_LOGF`. This is so the user (or I) can directly copy paste the address in the logs instead of adding the hex prefix themselves.
Added some SBSaveCore tests for the new GetMemoryAPI, and Docstrings.
CC: @DavidSpickett, @da-viper @labath because we've been working together on save-core plugins, review it optional and I didn't tag you but figured you'd want to know
Commit: 4dc6dfd65397e65f62a453b65cd180639c3a8b9e
https://github.com/llvm/llvm-project/commit/4dc6dfd65397e65f62a453b65cd180639c3a8b9e
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFC][profdata] Apply lints and other format fixes (#149433)
Apply lints and other format fixes to
`llvm/tools/llvm-profdata/llvm-profdata.cpp`. This is intended to have
no functional change.
Commit: b846d8c3e26ef98c8d6936e7cad354f035d322d1
https://github.com/llvm/llvm-project/commit/b846d8c3e26ef98c8d6936e7cad354f035d322d1
Author: Hanumanth <hhanuman at mathworks.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
Log Message:
-----------
[mlir][tosa] Fix tosa-reduce-transposes to handle large constants better (#148755)
This change addresses the performance issue in the **--tosa-reduce-transposes** implementation by working directly with the
raw tensor data, eliminating the need for creating the costly intermediate attributes that leads to bottleneck.
Commit: d64802d6d96ec5aff3739ce34f8143b935921809
https://github.com/llvm/llvm-project/commit/d64802d6d96ec5aff3739ce34f8143b935921809
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/cmake/modules/LLDBFramework.cmake
M lldb/scripts/framework-header-fix.py
M lldb/scripts/version-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
Log Message:
-----------
[lldb][framework] Glob headers from source for framework (#148736)
When gathering the headers to fix up and place in LLDB.framework, we
were previously globbing the header files from a location in the build
directory. This commit changes this to glob from the source directory
instead, as we were globbing from the build directory without ensuring
that the necessary files were actually in that location before globbing.
Commit: 9d9662e4bdffc109cc5a7d0fa7c522d27babfa31
https://github.com/llvm/llvm-project/commit/9d9662e4bdffc109cc5a7d0fa7c522d27babfa31
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/trunc-tofp.ll
Log Message:
-----------
[NVPTX][test] fixup version for ptxas on trunc-tofp.ll (#149558)
Commit: 3c1a09d939f44cbe039ea178af5a77c40b2776a0
https://github.com/llvm/llvm-project/commit/3c1a09d939f44cbe039ea178af5a77c40b2776a0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
Log Message:
-----------
[lldb] Use a range-based for loop instead of llvm::for_each (NFC) (#149541)
LLVM Coding Standards discourages llvm::for_each unless we already
have a callable.
Commit: 36c78ec3c8641cb193ea66f49da01fa6f62280d7
https://github.com/llvm/llvm-project/commit/36c78ec3c8641cb193ea66f49da01fa6f62280d7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
Log Message:
-----------
[DebugInfo] Use llvm::remove_if (NFC) (#149543)
We can pass a range to llvm::remove_if.
Commit: c98b05bd567c16d575bc241cd0602cdf6558d8db
https://github.com/llvm/llvm-project/commit/c98b05bd567c16d575bc241cd0602cdf6558d8db
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/AsmParser/Parser.cpp
M mlir/unittests/Debug/FileLineColLocBreakpointManagerTest.cpp
M mlir/unittests/IR/OperationSupportTest.cpp
M mlir/unittests/IR/ValueTest.cpp
M mlir/unittests/Transforms/DialectConversion.cpp
Log Message:
-----------
[mlir] Deprecate NamedAttrList(std::nullopt_t) (NFC) (#149544)
This patch deprecates NamedAttrList(std::nullopt_t) to avoid use of
std::nullopt outside the context of std::optional.
Commit: cb6370167fd26d61397c1a2555d4c8a5f116d1f6
https://github.com/llvm/llvm-project/commit/cb6370167fd26d61397c1a2555d4c8a5f116d1f6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
M mlir/include/mlir/IR/Operation.h
M mlir/include/mlir/IR/OperationSupport.h
Log Message:
-----------
[mlir] Deprecate OpPrintingFlags(std::nullopt_t) (NFC) (#149546)
This patch deprecates OpPrintingFlags(std::nullopt_t) to avoid use of
std::nullopt outside the context of std::optional.
Commit: c5f0c4ad378803f449f37730601b7d95059600a4
https://github.com/llvm/llvm-project/commit/c5f0c4ad378803f449f37730601b7d95059600a4
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV][IA] Add test coverage for vp.store of interleaveN with one active
Commit: 9878ef3abd2a48fcfb81357d581dac292b52ddb3
https://github.com/llvm/llvm-project/commit/9878ef3abd2a48fcfb81357d581dac292b52ddb3
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/X86/function-align.ll
Log Message:
-----------
CodeGen: Respect function align attribute if less than preferred alignment.
Reviewers: arsenm, efriedma-quic
Reviewed By: arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/149444
Commit: 97a8476068bad449c0340021398b0356a44857aa
https://github.com/llvm/llvm-project/commit/97a8476068bad449c0340021398b0356a44857aa
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang-rt/lib/runtime/assign.cpp
Log Message:
-----------
[flang][runtime] Further work on speeding up work queue operations (#149189)
This patch avoids a trip through the work queue engine for cases on a
CPU where finalization and destruction actions during assignment were
handled without enqueueing another task.
Commit: 680b8dd7073cce6606006ae723899444521aa496
https://github.com/llvm/llvm-project/commit/680b8dd7073cce6606006ae723899444521aa496
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
Log Message:
-----------
[flang][runtime] Handle spaces before ')' in alternative list-directe… (#149384)
…d complex input
List-directed reads of complex values that can't go through the usual
fast path (as in this bug's test case, which uses DECIMAL='COMMA')
didn't skip spaces before the closing right parenthesis correctly.
Fixes https://github.com/llvm/llvm-project/issues/149164.
Commit: 9e5b2fbe86ed9b303eff779fff012d6a96574f3d
https://github.com/llvm/llvm-project/commit/9e5b2fbe86ed9b303eff779fff012d6a96574f3d
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/descriptor.h
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/pointer.cpp
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Runtime/pointer.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/Runtime.cpp
M flang/test/Lower/polymorphic.f90
Log Message:
-----------
[flang][runtime] Preserve type when remapping monomorphic pointers (#149427)
Pointer remappings unconditionally update the element byte size and
derived type of the pointer's descriptor. This is okay when the pointer
is polymorphic, but not when a pointer is associated with an extended
type.
To communicate this monomorphic case to the runtime, add a new entry
point so as to not break forward binary compatibility.
Commit: b6ea04a37b2a41e24bb999e5a9b6a7bd2b576085
https://github.com/llvm/llvm-project/commit/b6ea04a37b2a41e24bb999e5a9b6a7bd2b576085
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/lib/Semantics/resolve-labels.cpp
Log Message:
-----------
[flang][NFC] Fix build-time warning (#149549)
Don't increment the LHS variable of an assignment that also uses that
variable on the RHS.
Commit: abdd4536ce0fc75c7a4ddcc1da5913ec5e028091
https://github.com/llvm/llvm-project/commit/abdd4536ce0fc75c7a4ddcc1da5913ec5e028091
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Semantics/OpenACC/acc-kernels-loop.f90
Log Message:
-----------
[flang][openacc] fix bugs with default(none) checking (#149220)
A report of the following code not generating an error led to fixing two bugs in directive checking.
- We should treat CombinedConstructs as OpenACC Constructs
- We should treat DoConstruct index variables as private.
```fortran
subroutine sub(nn)
integer :: nn, ii
!$acc serial loop default(none)
do ii = 1, nn
end do
!$acc end serial loop
end subroutine
```
Here `nn` should be flagged as needing a data clause while `ii` should
still get one implicitly.
Commit: 695660cdfd1ca65cd6e02e6950d10c990dfa0036
https://github.com/llvm/llvm-project/commit/695660cdfd1ca65cd6e02e6950d10c990dfa0036
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
Log Message:
-----------
[AMDGPU] Provide control to force VGPR MFMA form (#148079)
This gives an override to the user to force select VGPR form of MFMA.
Eventually we will drop this in favor of compiler making better
decisions, but this provides a mechanism for users to address the cases
where MayNeedAGPRs favors the AGPR form and performance is degraded due
to poor RA.
Commit: 004c67ea257039e4e98abc26dd4ac6e8f3d7a171
https://github.com/llvm/llvm-project/commit/004c67ea257039e4e98abc26dd4ac6e8f3d7a171
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
M llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
Log Message:
-----------
[LV] Vectorize maxnum/minnum w/o fast-math flags. (#148239)
Update LV to vectorize maxnum/minnum reductions without fast-math flags,
by adding an extra check in the loop if any inputs to maxnum/minnum are
NaN, due to maxnum/minnum behavior w.r.t to signaling NaNs. Signed-zeros
are already handled consistently by maxnum/minnum.
If any input is NaN,
*exit the vector loop,
*compute the reduction result up to the vector iteration that contained
NaN inputs and
* resume in the scalar loop
New recurrence kinds are added for reductions using maxnum/minnum
without fast-math flags.
PR: https://github.com/llvm/llvm-project/pull/148239
Commit: fb5c94e712e683e8b7c3cd04b3e47584c226d751
https://github.com/llvm/llvm-project/commit/fb5c94e712e683e8b7c3cd04b3e47584c226d751
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/tools/llvm-profdata/c-general.test
A llvm/test/tools/llvm-profdata/show-hot.proftext
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[profdata] Use --hot-func-list to show all hot functions (#149428)
The `--hot-func-list` flag is used for sample profiles to dump the list
of hot functions. Add support to dump hot functions for IRPGO profiles
as well.
This also removes a `priority_queue` used for `--topn`. We can instead
store all functions and sort at the end before dumping. Since we are
storing `StringRef`s, I believe this won't consume too much memory.
Commit: ffb453989b0e95d85b6cfa543b65fec23b65649d
https://github.com/llvm/llvm-project/commit/ffb453989b0e95d85b6cfa543b65fec23b65649d
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[NFC][AMDGPU] Align all gfx1250 VOP1 MC tests with downstream (#149567)
This PR adds all VOP1 tests that haven't yet been upstreamed by copying
the relevant test files directly from downstream. Afterward, the
auto-generation script is run with the `--unique` option to deduplicate
any redundant tests that may have been introduced during the downstream
merge.
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: d46de86ca4060fe2c631c08728af7c48ce9458fd
https://github.com/llvm/llvm-project/commit/d46de86ca4060fe2c631c08728af7c48ce9458fd
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
Log Message:
-----------
[NFC][AMDGPU] Re-enable two tests previously disabled due to missing upstream features (#149568)
This PR re-enables two tests that were previously disabled because they
depended on features not yet upstreamed.
Commit: 3be44e25804e776d3ff071740a60ae6d2f3ef4a7
https://github.com/llvm/llvm-project/commit/3be44e25804e776d3ff071740a60ae6d2f3ef4a7
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
Log Message:
-----------
[TableGen] Add some -time-phases support in CodeGenRegisters (#149309)
Commit: d63ab5467dcae0492e2f4def336ddbb73ce10dc5
https://github.com/llvm/llvm-project/commit/d63ab5467dcae0492e2f4def336ddbb73ce10dc5
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
A llvm/test/CodeGen/NVPTX/pr126337.ll
M llvm/test/CodeGen/NVPTX/reduction-intrinsics.ll
Log Message:
-----------
[NVPTX] don't erase CopyToRegs when folding movs into loads (#149393)
We may still need to keep CopyToReg even after folding uses into vector
loads, since the original register may be used in other blocks.
Partially reverts 1fdbe6984976d9e85ab3b1a93e8de434a85c5646
Commit: b02787d33f24d83f1d5814c578b7b0fce7156382
https://github.com/llvm/llvm-project/commit/b02787d33f24d83f1d5814c578b7b0fce7156382
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
Log Message:
-----------
[CIR] Fix alignment when lowering set/get bitfield operations (#148999)
This PR fixes incorrect alignment when lowering `set` and `getBitField`
operations to LLVM IR. The issue occurred because during lowering, the
function was being called with an alignment of 0, which caused it to
default to the alignment of the packed member. For example, if the
bitfield was packed inside a `u64i`, it would use an alignment of 8.
With this change, the generated code now matches what the classic
codegen produces.
In the assembly format, I changed to be similar to how it's done in
loadOp. If there's a better approach, please feel free to point it out.
Commit: 965b68e8f26ea51202adfd2ab6429a68e8ce63c3
https://github.com/llvm/llvm-project/commit/965b68e8f26ea51202adfd2ab6429a68e8ce63c3
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
Log Message:
-----------
[NVPTX] Prevent fptrunc of v2f32 from being folded into store (#149571)
Commit: 3641448e08961d8b8621fafa01167f96d948ee9e
https://github.com/llvm/llvm-project/commit/3641448e08961d8b8621fafa01167f96d948ee9e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/source/Target/Thread.cpp
Log Message:
-----------
[lldb] Use StopInfoSP instead of StopInfo* (NFC)
Don't make assumptions about the lifetime of the underlying object and
use the shared_ptr to participate in reference counting and extend the
lifetime of the object to the end of the lexical scope.
Commit: 1b8a136a09bfed49ae008a354946804230055153
https://github.com/llvm/llvm-project/commit/1b8a136a09bfed49ae008a354946804230055153
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
Log Message:
-----------
[Sanitizer] remove array-bounds-pseudofn (#149430)
This has been replaced by -fsanitize-annotate-debug-info
Commit: 6d8e53d4afe46608f47bcb014387c053829cdcf1
https://github.com/llvm/llvm-project/commit/6d8e53d4afe46608f47bcb014387c053829cdcf1
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
A llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_smem.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vbuffer_mubuf.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] Support nv memory instructions modifier on gfx1250 (#149582)
Commit: 921c6dbecaf49e3ed24b94802f094cd7f61f1873
https://github.com/llvm/llvm-project/commit/921c6dbecaf49e3ed24b94802f094cd7f61f1873
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
A llvm/docs/CalleeTypeMetadata.rst
M llvm/docs/LangRef.rst
M llvm/docs/Reference.rst
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
A llvm/test/Assembler/callee-type-metadata.ll
A llvm/test/Transforms/Inline/drop-callee-type-metadata.ll
A llvm/test/Transforms/InstCombine/drop-callee-type-metadata.ll
A llvm/test/Transforms/SimplifyCFG/merge-callee-type-metadata.ll
A llvm/test/Verifier/callee-type-metadata.ll
Log Message:
-----------
[llvm] Introduce callee_type metadata
Introduce `callee_type` metadata which will be attached to the indirect
call instructions.
The `callee_type` metadata will be used to generate `.callgraph` section
described in this RFC:
https://lists.llvm.org/pipermail/llvm-dev/2021-July/151739.html
Reviewers: morehouse, petrhosek, nikic, ilovepi
Reviewed By: nikic, ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/87573
Commit: c99c213e725adee22c386d2059118a49f0c57054
https://github.com/llvm/llvm-project/commit/c99c213e725adee22c386d2059118a49f0c57054
Author: Diego Caballero <dieg0ca6aller0 at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
Log Message:
-----------
[mlir][Flang][NFC] Replace use of `vector.insertelement/extractelement` (#143272)
This PR is part of the last step to remove `vector.extractelement` and
`vector.insertelement` ops (RFC:
https://discourse.llvm.org/t/rfc-psa-remove-vector-extractelement-and-vector-insertelement-ops-in-favor-of-vector-extract-and-vector-insert-ops).
It replaces `vector.insertelement` and `vector.extractelement` with
`vector.insert` and `vector.extract` in Flang. It looks like no lit
tests are impacted?
Commit: 2e67dcfdcd023df2f06e0823eeea23990ce41534
https://github.com/llvm/llvm-project/commit/2e67dcfdcd023df2f06e0823eeea23990ce41534
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M flang/test/Lower/PowerPC/ppc-vec-extract-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-extract.f90
M flang/test/Lower/PowerPC/ppc-vec-insert-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-insert.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
Log Message:
-----------
[flang] update ppc lit tests after using vector.insert and vector.extract (NFC) (#148775)
See https://github.com/llvm/llvm-project/pull/143272
Commit: 20c5daa032ca5e4c655d1248ef9cbf8a33183aaf
https://github.com/llvm/llvm-project/commit/20c5daa032ca5e4c655d1248ef9cbf8a33183aaf
Author: lntue <lntue at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
M libc/src/__support/math/exp10f_utils.h
Log Message:
-----------
[libc] Fix conflicting symbols when shared/math.h is included. (#149591)
Commit: 28c1433cf3cb3a4a7a4cb0e9488e04b2699c72d6
https://github.com/llvm/llvm-project/commit/28c1433cf3cb3a4a7a4cb0e9488e04b2699c72d6
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp:726:13: error:
unused variable 'RedPhiRK' [-Werror,-Wunused-variable]
Commit: b9aa06f897efafc2b8c9c1de45bdfe987aadb879
https://github.com/llvm/llvm-project/commit/b9aa06f897efafc2b8c9c1de45bdfe987aadb879
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[llvm] Improve grammar and punctuation of LLVM Language Reference Manual (#149553)
Commit: 7b5d8a02d21e5309a4a48eb3d699b75c53144492
https://github.com/llvm/llvm-project/commit/7b5d8a02d21e5309a4a48eb3d699b75c53144492
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
Revert "[NFC][profdata] Apply lints and other format fixes" (#149601)
Reverts llvm/llvm-project#149433
This broke the hwasan buildbot:
https://lab.llvm.org/buildbot/#/builders/55/builds/14455
Commit: 7c57b559a4c40599b4ec8ac7a638ed151f24fc8c
https://github.com/llvm/llvm-project/commit/7c57b559a4c40599b4ec8ac7a638ed151f24fc8c
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
Log Message:
-----------
[lldb][scripts] Fix framework script unifdef test (#149607)
Fixes a test that's failing on LLDB GreenDragon due to a mistake in the
arguments used when calling the framework-header-fix script.
Commit: 09bea21d9507e142d2ff6a5068362bdc824fce54
https://github.com/llvm/llvm-project/commit/09bea21d9507e142d2ff6a5068362bdc824fce54
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Log Message:
-----------
[mlir][memref] Simplify memref.copy canonicalization (#149506)
FoldCopyOfCast has both a OpRewritePattern implementation and a folder
implementation. This PR removes the OpRewritePattern implementation.
Commit: 68fd102598a27e2654c0ced9c122c601795097fe
https://github.com/llvm/llvm-project/commit/68fd102598a27e2654c0ced9c122c601795097fe
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M lldb/source/Target/StopInfo.cpp
Log Message:
-----------
[lldb] Use std::make_shared for StopInfoSP (#149612)
Use std::make_shared to create a StopInfoSP, which inherits from
shared_from_this. It's both the most efficient and safest way to create
these objects:
- With make_shared, the object and the control block are allocated
together, which is more efficient.
- With make_shared, the enable_shared_from_this base class is properly
linked to the control block before the constructor finishes, so
shared_from_this() will be safe to use (though still not recommended
during construction).
Commit: fef42382882fdd094add0f404d872aa8f4282ea9
https://github.com/llvm/llvm-project/commit/fef42382882fdd094add0f404d872aa8f4282ea9
Author: Colin De Vlieghere <cdevlieghere at tesla.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/python/mlir/dialects/scf.py
M mlir/test/python/dialects/scf.py
Log Message:
-----------
[MLIR][SCF] Add dedicated Python bindings for ForallOp (#149416)
This patch specializes the Python bindings for ForallOp and
InParallelOp, similar to the existing one for ForOp. These bindings
create the regions and blocks properly and expose some additional
helpers.
Commit: a5d6fa68e399dee9eb56f2671670085b26c06b4a
https://github.com/llvm/llvm-project/commit/a5d6fa68e399dee9eb56f2671670085b26c06b4a
Author: Jens Reidel <adrian at travitia.xyz>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt][Mips] Fix stat size check on mips64 musl (#143301)
The sizes of the struct stat on MIPS64 differ in musl vs glibc.
See https://godbolt.org/z/qf9bcq8Y8 for the proof. Prior to this change,
compilation for MIPS64 musl would fail.
Signed-off-by: Jens Reidel <adrian at travitia.xyz>
Commit: 2f38ced51b7c560dcb6d01180efe5ab22bbe004f
https://github.com/llvm/llvm-project/commit/2f38ced51b7c560dcb6d01180efe5ab22bbe004f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Support/StringMap.cpp
Log Message:
-----------
StringMap: Remove redundant member init in constructor (#149491)
These are already zeroinitialized in the field definitions.
Commit: b3c9ed151f18fbbfe027cf93dd7957f36bcbaccf
https://github.com/llvm/llvm-project/commit/b3c9ed151f18fbbfe027cf93dd7957f36bcbaccf
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/f32x2-instructions.ll
Log Message:
-----------
[NVPTX][test] regenerate some tests broken by successive changes (#149611)
#149393 and #149571 landed in quick succession requiring
some tests to be regenerated to account for their interactions.
Commit: cfddb401db111c53f0a345c2a590974487a96bb9
https://github.com/llvm/llvm-project/commit/cfddb401db111c53f0a345c2a590974487a96bb9
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acos.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acos.h
A libc/src/__support/math/asin_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acos.cpp
M libc/src/math/generic/asin.cpp
R libc/src/math/generic/asin_utils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acos implementation to header-only in src/__support/math folder. (#148409)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: e1ac57c1a560b1d9891f93081e2f9c862c4a8d77
https://github.com/llvm/llvm-project/commit/e1ac57c1a560b1d9891f93081e2f9c862c4a8d77
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M mlir/test/IR/test-pattern-logging-listener.mlir
Log Message:
-----------
[mlir][test] Add missing `REQUIRES: asserts` for --debug-only flag (#149634)
Debug flags are not provided in fully optimized builds.
Test added in #149378 / #146228
Commit: e57315e6ca8f05154e205136bb940b8cb14028d3
https://github.com/llvm/llvm-project/commit/e57315e6ca8f05154e205136bb940b8cb14028d3
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/test/Transforms/Inline/memprof_inline2.ll
A llvm/test/Transforms/Inline/memprof_inline3.ll
Log Message:
-----------
[MemProf] Fix discarding of noncold contexts after inlining (#149599)
When we rebuild the call site tries after inlining of an allocation with
MD_memprof metadata, we don't want to reapply the discarding of small
non-cold contexts (under -memprof-callsite-cold-threshold=) because we
have either no context size info (without -memprof-report-hinted-sizes
or another option that causes us to keep that as metadata), and even
with that information in the metadata, we have imperfect information at
that point as we have already discarded some contexts during matching.
The first case was even worse because we didn't guard our check by
whether the number of cold bytes was 0, leading to very aggressive
pruning during post-inline metadata rebuilding without the context size
information.
Commit: a5481e7d5af07161b5d135100cb8754ae614accf
https://github.com/llvm/llvm-project/commit/a5481e7d5af07161b5d135100cb8754ae614accf
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/test/Instrumentation/HWAddressSanitizer/globals.ll
Log Message:
-----------
[NFCI] [HWASan] add test for custom section global (#149625)
Commit: ef49ed4829bc1b111e31a08d70b0ccae66427ebf
https://github.com/llvm/llvm-project/commit/ef49ed4829bc1b111e31a08d70b0ccae66427ebf
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/Sema/diagnose_if.c
M clang/test/SemaCXX/diagnose_if-ext.cpp
M clang/test/SemaCXX/diagnose_if.cpp
Log Message:
-----------
[clang][bytecode] Use bytecode interpreter in isPotentialConstantExprU… (#149462)
…nevaluated
Fake a function call to the given function and evaluate the given
expression as if it was part of that function call.
Fixes #149383
Commit: c875bb8eef6c60e7cd5814fdbab149abb86efa30
https://github.com/llvm/llvm-project/commit/c875bb8eef6c60e7cd5814fdbab149abb86efa30
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M flang/docs/GettingStarted.md
Log Message:
-----------
[flang] Minor revision of the getting started guide. (#149632)
- C++17 is now the default, no need to specify explicitly.
https://github.com/llvm/llvm-project/blob/b3c9ed151f18fbbfe027cf93dd7957f36bcbaccf/flang/CMakeLists.txt#L13
- The current recommended way to set up OpenMP is as a runtime, not as a
project.
https://github.com/llvm/llvm-project/blob/b3c9ed151f18fbbfe027cf93dd7957f36bcbaccf/llvm/CMakeLists.txt#L209-L214
Commit: 9bf7d04c4386daf1ef0acf95782a59855c98474a
https://github.com/llvm/llvm-project/commit/9bf7d04c4386daf1ef0acf95782a59855c98474a
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/Value.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/InterpreterUtils.cpp
M clang/lib/Interpreter/InterpreterUtils.h
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/test/Interpreter/pretty-print.c
A clang/test/Interpreter/pretty-print.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Lay the basic infrastructure for pretty printing of types (#148701)
The idea is to store a type-value pair in clang::Value which is updated
by the interpreter runtime. The class copies builtin types and boxes
non-builtin types to provide some lifetime control.
The patch enables default printers for C and C++ using a very
minimalistic approach. We handle enums, arrays and user types. Once we
land this we can focus on enabling user-defined pretty-printers which
take control over printing of types
The work started as part of https://reviews.llvm.org/D146809, then we
created a giant in https://github.com/llvm/llvm-project/pull/84769
Commit: 7c402b8b81d2b69b55eb5bac39830fbc631f8cde
https://github.com/llvm/llvm-project/commit/7c402b8b81d2b69b55eb5bac39830fbc631f8cde
Author: YexuanXiao <bizwen at nykz.org>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/ScanfFormatString.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/ast-dump-array.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/AST/ast-dump-expr-json.cpp
M clang/test/AST/ast-dump-expr.c
M clang/test/AST/ast-dump-expr.cpp
M clang/test/AST/ast-dump-openmp-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-stmt-json.cpp
M clang/test/AST/ast-dump-stmt.cpp
M clang/test/AST/ast-dump-traits.cpp
M clang/test/AST/ast-dump-types-errors-json.cpp
M clang/test/Analysis/cfg.cpp
M clang/test/Analysis/explain-svals.cpp
M clang/test/Analysis/std-c-library-functions-arg-weakdeps.c
M clang/test/Analysis/std-c-library-functions-lookup.c
M clang/test/Analysis/std-c-library-functions-vs-stream-checker.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p2.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/FixIt/fixit-format-ios-nopedantic.m
M clang/test/FixIt/format.m
M clang/test/Sema/format-strings-fixit-ssize_t.c
M clang/test/Sema/format-strings-scanf.c
M clang/test/Sema/format-strings-size_t.c
M clang/test/Sema/matrix-type-builtins.c
M clang/test/Sema/ptrauth-atomic-ops.c
M clang/test/Sema/ptrauth.c
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/enum-scoped.cpp
M clang/test/SemaCXX/microsoft-varargs-diagnostics.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/type-aware-new-delete-basic-free-declarations.cpp
M clang/test/SemaCXX/unavailable_aligned_allocation.cpp
M clang/test/SemaHLSL/Language/AssignArray.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
M clang/test/SemaObjC/matrix-type-builtins.m
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/libclang/CIndex.cpp
M libcxx/test/libcxx/containers/sequences/deque/spare_block_handling.pass.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Reland [Clang] Make the SizeType, SignedSizeType and PtrdiffType be named sugar types (#149613)
The checks for the 'z' and 't' format specifiers added in the original
PR #143653 had some issues and were overly strict, causing some build
failures and were consequently reverted at
https://github.com/llvm/llvm-project/commit/4c85bf2fe8042c855c9dd5be4b02191e9d071ffd.
In the latest commit
https://github.com/llvm/llvm-project/pull/149613/commits/27c58629ec76a703fde9c0b99b170573170b4a7a,
I relaxed the checks for the 'z' and 't' format specifiers, so warnings
are now only issued when they are used with mismatched types.
The original intent of these checks was to diagnose code that assumes
the underlying type of `size_t` is `unsigned` or `unsigned long`, for
example:
```c
printf("%zu", 1ul); // Not portable, but not an error when size_t is unsigned long
```
However, it produced a significant number of false positives. This was
partly because Clang does not treat the `typedef` `size_t` and
`__size_t` as having a common "sugar" type, and partly because a large
amount of existing code either assumes `unsigned` (or `unsigned long`)
is `size_t`, or they define the equivalent of size_t in their own way
(such as
sanitizer_internal_defs.h).https://github.com/llvm/llvm-project/blob/2e67dcfdcd023df2f06e0823eeea23990ce41534/compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h#L203
Commit: 6b371cab949e3ff9e903d6c3118f4b2be2bf3cc5
https://github.com/llvm/llvm-project/commit/6b371cab949e3ff9e903d6c3118f4b2be2bf3cc5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
A libcxx/test/extensions/gnu/hash_map/hash_map.pass.cpp
A libcxx/test/extensions/gnu/hash_map/hash_map_name_lookup.pass.cpp
A libcxx/test/extensions/gnu/hash_set/hash_set.pass.cpp
A libcxx/test/extensions/gnu/hash_set/hash_set_name_lookup.pass.cpp
A libcxx/test/extensions/libcxx/atomics/atomics.flag/init_bool.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/map/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/set/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/unord.map/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/unord.set/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/sequences/deque/incomplete.pass.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/extern_c.pass.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/include_as_c.sh.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/stdint_h.std_types_t.compile.pass.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/stdint_h.xopen_source.compile.pass.cpp
R libcxx/test/extensions/libcxx/include_as_c.sh.cpp
A libcxx/test/extensions/msvc/math_h.compile.pass.cpp
R libcxx/test/libcxx/atomics/atomics.flag/init_bool.pass.cpp
R libcxx/test/libcxx/containers/associative/map/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/set/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/unord.map/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/unord.set/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/gnu_cxx/hash_map.pass.cpp
R libcxx/test/libcxx/containers/gnu_cxx/hash_map_name_lookup.pass.cpp
R libcxx/test/libcxx/containers/gnu_cxx/hash_set.pass.cpp
R libcxx/test/libcxx/containers/gnu_cxx/hash_set_name_lookup.pass.cpp
R libcxx/test/libcxx/containers/sequences/deque/incomplete.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/math_h.compile.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/stdint_h.std_types_t.compile.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/stdint_h.xopen_source.compile.pass.cpp
Log Message:
-----------
[libc++] Move a bunch of extensions tests to test/extensions (#149275)
Commit: 6855b9c598b3258e8c0e3edffe5458630a0b0105
https://github.com/llvm/llvm-project/commit/6855b9c598b3258e8c0e3edffe5458630a0b0105
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/Parser.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
Log Message:
-----------
[clang][deps] Properly capture the global module and '\n' for all module directives (#148685)
Previously, the newline after a module directive was not properly
captured and printed by `clang::printDependencyDirectivesAsSource`.
According to P1857R3, each directive must, after skipping horizontal
whitespace, appear at the start of a logical line. Because the newline
after module directives was missing, this invalidated the following
line.
This fixes tests that were previously in violation of P1857R3,
including for Objective-C directives, which should also comply with
P1857R3.
This also ensures that the global module fragment `module;` is captured
by the dependency directives scanner.
Commit: 224e221f1bcb64cf20d81a4ad2855043e445d9bf
https://github.com/llvm/llvm-project/commit/224e221f1bcb64cf20d81a4ad2855043e445d9bf
Author: Charles Zablit <c_zablit at apple.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M lldb/include/lldb/Utility/Stream.h
Log Message:
-----------
[NFC][lldb] fix extra line after documentation (#149482)
Formatting patch which removes an extra line after a docstring.
Commit: baf2953097a8d606c8e8441c61c09f607f583cc8
https://github.com/llvm/llvm-project/commit/baf2953097a8d606c8e8441c61c09f607f583cc8
Author: kissholic <kissholicovo at outlook.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/fold-fcmp-trunc.ll
Log Message:
-----------
Optimize fptrunc(x)>=C1 --> x>=C2 (#99475)
Fix https://github.com/llvm/llvm-project/issues/85265#issue-2186848949
Commit: b5348e76225a1580530cd4cd362cfa60728693e6
https://github.com/llvm/llvm-project/commit/b5348e76225a1580530cd4cd362cfa60728693e6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libcxx/.clang-format
M libcxx/include/__config
M libcxx/include/__memory/construct_at.h
M libcxx/include/print
M libcxx/include/string
M libcxx/include/string_view
A libcxx/test/libcxx/algorithms/specialized.algorithms/nonnull.verify.cpp
A libcxx/test/libcxx/input.output/iostream.format/print.fun/nonnull.verify.cpp
M libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/test/libcxx/strings/string.view/assert.ctor.pointer.pass.cpp
A libcxx/test/libcxx/strings/string.view/nonnull.verify.cpp
Log Message:
-----------
[libc++] Diagnose passing null pointers to a bunch of APIs (#148585)
Commit: 193de1a566aa5a10a6f63f6f7c7fca2e52a7d75b
https://github.com/llvm/llvm-project/commit/193de1a566aa5a10a6f63f6f7c7fca2e52a7d75b
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[clang-repl] Spell out the enum types to appease some bots.
This change is a follow-up of llvm/llvm-project#148701 where clang-s390x-linux
and clang-s390x-linux-lnt failed.
Commit: 3866e4e7f85aacd0e47978b22084ed00ebcd0531
https://github.com/llvm/llvm-project/commit/3866e4e7f85aacd0e47978b22084ed00ebcd0531
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm100a.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-cta-sm90.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-gather4.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s-im2colw128.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch-sm100a.ll
A llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g-scatter4.ll
Log Message:
-----------
[NVPTX] Add im2colw/w128 modes support to TMA intrinsics (#148863)
This patch adds support for the im2col-w/w128 and scatter/gather modes
for TMA Copy and Prefetch intrinsics, completing support for all the
available modes. These are lowered through tablegen, building
on top of earlier patches.
* lit tests are added for all the combinations and verified with a
12.8 ptxas executable.
* Documentation is updated in the NVPTXUsage.rst file.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 802ea0eb78f7c974d4097c38587f4c207451d7ee
https://github.com/llvm/llvm-project/commit/802ea0eb78f7c974d4097c38587f4c207451d7ee
Author: Guy David <49722543+guy-david at users.noreply.github.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
Log Message:
-----------
[Support] System include SipHash.h (#149499)
A regular include may not search the system include path.
Commit: 65bde89c9a081eab1e8102b06a46d445e1320bd8
https://github.com/llvm/llvm-project/commit/65bde89c9a081eab1e8102b06a46d445e1320bd8
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/compound_literal.cpp
Log Message:
-----------
[CIR] Upstream CompoundLiteralExpr for Scalar (#148943)
Upstream CompoundLiteralExpr for Scalar as a prerequisite for
CompoundLiteralExpr for ComplexType
Commit: 0aff1b6cdda5f6f3ce31fe30a4aaa6c8f947b64b
https://github.com/llvm/llvm-project/commit/0aff1b6cdda5f6f3ce31fe30a4aaa6c8f947b64b
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
Log Message:
-----------
[CIR][NFC] Replace bool by cir::UnaryOpKind in emitComplexPrePostIncDec (#149566)
Replace bool by cir::UnaryOpKind in emitComplexPrePostIncDec
Commit: 167c695cece8e4fa78b7e9c5fc94bae3821ade52
https://github.com/llvm/llvm-project/commit/167c695cece8e4fa78b7e9c5fc94bae3821ade52
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libcxx/docs/ReleaseNotes.rst
A libcxx/docs/ReleaseNotes/22.rst
Log Message:
-----------
[libc++] Add and empty skeleton for LLVM 22 release notes (#149535)
Commit: 50408eeff6020061ceb6685448e214f36c75f71b
https://github.com/llvm/llvm-project/commit/50408eeff6020061ceb6685448e214f36c75f71b
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
Revert "[clang-repl] Spell out the enum types to appease some bots."
This did not help the bots. Add another check that might help me figure out the
issue.
This reverts commit 193de1a566aa5a10a6f63f6f7c7fca2e52a7d75b.
Commit: 64220357b45b2c262eece817e797a29b8daabdd5
https://github.com/llvm/llvm-project/commit/64220357b45b2c262eece817e797a29b8daabdd5
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
A libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.compile.pass.cpp
R libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.erasure/erase_if.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/iterator_comparison.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.iterators/reverse_iterator.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/clear.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/emplace_hint.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/extract.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_cv.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_rv.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_sorted_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/replace.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_free.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/swap_member.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/comp.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.observers/keys_values.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/contains_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/count_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/equal_range_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/find_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/lower_bound_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.operations/upper_bound_transparent.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/helpers.h
Log Message:
-----------
[libc++] constexpr flat_multimap (#148417)
Fixes #128674
Commit: ecf0cbda18d41939952ac1ee5a320e8920cf9e50
https://github.com/llvm/llvm-project/commit/ecf0cbda18d41939952ac1ee5a320e8920cf9e50
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCObjectStreamer.cpp
Log Message:
-----------
MCFragment: Refactor LEB
* Deduplicate creation of SLEB128/ULEB128 with makeLEB.
* Call newFragment to prepare for removing getOrCreateDataFragment.
Commit: 1fcf49a35c4ffce2c0a8baf8a045c031f783ccff
https://github.com/llvm/llvm-project/commit/1fcf49a35c4ffce2c0a8baf8a045c031f783ccff
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
Log Message:
-----------
MC: Replace FT_PseudoProbe with FT_LEB
The fragment type introduced by https://reviews.llvm.org/D91878 is
unnecessary and can be replaced with FT_LEB.
Commit: c43f828d59672b4844a7409e4660b9f8f509da35
https://github.com/llvm/llvm-project/commit/c43f828d59672b4844a7409e4660b9f8f509da35
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/Sema/const-eval.c
M clang/test/SemaCXX/constant-expression-cxx14.cpp
Log Message:
-----------
[Clang] Be less strict about diagnosing null pointer dereference. (#149648)
In #143667, we made constant evaluation fail on `*null_ptr`, as this is
UB. However, `&(*(foo*)0)` seems to be a common pattern, which made
#143667 too disruptive.
So instead of failing the evaluation, we note the UB, which let clang
recovers when checking for constant initialization.
Fixes #149500
Commit: 906295b8a31c8dac5aa845864c0bca9f02f86184
https://github.com/llvm/llvm-project/commit/906295b8a31c8dac5aa845864c0bca9f02f86184
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/Arith/IR/Arith.h
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
Log Message:
-----------
[mlir] update affine+arith create APIs (1/n) (#149656)
This PR updates create APIs for arith and affine - specifically these
are the only in-tree dialects/ops with "custom" builders:
```
AffineDmaStartOp
AffineDmaWaitOp
ConstantIntOp
ConstantFloatOp
ConstantIndexOp
```
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 0a463bd43e626695b7221b0cf20cdaa5970cfe98
https://github.com/llvm/llvm-project/commit/0a463bd43e626695b7221b0cf20cdaa5970cfe98
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Mark asan and systemz as unsupported for now.
While waiting for the bot owners it seems that this is not a major issue due
to the big endianness of the systemz platform. Instead it looks like we are not
modelling something well for enum types. Probably `va_arg` has a bug for that
platform or similar.
The asan failure seems to be a crash in asan and maybe related to the issues
we've mentioned in llvm/llvm-project#102858.
This patch should appease the bots that were broken by llvm/llvm-project#148701
Commit: 4d76ff9d2ef62766e1a244fa2f5b9e493f890afc
https://github.com/llvm/llvm-project/commit/4d76ff9d2ef62766e1a244fa2f5b9e493f890afc
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libc/src/sys/time/linux/setitimer.cpp
Log Message:
-----------
[libc] Fix setitimer build when full_build=OFF (#149665)
When we pull the headers from the system, we might get a suseconds_t
that's a long long, so add a cast to prevent a implicit conversion
error.
Commit: 3fd53db8585749451a0686d651e753e8b23265cf
https://github.com/llvm/llvm-project/commit/3fd53db8585749451a0686d651e753e8b23265cf
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
M llvm/test/Transforms/LoopVectorize/X86/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[VPlan] Remove unneeded VPVectorPointer after narrowing to replicate.
The replicate recipes created when narrowing interleave groups don't
need a VPVectorPointer, they can simply use the existing pointer.
Commit: 5753be4ea29a01a601eeee7380a2f5a284711d7a
https://github.com/llvm/llvm-project/commit/5753be4ea29a01a601eeee7380a2f5a284711d7a
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libc/src/sys/time/linux/utimes.cpp
Log Message:
-----------
[libc] Fix utimes build when full_build=OFF (#149668)
We might pull a header from the host where tv_nsec is not a long,
so compilation would fail with an implicit conversion error.
Commit: fed6db45dfbe10cf1a3dab663e8ceb7e7974d713
https://github.com/llvm/llvm-project/commit/fed6db45dfbe10cf1a3dab663e8ceb7e7974d713
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/complex.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/CXX/drs/cwg14xx.cpp
Log Message:
-----------
[clang][bytecode] Diagnose dereferencing a null pointer (#149330)
Commit: dc89a910aa153ebf9d4fa57edeefe4bcec1d1014
https://github.com/llvm/llvm-project/commit/dc89a910aa153ebf9d4fa57edeefe4bcec1d1014
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MCStreamer: Simplify with newFragment. NFC
Commit: 52bcc7b170b4f16949d650987427f7f898e9cddb
https://github.com/llvm/llvm-project/commit/52bcc7b170b4f16949d650987427f7f898e9cddb
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/RegAllocBasic.cpp
A llvm/lib/CodeGen/RegAllocBasic.h
Log Message:
-----------
[NFC][RA] Refactor RABasic into a Separate Header (#149555)
This change refactors the RABasic type by moving it from
RegAllocBasic.cpp to a new header file, RegAllocBasic.h. This separation
of header and implementation aligns with the structure used by other
register allocators, such as RegAllocGreedy. The refactoring is intended
to facilitate future use of RABasic in other contexts.
Commit: 6eef978e1e43f9f1e143f735e5afbd3427d42487
https://github.com/llvm/llvm-project/commit/6eef978e1e43f9f1e143f735e5afbd3427d42487
Author: eaeltsin <eaeltsin at google.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M mlir/lib/Target/IRDLToCpp/TemplatingUtils.h
Log Message:
-----------
Include <vector> in TemplatingUtils.h (#149671)
This is needed after 3ee0f97b950a550ef14e3adbdf45f507273f2190
Commit: 52f56edccfce7692d90ae391070b69b746d900fc
https://github.com/llvm/llvm-project/commit/52f56edccfce7692d90ae391070b69b746d900fc
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/MC/WasmObjectWriter.cpp
Log Message:
-----------
WasmObjectWrier: Simplify fragment walk in .init_array
and reduce the reliance on the FT_Align/FT_Data layout,
which will be changed by #149030
Commit: 269e3091a6ecf24893993b97da7b5f959b2f24a1
https://github.com/llvm/llvm-project/commit/269e3091a6ecf24893993b97da7b5f959b2f24a1
Author: David Green <david.green at arm.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
M llvm/test/CodeGen/AArch64/highextractbitcast.ll
M llvm/test/CodeGen/AArch64/neon-saba.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for some abd cases. NFC
Commit: 07100c6658c71e4016675e624da8c94543479745
https://github.com/llvm/llvm-project/commit/07100c6658c71e4016675e624da8c94543479745
Author: David Green <david.green at arm.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Log Message:
-----------
[AArch64] Clean up abd lowering. NFC
The neon ABD intrinsics are lowering to ISD::ABDS/ISD::ABDU nodes in SDAG. This
adds the same for GISel so that we can remove the AArch64sabd/AArch64uabd
PatFrags, reducing the number of patterns needed. Some very basic legalization
info is added for G_ABD nodes.
Commit: 756e515ce317a282fd5adf08b54600337346c6b0
https://github.com/llvm/llvm-project/commit/756e515ce317a282fd5adf08b54600337346c6b0
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCFlagRules.cmake
M libc/src/__support/macros/properties/cpu_features.h
Log Message:
-----------
[libc] Simplify fma handling for riscv (#149673)
This PR simplifies how we enable the different fma configs for riscv:
1. Removes __LIBC_RISCV_USE_FMA define
2. Checks if __riscv_flen is defined to set LIBC_TARGET_CPU_HAS_FMA
As a bonus, we enable *FMA_OPT tests for rv32, so any rv32 hardware that
doesn't implement the f/d extensions is also covered by the tests.
Commit: 6056f942abe83b05406df8b04e95ec37a3d160b5
https://github.com/llvm/llvm-project/commit/6056f942abe83b05406df8b04e95ec37a3d160b5
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/lib/Dialect/LLVMIR/IR/FunctionCallUtils.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/AddComdats.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/LegalizeForExport.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/OptimizeForNVVM.cpp
Log Message:
-----------
[mlir][NFC] update LLVM create APIs (2/n) (#149667)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 54492c231c5d9091d086bfb767423415ea6bd0bc
https://github.com/llvm/llvm-project/commit/54492c231c5d9091d086bfb767423415ea6bd0bc
Author: Manas <manas18244 at iiitd.ac.in>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/docs/ClangTools.rst
Log Message:
-----------
[clang][docs] Add all clang-tools-extra to 'ClangTools.rst' (#148622)
The 'Extra Clang Tools' section does not mention any other clang tool
except clang-tidy. This adds all missing extra tools to sync
documentation between this page and the main page of Extra Clang Tools.
Fixes #148538
Commit: 39c8cfb70d203439e3296dfdfe3d41f1cb2ec551
https://github.com/llvm/llvm-project/commit/39c8cfb70d203439e3296dfdfe3d41f1cb2ec551
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCCodeView.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
MC: Optimize getOrCreateDataFragment
... by eagerly allocating an empty fragment when adding a fragment
with a variable-size tail.
X86AsmBackend, The JCC erratum mitigation and x86-pad-for-align set a
flag for FT_Relaxable, which needs to be moved to emitInstructionBegin.
```
if (CF->getKind() == MCFragment::FT_Relaxable)
CF->setAllowAutoPadding(canPadInst(Inst, OS));
```
Follow-up to #148544
Commit: ff0cbecb68bd28f6131894fbb037e063e8da6bab
https://github.com/llvm/llvm-project/commit/ff0cbecb68bd28f6131894fbb037e063e8da6bab
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Log Message:
-----------
[RISCV] Add a non-template version of SelectAddrRegZextRegScale and move code there. NFC
The template versions now call the non-template version. This
avoids duplicating the code for each template.
Commit: d77ac81e93e5e2df5275b687b53049d9acfe1357
https://github.com/llvm/llvm-project/commit/d77ac81e93e5e2df5275b687b53049d9acfe1357
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Log Message:
-----------
X86AsmBackend: Remove some overhead from auto padding feature
MCObjectStreamer::emitInstructionImpl is hot.
Devirtualize allowEnhancedRelaxation introduced by
https://reviews.llvm.org/D76286
Commit: e7ac49977a3e8ee8f9716ffa43619ff41af7dfb2
https://github.com/llvm/llvm-project/commit/e7ac49977a3e8ee8f9716ffa43619ff41af7dfb2
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-07-19 (Sat, 19 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/Transforms/InstSimplify/exp10.ll
M llvm/test/Transforms/InstSimplify/fold-intrinsics.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[InstSimplify] Add poison propagation for trivially vectorizable intrinsics (#149243)
Fixes https://github.com/llvm/llvm-project/issues/146769
Test cases added to
`llvm/test/Transforms/InstSimplify/fold-intrinsics.ll`
Commit: 58c3affdaa732fd6f8c7e6640396e7c6366bac9d
https://github.com/llvm/llvm-project/commit/58c3affdaa732fd6f8c7e6640396e7c6366bac9d
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libclc/utils/CMakeLists.txt
Log Message:
-----------
[libclc] Expose `prepare_builtins_*` variables in top-level CMakeLists (#149657)
Fix `libclc/utils/CMakeLists.txt` to expose `prepare_builtins_*`
variables in parent scope. This was a regression introduced in #148815
where the code was moved into subdirectory, and the variables would no
longer be accessible to calls in top-level CMakeLists, resulting in
attempting to build targets with empty command:
```
[1566/1676] cd /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build && -o /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build/clspv--.bc /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build/obj.libclc.dir/clspv--/builtins.opt.clspv--.bc
FAILED: clspv--.bc /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build/clspv--.bc
cd /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build && -o /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build/clspv--.bc /var/tmp/portage/llvm-core/libclc-22.0.0.9999/work/libclc_build/obj.libclc.dir/clspv--/builtins.opt.clspv--.bc
/bin/sh: line 1: -o: command not found
```
Commit: 51af47e53c32d29c0e29cbdcd66d8bbd41b673f3
https://github.com/llvm/llvm-project/commit/51af47e53c32d29c0e29cbdcd66d8bbd41b673f3
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[clang][bytecode] Use in Expr::tryEvaluateStrLen() (#149677)
Fixes #138475
Commit: 9e587ce6f0da91ee71dd6920dff0930b291169bb
https://github.com/llvm/llvm-project/commit/9e587ce6f0da91ee71dd6920dff0930b291169bb
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/uscmp.ll
Log Message:
-----------
[SCCP] Simplify [us]cmp(X, Y) into X - Y (#144717)
If the difference between [us]cmp's operands is not greater than 1, we
can simplify it into `X - Y`.
Alive2: https://alive2.llvm.org/ce/z/JS55so
llvm-opt-benchmark diff:
https://github.com/dtcxzyw/llvm-opt-benchmark/pull/2464/files
Commit: 5ee34ff1e5cc952116f0da943ddaeb1a71db2940
https://github.com/llvm/llvm-project/commit/5ee34ff1e5cc952116f0da943ddaeb1a71db2940
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/test/MC/COFF/bss-text.s
M llvm/test/MC/COFF/section.s
M llvm/test/MC/ELF/nobits-non-zero-value.s
Log Message:
-----------
MC: Optimize emitInstruction and simplify fragment-in-BSS check
Move the FT_Relaxable-in-BSS check from frequently-called
MCObjectStreamer::emitInstruction to MCAssembler::writeSectionData,
along with existing checks for other fragment types. For the uncommon
diagnostics, losing the location information is acceptable.
Commit: 2ba5e0ad1789f33c71af15d7c09cc5ca874cf7b1
https://github.com/llvm/llvm-project/commit/2ba5e0ad1789f33c71af15d7c09cc5ca874cf7b1
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/test/MC/ELF/mc-dump.s
M llvm/test/MC/RISCV/Relocations/mc-dump.s
Log Message:
-----------
MC: Encode FT_Align in fragment's variable-size tail
Follow-up to #148544
Pull Request: https://github.com/llvm/llvm-project/pull/149030
Commit: fd6d6a7c8d4e2fb196bd3707dc4022a236089d9a
https://github.com/llvm/llvm-project/commit/fd6d6a7c8d4e2fb196bd3707dc4022a236089d9a
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/test/MC/RISCV/Relocations/mc-dump.s
Log Message:
-----------
MC: Refactor FT_Align fragments when linker relaxation is enabled
Previously, two MCAsmBackend hooks were used, with
shouldInsertFixupForCodeAlign calling getWriter().recordRelocation
directly, bypassing generic code.
This patch:
* Introduces MCAsmBackend::relaxAlign to replace the two hooks.
* Tracks padding size using VarContentEnd (content is ignored).
* Move setLinkerRelaxable from MCObjectStreamer::emitCodeAlignment to the backends.
Pull Request: https://github.com/llvm/llvm-project/pull/149465
Commit: d344c383e20a7e2cc05d947855e818d98b889ee9
https://github.com/llvm/llvm-project/commit/d344c383e20a7e2cc05d947855e818d98b889ee9
Author: Hui <hui.xie1990 at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__ranges/zip_view.h
M libcxx/include/module.modulemap.in
M libcxx/include/ranges
M libcxx/modules/std/ranges.inc
A libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/no_unique_address.compile.pass.cpp
M libcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/begin.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/cpo.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/ctad.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/ctor.views.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/end.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/general.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/arithmetic.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/compare.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/ctor.other.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/decrement.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/deref.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/member_types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/ctor.other.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/eq.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/types.h
M libcxx/test/std/ranges/range.adaptors/range.zip/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/cpo.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/ctor.views.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/arithmetic.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/compare.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/ctor.default.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/decrement.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/deref.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/increment.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/iter_move.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/iter_swap.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/member_types.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/singular.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/subscript.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/range.concept.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/eq.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/size.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.zip/types.h
A libcxx/test/std/ranges/range.adaptors/range_adaptor_types.h
M libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
Log Message:
-----------
[libc++][ranges] implement `std::ranges::zip_transform_view` (#79605)
Fixes #104977
Fixes #105035
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 0dfac65595f6641d1da93085a2413f5a34804cf3
https://github.com/llvm/llvm-project/commit/0dfac65595f6641d1da93085a2413f5a34804cf3
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port d344c383e20a
Commit: 6163b66e0aa7a3fa32b05fa4e1016d0631c20451
https://github.com/llvm/llvm-project/commit/6163b66e0aa7a3fa32b05fa4e1016d0631c20451
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/test/Interpreter/pretty-print.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Another try on system-z.
This patch should make msan happy as it found a real bug where we always try to
read an unsigned long long without respecting the underlying enum type.
Another follow-up on llvm/llvm-project#102858
Commit: 971bfbead2a1ed1c8b44f5b7a3003d91f46cff60
https://github.com/llvm/llvm-project/commit/971bfbead2a1ed1c8b44f5b7a3003d91f46cff60
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
Log Message:
-----------
[RISCV][NFC] Add NumTransformedToNonWInstrs statistic to RISCVOptWInstrs extend debug printing
RISCVOptWInstrs has a NumTransformedToWInstrs statistic, but didn't have
one for the W=>Non-W transform done by stripWSuffixes. It also didn't do
debug printing of the transformation. This patch addresses both issues.
Reviewed as part of <https://github.com/llvm/llvm-project/pull/149071>,
but landing separately.
Commit: c58225f7571bf52ca7b8e674c6a443e910302c18
https://github.com/llvm/llvm-project/commit/c58225f7571bf52ca7b8e674c6a443e910302c18
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/div-by-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shifts.ll
M llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/iabs.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts.ll
M llvm/test/CodeGen/RISCV/machine-combiner.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr145360.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/rv64i-demanded-bits.ll
M llvm/test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/typepromotion-overflow.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
Log Message:
-----------
[RISCV] Add RISCV::SUBW to RISCVOptWInstrs::stripWSuffixes (#149071)
This is purely a benefit for reducing unnecessary diffs between RV32 and
RV64, as RVC does have a compressed form of SUBW (so SUB isn't more
compressible). This affects ~57.2k instructions in an rva22u64 build of
llvm-test-suite with SPEC CPU 2017 included.
Commit: 5b0935f1f05c7aa9d315463c17ff85e7d846d237
https://github.com/llvm/llvm-project/commit/5b0935f1f05c7aa9d315463c17ff85e7d846d237
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[clang][bytecode] Reintroduce Pointer::elem() (#149693)
As a way of writing atIndex(I).deref<T>(), which creates an intermediate
Pointer, which in turn adds (and removes) that pointer from the pointer
list of the Block. This way we can avoid that.
Commit: 6c257754d955d55af048637b5048ee04d48a24b1
https://github.com/llvm/llvm-project/commit/6c257754d955d55af048637b5048ee04d48a24b1
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__functional/bind.h
M libcxx/include/__memory_resource/polymorphic_allocator.h
M libcxx/include/__mutex/once_flag.h
M libcxx/include/__thread/thread.h
M libcxx/include/__tuple/make_tuple_types.h
M libcxx/include/__tuple/tuple_element.h
R libcxx/include/__tuple/tuple_indices.h
M libcxx/include/__utility/integer_sequence.h
M libcxx/include/__utility/pair.h
M libcxx/include/bitset
M libcxx/include/future
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/scoped_allocator
M libcxx/include/tuple
M libcxx/include/variant
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.pass.cpp
Log Message:
-----------
[libc++] Refactor internal index_sequence API to match the public one (#149475)
The internal API is a lot more complicated than it actually needs to be.
This refactors the internal API to match the features and names of the
public one.
Commit: 89f09a887d259a84489fc81f1c262c8a091e6c8a
https://github.com/llvm/llvm-project/commit/89f09a887d259a84489fc81f1c262c8a091e6c8a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 6c257754d955
Commit: e138c951550779143551b9bd3f66183f6ad5b3df
https://github.com/llvm/llvm-project/commit/e138c951550779143551b9bd3f66183f6ad5b3df
Author: Maya Amrami <62667278+amrami at users.noreply.github.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/Interfaces/ViewLikeInterface.cpp
M mlir/test/Dialect/MemRef/invalid.mlir
Log Message:
-----------
[mlir] ViewLikeInterface - verify ranks in verifyOffsetSizeAndStrideOp (#147926)
getMixedOffsets() calls getMixedValues() with `static_offsets` and
`offsets`. It is assumed that the number of dynamic offsets in
`static_offsets` equals the rank of `offsets`. Otherwise, we fail on
assert when trying to access an array out of its bounds.
The same applies to getMixedStrides() and getMixedOffsets().
A verification of this assumption is added to
verifyOffsetSizeAndStrideOp() and a clear assert is added in
getMixedValues().
Commit: 17c7c2ebe850b705df0fee4f1160d72097c6cb8f
https://github.com/llvm/llvm-project/commit/17c7c2ebe850b705df0fee4f1160d72097c6cb8f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/pr62286.ll
Log Message:
-----------
[DAG] Add missing Depth argument to isGuaranteedNotToBeUndefOrPoison calls inside SimplifyDemanded methods (#149550)
Ensure we don't exceed the maximum recursion depth
Commit: bbbbc093febffcae262cde1baa429b950842d76e
https://github.com/llvm/llvm-project/commit/bbbbc093febffcae262cde1baa429b950842d76e
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
A cross-project-tests/dtlto/link-archive-thin.test
A cross-project-tests/dtlto/link-dtlto.c
M cross-project-tests/lit.cfg.py
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/LTO.cpp
M lld/COFF/Options.td
M lld/docs/DTLTO.rst
A lld/test/COFF/dtlto/files.test
A lld/test/COFF/dtlto/options.test
Log Message:
-----------
[DTLTO][LLD][COFF] Add support for Integrated Distributed ThinLTO (#148594)
This patch introduces support for Integrated Distributed ThinLTO (DTLTO)
in COFF LLD.
DTLTO enables the distribution of ThinLTO backend compilations via
external distribution systems, such as Incredibuild, during the
traditional link step: https://llvm.org/docs/DTLTO.html.
Note: Bitcode members of non-thin archives are not currently supported.
This will be addressed in a future change. This patch is sufficient to
allow for self-hosting an LLVM build with DTLTO if thin archives are
used.
Testing:
- LLD `lit` test coverage has been added, using a mock distributor to
avoid requiring Clang.
- Cross-project `lit` tests cover integration with Clang.
For the design discussion of the DTLTO feature, see:
https://github.com/llvm/llvm-project/pull/126654
Commit: 9f29007999f300ebe372f9fe7158c01fc57a0d27
https://github.com/llvm/llvm-project/commit/9f29007999f300ebe372f9fe7158c01fc57a0d27
Author: Tom Vijlbrief <tvijlbrief at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/test/CodeGen/AVR/branch-relaxation-long-backward.ll
M llvm/test/CodeGen/AVR/branch-relaxation-long-forward.ll
M llvm/test/CodeGen/AVR/jmp.ll
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-rjmp.s
Log Message:
-----------
[AVR] Force to emit relocation slots for relative branch instructions (#145291)
fixes https://github.com/llvm/llvm-project/issues/133579
Commit: eb3e56f19e0391d760c71655d1031b305a1d27f8
https://github.com/llvm/llvm-project/commit/eb3e56f19e0391d760c71655d1031b305a1d27f8
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libc/test/src/__support/FPUtil/CMakeLists.txt
Log Message:
-----------
[libc] Disable bfloat16 test for full build mode (#149678)
This patch temporarily disables bfloat16_test for full build mode, until
the MPCommon target is updated so that mpfr_inc.h is not included in the
MPCommon.h header.
This should fix the rv32 buildbot failures.
Commit: 04f2114ab293570604c7178aaf2e4585b61ae8aa
https://github.com/llvm/llvm-project/commit/04f2114ab293570604c7178aaf2e4585b61ae8aa
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
Log Message:
-----------
[memprof] Refactor readMemProf (NFC) (#149663)
This patch creates a helper function named handleAllocSite to handle
the allocation site. It makes readMemProf a little bit shorter.
I'm planning to move the code to handle call sites in a subsequent
patch. Doing so in this patch would make this patch a lot longer
because we need to move other things like CallSiteEntry and
CallSiteEntryHash.
Commit: b42f96bc057fd9e31572069b241ba130c21144e5
https://github.com/llvm/llvm-project/commit/b42f96bc057fd9e31572069b241ba130c21144e5
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Thunks.cpp
R lld/test/ELF/hexagon-jump-error.s
A lld/test/ELF/hexagon-thunk-range-b22rel.s
A lld/test/ELF/hexagon-thunk-range-gdplt.s
A lld/test/ELF/hexagon-thunk-range-plt.s
A lld/test/ELF/hexagon-thunks-packets.s
A lld/test/ELF/hexagon-thunks.s
Log Message:
-----------
[lld] Add thunks for hexagon (#111217)
Without thunks, programs will encounter link errors complaining that the
branch target is out of range. Thunks will extend the range of branch
targets, which is a critical need for large programs. Thunks provide
this flexibility at a cost of some modest code size increase.
When configured with the maximal feature set, the hexagon port of the
linux kernel would often encounter these limitations when linking with
`lld`.
The relocations which will be extended by thunks are:
* R_HEX_B22_PCREL, R_HEX_{G,L}D_PLT_B22_PCREL, R_HEX_PLT_B22_PCREL
relocations have a range of ± 8MiB on the baseline
* R_HEX_B15_PCREL: ±65,532 bytes
* R_HEX_B13_PCREL: ±16,380 bytes
* R_HEX_B9_PCREL: ±1,020 bytes
Fixes #149689
Co-authored-by: Alexey Karyakin <akaryaki at quicinc.com>
---------
Co-authored-by: Alexey Karyakin <akaryaki at quicinc.com>
Commit: 343f7475bed009e31ad1d5655f462d53e46ca9fa
https://github.com/llvm/llvm-project/commit/343f7475bed009e31ad1d5655f462d53e46ca9fa
Author: Jasmine Tang <jjasmine at igalia.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
A llvm/test/CodeGen/WebAssembly/memcmp-expand.ll
Log Message:
-----------
[WebAssembly] Add support for memcmp expansion (#148298)
Fixes https://github.com/llvm/llvm-project/issues/61400
Added test case in llvm/test/CodeGen/WebAssembly/memcmp-expand.ll
Commit: 6201761e961f4d7ed08352d55134e6ef58ee5eb2
https://github.com/llvm/llvm-project/commit/6201761e961f4d7ed08352d55134e6ef58ee5eb2
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
Log Message:
-----------
MC: Rename isVirtualSection to isBssSection
The term BSS (Block Started by Symbol) is a standard, widely recognized
term, available in the a.out object file format and adopted by formats
like COFF, XCOFF, Mach-O (called S_ZEROFILL while `__bss` is also used),
and ELF. To avoid introducing unfamiliar terms, we should use
isBSSSection instead of isVirtualSection.
Commit: ba6b705620053f8d1ffcb31e39209f1ef551ced0
https://github.com/llvm/llvm-project/commit/ba6b705620053f8d1ffcb31e39209f1ef551ced0
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/MC/MCXCOFFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
Log Message:
-----------
MC: Replace getOrCreateDataFragment with getCurrentFragment
Add an assert to ensure `CurFrag` is either null or an `FT_Data` fragment.
Follow-up to 39c8cfb70d203439e3296dfdfe3d41f1cb2ec551.
Extracted from #149721
Commit: 673e5422ea4089805afa2a2c548c85be7c228a42
https://github.com/llvm/llvm-project/commit/673e5422ea4089805afa2a2c548c85be7c228a42
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSectionCOFF.h
M llvm/include/llvm/MC/MCSectionELF.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCSectionCOFF.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/test/MC/COFF/bss-text.s
M llvm/test/MC/ELF/nobits-non-zero-value.s
Log Message:
-----------
MC: Fix fragment-in-BSS check
* Handle non-zero fill values for `.fill` and `.org` directives.
* Restore the fragment type check
(5ee34ff1e5cc952116f0da943ddaeb1a71db2940 removed a reachable
`llvm_unreachable`) to detect unintended API usage.
Remove virtual functions `getVirtualSectionKind` (added in
https://reviews.llvm.org/D78138) as they are unnecessary in diagnostics.
The a.out object file format has the BSS concept, which has been
inherited by COFF, XCOFF, Mach-O, and ELF object file formats.
Pull Request: https://github.com/llvm/llvm-project/pull/149721
Commit: 7a42fb85df596764ebc60aa6841fda9e9b1e1758
https://github.com/llvm/llvm-project/commit/7a42fb85df596764ebc60aa6841fda9e9b1e1758
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSectionELF.h
Log Message:
-----------
MCSectinELF: Delete setSectionName declaration
Commit: c045caae86a60cdcdd10ed693cfd5c507c743801
https://github.com/llvm/llvm-project/commit/c045caae86a60cdcdd10ed693cfd5c507c743801
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M lldb/docs/use/python-reference.rst
Log Message:
-----------
[lldb] Proofread python-reference.rst (#149643)
Commit: 04b4f62e2f91a66ad47276f6e344afd0be17a325
https://github.com/llvm/llvm-project/commit/04b4f62e2f91a66ad47276f6e344afd0be17a325
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libc/src/sys/epoll/linux/epoll_create.cpp
M libc/test/src/sys/epoll/linux/epoll_create_test.cpp
Log Message:
-----------
[libc] Fix epoll_create behavior when only epoll_create1 is available (#149713)
In PR #99785, I disabled a test for `epoll_create` that was intended to
fail on systems where only `epoll_create1` is available. This is because
`epoll_create1` cannot fail in the same way that `epoll_create` does.
Specifically, calling `epoll_create(0)` should result in an EINVAL
error. So, when only `epoll_create1` is available, we should simply
check if the argument is zero and return the error accordingly.
Commit: dd50e8e240d19e5050f4e52d8715d093a3fb810a
https://github.com/llvm/llvm-project/commit/dd50e8e240d19e5050f4e52d8715d093a3fb810a
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCCodeView.cpp
M llvm/lib/MC/MCSection.cpp
Log Message:
-----------
MCFragment: Remove setContents/setFixups
Make the fixed-size part of MCFragment append-only to support allocating
content as trailing data. Update CodeView callers to use setVarContents
instead of setContents. Remove unused setFixups.
Commit: 3e9ceae29f39456508eef5b4af4d3c895048706a
https://github.com/llvm/llvm-project/commit/3e9ceae29f39456508eef5b4af4d3c895048706a
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M lld/ELF/Relocations.cpp
A lld/test/ELF/hexagon-tls-allocateaux-multiple.s
Log Message:
-----------
[lld] [hexagon] guard allocateAux: only if idx nonzero (#149690)
While building libclang_rt.asan-hexagon.so, lld would assert in
lld::elf::hexagonTLSSymbolUpdate().
Fixes #132766
Commit: ef4e4a0084753ed76c61f9f0d1b510fd12715c78
https://github.com/llvm/llvm-project/commit/ef4e4a0084753ed76c61f9f0d1b510fd12715c78
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acosf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acosf.h
A libc/src/__support/math/inv_trigf_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
R libc/src/math/generic/inv_trigf_utils.cpp
R libc/src/math/generic/inv_trigf_utils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acosf implementation to header-only in src/__support/math folder. (#148411)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: ca006eeeedddd4e38c8f93e69a3dcb1fc554d453
https://github.com/llvm/llvm-project/commit/ca006eeeedddd4e38c8f93e69a3dcb1fc554d453
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
Log Message:
-----------
MCFragment: Remove clearContents and uses of non-streaming doneAppending
Make the fixed-size part of MCFragment append-only to support allocating
content as trailing data. The `doneAppending` API is reserved by
MCStreamer API before finish and should not be used by the addrsig and
call-graph-profile features.
Commit: e3af202fd212a66700170717856a8fa9aa7ed426
https://github.com/llvm/llvm-project/commit/e3af202fd212a66700170717856a8fa9aa7ed426
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
Log Message:
-----------
[VPlan] Remove unused IsReplicator arg from createVPRegionBlock (NFC).
The argument is always true, remove it.
Commit: b21f14e084125dd6df958544c8bbcd170619a20e
https://github.com/llvm/llvm-project/commit/b21f14e084125dd6df958544c8bbcd170619a20e
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
Log Message:
-----------
MCAssembler: Fix ubsan "addition of unsigned offset to" for linker relaxation targets after #149465
Similar to 13549fd90af45d2200159cac14a12cf01db56aa1
Commit: bdbc0987ca2f2b60de30481b64a33e3e5c6192df
https://github.com/llvm/llvm-project/commit/bdbc0987ca2f2b60de30481b64a33e3e5c6192df
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
Log Message:
-----------
MCObjectStreamer: Remove changeSectionImpl
Commit: 0bb1e048453ed23d988354b86794144e631da03b
https://github.com/llvm/llvm-project/commit/0bb1e048453ed23d988354b86794144e631da03b
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/src/math/docs/add_math_function.md
Log Message:
-----------
[libc] Revise document on building exhaustive math functions. (#149635)
I suspect the reason is that we use `add_fp_unittest` in exhaustive
testing, so the suffix `__unit__` is necessary.
Commit: 04b17bd47086b54e6b618d48aca3a6b54773fabf
https://github.com/llvm/llvm-project/commit/04b17bd47086b54e6b618d48aca3a6b54773fabf
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SCF/IR/SCF.cpp
Log Message:
-----------
[mlir][scf] fix getSuccessorRegions func in scf.forall (#147491)
In accordance with the semantics of forall, its body is executed in
parallel by multiple threads. We should not expect to branch back into
the forall body after the region's execution is complete.
Commit: 4e35ae10c4d7bc840ad6b6a9b13e465bfaaf3768
https://github.com/llvm/llvm-project/commit/4e35ae10c4d7bc840ad6b6a9b13e465bfaaf3768
Author: Ami-zhang <zhanglimin at loongson.cn>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/test/ExecutionEngine/RuntimeDyld/LoongArch/ELF_LoongArch_relocations.s
Log Message:
-----------
[RuntimeDyld][LoongArch] Support large code model (#148584)
Co-authored-by: Weining Lu <luweining at loongson.cn>
Commit: 38fc453afdb6a4511b7c8e189f12a92559ecc396
https://github.com/llvm/llvm-project/commit/38fc453afdb6a4511b7c8e189f12a92559ecc396
Author: Koakuma <koachan at protonmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[SPARC][Driver] Move feature mode selection to Arch/Sparc.cpp (#149652)
This is so that it's performed also for flang and not just for clang.
This should fix https://github.com/llvm/llvm-project/issues/138494.
Commit: 22ef58ceda9490184f084fe1f938d333ba5d6cfd
https://github.com/llvm/llvm-project/commit/22ef58ceda9490184f084fe1f938d333ba5d6cfd
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
Log Message:
-----------
[mlir][linalg] Add missing check for `isaCopyOpInterface` (#149313)
This PR fixes a missing validation in `isaCopyOpInterface` by checking
that the `linalg.yield` operand is identical to the first block
argument, indicating a direct copy. Fixes #130002.
Commit: 06ed4d2c92ef7785f6c39e567b8bdefd2defdedb
https://github.com/llvm/llvm-project/commit/06ed4d2c92ef7785f6c39e567b8bdefd2defdedb
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in `BreakBeforeBinaryOperators: All` (#149695)
Fixes #149520
Commit: 268c44f9ea334e7fc32ca473f8af0a41bab04f75
https://github.com/llvm/llvm-project/commit/268c44f9ea334e7fc32ca473f8af0a41bab04f75
Author: Shan Huang <shan.huang at stu.ecnu.edu.cn>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/NewGVN.cpp
A llvm/test/Transforms/NewGVN/salvage-eliminate-instruction.ll
Log Message:
-----------
[DebugInfo][NewGVN] Fix debug value loss (#147634)
Fix #147511
Commit: 853c343b45b3e83cc5eeef5a52fc8cc9d8a09252
https://github.com/llvm/llvm-project/commit/853c343b45b3e83cc5eeef5a52fc8cc9d8a09252
Author: Shan Huang <shan.huang at stu.ecnu.edu.cn>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/NewGVN.cpp
A llvm/test/Transforms/NewGVN/salvage-trivially-dead-inst.ll
Log Message:
-----------
[DebugInfo][NewGVN] Salvage debug values of trivially dead instructions (#149304)
fix #149301
Commit: f3a3270dbca3649b7d56aaa42cb8481fb34e2d67
https://github.com/llvm/llvm-project/commit/f3a3270dbca3649b7d56aaa42cb8481fb34e2d67
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestSelective.cpp
Log Message:
-----------
[clang-format][NFC] Delete redundant type names after FormatStyle::
Commit: 507ff29c9bdb43e78cf0e5aac82972ed3b2907b7
https://github.com/llvm/llvm-project/commit/507ff29c9bdb43e78cf0e5aac82972ed3b2907b7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
Log Message:
-----------
[memprof] Introduce handleCallSite (NFC) (#149724)
Continuing the effort to refactor readMemProf, this patch introduces
handlCallSite to handle, well, call sites.
Moving the code requires taking CallSiteEntry and CallSiteEntryHash
out of readMemProf.
We could simplify some code, but I'm keeping this patch very simple to
facilitate the review process. For example, we could simplify the
control flow near the end of readMemProf, but we can address that
later.
Commit: 1b8defddf4688bac09435b7a93515f61673591b2
https://github.com/llvm/llvm-project/commit/1b8defddf4688bac09435b7a93515f61673591b2
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
Log Message:
-----------
[clang] Proofread LanguageExtensions.rst (#149729)
Commit: 8ae4dee4d0b216cb6e233c8587730c8410430eb9
https://github.com/llvm/llvm-project/commit/8ae4dee4d0b216cb6e233c8587730c8410430eb9
Author: Pecco <pecco at qq.com>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/wmma-ptx78-sm90.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm100a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm101a.py
M llvm/test/CodeGen/NVPTX/wmma-ptx86-sm120a.py
M llvm/test/CodeGen/NVPTX/wmma.py
Log Message:
-----------
[NVPTX] Lower stmatrix intrinsics to PTX (#148561)
Lower stmatrix intrinsics defined in #148377 to PTX. See [PTX
Doc](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-store-instruction-stmatrix).
---------
Co-authored-by: peterbell10 <peterbell10 at openai.com>
Commit: 6ebc42322ca7bd0261c1faa6e2d785057ab95c5f
https://github.com/llvm/llvm-project/commit/6ebc42322ca7bd0261c1faa6e2d785057ab95c5f
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
Log Message:
-----------
MCStreamer: Move fragment-related functions to MCObjectStreamer
They are specific to MCObjectStreamer and unneeded by MCAsmStreamer.
Add isObj() so that MCTargetAsmParser can determine whether the streamer
is MCObjectStreamer and conditionally call newFragment.
Commit: 63b9cbd6e4a581b49cb40e4603c7130699bf55a1
https://github.com/llvm/llvm-project/commit/63b9cbd6e4a581b49cb40e4603c7130699bf55a1
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-20 (Sun, 20 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
Log Message:
-----------
MCStreamer: Add helpers and eliminate direct MCFragment operations
To facilitate optimizing the MCFragment internals, we don't want users
to access MCFragment directly.
Commit: 60d2d94db253a9fdc7bd111120c803f808564b30
https://github.com/llvm/llvm-project/commit/60d2d94db253a9fdc7bd111120c803f808564b30
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/Transforms/GVN/assume.ll
M llvm/test/Transforms/GVN/basic.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pr14166.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
[GVN] memoryssa implies no-memdep (#149473)
Enabling one of MemorySSA or MD implies the other is off.
Commit: f79d6b319daeeea4776236f4abb7d210fd36df31
https://github.com/llvm/llvm-project/commit/f79d6b319daeeea4776236f4abb7d210fd36df31
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/Transforms/GVN/assume.ll
M llvm/test/Transforms/GVN/basic.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pr14166.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
Revert "[GVN] memoryssa implies no-memdep (#149473)" (#149766)
This reverts commit 60d2d94db253a9fdc7bd111120c803f808564b30.
Commit: 6193dd55535460c347f8c0b794df7d7d52fa78c9
https://github.com/llvm/llvm-project/commit/6193dd55535460c347f8c0b794df7d7d52fa78c9
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/PseudoProbePrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/PseudoProbePrinter.h
A llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll
Log Message:
-----------
[PseudoProbe] Warn on illegal guid (#148564)
Check whether guid exists in pseudo probe desc when emitting pseudo
probe.
Commit: c9cbd4e9d4025b3b5c9593f3c187e0d5e3471a89
https://github.com/llvm/llvm-project/commit/c9cbd4e9d4025b3b5c9593f3c187e0d5e3471a89
Author: Aleksandr Urakov <xande8088 at yandex.ru>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lld/test/MachO/objc.s
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[lld] Fix -ObjC load behavior with LTO for section names with whitespace (#146654)
This is a fix additional to #92162
In some cases, section names contain a whitespace between the segment
name and the actual section name (e.g. `__TEXT, __swift5_proto`). It is
confirmed by source code of the Swift compiler
This fix allows LTO to work correctly with the `-ObjC` flag in that rare
case when only a section with a whitespace in the name is present in the
linked bitcode module, but there are no sections containing
`__TEXT,__swift`
---------
Co-authored-by: Ураков Александр Сергеевич <a.urakov at tbank.ru>
Co-authored-by: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Commit: 3813567e08e202280546dd9fd5ae891d067cbda9
https://github.com/llvm/llvm-project/commit/3813567e08e202280546dd9fd5ae891d067cbda9
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[VPlan] Clarify transform name to handlMaxNumNumReductions. (NFC)
Clarify name as suggested in https://github.com/llvm/llvm-project/pull/149736,
as only FMaxNum and FMinNum are handled.
Commit: 84e689b1db02be1687c3093d66ace913250780bd
https://github.com/llvm/llvm-project/commit/84e689b1db02be1687c3093d66ace913250780bd
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqciac.ll
Log Message:
-----------
[RISCV] Swap source register operands in QC_SHLADD ISEL patterns (#149697)
The instruction does `rd = (rs1 << shamt) + rs2` but the ISEL patterns
had `rs1` and `rs2` the other way around which is incorrect.
Commit: aa7ada1dfbe21a0c83474eb3de54e08eb607f8b8
https://github.com/llvm/llvm-project/commit/aa7ada1dfbe21a0c83474eb3de54e08eb607f8b8
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/SFrame.h
A llvm/include/llvm/BinaryFormat/SFrameConstants.def
A llvm/include/llvm/Object/SFrameParser.h
M llvm/lib/BinaryFormat/CMakeLists.txt
A llvm/lib/BinaryFormat/SFrame.cpp
M llvm/lib/Object/CMakeLists.txt
A llvm/lib/Object/SFrameParser.cpp
A llvm/test/tools/llvm-readobj/ELF/sframe-header.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.h
M llvm/tools/llvm-readobj/Opts.td
M llvm/tools/llvm-readobj/llvm-readobj.cpp
Log Message:
-----------
[Object] Beginnings of SFrame parser and dumper (#147294)
This PR adds the SFrameParser class and uses it from llvm-readobj to
dump the section contents. Currently, it only supports parsing the
SFrame section header. Other parts of the section will be added in
follow-up patches.
llvm-readobj uses the same sframe flag syntax as GNU readelf, but I have
not attempted match the output format of the tool. I'm starting with the
"llvm" output format because it's easier to generate and lets us
tweak the format to make it useful for testing the generation code. If
needed, support for the GNU format could be added by overriding this
functionality in the GNU ELF Dumper.
For more information, see the [sframe
specification](https://sourceware.org/binutils/wiki/sframe) and the
related
[RFC](https://discourse.llvm.org/t/rfc-adding-sframe-support-to-llvm/86900).
Commit: b832c49cb4d7668e6ab49c984ba3f4c56356f023
https://github.com/llvm/llvm-project/commit/b832c49cb4d7668e6ab49c984ba3f4c56356f023
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV] Fix VLOptimizer assert, relax ElementsDependOn on viota/vms{b,i,o}f.m (#149698)
The previous assert wasn't passing the TSFlags but the opcode, so wasn't
working.
Fixing it reveals that it was actually triggering, because we're too
strict with viota and vmsxf.m We already reduce the VL on these
instructions because the result in each element doesn't depend on VL.
However, it does change if masked, so account for that.
Commit: 03bd0f36ba1c35c9dfbdc3d021e73940a18a6cf9
https://github.com/llvm/llvm-project/commit/03bd0f36ba1c35c9dfbdc3d021e73940a18a6cf9
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Vector/invalid.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
M mlir/test/Dialect/Vector/vector-transpose-lowering.mlir
A mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/flat-transpose-row.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-col.mlir
M mlir/test/Integration/Dialect/Vector/CPU/matrix-multiply-row.mlir
Log Message:
-----------
[mlir][vector] Remove MatrixMultiplyOp and FlatTransposeOp from Vector dialect (#144307)
This patch deletes `vector.matrix_multiply` and `vector.flat_transpose`,
which are thin wrappers around the corresponding LLVM intrinsics:
- `llvm.intr.matrix.multiply`
- `llvm.intr.matrix.transpose`
These Vector dialect ops did not provide additional semantics or
abstraction beyond the LLVM intrinsics. Their removal simplifies the
lowering pipeline without losing any functionality.
The lowering chains:
- `vector.contract` → `vector.matrix_multiply` →
`llvm.intr.matrix.multiply`
- `vector.transpose` → `vector.flat_transpose` →
`llvm.intr.matrix.transpose`
are now replaced with:
- `vector.contract` → `llvm.intr.matrix.multiply`
- `vector.transpose` → `llvm.intr.matrix.transpose`
This was accomplished by directly replacing:
- `vector::MatrixMultiplyOp` with `LLVM::MatrixMultiplyOp`
- `vector::FlatTransposeOp` with `LLVM::MatrixTransposeOp`
Note: To avoid a build-time dependency from `Vector` to `LLVM`,
relevant transformations are moved from "Vector/Transforms" to
`Conversion/VectorToLLVM`.
Commit: 7355ea3f6b214d1569da43d02f9a166ff15012e6
https://github.com/llvm/llvm-project/commit/7355ea3f6b214d1569da43d02f9a166ff15012e6
Author: Marco Maia <marcogmaia at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clangd] Add tweak to override pure virtuals (#139348)
closes https://github.com/clangd/clangd/issues/1037
closes https://github.com/clangd/clangd/issues/2240
Example:
```c++
class Base {
public:
virtual void publicMethod() = 0;
protected:
virtual auto privateMethod() const -> int = 0;
};
// Before:
// // cursor here
class Derived : public Base{}^ ;
// After:
class Derived : public Base {
public:
void publicMethod() override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `publicMethod` is not implemented.");
}
protected:
auto privateMethod() const -> int override {
// TODO: Implement this pure virtual method.
static_assert(false, "Method `privateMethod` is not implemented.");
}
};
```
https://github.com/user-attachments/assets/79de40d9-1004-4c2e-8f5c-be1fb074c6de
---------
Co-authored-by: Marco Maia <marco.maia at iarasystems.com.br>
Commit: 00d3b39f1706154df9c2cf48dadb414d476075a3
https://github.com/llvm/llvm-project/commit/00d3b39f1706154df9c2cf48dadb414d476075a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/X86/store-merge-be.ll
A llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Implement store merge optimization (#147540)
Merge multiple small stores that were originally extracted from one
value into a single store.
This is the store equivalent of the load merge optimization that
AggressiveInstCombine already performs.
This implementation is something of an MVP, with various generalizations
possible.
Fixes https://github.com/llvm/llvm-project/issues/147456.
Commit: 61500345787e6fc66e6b6b8a249feaf98c839fbe
https://github.com/llvm/llvm-project/commit/61500345787e6fc66e6b6b8a249feaf98c839fbe
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgather.c
Log Message:
-----------
[RISCV] Add missing vcompress and vrgather intrinsic tests for zvfbfmin (#148129)
The permutation intrinsics for zvfbfmin are documented by
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/408.
Commit: 2320cddfc2e24a1ea1b838dd23ff6a7284ddae3b
https://github.com/llvm/llvm-project/commit/2320cddfc2e24a1ea1b838dd23ff6a7284ddae3b
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Transforms/GVN/assume.ll
M llvm/test/Transforms/GVN/basic.ll
M llvm/test/Transforms/GVN/nonescaping.ll
M llvm/test/Transforms/GVN/phi.ll
M llvm/test/Transforms/GVN/pr14166.ll
M llvm/test/Transforms/GVN/pre-compare.ll
M llvm/test/Transforms/GVN/readattrs.ll
M llvm/test/Transforms/GVN/setjmp.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVN/vscale.ll
Log Message:
-----------
Reapply "[GVN] memoryssa implies no-memdep (#149473)" (#149767)
Enabling one of MemorySSA or MD implies the other is off.
Already approved in https://github.com/llvm/llvm-project/pull/149473 but
I had to revert as I missed updating one test.
Commit: 8a307ae61963a3f967052f7ea3c89aafa56934cf
https://github.com/llvm/llvm-project/commit/8a307ae61963a3f967052f7ea3c89aafa56934cf
Author: hev <wangrui at loongson.cn>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
Log Message:
-----------
[LoongArch] Fix failure to widen operand for `[X]VMSK{LT,GE,NE}Z` (#149442)
Reported-by: tangyan <tangyan01 at loongson.cn>
Commit: e87d3904f693b9e13c54b87d0f2b749e1d818809
https://github.com/llvm/llvm-project/commit/e87d3904f693b9e13c54b87d0f2b749e1d818809
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/unittests/OffloadAPI/event/olWaitEvent.cpp
Log Message:
-----------
[Offload] Verify SyncCycle for events in AMDGPU (#149524)
This check ensures that events after a synchronise (and thus after the
queue is reset) are always considered complete. A test has been added
as well.
Commit: 20d8398825a799008ae508d8463dbb9b11df81e7
https://github.com/llvm/llvm-project/commit/20d8398825a799008ae508d8463dbb9b11df81e7
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
A llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
A llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
A llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
A llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/Verifier/amdgpu-cc.ll
Log Message:
-----------
[AMDGPU] ISel & PEI for whole wave functions (#145858)
Whole wave functions are functions that will run with a full EXEC mask.
They will not be invoked directly, but instead will be launched by way
of a new intrinsic, `llvm.amdgcn.call.whole.wave` (to be added in
a future patch). These functions are meant as an alternative to the
`llvm.amdgcn.init.whole.wave` or `llvm.amdgcn.strict.wwm` intrinsics.
Whole wave functions will set EXEC to -1 in the prologue and restore the
original value of EXEC in the epilogue. They must have a special first
argument, `i1 %active`, that is going to be mapped to EXEC. They may
have either the default calling convention or amdgpu_gfx. The inactive
lanes need to be preserved for all registers used, active lanes only for
the CSRs.
At the IR level, arguments to a whole wave function (other than
`%active`) contain poison in their inactive lanes. Likewise, the return
value for the inactive lanes is poison.
This patch contains the following work:
* 2 new pseudos, SI_SETUP_WHOLE_WAVE_FUNC and SI_WHOLE_WAVE_FUNC_RETURN
used for managing the EXEC mask. SI_SETUP_WHOLE_WAVE_FUNC will return
a SReg_1 representing `%active`, which needs to be passed into
SI_WHOLE_WAVE_FUNC_RETURN.
* SelectionDAG support for generating these 2 new pseudos and the
special handling of %active. Since the return may be in a different
basic block, it's difficult to add the virtual reg for %active to
SI_WHOLE_WAVE_FUNC_RETURN, so we initially generate an IMPLICIT_DEF
which is later replaced via a custom inserter.
* Expansion of the 2 pseudos during prolog/epilog insertion. PEI also
marks any used VGPRs as WWM registers, which are then spilled and
restored with the usual logic.
Future patches will include the `llvm.amdgcn.call.whole.wave` intrinsic
and a lot of optimization work (especially in order to reduce spills
around function calls).
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: 41274582fdff16bbce3db80e56cad5fe4133b16b
https://github.com/llvm/llvm-project/commit/41274582fdff16bbce3db80e56cad5fe4133b16b
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
[mlir][tosa] Fix check for isolated regions in `tosa.cond_if` (#143772)
This commit fixes a check in the validation pass which intended to
validate whether a `tosa.cond_if` operation was conformant to the
specification. The specification requires all values used in the
then/else regions are explicitly declared within the regions. This
change checks that these regions are 'isolated from above', to ensure
this requirement is true.
Commit: a216702406f77e73fae9fe192f5e441a967e206f
https://github.com/llvm/llvm-project/commit/a216702406f77e73fae9fe192f5e441a967e206f
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] Merge one-use GEP offsets during expansion (#147263)
When expanding a GEP chain, if there is a chain of one-use GEPs followed
by a multi-use GEP, rewrite the multi-use GEP to include the one-use
GEPs offsets.
This means the offsets from the one-use GEPs can be reused by the offset
expansion without additional cost (from computing them again with a
different reassociation).
Commit: 34526eddb325b46e767d14923c2d0bf7466d09d8
https://github.com/llvm/llvm-project/commit/34526eddb325b46e767d14923c2d0bf7466d09d8
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Affine/LoopUtils.h
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/test/Dialect/Affine/loop-tiling-validity.mlir
M mlir/test/lib/Dialect/Affine/TestAffineLoopParametricTiling.cpp
Log Message:
-----------
[MLIR][Affine] Clean up outer logic of affine loop tiling pass (#149750)
Clean up outer logic of affine loop tiling pass. A wrongly named
temporary method was exposed publicly; fix that. Remove unconditional
emission of remarks.
Commit: 040bffc633fa56b95f5fa535442fedcbae2f9b94
https://github.com/llvm/llvm-project/commit/040bffc633fa56b95f5fa535442fedcbae2f9b94
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
Log Message:
-----------
[DebugInfo][AMDGPU] Convert a debug-intrinsic method to debug records (#149505)
It appears this wasn't handled in the initial migration a year ago,
seemingly because it didn't lead to any test failures. Find and interpret
debug records in the same way the original code handled intrinsics. Note
that we drop a call to copyMetadata: debug records can't carry additional
metadata like instructions, nothing relies on this in AMDGPU AFAIUI.
Commit: f0a7462cf03dd69dc9d5affb870facc098d9e73d
https://github.com/llvm/llvm-project/commit/f0a7462cf03dd69dc9d5affb870facc098d9e73d
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::optional (#149545)
Adds synthetic children for `std::optional` from MSVC's STL. Most of the
machinery for `std::optional` is already there.
Towards #24834.
Commit: 5a9c201bc9a03064e22aff37fc60ee210990fe96
https://github.com/llvm/llvm-project/commit/5a9c201bc9a03064e22aff37fc60ee210990fe96
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
M llvm/test/CodeGen/X86/peephole-copy.mir
Log Message:
-----------
[CodeGen] Fix INLINEASM regclass numbers to match names in tests (#142359)
INLINEASM operands like "2097162 /* regdef:SReg_32 */" tend to get
broken over time as the register class definitions get updated, so the
numbers change. Fix the numbers to match the names in the comments.
Commit: 3b8adcfd92a5034dca54e99cd16ce27da4c8e5bf
https://github.com/llvm/llvm-project/commit/3b8adcfd92a5034dca54e99cd16ce27da4c8e5bf
Author: David Green <david.green at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
M llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/combine-sdiv.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-sbfx.mir
M llvm/test/CodeGen/RISCV/GlobalISel/div-by-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
Log Message:
-----------
[GlobalISel] Add computeNumSignBits for ASHR (#139503)
Commit: 9311f3814bf139aee08014dbeeaa4c59ac2ae6f8
https://github.com/llvm/llvm-project/commit/9311f3814bf139aee08014dbeeaa4c59ac2ae6f8
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
Log Message:
-----------
[RISCV][NFC] Combine RISCVOptWInstrs::stripWSuffixes and appendWSuffixes into canonicalizeWSuffixes (#149710)
This refactor was suggested in
<https://github.com/llvm/llvm-project/pull/144703>.
I have checked for unexpected changes by comparing builds of
llvm-test-suite with/without this refactor, including with preferWInst
force enabled.
Commit: e94bc16b8e12a64ff28aedc58ee6e95e1f9d6f4b
https://github.com/llvm/llvm-project/commit/e94bc16b8e12a64ff28aedc58ee6e95e1f9d6f4b
Author: gulfemsavrun <gulfem at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/CommandGuide/llvm-objdump.rst
M llvm/docs/ReleaseNotes.md
M llvm/test/tools/llvm-objdump/ELF/ARM/debug-vars-dwarf4.s
A llvm/test/tools/llvm-objdump/X86/Inputs/debug-inlined-functions.cc
A llvm/test/tools/llvm-objdump/X86/debug-inlined-functions.s
M llvm/tools/llvm-objdump/ObjdumpOpts.td
M llvm/tools/llvm-objdump/SourcePrinter.cpp
M llvm/tools/llvm-objdump/SourcePrinter.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
Log Message:
-----------
[llvm-objdump] Add inlined function display support (#142246)
This patch adds the support for displaying inlined functions into
llvm-objdump.
1) It extends the source variable display
support for inlined functions both for ascii and unicode formats.
2) It also introduces a new format called limits-only that only prints a
line for the start and end of an inlined function without line-drawing
characters.
Commit: 5c7c8558c856712a5ef11ff5f4e7ea7d3567f625
https://github.com/llvm/llvm-project/commit/5c7c8558c856712a5ef11ff5f4e7ea7d3567f625
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/DebugInfo/KeyInstructions/goto.c
Log Message:
-----------
[KeyInstr] goto stmt atoms (#149101)
Commit: fd8ae2cb76bd0a721eea12767c1a630d465b8495
https://github.com/llvm/llvm-project/commit/fd8ae2cb76bd0a721eea12767c1a630d465b8495
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstSimplify/const-fold-nvvm-unary-arithmetic.ll
Log Message:
-----------
Add constant-folding for unary NVVM intrinsics (#141233)
Add support for constant-folding numerous NVVM unary arithmetic
intrinsics (including f, d, and ftz_f variants):
- nvvm.ceil.*
- nvvm.fabs.*
- nvvm.floor.*
- nvvm.rcp.*
- nvvm.round.*
- nvvm.saturate.*
- nvvm.sqrt.f
- nvvm.sqrt.rn.*
Commit: a11c5dd34b2cfa975934250b13628cac919fb7cb
https://github.com/llvm/llvm-project/commit/a11c5dd34b2cfa975934250b13628cac919fb7cb
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
Log Message:
-----------
[LAA] Add test variant with backward dep with overlap in loop.
The original test @backward_dep_known_distance_less_than_btc was
incorrectly named, as all loads are completely before the first store.
Add a variant where this is not the case: @backward_dep_known_distance_less_than_btc
Commit: fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122
https://github.com/llvm/llvm-project/commit/fc69f25a8f8c1bea9c7dbe1ce7597b3c0cafb122
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/prefer-w-inst.mir
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
Log Message:
-----------
[RISCV] Convert LWU to LW if possible in RISCVOptWInstrs (#144703)
After the refactoring in #149710 the logic change is trivial.
Motivation for preferring sign-extended 32-bit loads (LW) vs
zero-extended (LWU):
* LW is compressible while LWU is not.
* Helps to minimise the diff vs RV32 (e.g. LWU vs LW)
* Helps to minimise distracting diffs vs GCC. I see this come up
frequently when comparing GCC code and in these cases it's a red
herring.
Similar normalisation could be done for LHU and LH, but this is less
well motivated as there is a compressed LHU (and if performing the
change in RISCVOptWInstrs it wouldn't be done for RV32). There is a
compressed LBU but not LB, meaning doing a similar normalisation for
byte-sized loads would actually be a regression in terms of code size.
Load narrowing when allowed by hasAllNBitUsers isn't explored in this
patch.
This changes ~20500 instructions in an RVA22 build of the
llvm-test-suite including SPEC 2017. As part of the review, the option
of doing the change at ISel time was explored but was found to be less
effective.
Commit: 255a163e5183082016402ac51db83e10c1f5a731
https://github.com/llvm/llvm-project/commit/255a163e5183082016402ac51db83e10c1f5a731
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/ClangScanDeps/modules-full-named-modules.cppm
M clang/test/Driver/module-fgen-reduced-bmi.cppm
M clang/test/Driver/module-output.cppm
M clang/test/Driver/modules.cpp
M clang/test/Modules/mingw-exceptions.cppm
Log Message:
-----------
[C++20] [Modules] Enable reduced BMI by default
As documented in 20.x, we'd like to keep reduced BMI off by default for
1~2 versions. And now we're in 22.x.
I rarely receive bug reports for reduced BMI. I am not sure about the
reason. Maybe not a lot of people are using it. Or it is really stable
enough.
And also, we've been enabling the reduced BMI internally for roughly half a
year.
So I think it's the time to move on. See the document changes for other
information.
Commit: 43a829a7e894773643e893546f04dce1d9718cc1
https://github.com/llvm/llvm-project/commit/43a829a7e894773643e893546f04dce1d9718cc1
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll
Log Message:
-----------
[X86] Add assertion required for pseudo probe desc check test (#149800)
Fix failed test introduced in #148564.
Commit: 401b5ccf6b507ed36e959e7ae2f4b5e052647196
https://github.com/llvm/llvm-project/commit/401b5ccf6b507ed36e959e7ae2f4b5e052647196
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.h
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlVariant.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/TestDataFormatterStdVariant.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::variant (#148554)
Adds a summary and synthetic children for MSVC STL's `std::variant`.
This one is a bit complicated because of DWARF vs PDB differences. I put
the representations in comments. Being able to `GetChildMemberWithName`
a member in an anonymous union would make this a lot simpler
(`std::optional` will have something similar iirc).
Towards #24834.
Commit: 6edc1faf3b9238a231f1aca10d447be8ab826816
https://github.com/llvm/llvm-project/commit/6edc1faf3b9238a231f1aca10d447be8ab826816
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[mlir][llvm dialect] Verify element type of nested types (#148975)
Before this PR, this was valid
```
%0 = llvm.mlir.constant(dense<[1, 2]> : vector<2xi32>) : vector<2xf32>
```
but this was not:
```
%0 = llvm.mlir.constant(1 : i32) : f32
```
because only scalar types were checked for compatibility, not the element types of nested types. Another additional check that this PR adds is to verify the float semantics. Before this PR,
```
%cst = llvm.mlir.constant(1.0 : bf16) : f16
```
was considered valid (because bf16 and f16 both have 16 bits), but with this PR it is not considered valid. This PR also moves all tests on the verifier of the llvm constant op into a single file. To summarize the state after this PR.
Invalid:
```mlir
%0 = llvm.mlir.constant(dense<[128, 1024]> : vector<2xi32>) :
vector<2xf32>
%0 = llvm.mlir.constant(dense<[128., 1024.]> : vector<2xbf16>) :
vector<2xf16>
```
Valid:
```mlir
%0 = llvm.mlir.constant(dense<[128., 1024.]> : vector<2xf32>) :
vector<2xi32>
%0 = llvm.mlir.constant(dense<[128, 1024]> : vector<2xi64>) :
vector<2xi8>
```
and identical valid/invalid cases for the scalar cases.
Commit: 77f0a7de3e648e8507572b71990dc3373cd460f2
https://github.com/llvm/llvm-project/commit/77f0a7de3e648e8507572b71990dc3373cd460f2
Author: Lazarev Alexei <b.geeek at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libcxx/include/regex
M libcxx/test/std/re/re.regex/re.regex.construct/bad_range.pass.cpp
Log Message:
-----------
[libc++][regex] Throw exception in the case of wrong range (#148231)
Starting and ending parameters are considered to decide that a range is
a correct one
Fix #51028
Co-authored-by: alexey.lazarev <alexey.lazarev at tasking.com>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 1d02de28dd62c7fb007ae282a9c7f9412ff7e41d
https://github.com/llvm/llvm-project/commit/1d02de28dd62c7fb007ae282a9c7f9412ff7e41d
Author: Marcos Maronas <marcos.maronas at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/fp-intrinsics.ll
Log Message:
-----------
[SPIRV] Implement translation for llvm.modf.* intrinsics (#147556)
Based on
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/3100, I'm
adding translation for `llvm.modf.*` intrinsics.
Commit: 2b826dff01c93517f837bc665a30c21ac9308c8a
https://github.com/llvm/llvm-project/commit/2b826dff01c93517f837bc665a30c21ac9308c8a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
Log Message:
-----------
[RISCV][rvv] setcc-fp-vp.ll - regenerate with missing riscv32/64 checks
Commit: b78b16b213c423f09e40a4bf4a4872c8c21e2309
https://github.com/llvm/llvm-project/commit/b78b16b213c423f09e40a4bf4a4872c8c21e2309
Author: lntue <lntue at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/Test.h
M libc/test/src/__support/File/platform_file_test.cpp
M libc/test/src/stdio/fdopen_test.cpp
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopen_test.cpp
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/fscanf_test.cpp
M libc/test/src/stdio/ftell_test.cpp
M libc/test/src/stdio/putc_test.cpp
M libc/test/src/stdio/remove_test.cpp
M libc/test/src/stdio/rename_test.cpp
M libc/test/src/stdio/setbuf_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/ungetc_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdio/vfscanf_test.cpp
Log Message:
-----------
[libc][stdio] Separate temporary files for unit test and hermetic test in stdio test suite. (#149740)
Commit: 92c55a315eab455d5fed2625fe0f61f88cb25499
https://github.com/llvm/llvm-project/commit/92c55a315eab455d5fed2625fe0f61f88cb25499
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Analysis/BasicAA/modref.ll
M llvm/test/Analysis/CallGraph/ignore-assumelike-calls.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/MemorySSA/lifetime-simple.ll
M llvm/test/Analysis/MemorySSA/pr43427.ll
M llvm/test/Analysis/MemorySSA/pr43438.ll
M llvm/test/Analysis/StackSafetyAnalysis/lifetime.ll
A llvm/test/Assembler/autoupgrade-lifetime-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
M llvm/test/CodeGen/AArch64/stack-tagging.ll
M llvm/test/CodeGen/Thumb2/ifcvt-rescan-bug-2016-08-22.ll
M llvm/test/CodeGen/X86/select-optimize.ll
M llvm/test/CodeGen/X86/swap.ll
M llvm/test/Instrumentation/AddressSanitizer/asan-funclet.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime-throw.ll
M llvm/test/Instrumentation/AddressSanitizer/lifetime.ll
M llvm/test/Instrumentation/AddressSanitizer/stack-poisoning-and-lifetime-be.ll
M llvm/test/Instrumentation/AddressSanitizer/stack-poisoning-and-lifetime.ll
M llvm/test/Instrumentation/MemorySanitizer/alloca.ll
M llvm/test/Transforms/Attributor/heap_to_stack.ll
M llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
M llvm/test/Transforms/CodeExtractor/PartialInlineAlloca5.ll
M llvm/test/Transforms/CodeExtractor/live_shrink_gep.ll
M llvm/test/Transforms/ConstantHoisting/AArch64/const-hoist-intrinsics.ll
M llvm/test/Transforms/DCE/basic.ll
M llvm/test/Transforms/DeadStoreElimination/libcalls.ll
M llvm/test/Transforms/DeadStoreElimination/lifetime.ll
M llvm/test/Transforms/DeadStoreElimination/multiblock-multipath.ll
M llvm/test/Transforms/EarlyCSE/memoryssa.ll
M llvm/test/Transforms/GVN/opt-remarks.ll
M llvm/test/Transforms/HotColdSplit/lifetime-markers-on-inputs-1.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Inline/alloca-bonus.ll
M llvm/test/Transforms/Inline/redundant-loads.ll
M llvm/test/Transforms/InstCombine/deadcode.ll
M llvm/test/Transforms/InstCombine/malloc-free.ll
M llvm/test/Transforms/InstCombine/scalable-vector-struct.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-lifetime-ends.ll
M llvm/test/Transforms/MemCpyOpt/lifetime.ll
M llvm/test/Transforms/MemCpyOpt/memcpy-undef.ll
M llvm/test/Transforms/MemCpyOpt/memset-memcpy-oversized.ll
M llvm/test/Transforms/MemCpyOpt/preserve-memssa.ll
M llvm/test/Transforms/MoveAutoInit/clobber.ll
M llvm/test/Transforms/NewGVN/lifetime-simple.ll
M llvm/test/Transforms/ObjCARC/inlined-autorelease-return-value.ll
M llvm/test/Transforms/SafeStack/X86/coloring2.ll
M llvm/test/Verifier/intrinsic-immarg.ll
M llvm/test/Verifier/opaque-ptr.ll
M mlir/test/Target/LLVMIR/Import/intrinsic-prefer-unregistered.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M polly/test/CodeGen/invariant_load_in_non_affine_subregion.ll
Log Message:
-----------
[IR] Only allow lifetime.start/end on allocas (#149310)
lifetime.start and lifetime.end are primarily intended for use on
allocas, to enable stack coloring and other liveness optimizations. This
is necessary because all (static) allocas are hoisted into the entry
block, so lifetime markers are the only way to convey the actual
lifetimes.
However, lifetime.start and lifetime.end are currently *allowed* to be
used on non-alloca pointers. We don't actually do this in practice, but
just the mere fact that this is possible breaks the core purpose of the
lifetime markers, which is stack coloring of allocas. Stack coloring can
only work correctly if all lifetime markers for an alloca are
analyzable.
* If a lifetime marker may operate on multiple allocas via a select/phi,
we don't know which lifetime actually starts/ends and handle it
incorrectly (https://github.com/llvm/llvm-project/issues/104776).
* Stack coloring operates on the assumption that all lifetime markers
are visible, and not, for example, hidden behind a function call or
escaped pointer. It's not possible to change this, as part of the
purpose of lifetime markers is that they work even in the presence of
escaped pointers, where simple use analysis is insufficient.
I don't think there is any way to have coherent semantics for lifetime
markers on allocas, while also permitting them on arbitrary pointer
values.
This PR restricts lifetimes to operate on allocas only. As a followup, I
will also drop the size argument, which is superfluous if we always
operate on an alloca. (This change also renders various code handling
lifetime markers on non-alloca dead. I plan to clean up that kind of
code after dropping the size argument as well.)
In practice, I've only found a few places that currently produce
lifetimes on non-allocas:
* CoroEarly replaces the promise alloca with the result of an intrinsic,
which will later be replaced back with an alloca. I think this is the
only place where there is some legitimate loss of functionality, but I
don't think this is particularly important (I don't think we'd expect
the promise in a coroutine to admit useful lifetime optimization.)
* SafeStack moves unsafe allocas onto a separate frame. We can safely
drop lifetimes here, as SafeStack performs its own stack coloring.
* Similar for AddressSanitizer, it also moves allocas into separate
memory.
* LSR sometimes replaces the lifetime argument with a GEP chain of the
alloca (where the offsets ultimately cancel out). This is just
unnecessary. (Fixed separately in
https://github.com/llvm/llvm-project/pull/149492.)
* InferAddrSpaces sometimes makes lifetimes operate on an addrspacecast
of an alloca. I don't think this is necessary.
Commit: 8ba341eec3929dd26679092196cd45dfdd1e60c6
https://github.com/llvm/llvm-project/commit/8ba341eec3929dd26679092196cd45dfdd1e60c6
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
[BranchFolding] Kill common hoisted debug instructions (#140091)
branch-folder hoists common instructions from TBB and FBB into their
pred. Without this patch it achieves this by splicing the instructions from TBB
and deleting the common ones in FBB. That moves the debug locations and debug
instructions from TBB into the pred without modification, which is not
ideal. Debug locations are handled in pull request 140063.
This patch handles debug instructions - in the simplest way possible, which is
to just kill (undef) them. We kill and hoist the ones in FBB as well as TBB
because otherwise the fact there's an assignment on the code path is deleted
(which might lead to a prior location extending further than it should).
We might be able to do something smarter to preserve some variable locations in
some cases, but this is the easiest not-incorrect thing to do.
Commit: c9fe19a99bf41c165524dcb3e9ff939527b5178b
https://github.com/llvm/llvm-project/commit/c9fe19a99bf41c165524dcb3e9ff939527b5178b
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp_lock.cpp
Log Message:
-----------
[OpenMP] Improve performance of ticket lock (x86) (#143557)
Ticket lock has a yield operation (shown below) which degrades
performance on larger server machines due to an unconditional pause
operation.
```
#define KMP_YIELD(cond) \
{ \
KMP_CPU_PAUSE(); \
if ((cond) && (KMP_TRY_YIELD)) \
__kmp_yield(); \
}
```
Commit: 5d3b0578d8d51947a6878d65249174de86105073
https://github.com/llvm/llvm-project/commit/5d3b0578d8d51947a6878d65249174de86105073
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
Log Message:
-----------
[NFC][AMDGPU] Add an IR test for `v_sqrt_bf16` (#149629)
This was left during the upstream.
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 1a0dd5a67eee833a56566b8cdad8c439553708a3
https://github.com/llvm/llvm-project/commit/1a0dd5a67eee833a56566b8cdad8c439553708a3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Avoid duplicate LWGXYZ prefixes in status tables (#148874)
When synchronizing the status tables with Github issues, we use the
title of the Github issue as the name of the paper in the status table.
However, the Github issue titles are prefixed with PXYZ or LWGXYZ (which
is useful to quickly find papers), and that is redundant in the context
of status tables. This patch ensures that we don't add that redundant
PXYZ or LWGXYZ prefix.
As a drive-by, also specify the encoding for opening files explicitly,
which fixes issues on Windows.
Commit: 09580f73c2214f4c8c43b048e488ae530700a85c
https://github.com/llvm/llvm-project/commit/09580f73c2214f4c8c43b048e488ae530700a85c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/CIBestPractices.rst
Log Message:
-----------
[CI] Update Best Practices on Job Events for Stacked PRs (#149734)
I have seen a couple recent issues around workflows getting triggered on
events that are not correctly configured to handle stacked PRs. This
potentially resulted in workflows getting run twice (if they were also
triggering on push events) or to not run at all (if there were branch
restrictions for the pull_request event). Add some documentation to the
best practices page so we can hopefully avoid these issues in the future
and have some documentation to refer to during code review.
Commit: 3371b9111f26dc758f68c6691e24200cf86a8b74
https://github.com/llvm/llvm-project/commit/3371b9111f26dc758f68c6691e24200cf86a8b74
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/builtin_call.cpp
Log Message:
-----------
[CIR] Add assume_separate_storage operation (#149696)
This patch adds the `cir.assume_separate_storage` operation for the
`__builtin_assume_separate_storage` builtin function.
Commit: 8bb97d2d1e7a3488fdd0052674d654663d87256c
https://github.com/llvm/llvm-project/commit/8bb97d2d1e7a3488fdd0052674d654663d87256c
Author: SivanShani-Arm <sivan.shani at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lld/docs/ld.lld.1
Log Message:
-----------
[LLD][Docs] Document -z gcs= option in the man page (#146522)
Add documentation for the -z gcs= option to the LLD man page. This flag
controls how the GCS bit is set in the output:
- implicit (default): inferred from input objects
- never: GCS bit is never set
- always: GCS bit is always set
Clarifies behavior for users and aligns the man page with existing
functionality.
Commit: 1229323b8be4162e2dacb3320fc3d51ae895e7df
https://github.com/llvm/llvm-project/commit/1229323b8be4162e2dacb3320fc3d51ae895e7df
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/ProgrammersManual.rst
Log Message:
-----------
[llvm] Improve grammar and punctuation of several documents (#149630)
Commit: afdd30d712e54d49882b4cd3cfc028b476cea89d
https://github.com/llvm/llvm-project/commit/afdd30d712e54d49882b4cd3cfc028b476cea89d
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/UsersManual.rst
Log Message:
-----------
[clang] Proofread UsersManual.rst (NFC) (#149763)
Commit: 19e299120936a8480b6da35dd8c98a1dd5483a5a
https://github.com/llvm/llvm-project/commit/19e299120936a8480b6da35dd8c98a1dd5483a5a
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/docs/use/formatting.rst
Log Message:
-----------
[lldb] Proofread formatting.rst (#149768)
Commit: ce345cc793cef5ea54a5d29018571f53cd2164e3
https://github.com/llvm/llvm-project/commit/ce345cc793cef5ea54a5d29018571f53cd2164e3
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
Log Message:
-----------
[NFC][AMDGPU] Add an IR test for `v_cvt_f16_bf8` (#149627)
This was left during the upstream.
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: ba819031960ff9efb1862f2689c94a2fb496c2ba
https://github.com/llvm/llvm-project/commit/ba819031960ff9efb1862f2689c94a2fb496c2ba
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
Log Message:
-----------
[gfx1250][SDAG] Lower unsafe bf16 divisions (#149628)
Co-authored-by: Kosarev, Ivan <Ivan.Kosarev at amd.com>
Commit: e801a10b44ee96acb70b994662616a66fca0be21
https://github.com/llvm/llvm-project/commit/e801a10b44ee96acb70b994662616a66fca0be21
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
Log Message:
-----------
[AMDGPU] Add the code generation support for `llvm.[sin/cos].bf16` (#149631)
This is a partial support because some other instructions have not been upstreamed yet.
Commit: 890952ebfc4241cbca0f4fc9ad43cf9ab74ff223
https://github.com/llvm/llvm-project/commit/890952ebfc4241cbca0f4fc9ad43cf9ab74ff223
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port 401b5ccf6b50
Commit: 39389d55dd2cbfae54c3c4d4ba693f88f394e3bf
https://github.com/llvm/llvm-project/commit/39389d55dd2cbfae54c3c4d4ba693f88f394e3bf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn
Log Message:
-----------
[gn build] Port 7355ea3f6b21
Commit: 49d7a9b14ef1cc1c7231507f5f2feff7e7653966
https://github.com/llvm/llvm-project/commit/49d7a9b14ef1cc1c7231507f5f2feff7e7653966
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/BinaryFormat/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn
Log Message:
-----------
[gn build] Port aa7ada1dfbe2
Commit: e39ee62c5bdbe71b9f191bc5da7d47577e2099a9
https://github.com/llvm/llvm-project/commit/e39ee62c5bdbe71b9f191bc5da7d47577e2099a9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
Log Message:
-----------
[clang][bytecode] Use OptPrimType instead of std::optional<PrimType> (#149812)
We use this construct a lot. Use something similar to clang's
UnsignedOrNone.
This results in some slighy compile time improvements:
https://llvm-compile-time-tracker.com/compare.php?from=17a4b0399d161a3b89d8f0ce82add1638f23f5d4&to=a251d81ecd0ed45dd190462663155fdb303ef04d&stat=instructions:u
Commit: ed2bfd132509da679320a1d691af4a91192297d0
https://github.com/llvm/llvm-project/commit/ed2bfd132509da679320a1d691af4a91192297d0
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/intrinsic-module-path.f90
Log Message:
-----------
[Flang] Add -fintrinsic-modules-path= alias (#149417)
Add the syntax `-fintrinsic-modules-path=<dir>` as an alias to the
existing option `-fintrinsic-modules-path <dir>`. gfortran also supports
both alternatives.
This is particularly useful with CMake which de-duplicates command-line
options. For instance,
`-fintrinsic-modules-path /path/A -fintrinsic-modules-path /path/B`
is de-duplicated to
`-fintrinsic-modules-path /path/A /path/B`
since it conisiders the second `-fintrinsic-modules-path`
"redundant". This can be avoided using the syntax
`-fintrinsic-modules-path=/path/A -fintrinsic-modules-path=/path/B`.
Commit: 12a3afe47d4e5fcc97eb44271c00ace7cc8e4ff2
https://github.com/llvm/llvm-project/commit/12a3afe47d4e5fcc97eb44271c00ace7cc8e4ff2
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Remove code related to trigraphs (#148640)
When reviewing #147156, the reviewers pointed out that we didn't need to
support the trigraph. The code never handled it right.
In the debug build, this kind of input caused the assertion in the
function `countLeadingWhitespace` to fail. The release build without
assertions outputted `?` `?` `/` separated by spaces.
```C
#define A ??/
int i;
```
This is because the code in `countLeadingWhitespace` assumed that the
underlying lexer recognized the entire `??/` sequence as a single token.
In fact, the lexer recognized it as 3 separate tokens. The flag to make
the lexer recognize trigraphs was never enabled.
This patch enables the flag in the underlying lexer. This way, the
program now either turns the trigraph into a single `\` or removes it
altogether if the line is short enough. There are operators like the
`??=` in C#. So the flag is not enabled for all input languages. Instead
the check for the token size is moved from the assert line into the if
line.
The problem was introduced by my own patch 370bee480139 from about 3
years ago. I added code to count the number of characters in the escape
sequence probably just because the block of code used to have a comment
saying someone should add the feature. Maybe I forgot to enable
assertions when I ran the code. I found the problem because reviewing
pull request 145243 made me look at the code again.
Commit: 0c804da4eaf72969e338ed5619c41e038e1bdf35
https://github.com/llvm/llvm-project/commit/0c804da4eaf72969e338ed5619c41e038e1bdf35
Author: Brox Chen <guochen2 at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU][True16] turn on true16 for all gfx11 devices (#143518)
A follow up patch from https://github.com/llvm/llvm-project/pull/140736.
Set default true16 mode from gfx110x to all gfx11 devices.
Tests has been address in preivous patches.
Commit: c33c978d766a6bbaec28fce7638354c549a75111
https://github.com/llvm/llvm-project/commit/c33c978d766a6bbaec28fce7638354c549a75111
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bf16.ll
Log Message:
-----------
[AMDGPU][NFC] Run the general bf16 tests for GFX950. (#149796)
Commit: 2aa1e54fa1ff7f7c347e7108fe8650e94014c941
https://github.com/llvm/llvm-project/commit/2aa1e54fa1ff7f7c347e7108fe8650e94014c941
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Parser/OpenMP/map-modifiers-v60.f90
Log Message:
-----------
[flang][OpenMP] Parse OpenMP 6.0 map modifiers (#149134)
OpenMP 6.0 has changed the modifiers on the MAP clause:
- map-type-modifier has been split into individual modifiers,
- map-type "delete" has become a modifier,
- new modifiers have been added.
This patch adds parsing support for all of the OpenMP 6.0 modifiers. The
old "map-type-modifier" is retained, but is no longer created in
parsing. It will remain to take advantage of the preexisting modifier
validation for older versions: when the OpenMP version is < 6.0, the
modifiers will be rewritten back as map-type-modifiers (or map- type in
case of "delete").
In this patch the modifiers will always be rewritten in the older format
to isolate these changes to parsing as much as possible.
Commit: a270fdf3fe58dff7093c8bc1c7ffbd03c0268d66
https://github.com/llvm/llvm-project/commit/a270fdf3fe58dff7093c8bc1c7ffbd03c0268d66
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
Log Message:
-----------
[memprof] Simplify control flow in readMemProf (NFC) (#149764)
Now that readMemProf calls two helper functions handleAllocSite and
handleCallSite, we can simplify the control flow. We don't need to
use "continue" anymore.
Commit: 04e5e643f526090ec872c0e505c487918992e21d
https://github.com/llvm/llvm-project/commit/04e5e643f526090ec872c0e505c487918992e21d
Author: Rahul Yadav <rahul4talk at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
Log Message:
-----------
[VectorCombine] Generalize foldBitOpOfBitcasts to support more cast operations (#148350)
This patch generalizes the existing foldBitOpOfBitcasts optimization in the VectorCombine pass to handle additional cast operations beyond just bitcast.
Fixes: [#146037](https://github.com/llvm/llvm-project/issues/146037)
Summary
The optimization now supports folding bitwise operations (AND/OR/XOR)
with the following cast operations:
- bitcast (original functionality)
- trunc (truncate)
- sext (sign extend)
- zext (zero extend)
The transformation pattern is:
bitop(castop(x), castop(y)) -> castop(bitop(x, y))
This reduces the number of cast instructions from 2 to 1, improving
performance on targets where cast operations
are expensive or where performing bitwise operations on narrower types
is beneficial.
Implementation Details
- Renamed foldBitOpOfBitcasts to foldBitOpOfCastops to reflect broader
functionality
- Extended pattern matching to handle any CastInst operation
- Added validation for each cast type's constraints (e.g., trunc
requires source > dest)
- Updated cost model to use the actual cast opcode
- Preserves IR flags from original instructions
- Handles multi-use scenarios appropriately
Testing
- Added comprehensive tests in
test/Transforms/VectorCombine/bitop-of-castops.ll
- Tests cover all supported cast types with all bitwise operations
- Includes negative tests for unsupported patterns
- All existing VectorCombine tests pass
Commit: 8366dc207a2e6b50cb8afe2d98fca68bd78bd0fa
https://github.com/llvm/llvm-project/commit/8366dc207a2e6b50cb8afe2d98fca68bd78bd0fa
Author: Timothy Herchen <timothy.herchen at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Lex/LiteralSupport.cpp
M clang/test/C/C2y/n3353.c
Log Message:
-----------
[clang] Don't warn on zero literals with -std=c2y (#149688)
Fixes #149669; the old check compared with the end of the literal, but
we can just check that after parsing digits, we're pointing to one
character past the token start.
Commit: 5b98992fb98cb9cd3c492907b262e149f84c0cb0
https://github.com/llvm/llvm-project/commit/5b98992fb98cb9cd3c492907b262e149f84c0cb0
Author: Arseny Kapoulkine <arseny.kapoulkine at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/test/CodeGen/WebAssembly/simd-conversions.ll
M llvm/test/CodeGen/WebAssembly/simd-extending-convert.ll
Log Message:
-----------
[WebAssembly] Optimize convert_iKxN_u into convert_iKxN_s (#149609)
convert_iKxN_s is canonicalized into convert_iKxN_u when the argument is
known to have sign bit 0. This results in emitting Wasm opcodes that, on
some targets (like x86_64), are dramatically slower than signed versions
on major engines.
Similarly to X86, we now fix this up in isel when the instruction has
nonneg flag from canonicalization or if we know the source has zero sign
bit.
Fixes #149457.
Commit: 13906724ff7aa1bc58202faac62690570dfe0dc3
https://github.com/llvm/llvm-project/commit/13906724ff7aa1bc58202faac62690570dfe0dc3
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/stdint.c
Log Message:
-----------
[Mips] Correctly define IntPtrType (#145158)
Mips was the only architecture having PtrDiffType = SignedInt and
IntPtrType = SignedLong
This fixes a problem on mipsel-windows-gnu triple, where uintptr_t was
wrongly defined as unsigned long instead of unsigned int, leading to
problems in compiler-rt.
compiler-rt/lib/interception/interception_type_test.cpp:24:17: error:
static assertion failed due to requirement
'__sanitizer::is_same<unsigned long, unsigned int>::value':
24 | COMPILER_CHECK((__sanitizer::is_same<__sanitizer::uptr,
::uintptr_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
| ^~~~
compiler-rt/lib/interception/interception_type_test.cpp:25:17: error:
static assertion failed due to requirement '__sanitizer::is_same<long,
int>::value':
25 | COMPILER_CHECK((__sanitizer::is_same<__sanitizer::sptr,
::intptr_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
| ^~~~
compiler-rt/lib/interception/interception_type_test.cpp:27:17: error:
static assertion failed due to requirement '__sanitizer::is_same<long,
int>::value':
27 | COMPILER_CHECK((__sanitizer::is_same<::PTRDIFF_T,
::ptrdiff_t>::value));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compiler-rt/lib/interception/../sanitizer_common/sanitizer_internal_defs.h:369:44:
note: expanded from macro 'COMPILER_CHECK'
369 | #define COMPILER_CHECK(pred) static_assert(pred, "")
Commit: 29af8e59fcd8bc5795a9668f4d4dde5572df4146
https://github.com/llvm/llvm-project/commit/29af8e59fcd8bc5795a9668f4d4dde5572df4146
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/test/DebugInfo/X86/branch-folder-dbg.mir
Log Message:
-----------
Revert "[BranchFolding] Kill common hoisted debug instructions" (#149845)
Reverts llvm/llvm-project#140091 due to crash (see comments for reproducer)
Commit: 0b054e21f473e258fe0a886fea908fe8bb867bc8
https://github.com/llvm/llvm-project/commit/0b054e21f473e258fe0a886fea908fe8bb867bc8
Author: Aakanksha Patil <41199349+aakanksha555 at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/lib/ObjectYAML/ELFEmitter.cpp
A llvm/test/tools/obj2yaml/ELF/eflags.yaml
A llvm/test/tools/yaml2obj/file-header-flags.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
Allow "[[FLAGS=<none>]]" value in the ELF Fileheader Flags field (#143845)
https://github.com/llvm/llvm-project/pull/92066 will be dependent on
this change
Commit: 28b85502eb848538b8243039641584906712fd52
https://github.com/llvm/llvm-project/commit/28b85502eb848538b8243039641584906712fd52
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/DSInstructions.td
Log Message:
-----------
[AMDGPU] Remove some duplicated lines. NFC. (#128029)
Commit: 1c49ce676caa161250624714c3698b87dc2f8628
https://github.com/llvm/llvm-project/commit/1c49ce676caa161250624714c3698b87dc2f8628
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
Log Message:
-----------
[AMDGPU] Enable FWD_PROGRESS bit for GFX10+ on PAL (#139895)
Performance testing shows no significant gains or losses on graphics
workloads, so this is mostly to make the behavior consistent across all
supported OSes instead of special-casing HSA.
Commit: b184dd9c6f4facf3c4c513ef826c584ead8220d9
https://github.com/llvm/llvm-project/commit/b184dd9c6f4facf3c4c513ef826c584ead8220d9
Author: Howard Chu <1007273067 at qq.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
Log Message:
-----------
[doc][LLVM] Fix typo in the Kaleidoscope tutorial (#133675)
"to make the add's lexically identical" -> "to make the adds lexically
identical"
Commit: f85c1a5615c87f4598c6859578c0c30d4ea6a58c
https://github.com/llvm/llvm-project/commit/f85c1a5615c87f4598c6859578c0c30d4ea6a58c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_add.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.plus_equals.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_copy.pass.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
M libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/shared_ptr_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
Log Message:
-----------
[libc++] Remove mentions of Clang 18 in the test suite (#148862)
Clang 19 has been the oldest supported version of Clang since the LLVM
20 release, but we had not cleaned up the test suite yet.
Commit: 0823f4ff086e5352f7543b68ce6e7823498cf44b
https://github.com/llvm/llvm-project/commit/0823f4ff086e5352f7543b68ce6e7823498cf44b
Author: Lewis Crawford <lcrawford at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[ConstantFolding] Fix nvvm_round folding on PPC (#149837)
Fix a failing test for constant-folding the nvvm_round intrinsic. The
original implementation added in #141233 used a native libm call to the
"round" function, but on PPC this produces +0.0 if the input is -0.0,
which caused a test failure.
This patch updates it to use APFloat functions instead of native libm
calls to ensure cross-platform consistency.
Commit: c9ceb9b75fd547c7d2e79837075370f4c8db8faa
https://github.com/llvm/llvm-project/commit/c9ceb9b75fd547c7d2e79837075370f4c8db8faa
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[DebugInfo] Remove intrinsic-flavours of findDbgUsers (#149816)
This is one of the final remaining debug-intrinsic specific codepaths
out there, and pieces of cross-LLVM infrastructure to do with debug
intrinsics.
Commit: 65420e5539088d3e156f6bdb3fd390d2354091f7
https://github.com/llvm/llvm-project/commit/65420e5539088d3e156f6bdb3fd390d2354091f7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
Log Message:
-----------
[NFC][AMDGPU] Fix a test issue in `llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll` (#149826)
The callee and caller signature doesn't match
Commit: 6932080866f46c198e8999d2882ba34a9b6c40e7
https://github.com/llvm/llvm-project/commit/6932080866f46c198e8999d2882ba34a9b6c40e7
Author: William Huynh <William.Huynh at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/src/string/string_utils.h
Log Message:
-----------
[libc] Add dependency <stdint.h> to src/string/string_utils.h (#149849)
string_utils.h uses uintptr_t, and there seems to be no tracking of this
dependency. It seems upstream builds are unaffected but downstream this
is causing a lot of flaky builds.
Commit: 0fa515f7332142171f40df5df8a843d7351388dd
https://github.com/llvm/llvm-project/commit/0fa515f7332142171f40df5df8a843d7351388dd
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
R llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/WinEH/wineh-reuse-catch-alloca.ll
Log Message:
-----------
[win] Merge the x64 and AArch64 wineh-reuse-catch-alloca.ll tests (#149178)
Cleans up debt from #147849 and #147860
I had originally duplicated this test since the WinEH directory wasn't
enabled for AArch64, but now that we can run AArch64 tests in that
directory, I've unified the tests.
Commit: d6094370cb3f5ed24249800c42632e453d4ada3f
https://github.com/llvm/llvm-project/commit/d6094370cb3f5ed24249800c42632e453d4ada3f
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
A llvm/test/Transforms/InstCombine/AMDGPU/wmma-f8f6f4.ll
A llvm/test/Verifier/AMDGPU/wmma-f8f6f4.ll
Log Message:
-----------
AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 234338852c43bf3452813caea851d3e49074d521
https://github.com/llvm/llvm-project/commit/234338852c43bf3452813caea851d3e49074d521
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
Log Message:
-----------
Reapply "[AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and … (#149262)
Fixed the problem in ce7851f6b7d59e50f92cb4e8dbfd801576c8b641.
This reverts commit ba271cc07334c74df55741701e5b22032c0cddbb.
Commit: 30705c5840f42f48d608b56e1efccfdbecec8f0a
https://github.com/llvm/llvm-project/commit/30705c5840f42f48d608b56e1efccfdbecec8f0a
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
Log Message:
-----------
[mlir][vector][NFC] Add deprecation notice to splat's .td (#149532)
Part of deprecation of vector.splat
RFC: https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: b80ce054206db223ec8c3cd55fad510c97afbc9f
https://github.com/llvm/llvm-project/commit/b80ce054206db223ec8c3cd55fad510c97afbc9f
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/lib/ObjectYAML/ELFEmitter.cpp
R llvm/test/tools/obj2yaml/ELF/eflags.yaml
R llvm/test/tools/yaml2obj/file-header-flags.yaml
M llvm/tools/obj2yaml/elf2yaml.cpp
Log Message:
-----------
Revert "Allow "[[FLAGS=<none>]]" value in the ELF Fileheader Flags field (#143845)"
This reverts commit 0b054e21f473e258fe0a886fea908fe8bb867bc8.
Breaks many tests, see comments on #143845.
Commit: f7347e9f784860d9482ad8fe757761514cceff31
https://github.com/llvm/llvm-project/commit/f7347e9f784860d9482ad8fe757761514cceff31
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
A llvm/utils/update_mir_regclass_numbers
Log Message:
-----------
[utils] Add a script to update regclass numbers in MIR tests (#142761)
Commit: 2865f1ba966c21d4ebff610875394ce9c7a5ff38
https://github.com/llvm/llvm-project/commit/2865f1ba966c21d4ebff610875394ce9c7a5ff38
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math/exp10f16.h
M libc/src/__support/math/acos.h
M libc/src/__support/math/acosf.h
M libc/src/__support/math/asin_utils.h
M libc/src/__support/math/inv_trigf_utils.h
M libc/src/math/generic/asin.cpp
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/test/CMakeLists.txt
A libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_test.cpp
Log Message:
-----------
[libc][math] add smoke tests to shared/math.h (#149741)
Adding smoke tests for shared math header.
part of #147386
Commit: d9527be9141b4a9f434c5a105bb7a24a935c5d87
https://github.com/llvm/llvm-project/commit/d9527be9141b4a9f434c5a105bb7a24a935c5d87
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
A flang/test/Transforms/tbaa-local-alloc-threshold.fir
Log Message:
-----------
[NFC][flang] Added engineering option for triaging local-alloc-tbaa. (#149587)
I triaged a benchmark that showed inaccurate results, when
local-alloc-tbaa
was enabled. It turned out to be not a real TBAA issue, but rather
TBAA affecting optimizations that affect FMA generation, which
introduced
an expected accuracy variation. I would like to keep this threshold
control for future uses.
Commit: 36089e5d983fe9ae00f497c2d500f37227f82db1
https://github.com/llvm/llvm-project/commit/36089e5d983fe9ae00f497c2d500f37227f82db1
Author: Marco Elver <elver at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
Log Message:
-----------
[LowerAllowCheck] Rename removeUbsanTrap() to lowerAllowChecks() (#149847)
No traps are removed directly nor is this restricted to UBSan, therefore
rename the function doing the transformation of the intrinsic to match
its intent.
NFC.
Commit: e202dba288edd47f1b370cc43aa8cd36a924e7c1
https://github.com/llvm/llvm-project/commit/e202dba288edd47f1b370cc43aa8cd36a924e7c1
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
[SLP]Initial support for copyable elements (non-schedulable only)
Adds initial support for copyable elements. This patch only models adds
and model copyable elements as add <element>, 0, i.e. uses identity
constants for missing lanes.
Only support for elements, which do not require scheduling, is added to
reduce size of the patch.
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/140279
Commit: 881b3fdfad30ca7e945fab4c68822f6bdecf06af
https://github.com/llvm/llvm-project/commit/881b3fdfad30ca7e945fab4c68822f6bdecf06af
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
Log Message:
-----------
[RISCV][IA] Support masked.load for deinterleaveN matching (#149556)
This builds on the whole series of recent API reworks to implement
support for deinterleaveN of masked.load. The goal is to be able to
enable masked interleave groups in the vectorizer once all the codegen
and costing pieces are in place.
I considered including the shuffle path support in this review as well
(since the RISCV target specific stuff should be common), but decided to
separate it into it's own review just to focus attention on one thing at
a time.
Commit: abce4e9ad0481ef33812e72a1bae53d77ddd9cce
https://github.com/llvm/llvm-project/commit/abce4e9ad0481ef33812e72a1bae53d77ddd9cce
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Folder: shape_cast(extract) -> extract (#146368)
In a later PR more shape_cast ops will appear. Specifically, broadcasts that
just prepend ones become shape_cast ops (i.e. volume preserving broadcasts
are canonicalized to shape_casts). This PR ensures that broadcast-like
shape_cast ops fold at least as well as broadcast ops.
This is done by modifying patterns that target broadcast ops, to target
'broadcast-like' ops. No new patterns are added, the patterns that exist
are just made to match on shape_casts where appropriate.
This PR also includes minor code simplifications: use
`isBroadcastableTo` to simplify `ExtractOpFromBroadcast` and simplify
how broadcast dims are detected in `foldExtractFromBroadcast`. These are
NFC.
---------
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: ac6e2ee39b34ec7ff5bed885c87e0d0bd16be835
https://github.com/llvm/llvm-project/commit/ac6e2ee39b34ec7ff5bed885c87e0d0bd16be835
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
M mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
M mlir/test/Conversion/ConvertToSPIRV/vector.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][vector] Support direct broadcast conversion (LLVM & SPIRV) (#148027)
Add conversion for broadcast from scalar for LLVM and SPIRV. Also some
miscellaneous replacements of vector.splat with vector.broadcast in
VectorToGPU and ArithToAMDGPU.
Part of deprecation of vector.splat RFC:
https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: ce44f089ded833acde529dbf448732a486207d5f
https://github.com/llvm/llvm-project/commit/ce44f089ded833acde529dbf448732a486207d5f
Author: Augusto Noronha <anoronha at apple.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/include/lldb/Target/Target.h
M lldb/source/Target/Target.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Add an extra optional did_read_live_memory to Target::ReadMemory (#149620)
Target::ReadMemory may or may not read live memory, but whether it did
read from live memory or from the filecache is opaque to callers. Add an
extra out parameter to indicate whether live memory was read or not.
Commit: 8940ab510ca56e0d87ab1e6a1d6cd26df3405f10
https://github.com/llvm/llvm-project/commit/8940ab510ca56e0d87ab1e6a1d6cd26df3405f10
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/test/Dialect/Linalg/vectorization/linalg-ops.mlir
Log Message:
-----------
[mlir][linalg][nfc] Group tests for linalg.pack + linalg.unpack (#149783)
Groups vectorization tests for `linalg.pack` + `linalg.unpack` together.
Commit: 9ad7edef4276207ca4cefa6b39d11145f4145a72
https://github.com/llvm/llvm-project/commit/9ad7edef4276207ca4cefa6b39d11145f4145a72
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acosf16.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/acos.h
A libc/src/__support/math/acosf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acosf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acosf16 implementation to header-only in src/__support/math folder. (#148412)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: abe93d9d7e891a2a6596ddb0c6324280137c89dc
https://github.com/llvm/llvm-project/commit/abe93d9d7e891a2a6596ddb0c6324280137c89dc
Author: Michał Górny <mgorny at gentoo.org>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Fix installed symlinks to be relative again (#149728)
Fix the symlink creation logic to use relative paths instead of
absolute, in order to ensure that the installed symlinks actually refer
to the installed .bc files rather than the ones from the build
directory. This was broken in #146833. The change is a bit roundabout
but it attempts to preserve the spirit of #146833, that is the ability
to use multiple output directories (provided they all resides in
`${LIBCLC_OUTPUT_LIBRARY_DIR}` and preserve the same structure in the
installed tree).
Signed-off-by: Michał Górny <mgorny at gentoo.org>
Commit: 509af524e3c3a25f7c777059585e075f70bf8db3
https://github.com/llvm/llvm-project/commit/509af524e3c3a25f7c777059585e075f70bf8db3
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
R llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
Revert "[DirectX] Lower `llvm.lifetime.*` intrinsics to stores when DXIL version is lower than 1.6 (#147432)" (#149874)
This PR reverts commit d47c126fbf7915c01ea112ae372fe8835df4379f
(corresponding to PR #147432) to fix a build failure caused by #149310
Commit: 53f4abc6036a13f1b8afebc31d179d1a901084b8
https://github.com/llvm/llvm-project/commit/53f4abc6036a13f1b8afebc31d179d1a901084b8
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
R clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
M clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
Log Message:
-----------
[PowerPC][NFC] Combine the 2 dmf neg test files (#149875)
Combining since these are testing the same err message with only
difference being the target cpu.
Commit: b7e332d3f59f567b1999fbcc660d7837cba8e406
https://github.com/llvm/llvm-project/commit/b7e332d3f59f567b1999fbcc660d7837cba8e406
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
M mlir/include/mlir/Dialect/LLVMIR/BasicPtxBuilderInterface.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorType.h
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/PatternMatch.h
M mlir/include/mlir/Interfaces/ViewLikeInterface.h
M mlir/include/mlir/Parser/Parser.h
M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDecl.txt
M mlir/lib/Target/IRDLToCpp/Templates/PerOperationDef.txt
Log Message:
-----------
[mlir][NFC] update `include` create APIs (3/n) (#149687)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: fe267860c1206b0622f5aee8fe8a04040fcecbf7
https://github.com/llvm/llvm-project/commit/fe267860c1206b0622f5aee8fe8a04040fcecbf7
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/erff.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/erff.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/erff.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor erff implementation to header-only in src/__support/math folder. (#148413)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: d93f91fc467beb3da99a43fc1874f1dbcaf250c4
https://github.com/llvm/llvm-project/commit/d93f91fc467beb3da99a43fc1874f1dbcaf250c4
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Prefer switch over intrinsic ID instead of if-chain [nfc]
Commit: 0e42c665f97ee6551e1019cd75ff649c14bda03a
https://github.com/llvm/llvm-project/commit/0e42c665f97ee6551e1019cd75ff649c14bda03a
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-basic.ll
M llvm/test/Transforms/MemProfContextDisambiguation/basic.ll
Log Message:
-----------
[MemProf] Update the declaration DISubprogram linkageName for clones (#149864)
Follow up to PR145385 to also update the linkageName on any separate
DISubprogram for the clone function declaration.
Commit: c4f3bc91c0684e82491045dc3f317274be3b8131
https://github.com/llvm/llvm-project/commit/c4f3bc91c0684e82491045dc3f317274be3b8131
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
Revert "Revert "[DirectX] Lower `llvm.lifetime.*` intrinsics to stores when DXIL version is lower than 1.6 (#147432)"" (#149882)
Reverts llvm/llvm-project#149874
Reverted the wrong PR by mistake.
Commit: 8f9ed788740fd00836195b30061ad161b2055d8c
https://github.com/llvm/llvm-project/commit/8f9ed788740fd00836195b30061ad161b2055d8c
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
R llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll
M llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/tools/dxil-dis/lifetimes.ll
Log Message:
-----------
Revert "[DirectX] Legalize lifetime intrinsics for DXIL" (#149883)
Reverts llvm/llvm-project#148003 to fix a DirectX backend build breakage
due to #149310
Commit: b53be5f4b2d25aabcd676319a054f251cb0752b2
https://github.com/llvm/llvm-project/commit/b53be5f4b2d25aabcd676319a054f251cb0752b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M offload/plugins-nextgen/common/src/Utils/ELF.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[LLVM] Update CUDA ELF flags for their new ABI (#149534)
Summary:
We rely on these flags to do things in the runtime and print the
contents of binaries correctly. CUDA updated their ABI encoding recently
and we didn't handle that. it's a new ABI entirely so we just select on
it when it shows up.
Fixes: https://github.com/llvm/llvm-project/issues/148703
Commit: 4184a1b5815810993eb87602aa6d47bcf7e72691
https://github.com/llvm/llvm-project/commit/4184a1b5815810993eb87602aa6d47bcf7e72691
Author: Lei Huang <lei at ca.ibm.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
Log Message:
-----------
[PowerPC][NFC] Fix clang format in PPCInstrFuture.td (#149884)
Commit: 033df384cde9e692fd1b9e5d3bf29100971f9444
https://github.com/llvm/llvm-project/commit/033df384cde9e692fd1b9e5d3bf29100971f9444
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
Log Message:
-----------
[IA] Naming and style cleanup [nfc]
1) Rename argument II to something slightly more descriptive since we have
more than one IntrinsicInst flowing through.
2) Perform a checked dyn_cast early to eliminate two casts later in each
routine.
Commit: 84781c0ed36410d9fb79cab6f58e09e660e4ea7e
https://github.com/llvm/llvm-project/commit/84781c0ed36410d9fb79cab6f58e09e660e4ea7e
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acoshf.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acosh_float_constants.h
A libc/src/__support/math/acoshf.h
A libc/src/__support/math/acoshf_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/acoshf16.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/asinhf16.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/common_constants.h
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/log1pf.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acoshf implementation to header-only in src/__support/math folder. (#148418)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: 423cea760732e7969ac5d0edff9d725d89503807
https://github.com/llvm/llvm-project/commit/423cea760732e7969ac5d0edff9d725d89503807
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Fix incorrect indentation. NFC
Commit: fcacd4e880c9a0b3f2bdaa43603aeddfa1b1cd2e
https://github.com/llvm/llvm-project/commit/fcacd4e880c9a0b3f2bdaa43603aeddfa1b1cd2e
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
R lld/test/COFF/exported-dllmain.test
A lld/test/COFF/imported-dllmain-i386.test
A lld/test/COFF/imported-dllmain.test
Log Message:
-----------
[LLD][COFF] Follow up comments on pr146610 (#147152)
This is a follow-up PR for post-commit comments in
https://github.com/llvm/llvm-project/pull/146610
- Changed "exporteddllmain" references to "importeddllmain".
- Add support for x86 target and test coverage.
- Changed a comment to better express why we're skipping importing
`DllMain`.
Commit: 96548db78f037a8f6c8a59c0110a53b4e6f0f4c6
https://github.com/llvm/llvm-project/commit/96548db78f037a8f6c8a59c0110a53b4e6f0f4c6
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M libc/test/src/math/explogxf_test.cpp
Log Message:
-----------
[libc][math] fix explogxf test (#149891)
Commit: e1aed19fb9e36543fa7354934ee1b268bdc40705
https://github.com/llvm/llvm-project/commit/e1aed19fb9e36543fa7354934ee1b268bdc40705
Author: lntue <lntue at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][bazel] Add hypotf16 bazel targets. (#149761)
Commit: f38c94b80563b063439f2079de260d1424e0bffc
https://github.com/llvm/llvm-project/commit/f38c94b80563b063439f2079de260d1424e0bffc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
Log Message:
-----------
[RISCV] Fix typo in test: loat->load. NFC (#149869)
Commit: 860ff8714b2d6f810703c4490e26dd687fc15b8d
https://github.com/llvm/llvm-project/commit/860ff8714b2d6f810703c4490e26dd687fc15b8d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV] Use empty() instead of size()==0. NFC (#149868)
Move the assert past the code that determines if the pass should run.
Commit: 9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
https://github.com/llvm/llvm-project/commit/9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][AMDGPU] Infer canonical layouts for fat_raw_buffer_cast resetOffset (#149867)
When inferring the return type of amdgpu.fat_raw_buffer_cast with the
offset reset, we would sometimes use a strided layout, like
strided<[1]>, in cases where, after stripping the offset, the memref had
the identity layout. This would cause issues with EmulateNarrowTypes,
which does perform this layout canonicalization.
Now, the return type inference will put in an identity layout after
offset stripping for
1. Statically-shaped memrefs of any rank where the strides match the
suffix product of the shape, and
2. Memrefs of rank <= 1 whose strides are [1] (or []) that just had
their offset removed by resetOffset.
Commit: e47d5eb4541d5f377d9a57ef2157dbb3a41a85e6
https://github.com/llvm/llvm-project/commit/e47d5eb4541d5f377d9a57ef2157dbb3a41a85e6
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
A llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
Log Message:
-----------
[AMDGPU] Hazard handling for gfx1250 wmma instructions (#149865)
If both instructions are xdl WMMA, hazard exists when the first WMMA
writes a register (D0) and the second WMMA reads it (A1/B1/Index1).
If the first instruction is a xdl WMMA, and the second one is a VALU,
three kinds of hazards exist:
WMMA writes (D0), VALU reads (Use1);
WMMA writes (D0), VALU writes (D1);
WMMA reads (A0/B0.Index0), VALU writes (D1).
The actual number of hazard slots depends on the categories of the first
xdl WMMA as well as whether the second instruction is a xdl WMMA or
VALU. If there is not enough unrelated VALUs in between the two
instructions, appropriate number (to cover the missing) of V_NOPs will
be inserted to satisfy the hazard handling requirements.
Commit: 2d31fc85a847759a5ea1fb39718a3851d57913c3
https://github.com/llvm/llvm-project/commit/2d31fc85a847759a5ea1fb39718a3851d57913c3
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
A clang/test/Driver/modules-driver-cxx20-module-usage-scanner.cpp
Log Message:
-----------
Reland [clang][modules-driver] Add scanner to detect C++20 module presence (#147630)
This patch is part of a series to natively support C++20 module usage
from the Clang driver (without requiring an external build system). This
introduces a new scanner that detects C++20 module usage in source files
without using the preprocessor or lexer.
For now, it is enabled only with the `-fmodules-driver` flag and serves
solely diagnostic purposes. In the future, the scanner will be enabled
for any (modules-driver compatible) compilation with two or more inputs,
and will help the driver determine whether to implicitly enable the
modules driver.
Since the scanner adds very little overhead, we are also exploring
enabling it for compilations with only a single input. This approach
could allow us to detect `import std` usage in a single-file
compilation, which would then activate the modules driver. For
performance measurements on this, see
https://github.com/naveen-seth/llvm-dev-cxx-modules-check-benchmark.
RFC:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
This patch relands commit ded1426. The CI failure is resolved by
removing the compatibility warning for using the `-fmodules-driver` flag
with pre-C++20 standards, which also better aligns its behavior with
other features/flags supported only in newer standards.
Commit: 2a78c6d45d4965df35e8cb766f557e7ae52477a8
https://github.com/llvm/llvm-project/commit/2a78c6d45d4965df35e8cb766f557e7ae52477a8
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M lldb/unittests/DAP/TestBase.cpp
Log Message:
-----------
[lldb] Fix warning: suggest explicit braces to avoid ambiguous ‘else’
According to the LLVM Style Guide we don't need braces because it's a
single-line, but it looks like the macro expands to code that includes a
potentially ambiguous "else". Use braces to silence the warning.
Commit: 45a6c02c2123f1d4764a8ad981193b15851df744
https://github.com/llvm/llvm-project/commit/45a6c02c2123f1d4764a8ad981193b15851df744
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
Log Message:
-----------
[flang] Control alignment of constant folded reals (#149381)
When REAL types are constant folded, the underneath implementation uses
arrays of integers. Ensure that these arrays are properly aligned.
This matters when building flang with clang. In some cases, the
resulting code for flang compiler ended up using SSE2 aligned load
instructions for REAL(16) constant folding on x86_64, and these
instructions require that the values are loaded from the aligned
addresses.
Commit: bf86abee3e86e7226887ab1a5541296beed46d82
https://github.com/llvm/llvm-project/commit/bf86abee3e86e7226887ab1a5541296beed46d82
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV][IA] Support masked.store of deinterleaveN intrinsic (#149893)
This is the masked.store side to the masked.load support added in
881b3fd.
With this change, we support masked.load and masked.store via the
intrinsic lowering path used primarily with scalable vectors. An
upcoming change will extend the fixed vector (i.a. shuffle vector) paths
in the same manner.
Commit: cb6f132b1c433c7f6b7727793a1588ae6401f284
https://github.com/llvm/llvm-project/commit/cb6f132b1c433c7f6b7727793a1588ae6401f284
Author: Naveen Seth Hanig <naveen.hanig at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/DependencyDirectivesScanner.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
R clang/test/Driver/modules-driver-cxx20-module-usage-scanner.cpp
Log Message:
-----------
Revert "Reland [clang][modules-driver] Add scanner to detect C++20 module presence" (#149900)
Reverts llvm/llvm-project#147630.
This causes a linker error caused by linking the driver against the
lexer.
Commit: 54ae81f6ffb4f7685e5dcb56d21eeabda24d21b7
https://github.com/llvm/llvm-project/commit/54ae81f6ffb4f7685e5dcb56d21eeabda24d21b7
Author: lntue <lntue at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][bazel] Remove -fext-numeric-literals as it is only needed for gcc and not available in clang. (#149902)
Commit: dcffa3d05ca1873c098712d6ad9cb5d095ac7c85
https://github.com/llvm/llvm-project/commit/dcffa3d05ca1873c098712d6ad9cb5d095ac7c85
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
Fix indendation in StandardCPlusPlusModules.rst (#149901)
The CI is complaining about unexpected indentation. It seems multiple-line list entries must start at the beginning of each line.
Commit: 520398e752b1f69f9c2575b23db34ab65de2cd02
https://github.com/llvm/llvm-project/commit/520398e752b1f69f9c2575b23db34ab65de2cd02
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/shared/math.h
A libc/shared/math/acoshf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acoshf16.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acoshf16.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math] Refactor acoshf16 implementation to header-only in src/__support/math folder. (#148568)
Part of #147386
in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
Commit: b66084acd9f6052ed9061ef4ec39e7c8a176f01d
https://github.com/llvm/llvm-project/commit/b66084acd9f6052ed9061ef4ec39e7c8a176f01d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
Log Message:
-----------
[AMDGPU] Verify asm VGPR alignment on gfx1250 (#149880)
Co-authored-by: Shilei Tian <Shilei.Tian at amd.com>
Commit: 5062fe5692a503b600bccb753323ba961811ade6
https://github.com/llvm/llvm-project/commit/5062fe5692a503b600bccb753323ba961811ade6
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 9052a85da803b246fa6a6f8b3b5bcbfc2e9de7a8
Commit: de011e372dff540056b4abdf02de94061f5ddb86
https://github.com/llvm/llvm-project/commit/de011e372dff540056b4abdf02de94061f5ddb86
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_config.h.cmake
M openmp/runtime/src/kmp_global.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
Log Message:
-----------
[OpenMP] [NFC] Remove KMP_NESTED_HOT_TEAMS macro (#143584)
The feature was introduced back in 2014 and has been on ever since.
Leave the feature in place. Removing only the macro.
Commit: 4981bc24cff3344d477af04591b699da466e10b8
https://github.com/llvm/llvm-project/commit/4981bc24cff3344d477af04591b699da466e10b8
Author: Jonathan Peyton <jonathan.l.peyton at intel.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M openmp/runtime/src/include/omp_lib.F90.var
M openmp/runtime/src/include/omp_lib.h.var
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_barrier.cpp
M openmp/runtime/src/kmp_barrier.h
M openmp/runtime/src/kmp_ftn_entry.h
M openmp/runtime/src/kmp_i18n.cpp
M openmp/runtime/src/kmp_lock.cpp
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_settings.cpp
M openmp/runtime/src/kmp_str.cpp
A openmp/runtime/test/env/check_certain_values.c
A openmp/runtime/test/tasking/no_task_barrier.c
Log Message:
-----------
[OpenMP] Fixup bugs found during fuzz testing (#143455)
A lot of these only trip when using sanitizers with the library.
* Insert forgotten free()s
* Change (-1) << amount to 0xffffffffu as left shifting a negative is UB
* Fixup integer parser to return INT_MAX when parsing huge string of
digits. e.g., 452523423423423423 returns INT_MAX
* Fixup range parsing for affinity mask so integer overflow does not
occur
* Don't assert when branch bits are 0, instead warn user that is invalid
and use the default value.
* Fixup kmp_set_defaults() so the C version only uses null terminated
strings and the Fortran version uses the string + size version.
* Make sure the KMP_ALIGN_ALLOC is power of two, otherwise use
CACHE_LINE.
* Disallow ability to set KMP_TASKING=1 (task barrier) this doesn't work
and hasn't worked for a long time.
* Limit KMP_HOT_TEAMS_MAX_LEVEL to 1024, an array is allocated based on
this value.
* Remove integer values for OMP_PROC_BIND. The specification only allows
strings and CSV of strings.
* Fix setting KMP_AFFINITY=disabled + OMP_DISPLAY_AFFINITY=TRUE
Commit: f0bbe73cf101b82a9b02b8466f562e3173d25523
https://github.com/llvm/llvm-project/commit/f0bbe73cf101b82a9b02b8466f562e3173d25523
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy] Proofread Contributing.rst (#149831)
Commit: 2860431e1f1bb4ecc4ebaf1006f766b37d975580
https://github.com/llvm/llvm-project/commit/2860431e1f1bb4ecc4ebaf1006f766b37d975580
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Analysis/LifetimeSafety.cpp
Log Message:
-----------
[LifetimeSafety] Add per-program-point lattice tracking (#149199)
Add per-program-point state tracking to the dataflow analysis framework.
- Added a `ProgramPoint` type representing a pair of a CFGBlock and a Fact within that block
- Added a `PerPointStates` map to store lattice states at each program point
- Modified the `transferBlock` method to store intermediate states after each fact is processed
- Added a `getLoans` method to the `LoanPropagationAnalysis` class that uses program points
This change enables more precise analysis by tracking program state at each individual program point rather than just at block boundaries. This is necessary for answering queries about the state of loans, origins, and other properties at specific points in the program, which is required for error reporting in the lifetime safety analysis.
Commit: a0b854d576c8d302394bcf12c76b22c9300e5411
https://github.com/llvm/llvm-project/commit/a0b854d576c8d302394bcf12c76b22c9300e5411
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/MC/AMDGPU/gfx1250_asm_smem.s
A llvm/test/MC/AMDGPU/gfx1250_asm_smem_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vbuffer_mubuf_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vflat_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_smem.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vflat.txt
Log Message:
-----------
[AMDGPU] MC support for gfx1250 scale_offset modifier (#149881)
Commit: 006858cd4d944ff44b3ef4619194a72ff8823edc
https://github.com/llvm/llvm-project/commit/006858cd4d944ff44b3ef4619194a72ff8823edc
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
Log Message:
-----------
[AMDGPU] Prevent folding of FI with scale_offset on gfx1250 (#149894)
SS forms of SCRATCH_LOAD_DWORD do not support SCALE_OFFSET,
so if this bit is used SCRATCH_LOAD_DWORD_SADDR cannot be formed.
This generally shall not happen because FI is not supposed to
be scaled, but add this as a precaution.
Commit: c59e4b58058f1861146f736ec2a3991283b05377
https://github.com/llvm/llvm-project/commit/c59e4b58058f1861146f736ec2a3991283b05377
Author: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/include/math.yaml
Log Message:
-----------
[libc][math] fix header generation (#149918)
Commit: 5e8e03d859f4367b68ad08311ae0b3f8bf8eea4f
https://github.com/llvm/llvm-project/commit/5e8e03d859f4367b68ad08311ae0b3f8bf8eea4f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Simplify RVPUnary tablegen class. NFC
imm field was unused. rs1 is already handled in RVInstIBase.
Commit: 8f26a301bc7caf3d11d1f03818dae77a24e266e9
https://github.com/llvm/llvm-project/commit/8f26a301bc7caf3d11d1f03818dae77a24e266e9
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/destructors.cpp
Log Message:
-----------
[CIR] Add complete destructor handling (#149552)
The initial implementation for emitting destructors emitted the complete
destructor body for both D1 and D2 destructors. This change updates the
code to have the D1 destructor call the D2 destructor.
Commit: 97a66a897caeb1445160d1862fd5b35bb5416ffb
https://github.com/llvm/llvm-project/commit/97a66a897caeb1445160d1862fd5b35bb5416ffb
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
A llvm/test/CodeGen/AMDGPU/load-store-opt-scale-offset.mir
Log Message:
-----------
[AMDGPU] Prohibit load/store merge if scale_offset is set on gfx1250 (#149895)
Scaling is done on the operation size, by merging instructions we
would need to generate code to scale the offset and reset the
auto-scale bit. This is unclear if that would be beneficial, just
disable such merge for now.
Commit: 354944d675c04c87bc0e9ebcca900148f5a344b8
https://github.com/llvm/llvm-project/commit/354944d675c04c87bc0e9ebcca900148f5a344b8
Author: Scott Linder <scott.linder at amd.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/MC/MCDwarf.cpp
A llvm/test/Assembler/difile-empty-source.ll
M llvm/test/DebugInfo/Generic/mixed-source.ll
Log Message:
-----------
[DebugInfo] Fully implement DWARF issue 180201.1 (#149226)
Finish making LLVM's implementation of `DW_LNCT_LLVM_source` conform to
the final accepted version of `DW_LNCT_source` from
https://dwarfstd.org/issues/180201.1.html
This is effectively a continuation of a few commits which have moved in
this direction already, including:
* c9cb4fc761cd7 [DebugInfo] Store optional DIFile::Source as pointer
* 87e22bdd2bd6d Allow for mixing source/no-source DIFiles in one CU
This patch:
* Teaches LLParser that there is a distinction between an empty and an
absent "source:" field on DIFile.
* Makes printing the "source:" field in AsmWriter conditional on it
being present, instead of being conditional on it being non-empty.
* Teaches MC to map an empty-but-present source field to "\n" (which is
ambiguous, making the source strings "" and "\n" indistinguishable, but
that's what the DWARF issue specifies).
Add a test for round-tripping an empty source field through
assembler/bitcode.
Extend the test for the actual DWARF generation so it covers all of the
cases (absent, present-but-empty,
present-and-ambiguously-single-newline, present).
Commit: a7d93653a6712d8a374a2776853057b03181c12a
https://github.com/llvm/llvm-project/commit/a7d93653a6712d8a374a2776853057b03181c12a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/cuda-phases.cu
M clang/test/Driver/hip-inputs.hip
M clang/test/Driver/hip-invalid-target-id.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/invalid-offload-options.cpp
M clang/test/Driver/nvptx-cuda-system-arch.c
A clang/test/Driver/offload-target.c
M clang/test/Driver/openmp-offload.c
M clang/test/Driver/openmp-system-arch.c
Log Message:
-----------
[Clang] Rework creating offloading toolchains (#125556)
Summary:
This patch reworks how we create offloading toolchains. Previously we
would handle this separately for all the different kinds. This patch
instead changes this to use the target triple and the offloading kind to
determine the proper toolchain. In the old case where the user only
passes `--offload-arch` we instead infer the triple from the passed
arguments. This is a pretty major overhaul but currently passes all the
clang tests with only minor changes to error messages.
Commit: 46f6df0848ea04449c6179ecdedc404ee5b5cf11
https://github.com/llvm/llvm-project/commit/46f6df0848ea04449c6179ecdedc404ee5b5cf11
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/AbstractResult.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CharacterConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Transforms` create APIs (11/n) (#149915)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 6fa759b465a681c9c2bea046a65e2f8c5a9f4104
https://github.com/llvm/llvm-project/commit/6fa759b465a681c9c2bea046a65e2f8c5a9f4104
Author: Stanley Winata <68087699+raikonenfnu at users.noreply.github.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/test/python/dialects/amdgpu.py
Log Message:
-----------
[MLIR][AMDGPU] Use Attr for resetOffset + boundsCheck in RawBufferCastOp (#149939)
In order to access and modify resetOffset and boundsCheck of
RawBufferCastOp in pythonic binding, we will have to use Attrs instead
of Property. This is because we do not have python binding support for
property yet. We should move back to property once we add pythonic
binding support for it.
---------
Signed-off-by: Stanley Winata <stanley.winata at amd.com>
Commit: a3a007ad5fa20abc90ead4e1030b481bf109b4cf
https://github.com/llvm/llvm-project/commit/a3a007ad5fa20abc90ead4e1030b481bf109b4cf
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertProcedureDesignator.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Lower/VectorSubscripts.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Lower` create APIs (8/n) (#149912)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 5547c6cd03ddddd405a09e51624e1f19955a85b1
https://github.com/llvm/llvm-project/commit/5547c6cd03ddddd405a09e51624e1f19955a85b1
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/Builder/Runtime/Assign.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/EnvironmentDefaults.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Pointer.cpp
M flang/lib/Optimizer/Builder/Runtime/Ragged.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/lib/Optimizer/Builder/Runtime/Support.cpp
M flang/lib/Optimizer/Builder/Runtime/TemporaryStack.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Builder/Runtime` create APIs (10/n) (#149916)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 9844ba6d9740206129b52633c555f767eaa45581
https://github.com/llvm/llvm-project/commit/9844ba6d9740206129b52633c555f767eaa45581
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/Complex.cpp
M flang/lib/Optimizer/Builder/DoLoopHelper.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
Log Message:
-----------
[mlir][NFC] update `flang/Optimizer/Builder` create APIs (9/n) (#149917)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: dce6679cf5cbbdaffb9c2b51dc762c5c6689ea78
https://github.com/llvm/llvm-project/commit/dce6679cf5cbbdaffb9c2b51dc762c5c6689ea78
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Complex/IR/ComplexDialect.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/ControlFlow/Transforms/BufferDeallocationOpInterfaceImpl.cpp
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/EmitC/Transforms/Transforms.cpp
M mlir/lib/Dialect/EmitC/Transforms/TypeConversions.cpp
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/lib/Dialect/Func/Extensions/InlinerExtension.cpp
M mlir/lib/Dialect/Func/IR/FuncOps.cpp
M mlir/lib/Dialect/Func/TransformOps/FuncTransformOps.cpp
M mlir/lib/Dialect/Func/Transforms/FuncConversions.cpp
M mlir/lib/Dialect/Func/Utils/Utils.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
M mlir/lib/Dialect/GPU/Transforms/AsyncRegionRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/GPU/Transforms/GlobalIdRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/GPU/Transforms/ModuleToBinary.cpp
M mlir/lib/Dialect/GPU/Transforms/PromoteShuffleToAMDGPU.cpp
M mlir/lib/Dialect/GPU/Transforms/ShuffleRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupIdRewriter.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
M mlir/lib/Dialect/GPU/Utils/DistributionUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (16/n) (#149922)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c3823af156b517d926a56e3d0d585e2a15720e96
https://github.com/llvm/llvm-project/commit/c3823af156b517d926a56e3d0d585e2a15720e96
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/SPIRV/Linking/ModuleCombiner/ModuleCombiner.cpp
M mlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/RewriteInsertsPass.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
M mlir/lib/Dialect/SPIRV/Transforms/SPIRVWebGPUTransforms.cpp
M mlir/lib/Dialect/SPIRV/Transforms/UnifyAliasedResourcePass.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (22/n) (#149929)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 08ac7815960bb9fc56701f307729144a3d0c94f2
https://github.com/llvm/llvm-project/commit/08ac7815960bb9fc56701f307729144a3d0c94f2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang][NFC] Fix linting warnings after #125556
Commit: 7b787965431e666858fdf66db25ee5a129833927
https://github.com/llvm/llvm-project/commit/7b787965431e666858fdf66db25ee5a129833927
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeDepthwise.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaReduceTransposes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaTypeConverters.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/UB/IR/UBOps.cpp
M mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (25/n) (#149932)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 0c14f0e891ad88b9bb4666ef337466961b27314f
https://github.com/llvm/llvm-project/commit/0c14f0e891ad88b9bb4666ef337466961b27314f
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/test/CodeGen/DirectX/UAddc.ll
A llvm/test/Transforms/Scalarizer/extractvalue-struct-of-vectors.ll
Log Message:
-----------
[Scalarizer] Use correct key for ExtractValueInst gather (#149855)
Fixes #149345
Effectively no-op pairs of insertelement-extractelement instructions
were being created due to the ExtractValueInst visitor in the Scalarizer
storing its scalarized result into the Scattered map using an incorrect
key (specifically the type used in the key).
This PR fixes this issue.
Commit: 24bf4aea0ca31c4733d8771751f7fb766c455aa9
https://github.com/llvm/llvm-project/commit/24bf4aea0ca31c4733d8771751f7fb766c455aa9
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/interrupt-attr.ll
M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
M llvm/test/CodeGen/RISCV/rvv/interrupt-attr-nocall.ll
Log Message:
-----------
[RISCV][llvm] Handle vector callee saved register correctly (#149467)
In TargetFrameLowering::determineCalleeSaves, any vector register is
marked
as saved if any of its subregister is clobbered, this is not correct in
vector registers. We only want the vector register to be marked as saved
only if all of its subregisters are clobbered.
This patch handles vector callee saved registers in target hook.
Commit: 6df012ab48ececd27359bdc9448ee101b39eea7a
https://github.com/llvm/llvm-project/commit/6df012ab48ececd27359bdc9448ee101b39eea7a
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachinePipeliner.cpp
A llvm/test/CodeGen/Hexagon/swp-load-to-store-forward.mir
Log Message:
-----------
[MachinePipeliner] Fix incorrect dependency direction (#149436)
This patch fixes a bug introduced in #145878. A dependency was added in
the wrong direction, causing an assertion failure due to broken
topological order.
Commit: 6f240d5a7d22e4c9b4adc6a1508ff83efd461050
https://github.com/llvm/llvm-project/commit/6f240d5a7d22e4c9b4adc6a1508ff83efd461050
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
Log Message:
-----------
[LV][EVL] Remove interleave count from the test case for EVL tail-folding. nfc (#149834)
Remove the interleave count since we have not supported it when EVL
tail-folding.
Commit: 675236913974293e838c38b7ef801285c6c2f1fd
https://github.com/llvm/llvm-project/commit/675236913974293e838c38b7ef801285c6c2f1fd
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Unify interleaved load handling for fixed and scalable VFs. nfc (#146914)
This patch modifies VPInterleaveRecipe::execute to handle both fixed and
scalable VFs using a single loop.
Commit: fcdcc4ea7ac960c79246b3bd428f14ea350e63e2
https://github.com/llvm/llvm-project/commit/fcdcc4ea7ac960c79246b3bd428f14ea350e63e2
Author: Fabio D'Urso <fdurso at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
Log Message:
-----------
[scudo] Make Ptr volatile so that the malloc and free calls are not optimized out (#149944)
This fixes the test failure seen in the discussion about
https://github.com/llvm/llvm-project/pull/148066.
Commit: 4d48996ff05305d4a5774f3e232c2ee4a06c3d2a
https://github.com/llvm/llvm-project/commit/4d48996ff05305d4a5774f3e232c2ee4a06c3d2a
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.h
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/unittests/Format/BracesInserterTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestSelective.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format][NFC] Clean up around StringRef initializations (#149765)
Consistently use `constexpr StringRef Code("string literal");`.
Commit: 9ed8816dc63776259d2190bdc8a7a29698c62749
https://github.com/llvm/llvm-project/commit/9ed8816dc63776259d2190bdc8a7a29698c62749
Author: mintsuki <36459316+mintsuki at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/test/CodeGen/LoongArch/target-abi-from-triple-edge-cases.ll
Log Message:
-----------
LoongArch: Improve detection of valid TripleABI (#147952)
If the environment is considered to be the triple component as a whole,
so, including the object format, if any, and if that is the intended
behaviour, then the loongarch64 function `computeTargetABI()` should be
changed to not rely on `hasEnvironment()`, but, rather, to check if
there is a non-unknown environment set.
Without this change, using a (ideally valid) target of
loongarch64-unknown-none-elf, with a manually specified ABI of lp64s,
will result in a completely superfluous warning:
```
warning: triple-implied ABI conflicts with provided target-abi 'lp64s', using target-abi
```
Commit: 739e76454f7bcee0cffb2f86221080f92b64a5f1
https://github.com/llvm/llvm-project/commit/739e76454f7bcee0cffb2f86221080f92b64a5f1
Author: Owen Pan <owenpiano at gmail.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M clang/docs/ClangFormatStyleOptions.rst
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
Log Message:
-----------
[Tooling][Inclusions][NFC] Reformat C++ code
Commit: 8b9e7602714a2651e5540a4322907738997f1775
https://github.com/llvm/llvm-project/commit/8b9e7602714a2651e5540a4322907738997f1775
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Don't use RVInstIBase for P-ext plui/pli. NFC (#149940)
These instructions don't have an rs1 field unlike other instructions
that use RVInstIBase.
Rename the classes to not use Unary since we have historically used that
for a single register operand.
Commit: cae7650558080b858788af1b8cd940d47673893b
https://github.com/llvm/llvm-project/commit/cae7650558080b858788af1b8cd940d47673893b
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
M llvm/test/CodeGen/LoongArch/llvm.exp10.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
Log Message:
-----------
[LoongArch] Optimize inserting fp element to vector (#149302)
Co-authored-by: tangaac <tangyan01 at loongson.cn>
Commit: b956f049b186fafafebc88b861982644ec3f5291
https://github.com/llvm/llvm-project/commit/b956f049b186fafafebc88b861982644ec3f5291
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
A mlir/test/Dialect/Linalg/vectorization/contraction-interface.mlir
Log Message:
-----------
[mlir][linalg] Vectorize directly to a named contraction (#147296)
Extends linalg vectorizer with a path to lower contraction ops directly
into `vector.contract`.
The direct rewriting preserves high-level op semantics and provides more
progressive lowering compared to reconstructing contraction back from
multi dimensional reduction.
The added lowering focuses on named linalg ops and leverages their well
defined semantics to avoid complex precondition verification.
The new path is optional and disabled by default to avoid changing the
default vectorizer behavior.
Commit: 03a170837e78e56e1876c681a4bf95957adc73fd
https://github.com/llvm/llvm-project/commit/03a170837e78e56e1876c681a4bf95957adc73fd
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array.pass.cpp
M libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
Log Message:
-----------
[libc++] Enable some tests on `android` (#149899)
Android compiler was updated to r563880:
https://github.com/llvm/llvm-project/pull/148998
Commit: 3408f7b42f7af7c38d8054067c7dcad82df99b2f
https://github.com/llvm/llvm-project/commit/3408f7b42f7af7c38d8054067c7dcad82df99b2f
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT] Guard llvm-bolt-wrapper logic of NFC-Mode behind a flag (#146209)
Buildbot (`BOLTBuilder`) no longer relies on a wrapper script to run
tests. This
patch guards the wrapper logic under a flag that is disabled by default.
This
it allows to:
- Eliminate the need for special handling in some tests.
- Fix the issue of a wrapper loop (described below)
- Simplify the NFC-Mode setup.
**Background:**
Previously, tests ran unconditionally, which also compiled any missing
utilities
and the unit tests.
The `nfc-check-setup.py` created:
- `llvm-bolt.new`, renamed from the current compilation
- `llvm-bolt.old`, built from the previous SHA
- `llvm-bolt`: a python wrapper pointing to `llvm-bolt.new`
Current behaviour and wrapper issue:
As before, the old/new binaries identify whether a patch affects BOLT.
If so,
`ninja check-bolt` builds missing dependencies and run tests,
overwriting the
`llvm-bolt` wrapper with a binary.
However, if Ninja reports:
```
ninja: no work to do.
```
the wrapper remains in place. If the next commit also does no work,
`nfc-check-setup.py` renames the existing wrapper to `llvm-bolt.new`,
causing an
infinite loop.
Allowing to disable the wrapper logic prevents this scenario and
simplifies the flow.
**Test plan:**
Creates llvm-bolt.new and llvm-bolt.old and stays on previous revision:
```
./nfc-check-setup.py build
```
Creates llvm-bolt.new and llvm-bolt.old and returns on current revision:
```
./nfc-check-setup.py build --switch-back
```
Creates llvm-bolt.new and llvm-bolt.old, returns on current revision,
and
creates a wrapper:
```
./nfc-check-setup.py build --switch-back --create-wrapper
```
Creates llvm-bolt.new and llvm-bolt.old, and passes an invalid argument
to the
wrapper:
```
./nfc-check-setup.py build --switch-back --create-wrapper --random-arg
```
Commit: 8e4e1c104d88e193d5977e0136509f8c76dde43e
https://github.com/llvm/llvm-project/commit/8e4e1c104d88e193d5977e0136509f8c76dde43e
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-21 (Mon, 21 Jul 2025)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Log Message:
-----------
MIPS: Stable sort relocations
There might be more than one relocations at an offset with composed
relocations or .reloc directive. llvm::sort output is unstable, and if
EXPENSIVE_CHECKS, also undeterministic, causing
MC/Mips/reloc-directive.s to fail.
Commit: 597f3c1bd5f9f940d6a62adfe053f28559ea0a72
https://github.com/llvm/llvm-project/commit/597f3c1bd5f9f940d6a62adfe053f28559ea0a72
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT] Improve exception handling in NFC-Mode (#146513)
This patch introduces the following improvements:
- Catch an exception when the CMakeCache.txt is not present
- Bail out gracefully when llvm-bolt did not build successfully the
current or previous revision.
- Always do a `--switch-back` even if building the old revision failed
Commit: d8adb57b440b8b502e3f308675699b7c26b8da86
https://github.com/llvm/llvm-project/commit/d8adb57b440b8b502e3f308675699b7c26b8da86
Author: Paschalis Mpeis <paschalis.mpeis at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M bolt/utils/nfc-check-setup.py
Log Message:
-----------
[BOLT][NFC] Update nfc-check-setup.py guidance (#146659)
Commit: 069f0fea00d3caf41fb9c3eaf81ee918c5c63a51
https://github.com/llvm/llvm-project/commit/069f0fea00d3caf41fb9c3eaf81ee918c5c63a51
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avg.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode - SSE PINSR/PEXTR vector element insert/extract are never out of bounds (#149822)
The immediate index is guaranteed to be treated as modulo
Commit: d87bf79a236f25bccebca9ceaff7fb51399df052
https://github.com/llvm/llvm-project/commit/d87bf79a236f25bccebca9ceaff7fb51399df052
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr149841.ll
Log Message:
-----------
[X86] isGuaranteedNotToBeUndefOrPoisonForTargetNode - X86ISD::GlobalBaseReg and X86ISD::Wrapper/WrapperRIP nodes are never poison (#149854)
Fixes #149841
Commit: d2a7f4e528c9a8a2ac480c13259bd6050f59d4a7
https://github.com/llvm/llvm-project/commit/d2a7f4e528c9a8a2ac480c13259bd6050f59d4a7
Author: Mel Chen <mel.chen at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
R llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse-output.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
A llvm/test/Transforms/LoopVectorize/RISCV/vplan-riscv-vector-reverse.ll
Log Message:
-----------
[NFC][LV] Refine the lit test case riscv-vector-reverse.ll (#149020)
This patch includes the following changes:
1. Merge riscv-vector-reverse-output.ll into riscv-vector-reverse.ll,
and only check the generated LLVM IR.
2. Add vplan-riscv-vector-reverse.ll to preserve the original debug
output checks from riscv-vector-reverse.ll.
Commit: 95201b2b6445e49cf9b470fe93d62e9b3f6efed5
https://github.com/llvm/llvm-project/commit/95201b2b6445e49cf9b470fe93d62e9b3f6efed5
Author: David Green <david.green at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
A llvm/test/CodeGen/AArch64/bsp_implicit_ops.mir
Log Message:
-----------
[AArch64] Ensure we transferImpOps on BSP pseudo expansions. (#149456)
This ensures that we transfer implicit operands to the new expanded
pseudos if necessary, similarly to other pseudo expansions.
Commit: eafe31b293a5166522fff4f3e2d88c2b5c881381
https://github.com/llvm/llvm-project/commit/eafe31b293a5166522fff4f3e2d88c2b5c881381
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-vmerge-to-vmv.ll
Log Message:
-----------
[RISCV] Don't lose elements from False in vmerge -> vmv peephole (#149720)
In the vmerge peephole, we currently allow different AVLs for the vmerge
and its true operand.
If vmerge's VL > true's VL, vmerge can "preserve" elements from false
that would otherwise be clobbered with a tail agnostic policy on true.
mask 1 1 1 1 0 0 0 0
true x x x x|. . . . AVL=4
vmerge x x x x f f|. . AVL=6
If we convert this to vmv.v.v we will lose those false elements:
mask 1 1 1 1 0 0 0 0
true x x x x|. . . . AVL=4
vmv.v.v x x x x . .|. . AVL=6
Fix this by checking that vmerge's AVL is <= true's AVL.
Should fix #149335
Commit: e644f5fd9e9b0dfdbf02357260908160d23c5b28
https://github.com/llvm/llvm-project/commit/e644f5fd9e9b0dfdbf02357260908160d23c5b28
Author: Timothy Herchen <timothy.herchen at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/prefetchi-error.c
Log Message:
-----------
[clang] [Sema] Check argument range for prefetchi* intrinsics (#149745)
Fixes https://github.com/llvm/llvm-project/issues/144857 . I can create
a test if desired, but I think the fix is trivial enough.
<img width="805" height="105" alt="image"
src="https://github.com/user-attachments/assets/aaee8e5f-6e65-4f04-b8b9-e4ae1434d958"
/>
Commit: f20130a8d494b94d0842cd165e9b7a83ef3aee4a
https://github.com/llvm/llvm-project/commit/f20130a8d494b94d0842cd165e9b7a83ef3aee4a
Author: gulfemsavrun <gulfem at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
Log Message:
-----------
[Fuchsia] Don't use LLVM build for PGO data (#149788)
Commit: 314ce691df0d699234c871a1772470b5e4aed892
https://github.com/llvm/llvm-project/commit/314ce691df0d699234c871a1772470b5e4aed892
Author: Pete Chou <petechou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
Log Message:
-----------
[GlobalISel] Allow Legalizer to lower volatile memcpy family. (#145997)
This change updates legalizer to allow lowering volatile memcpy family
as a target might rely on lowering to legalize them.
Commit: 307256ecbd858bc2df5fa9342c67a8205691ade9
https://github.com/llvm/llvm-project/commit/307256ecbd858bc2df5fa9342c67a8205691ade9
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/GVNSink/lifetime.ll
Log Message:
-----------
[GVNSink] Do not sink lifetimes of different allocas (#149818)
This was always undesirable, and after #149310 it is illegal and will
result in a verifier error.
Fix this by moving SimplifyCFG's check for this into
canReplaceOperandWithVariable(), so it's shared with GVNSink.
Commit: a7a1df8f72ac6e3a68ec53584107be6542d6666b
https://github.com/llvm/llvm-project/commit/a7a1df8f72ac6e3a68ec53584107be6542d6666b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Log Message:
-----------
[CodeGen] Remove handling for lifetime.start/end on non-alloca (#149838)
After https://github.com/llvm/llvm-project/pull/149310 we are guaranteed
that the argument is an alloca, so we don't need to look at underlying
objects (which was not a correct thing to do anyway).
This also drops the offset argument for lifetime nodes in SDAG. The
offset is fixed to zero now. (Peculiarly, while SDAG pretended to have
an offset, it just gets silently dropped during selection.)
Commit: 34f59d79209268eca9c63ccc7646128f2dc52fe3
https://github.com/llvm/llvm-project/commit/34f59d79209268eca9c63ccc7646128f2dc52fe3
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/ARM.cpp
M clang/test/Preprocessor/arm-acle-6.4.c
Log Message:
-----------
[Clang][ARM] Fix __ARM_FEATURE_LDREX on Armv8-M (#149538)
The Armv8-M architecture doesn't have the LDREXD and STREXD
instructions, for exclusive load/store of a 64-bit quantity split across
two registers. But the `__ARM_FEATURE_LDREX` macro was set to a value
that claims it does, because the case for Armv8 was missing a check for
M profile.
The Armv7 case got it right, so I've just made the two cases the same.
Commit: 8c14d3f44f51be053e91612f4ad2d77bf04b6b3a
https://github.com/llvm/llvm-project/commit/8c14d3f44f51be053e91612f4ad2d77bf04b6b3a
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
Log Message:
-----------
[MISched] Use SchedRegion in overrideSchedPolicy and overridePostRASchedPolicy (#149297)
This patch updates `overrideSchedPolicy` and `overridePostRASchedPolicy`
to take a
`SchedRegion` parameter instead of just `NumRegionInstrs`. This provides
access to both the
instruction range and the parent `MachineBasicBlock`, which enables
looking up function-level
attributes.
With this change, targets can select post-RA scheduling direction per
function using a function
attribute. For example:
```cpp
void overridePostRASchedPolicy(MachineSchedPolicy &Policy,
const SchedRegion &Region) const {
const Function &F = Region.RegionBegin->getMF()->getFunction();
Attribute Attr = F.getFnAttribute("amdgpu-post-ra-direction");
...
}
Commit: 07527596f3dc5f7180cfee79f217cf784b43f059
https://github.com/llvm/llvm-project/commit/07527596f3dc5f7180cfee79f217cf784b43f059
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Support store merge with non-consecutive parts (#149807)
This is a minor extension of #147540, resolving one of the FIXMEs. If
the collected parts contain some non-consecutive elements, we can still
handle smaller ranges that *are* consecutive.
This is not common in practice and mostly shows up when the same value
is stored at two different offsets.
Commit: ddf34b4c97f9b047827379329118d485072f1cdf
https://github.com/llvm/llvm-project/commit/ddf34b4c97f9b047827379329118d485072f1cdf
Author: ZhaoQi <zhaoqi01 at loongson.cn>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lasx/fpowi.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
M llvm/test/CodeGen/LoongArch/llvm.exp10.ll
M llvm/test/CodeGen/LoongArch/llvm.sincos.ll
M llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
M llvm/test/CodeGen/LoongArch/lsx/fpowi.ll
Log Message:
-----------
[LoongArch] Optimize general fp build_vector lowering (#149486)
Commit: cb8b0cd2cfbe817253f2679df53dd7926a7e1894
https://github.com/llvm/llvm-project/commit/cb8b0cd2cfbe817253f2679df53dd7926a7e1894
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
Log Message:
-----------
[LV] Precommit test changes for #148686. NFC
Namely explicitly adding -force-tail-folding-style=data to existing RUN
lines so that we don't lose them when we switch to data-with-evl by
default.
Commit: 03b90486daf9473de266161f3910e13a92ed15b8
https://github.com/llvm/llvm-project/commit/03b90486daf9473de266161f3910e13a92ed15b8
Author: Sam Parker <sam.parker at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A llvm/test/CodeGen/WebAssembly/memory-interleave.ll
Log Message:
-----------
[WebAssembly] Memory interleave test (#149045)
Precommit codegen test for vectorization cost modelling.
Commit: 81651e9fd0a744423fc0435f199ef79fb3a91f02
https://github.com/llvm/llvm-project/commit/81651e9fd0a744423fc0435f199ef79fb3a91f02
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/test/Driver/baremetal.cpp
Log Message:
-----------
Remove extraneous addition of `-X` flag in baremetal toolchain (#148855)
Commit 597ee88 moved the -X flag to a new position in the baremetal
toolchain's linker job, but unintentionally left the original instance in place.
This patch removes the redundant flag, ensuring -X is passed only once.
Commit: 73b85f87e4771d04e02912a8c2f39ab67910a04d
https://github.com/llvm/llvm-project/commit/73b85f87e4771d04e02912a8c2f39ab67910a04d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
R mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp
A mlir/test/Dialect/Vector/CPU/ArmSVE/vector-bfmmla.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Lower `vector.contract` to SVE FEAT_BF16 operations (#147052)
This patch adds lowering of Bfloat16 widening matrix multiply and
accumulate `vector.contract`, by parametrising and refactoring the
pattern for 8-bit integers.
Commit: 3e7433d75a0c03a84e6b1c8e5e5eda347d72a8ff
https://github.com/llvm/llvm-project/commit/3e7433d75a0c03a84e6b1c8e5e5eda347d72a8ff
Author: fabrizio-indirli <fabrizio.indirli at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
Log Message:
-----------
[mlir][linalg] Fix to Elementwise Fusion when preserving results (#149843)
In the linalg ElementwiseOpFusion transform, a pre-requisite for the
fusion between a producer and consumer op is that the producer's output
indexing map associated to the result to be fused must be invertible
(e.g. a simple permutation).
Before this patch, only the first output indexing map was being checked;
this bug produced issues when the operand to fuse was not the 1st result
of the producer op. For example, this situation arises when the producer
op has multiple results because it's the result of previous fusions
where the original result had been preserved: in these cases, the pass
ought to check the indexing map of the result being fused, which is not
necessarily the 1st one.
Signed-off-by: Fabrizio Indirli <Fabrizio.Indirli at arm.com>
Commit: 4b0625f05114af908283b4bc78321babfc03e252
https://github.com/llvm/llvm-project/commit/4b0625f05114af908283b4bc78321babfc03e252
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] isNonZeroModBitWidthOrUndef - fix bugprone-argument-comment analyzer warning. NFC.
matchUnaryPredicate argument is AllowUndefs not AllowUndef
Commit: b487f9a7bd15e453a3ff7fcbfbc54e54eecf26d3
https://github.com/llvm/llvm-project/commit/b487f9a7bd15e453a3ff7fcbfbc54e54eecf26d3
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct02.f90
A flang/test/Lower/OpenMP/unroll-heuristic01.f90
A flang/test/Lower/OpenMP/unroll-heuristic02.f90
A flang/test/Parser/OpenMP/unroll-heuristic.f90
A flang/test/Parser/OpenMP/unroll-partial.f90
R flang/test/Parser/OpenMP/unroll.f90
Log Message:
-----------
[Flang] Implement !$omp unroll using omp.unroll_heuristic (#144785)
Add support for `!$omp unroll` in Flang and basic MLIR
`omp.canonical_loop` modeling.
First step to add `omp.canonical_loop` modeling to the MLIR OpenMP
dialect with the goal of being more general than the current
`omp.loop_nest` approach:
* Support for non-perfectly nested loops
* Support for non-rectangular loops
* Support for arbitrary compositions of loop transformations
This patch is functional end-to-end and adds support for `!$omp unroll`
to Flang. `!$omp unroll` is lowered to `omp.new_cli`,
`omp.canonical_loop`, and `omp.unroll_heuristic` in MLIR, which are
lowered to LLVM-IR using the OpenMPIRBuilder
(https://reviews.llvm.org/D107764).
Commit: 579a80784d43f4c21ac4ee2df221ba4f3b98fd70
https://github.com/llvm/llvm-project/commit/579a80784d43f4c21ac4ee2df221ba4f3b98fd70
Author: Victor Campos <victor.campos at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
[Clang][Driver][ARM] Forward `-Os` and `-Oz` as multilib flags (#149819)
Pass along `-Os` and `-Oz` as multilib flags under ARM and AArch64 so
that they can be used as criteria for multilib selection.
Commit: 9fc7c6cbd2e2f5c67b2572aa6ca636f8dfad1cb3
https://github.com/llvm/llvm-project/commit/9fc7c6cbd2e2f5c67b2572aa6ca636f8dfad1cb3
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
Log Message:
-----------
[AArch64] Allow splitting bitmasks for ANDS. (#149095)
This is already done for AND; we can reuse the existing infrastructure
for ANDS so long as the second instruction of the pair is ANDS.
Commit: c14c0a195c11cad1106c0d7457ef2bc83095f5da
https://github.com/llvm/llvm-project/commit/c14c0a195c11cad1106c0d7457ef2bc83095f5da
Author: Remy Farley <one-d-wide at protonmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/docs/TestingGuide.rst
Log Message:
-----------
[lit][docs] Mention LIT_OPTS instead of LIT_ARGS (#147494)
Noticed that the current
[docs](https://llvm.org/docs/TestingGuide.html#unit-and-regression-tests)
recommend using LIT_ARGS (config option in cmake script), rather than
LIT_OPTS (environment variable interpreted by lit directly). While
LIT_ARGS doesn't do anything at all when set with make, at least not in
a way outlined in the docs.
Commit: 688ea048affe8e79221ea1a8c376bcf20ef8f3bb
https://github.com/llvm/llvm-project/commit/688ea048affe8e79221ea1a8c376bcf20ef8f3bb
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Revamp test suite using unittests (#149158)
Refactor the Lifetime Safety Analysis infrastructure to support unit testing.
- Created a public API class `LifetimeSafetyAnalysis` that encapsulates the analysis functionality
- Added support for test points via a special `TestPointFact` that can be used to mark specific program points
- Added unit tests that verify loan propagation in various code patterns
Commit: 87d73ff7fdc8fa7acdc2137654f4c4d8b051c423
https://github.com/llvm/llvm-project/commit/87d73ff7fdc8fa7acdc2137654f4c4d8b051c423
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
Log Message:
-----------
[Flang] Regenerate unroll test
Commit: c51b48be4785f104f3aff2ba4a839a5f54778c5b
https://github.com/llvm/llvm-project/commit/c51b48be4785f104f3aff2ba4a839a5f54778c5b
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
Log Message:
-----------
[AMDGPU] Recognise bitmask operations as srcmods on integer types (#149110)
Add to the VOP patterns to recognise when or/xor/and are masking only
the most significant bit of i32/v2i32/i64 and replace with the appropriate source modifier.
Commit: b3e016e05f1d21428298760db82b26fd0266f8bb
https://github.com/llvm/llvm-project/commit/b3e016e05f1d21428298760db82b26fd0266f8bb
Author: Chris Jackson <chris.jackson at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
R llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/saddsat.ll
M llvm/test/CodeGen/AMDGPU/ssubsat.ll
Log Message:
-----------
Revert "[AMDGPU] Recognise bitmask operations as srcmods" (#150000)
Reverts llvm/llvm-project#149110 due to various buildbot failures.
Commit: 020856eec528975cf472b35bf2a7cf38809bf34e
https://github.com/llvm/llvm-project/commit/020856eec528975cf472b35bf2a7cf38809bf34e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][vector][spirv] Fix a crash in `VectorLoadOpConverter` (#149964)
This PR adds null check for `spirvVectorType` in VectorLoadOpConverter
to prevent a crash. Fixes #149956.
Commit: 7d9f913bb4164b8aaecfc17accebd44044592115
https://github.com/llvm/llvm-project/commit/7d9f913bb4164b8aaecfc17accebd44044592115
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
Update comment on getCustomDiagID; NFC
These APIs should almost never be used in Clang, so documenting that
more clearly. The problem is that the diagnostics are never associated
with a diagnostic group, so users have no way to control warning
behavior associated with the diagnostic. That makes for a poor user
experience. Instead, use a real diagnostic whenever possible or the API
taking a CustomDiagDesc as a last resort.
Commit: f78c4ce55bc4c47625d0e780f38522938920e329
https://github.com/llvm/llvm-project/commit/f78c4ce55bc4c47625d0e780f38522938920e329
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlAtomic.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/atomic/TestDataFormatterStdAtomic.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::atomic (#149801)
Adds synthetic children and a summary provider for `std::atomic` on
MSVC's STL. This currently only supports DWARF because it relies on the
template argument. Once there are PDB tests, this will probably use the
return type of some method like `value()` because template types aren't
available there.
Towards #24834.
Commit: a807e8ea9f6ecf151e2ccc84af05431e54be8dda
https://github.com/llvm/llvm-project/commit/a807e8ea9f6ecf151e2ccc84af05431e54be8dda
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/StaticAnalyzer/Frontend/CheckerRegistry.h
M clang/lib/Analysis/plugins/CheckerDependencyHandling/CheckerDependencyHandling.cpp
M clang/lib/Analysis/plugins/CheckerOptionHandling/CheckerOptionHandling.cpp
M clang/lib/Analysis/plugins/SampleAnalyzer/MainCallChecker.cpp
M clang/unittests/StaticAnalyzer/BlockEntranceCallbackTest.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/ConflictingEvalCallsTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
M clang/unittests/StaticAnalyzer/MemRegionDescriptiveNameTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/ObjcBug-124477.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
M clang/unittests/StaticAnalyzer/SValSimplifyerTest.cpp
M clang/unittests/StaticAnalyzer/SValTest.cpp
M clang/unittests/StaticAnalyzer/TestReturnValueUnderConstruction.cpp
Log Message:
-----------
[analyzer] Prettify checker registration and unittest code (#147797)
This commit tweaks the interface of `CheckerRegistry::addChecker` to
make it more practical for plugins and tests:
- The parameter `IsHidden` now defaults to `false` even in the
non-templated overload (because setting it to true is unusual,
especially in plugins).
- The parameter `DocsUri` defaults to the dummy placeholder string
`"NoDocsUri"` because (as of now) nothing queries its value from the
checker registry (it's only used by the logic that generates the
clang-tidy documentation, but that loads it directly from `Checkers.td`
without involving the `CheckerRegistry`), so there is no reason to
demand specifying this value.
In addition to propagating these changes, this commit clarifies,
corrects and extends lots of comments and performs various minor code
quality improvements in the code of unit tests and example plugins.
I originally wrote the bulk of this commit when I was planning to add an
extra parameter to `addChecker` in order to implement some technical
details of the CheckerFamily framework. At the end I decided against
adding that extra parameter, so this cleanup was left out of the PR
https://github.com/llvm/llvm-project/pull/139256 and I'm merging it now
as a separate commit (after minor tweaks).
This commit is mostly NFC: the only functional change is that the
analyzer will be compatible with plugins that rely on the default
argument values and don't specify `IsHidden` or `DocsUri`. (But existing
plugin code will remain valid as well.)
Commit: e96230607cad9d30670ce55ef1cb9dd3fe1e21d7
https://github.com/llvm/llvm-project/commit/e96230607cad9d30670ce55ef1cb9dd3fe1e21d7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/AST/TextNodeDumper.cpp
M clang/test/AST/ast-dump-APValue-lvalue.cpp
Log Message:
-----------
[clang] Fix printing null MemberPointer APValues (#149995)
The decl can be null and this used to crash.
Commit: d54400559bb6181566030d5f99c6716ea2b2f0a9
https://github.com/llvm/llvm-project/commit/d54400559bb6181566030d5f99c6716ea2b2f0a9
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/main.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb-dap] Allow returning multiple breakpoints in "stopped" event (#149133)
Currently, the "stopped" event returned when a breakpoint is hit will
always return only the ID of first breakpoint returned from
`GetStopReasonDataAtIndex`. This is slightly different from the
behaviour in `lldb`, where multiple breakpoints can exist at a single
instruction address and all are returned as part of the stop reason when
that address is hit.
This patch allows all multiple hit breakpoints to be returned in the
"stopped" event, both in the hitBreakpointIds field and in the
description, using the same formatting as lldb e.g. "breakpoint 1.1
2.1". I'm not aware of any effect this will have on debugger plugins; as
far as I can tell, it makes no difference within the VS Code UI - this
just fixes a minor issue encountered while writing an `lldb-dap` backend
for Dexter.
Commit: 54b50681ca0fd1c0c6ddb059c88981a45e2f1b19
https://github.com/llvm/llvm-project/commit/54b50681ca0fd1c0c6ddb059c88981a45e2f1b19
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
R clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
Revert "[LifetimeSafety] Revamp test suite using unittests (#149158)"
This reverts commit 688ea048affe8e79221ea1a8c376bcf20ef8f3bb.
Commit: da06b45d27f70485857dae6a1298350045dc25bd
https://github.com/llvm/llvm-project/commit/da06b45d27f70485857dae6a1298350045dc25bd
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaRISCV.h
M clang/include/clang/Sema/SemaX86.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
Log Message:
-----------
[NFC][Clang][FMV] Refactor sema checking of target_version/clones attributes. (#149067)
Sema currently has checkTargetVersionAttr and
checkTargetClonesAttrString to diagnose the said attributes. However the
code tries to handle all of AArch64, RISC-V and X86 targets at once
which is hard to maintain, therefore I am splitting these functions.
Unfortunately I could not use polymorphism because all of Sema, SemaARM,
SemaRISCV and SemaX86 inherit from SemaBase. The Sema instance itself
contains instances of every other target specific Sema.
Commit: 37f0f10a857dad83dce225408fbd3c269b15bede
https://github.com/llvm/llvm-project/commit/37f0f10a857dad83dce225408fbd3c269b15bede
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
A llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product-epilogue.ll
R llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-no-remaining-iterations.ll
Log Message:
-----------
[LV] Don't vectorize epilogue with scalable VF if no iterations remain. (#149789)
Currently we may try to vectorize the epilogue with a scalable VF, even
if there are no remaining iterations after the main vector loop with a
fixed VF.
Update selectEpilogueVectorizationFactor to always compute the number of
remaining iterations and exit early if no epilogue iterations remain.
Fixes https://github.com/llvm/llvm-project/issues/149726
PR: https://github.com/llvm/llvm-project/pull/149789
Commit: 972ac59c9af4ad47af0b3542ae936b3470727e5f
https://github.com/llvm/llvm-project/commit/972ac59c9af4ad47af0b3542ae936b3470727e5f
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorInterfaces.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseBufferRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseIterationToScf.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseSpaceCollapse.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseStorageSpecifierToLLVM.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/StageSparseOperations.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorDescriptor.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorIterator.cpp
M mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (21/n) (#149928)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: f904cdd6c3049e605d24ed17680e80e7133908a0
https://github.com/llvm/llvm-project/commit/f904cdd6c3049e605d24ed17680e80e7133908a0
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBitCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorGather.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMask.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorShapeCast.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateMaskedLoadStore.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorEmulateNarrowType.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorInsertExtractStridedSliceRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorMaskElimination.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (24/n) (#149931)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 4ae9fdca8af095afd91705f8dd143e93b304b6fb
https://github.com/llvm/llvm-project/commit/4ae9fdca8af095afd91705f8dd143e93b304b6fb
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/IndexToLLVM/IndexToLLVM.cpp
M mlir/lib/Conversion/IndexToSPIRV/IndexToSPIRV.cpp
M mlir/lib/Conversion/LLVMCommon/MemRefBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/Pattern.cpp
M mlir/lib/Conversion/LLVMCommon/PrintCallHelper.cpp
M mlir/lib/Conversion/LLVMCommon/StructBuilder.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/LLVMCommon/VectorPattern.cpp
M mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp
M mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/lib/Conversion/MathToLibm/MathToLibm.cpp
M mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/MeshToMPI/MeshToMPI.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/OpenACCToSCF/OpenACCToSCF.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (6/n) (#149888)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: a5d9ba66258e452e4658281bbbd07a2214d4dc51
https://github.com/llvm/llvm-project/commit/a5d9ba66258e452e4658281bbbd07a2214d4dc51
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
Log Message:
-----------
[clang][bytecode] Error on bitcasts to bool that aren't 0 or 1 (#149996)
This is also what the current interpreter does.
Commit: 76ab6a2a76cbd547a354ff51229ab45934c6cfff
https://github.com/llvm/llvm-project/commit/76ab6a2a76cbd547a354ff51229ab45934c6cfff
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port f78c4ce55bc4
Commit: 28ca5bedd54679a62e96c013a530b2550c0d33f4
https://github.com/llvm/llvm-project/commit/28ca5bedd54679a62e96c013a530b2550c0d33f4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang-c/Index.h
Log Message:
-----------
[clang-c] Don't deprecate CXRemapping as well as its users (#149975)
#149079 deprecated CXRemapping and all its methods, however MSVC warns
when a deprecated method is using a deprecated variable (and breaks our
Werror builds) - best way to avoid this is to only deprecate the methods
directly.
Commit: b692b239f037ebdc5a4501884a7f57a19afa33fd
https://github.com/llvm/llvm-project/commit/b692b239f037ebdc5a4501884a7f57a19afa33fd
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Rename var used to retry with RT-checks (NFC) (#147307)
FoundNonConstantDistanceDependence is a misleading name for a variable
that determines whether we retry with runtime checks. Rename it.
Commit: 2914a488c7f49c4817bbfb86f74da04fd338b4eb
https://github.com/llvm/llvm-project/commit/2914a488c7f49c4817bbfb86f74da04fd338b4eb
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Lower/OpenMP/map-modifiers.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
A flang/test/Semantics/OpenMP/map-modifiers-v60.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
Log Message:
-----------
[flang][OpenMP] Sema checks, lowering with new format of MAP modifiers (#149137)
OpenMP 6.0 has changed the modifiers on the MAP clause. Previous patch
has introduced parsing support for them. This patch introduces
processing of the new forms in semantic checks and in lowering. This
only applies to existing modifiers, which were updated in the 6.0 spec.
Any of the newly introduced modifiers (SELF and REF) are ignored.
Commit: 2736fbd8324bf21a130c8abd4bd0e7d3aa840ac1
https://github.com/llvm/llvm-project/commit/2736fbd8324bf21a130c8abd4bd0e7d3aa840ac1
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/IR/BuiltinDialect.cpp
M mlir/lib/Query/Query.cpp
M mlir/lib/Target/LLVMIR/LLVMImportInterface.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp
M mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
M mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/lib` create APIs (26/n) (#149933)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
---------
Co-authored-by: Tobias Gysi <tobias.gysi at nextsilicon.com>
Commit: 7cfd32a1d5f3bee1de58129eecac51e074d19dad
https://github.com/llvm/llvm-project/commit/7cfd32a1d5f3bee1de58129eecac51e074d19dad
Author: Zack Johnson <zacklj89 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt][MSVC] Conditionally remove emupac.cpp for msvc (#149823)
#148094 introduces logic for emulated PAC, which utilizes language
extensions not available on MSVC.
Commit: 38318dd05615a2f38abdeeae99e7423165308902
https://github.com/llvm/llvm-project/commit/38318dd05615a2f38abdeeae99e7423165308902
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)
In preparation to eventually make EVL tail folding the default, this
patch sets DataWithEVL as the preferred tail folding style for RISC-V,
but doesn't enable tail folding by default.
And although tail folding isn't enabled by default, the loop vectorizer
will actually tail fold loops with a small trip count, so this will
cause some EVL vectorized loops to be generated in the default
configuration.
The EVL tail folding work is still not complete, e.g. we still need to
handle interleave groups etc., see #123069, but a lot of these missing
features also apply to the data (masked) tail folding strategy, which is
the default anyway.
The actual overall performance picture is much better, on TSVC EVL tail
folding is faster than data on every benchmark on the spacemit-x60[^1]:
https://lnt.lukelau.me/db_default/v4/nts/755?compare_to=756
And on SPEC CPU 2017 we see a geomean improvement[^2]:
https://lnt.lukelau.me/db_default/v4/nts/751?compare_to=753
This is likely due to masked instructions generally being less
performant on the spacemit-x60, up to twice as slow:
https://camel-cdr.github.io/rvv-bench-results/bpi_f3/index.html
[^1]: These benchmarks don't exactly give the same performance numbers
as this patch, but it's a good indicator that EVL tail folding is
generally faster than masked tail folding.
[^2]: The large code size increase in 505.mcf_r is due to a function
being inlined now
Commit: 287b9447cc128d2218d148062d545a8633e37a4b
https://github.com/llvm/llvm-project/commit/287b9447cc128d2218d148062d545a8633e37a4b
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlUnordered.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL unordered containers (#149519)
Adds formatters for MSVC STL's unordered containers. This one is
relatively simple, because it can reuse the `std::list` synthetic
children. The unordered containers (aka
[`_Hash`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xhash#L327))
contain a
[`_List`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xhash#L2012)
which contains all elements (and is used for iterating through the
container).
Towards https://github.com/llvm/llvm-project/issues/24834.
Commit: 33df8882172dc3eb06db9846250de03dd3f7fff3
https://github.com/llvm/llvm-project/commit/33df8882172dc3eb06db9846250de03dd3f7fff3
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Teach RISCVTargetLowering::isFPImmLegal about fli+fneg (#149075)
There was a mismatch between isFPImmlegal and the cases that are handled
by lowerConstantFP. isFPImmLegal didn't check for the case where we
support `fli` of a negated constant (and so can lower to fli+fneg). This
has very minimal impact (42 insertion, 47 deletions across an
rv22u64_zfa llvm-test-suite build including SPEC CPU 2017) but is added
here for completeness.
See the PR thread https://github.com/llvm/llvm-project/pull/149075 for furrther discussion about the degree to which isFPImmLegal and lowerConstantFP are consistent. We ultimately agreed it makes sense to add fli+fneg, but there may be other future cases where it doesn't make sense to match.
Commit: 30d3bb598f3950b4b71830ff59624bcc7e408931
https://github.com/llvm/llvm-project/commit/30d3bb598f3950b4b71830ff59624bcc7e408931
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Tweak cmake formatting
No behavior change. For easier extraction of sources by grepping
(such as done by llvm/utils/gn/build/sync_source_lists_from_cmake.py).
Commit: a1bf0d1394e48894be05d274d3942ff77c35ce87
https://github.com/llvm/llvm-project/commit/a1bf0d1394e48894be05d274d3942ff77c35ce87
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port 287b9447cc12
Commit: 58be6226eb897f53185851283f25bd6d25ec74fa
https://github.com/llvm/llvm-project/commit/58be6226eb897f53185851283f25bd6d25ec74fa
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
Reapply "[LifetimeSafety] Revamp test suite using unittests (#149158)"
This reverts commit 54b50681ca0fd1c0c6ddb059c88981a45e2f1b19.
Commit: 0a8ddd396546bec7eaa4c3b7ef2f495e52bca0b8
https://github.com/llvm/llvm-project/commit/0a8ddd396546bec7eaa4c3b7ef2f495e52bca0b8
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Interpret boolean values correctly (#149312)
Previously the `ClampOp::verify` would sign extend boolean values,
leading "true" to be casted to a value of -1 instead of 1. This PR
ensures i1 values are zero extended, since i1 is used as a boolean value
in TOSA.
Commit: d8857d55d3a397ba047cbe9e8b11cecf3e1cedfd
https://github.com/llvm/llvm-project/commit/d8857d55d3a397ba047cbe9e8b11cecf3e1cedfd
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/error_if_check.mlir
Log Message:
-----------
[mlir][tosa] Check for isolated regions in `tosa.while_loop` (#144865)
Similarly to `tosa.cond_if`, this patch checks that the cond/body
regions of `tosa.while_loop` are isolated from above. This is required
since the specification requires all values used in the cond/body
regions are explicitly declared within the regions.
Commit: 33bfbacdcba2ec9f81162637a7cf15c13975af0b
https://github.com/llvm/llvm-project/commit/33bfbacdcba2ec9f81162637a7cf15c13975af0b
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 58be6226eb89
Commit: 04107209856bb39e041aa38cf40de0afa90a6b2d
https://github.com/llvm/llvm-project/commit/04107209856bb39e041aa38cf40de0afa90a6b2d
Author: Justus Klausecker <117751770+Justus2308 at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
A llvm/test/Transforms/LoopSimplifyCFG/enter-through-indirectbr.ll
Log Message:
-----------
[LoopSimplifyCFG] Add check for missing loop preheader (#149743)
Closes #147869
Closes #149679
Adds a check for a missing loop preheader during analysis. This fixes a
nullptr dereference that happened whenever LoopSimplify was unable to
generate a preheader because the loop was entered by an indirectbr
instruction (as stated in the LoopSimplify.cpp doc comment).
Commit: f7a3be7311c11871ae19b2fa370fd6a72532c8fe
https://github.com/llvm/llvm-project/commit/f7a3be7311c11871ae19b2fa370fd6a72532c8fe
Author: flovent <flbven at protonmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/infinite-loop.cpp
Log Message:
-----------
[clang-tidy] Improve `bugprone-infinite-loop` check by adding handing for structured bindings (#144213)
Before this patch, this check only handles `VarDecl` as varaibles
declaration in statement, but this will ignore variables in structured
bindings (`BindingDecl` in AST), which leads to false positives.
Closes #138842.
Commit: 3855c49f28d5ee4b32bf1478d0a50ca191bcf2b6
https://github.com/llvm/llvm-project/commit/3855c49f28d5ee4b32bf1478d0a50ca191bcf2b6
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP] Fix build break with -Werror
llvm-project/flang/lib/Semantics/resolve-directives.cpp:753:7: error: default label in switch which covers all enumeration values [-Werror,-Wcovered-switch-default]
753 | default:
| ^
1 error generated.
https://lab.llvm.org/buildbot/#/builders/53/builds/17917
Commit: dc87a14efb381d960c8fbf988221f31216d7f5fd
https://github.com/llvm/llvm-project/commit/dc87a14efb381d960c8fbf988221f31216d7f5fd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Fix sanitizer failure on DenseMap sentinel value enum
Summary:
This triggers UBSan because the sentinel value `-1` is outside the range
of accepted enum values. Just replace this with a small set.
Commit: b0312be6aa664e4cb9abec6d080e971493093d05
https://github.com/llvm/llvm-project/commit/b0312be6aa664e4cb9abec6d080e971493093d05
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/lib/Dialect/MLProgram/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/MPI/IR/MPIOps.cpp
M mlir/lib/Dialect/Math/IR/MathOps.cpp
M mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Math/Transforms/ExtendToSupportedTypes.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/NVGPU/Transforms/CreateAsyncGroups.cpp
M mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
M mlir/lib/Dialect/Quant/Transforms/LowerQuantOps.cpp
M mlir/lib/Dialect/Quant/Transforms/StripFuncQuantTypes.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (19/n) (#149926)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 6e723d2de85cd93d5a16230c20f5c79dc7b49c49
https://github.com/llvm/llvm-project/commit/6e723d2de85cd93d5a16230c20f5c79dc7b49c49
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
Log Message:
-----------
[VPlan] Remove loop region in simplifyBranchConditionForVFAndUF with EVL PHI (#150016)
Previously we fell back to just simplifying the branch cond to true
since one of the phis was a VPEVLBasedIVPHIRecipe. However this should
be fine to replace with its start value.
Commit: 023566ab389ceae8f02a2d86babe90f8ce3bd57b
https://github.com/llvm/llvm-project/commit/023566ab389ceae8f02a2d86babe90f8ce3bd57b
Author: lntue <lntue at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/hdr/types/CMakeLists.txt
Log Message:
-----------
[libc] Add missing full build dependency for mbstate. (#150030)
Commit: a415d68e48c4672c63082192626fec9bf9ae9c2c
https://github.com/llvm/llvm-project/commit/a415d68e48c4672c63082192626fec9bf9ae9c2c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
Revert "[SLP]Initial support for copyable elements (non-schedulable only)"
This reverts commit e202dba288edd47f1b370cc43aa8cd36a924e7c1 to try to
resolve compile time issues, reported in https://llvm-compile-time-tracker.com/compare.php?from=36089e5d983fe9ae00f497c2d500f37227f82db1&to=e202dba288edd47f1b370cc43aa8cd36a924e7c1&stat=instructions%3Au&details=on
Commit: eaa67a3cf041009ae33a45159d0465262c3af5dc
https://github.com/llvm/llvm-project/commit/eaa67a3cf041009ae33a45159d0465262c3af5dc
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ComplexCommon/DivisionConverter.cpp
M mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp
M mlir/lib/Conversion/ComplexToLibm/ComplexToLibm.cpp
M mlir/lib/Conversion/ComplexToROCDLLibraryCalls/ComplexToROCDLLibraryCalls.cpp
M mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
M mlir/lib/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.cpp
M mlir/lib/Conversion/ControlFlowToSCF/ControlFlowToSCF.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
M mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToLLVMSPV/GPUToLLVMSPV.cpp
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp
M mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRVPass.cpp
M mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (5/n) (#149887)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c37942df00e0065c432099e041a04c4d4d148c3d
https://github.com/llvm/llvm-project/commit/c37942df00e0065c432099e041a04c4d4d148c3d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/NVPTX/i1-select.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/SystemZ/pr60413.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/avg.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/freeze-vector.ll
M llvm/test/CodeGen/X86/setcc-non-simple-type.ll
Log Message:
-----------
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
This is a partial revert of #145939 (I've kept the BUILD_VECTOR(FREEZE(UNDEF), FREEZE(UNDEF), elt2, ...) canonicalization) as we're getting reports of infinite loops (#148084).
The issue appears to be due to deep chains of nodes and how visitFREEZE replaces all instances of an operand with a common frozen version - other users of the original frozen node then get added back to the worklist but might no longer be able to confirm a node isn't poison due to recursion depth limits on isGuaranteedNotToBeUndefOrPoison.
The issue still exists with the old implementation but by only allowing a single frozen operand it helps prevent cases of interdependent frozen nodes.
I'm still working on supporting multiple operands as its critical for topological DAG handling but need to get a fix in for trunk and 21.x.
Fixes #148084
Commit: 38976a03cd367b27437e0d1e81c0ccaee2777b47
https://github.com/llvm/llvm-project/commit/38976a03cd367b27437e0d1e81c0ccaee2777b47
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/ShapeToStandard/ConvertShapeConstraints.cpp
M mlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRV.cpp
M mlir/lib/Conversion/TosaToArith/TosaToArith.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Conversion/TosaToMLProgram/TosaToMLProgram.cpp
M mlir/lib/Conversion/TosaToSCF/TosaToSCF.cpp
M mlir/lib/Conversion/TosaToTensor/TosaToTensor.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (7/n) (#149889)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: a969bc1e57dc1e2b34847bbe134c19e266fd3acf
https://github.com/llvm/llvm-project/commit/a969bc1e57dc1e2b34847bbe134c19e266fd3acf
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[dexter] Remove unused env vars from lit.cfg.py (#150031)
I believe these are relics from the days of dexter having the ability to
build your code
Commit: 25e97fc420f8ecc43fbabadfe9767b4163e6ee36
https://github.com/llvm/llvm-project/commit/25e97fc420f8ecc43fbabadfe9767b4163e6ee36
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
Revert "[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)"
This reverts commit 38318dd05615a2f38abdeeae99e7423165308902.
The clang-riscv-gauntlet buildbot is breaking with this commit:
https://lab.llvm.org/buildbot/#/builders/210/builds/371
Commit: 44a6e0099b0f6d0cc4a70210c12108cfa4dee9a7
https://github.com/llvm/llvm-project/commit/44a6e0099b0f6d0cc4a70210c12108cfa4dee9a7
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Pragma.cpp
A clang/test/Preprocessor/pragma-pushpop-macro-diag.c
M clang/test/Preprocessor/pragma-pushpop-macro.c
Log Message:
-----------
[clang] Check empty macro name in `#pragma push_macro("")` or `#pragma pop_macro("")` (#149982)
Fixes https://github.com/llvm/llvm-project/issues/149762.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: d5099722e8ae0972a4a95927cb8ed415eda17298
https://github.com/llvm/llvm-project/commit/d5099722e8ae0972a4a95927cb8ed415eda17298
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
Log Message:
-----------
[SPIRVPrepareFunctions] Report change when removing lifetime intrinsics
Should hopefully fix EXPENSIVE_CHECKS build.
Commit: 8d549cf036b6facf455b9add2d878012dfeb3d0d
https://github.com/llvm/llvm-project/commit/8d549cf036b6facf455b9add2d878012dfeb3d0d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[SelectionDAG] Pass SDNodeFlags through getNode instead of setFlags. (#149852)
getNode updates flags correctly for CSE. Calling setFlags after getNode
may set the flags where they don't apply.
I've added a Flags argument to getSelectCC and the signature of getNode that takes
an ArrayRef of EVTs.
Commit: 1053a926ccc0d65784010ea2b4340a38138a6630
https://github.com/llvm/llvm-project/commit/1053a926ccc0d65784010ea2b4340a38138a6630
Author: Yu-Hui Wu <nosba0957 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
Log Message:
-----------
[RISCV][NFC] Replace reportError wrappers with direct reportFatalUsageError calls (#148142)
Remove the unnecessary reportError wrapper functions and call
reportFatalUsageError directly.
Commit: 90e632eb11a9ee49e8852c5356758024281fa26f
https://github.com/llvm/llvm-project/commit/90e632eb11a9ee49e8852c5356758024281fa26f
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
Log Message:
-----------
[MLIR][AArch64] Refactor lowering of vector.contract to Neon I8MM (#149810)
This patch refactors the pattern in
`Transforms/LowerContractionToNeonI8MMPattern.cpp` using similar
approach as in https://github.com/llvm/llvm-project/pull/147052 to
prepare for adding BF16 support.
Commit: dd36a6901249796a175c3058a50d97cc3a7ba52c
https://github.com/llvm/llvm-project/commit/dd36a6901249796a175c3058a50d97cc3a7ba52c
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A llvm/test/CodeGen/SPARC/tls-sp.ll
Log Message:
-----------
[NFC][Sparc] Pre-commit a test showing inefficient and broken LD/GD TLS
Commit: 4b99eb2eb49d8fcdb29ba494501e481cf09831ae
https://github.com/llvm/llvm-project/commit/4b99eb2eb49d8fcdb29ba494501e481cf09831ae
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/test/CodeGen/SPARC/tls-sp.ll
Log Message:
-----------
[Sparc] Remove bogus stack adjustment for LD/GD TLS (#149890)
This argument is the number of bytes to adjust the stack by for the
duration of the call. In most cases, PEI is able to eliminate the
corresponding call frame pseudos, folding them into the initial stack
frame allocation (rounded up to stack alignment), where it just ends up
allocating more space than needed. However, in the rare case where this
cannot be done, e.g. due to the use of a dynamic alloca, the 1 byte
stack adjustment persists and results in a misaligned stack for the
duration of the call. This has been the case ever since TLS support was
added in cb1dca602c43 ("[Sparc] Add support for TLS in sparc."), and I
can only assume that 1 was used erroneously thinking that it is the
number of arguments (as there is 1 register argument for the call), not
the number of bytes for on-stack arguments.
Fixes: https://github.com/llvm/llvm-project/issues/149808
Commit: 20c52e423161d3a70d58caf6b0298094cb62e4e7
https://github.com/llvm/llvm-project/commit/20c52e423161d3a70d58caf6b0298094cb62e4e7
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
Log Message:
-----------
Reapply "[RISCV][LoopVectorize] Use DataWithEVL as the preferred tail folding style (#148686)"
This reverts commit 25e97fc420f8ecc43fbabadfe9767b4163e6ee36.
The original commit was reverted due to a crash in llvm-test-suite. The
crash stemmed from a multiply reduction, which isn't supported for
scalable VFs on RISC-V. But for EVL tail folding we only support
scalable VFs, so when -force-tail-folding-style=data-with-evl is
specified we check to see if there's a scalable VF, and fall back to
data-without-lane-mask if there isn't.
This is done in setTailFoldingStyles, but previously we were only
checking if the forced tail folding style was legal, not the style
returned by TTI.
This version fixes this by checking the actual computed tail folding
style and not just the forced one, and adds a test for the crash in
llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
Commit: 6db9b0d19cec17c28df07b14fbea9762e7857f24
https://github.com/llvm/llvm-project/commit/6db9b0d19cec17c28df07b14fbea9762e7857f24
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][rocdl] Add more gfx12 wait intrinsics (#149984)
Commit: 9f733f4324412ef89cc7729bf027cdcab912ceff
https://github.com/llvm/llvm-project/commit/9f733f4324412ef89cc7729bf027cdcab912ceff
Author: bd1976bris <Ben.Dunbobbin at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/test/COFF/thin-archive.s
Log Message:
-----------
[LLD][COFF] Make /wholearchive thin-archive member identifiers consistent (#145487)
A thin archive is an archive/library format where the archive itself
contains only references to member object files on disk, rather than
embedding the file contents.
For the non-/wholearchive case, we use the path to the archive member as
the identifier for thin-archive members (see comments in
`enqueueArchiveMember`). This patch modifies the /wholearchive path to
behave the same way.
Apart from consistency, my motivation for fixing this is DTLTO
(#126654), where having the member identifier be the path on disk allows
distribution of bitcode members during ThinLTO.
Commit: b933f0c376c983614a0701f3bfd4054cf8fe4386
https://github.com/llvm/llvm-project/commit/b933f0c376c983614a0701f3bfd4054cf8fe4386
Author: sivadeilra <ardavis at microsoft.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A clang/test/CodeGenCXX/microsoft-abi-eh-async.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.h
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/test/CodeGen/WinEH/wineh-noret-cleanup.ll
M llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/noreturn-call-win64.ll
M llvm/test/CodeGen/X86/seh-catch-all.ll
M llvm/test/CodeGen/X86/seh-catchpad.ll
M llvm/test/CodeGen/X86/seh-except-finally.ll
M llvm/test/CodeGen/X86/seh-finally.ll
M llvm/test/CodeGen/X86/seh-safe-div.ll
M llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
M llvm/test/CodeGen/X86/stack-coloring-wineh.ll
M llvm/test/CodeGen/X86/taildup-heapallocsite.ll
M llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
M llvm/test/CodeGen/X86/win-catchpad.ll
M llvm/test/CodeGen/X86/win-cleanuppad.ll
M llvm/test/CodeGen/X86/win32-eh-states.ll
M llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
M llvm/test/CodeGen/X86/wineh-coreclr.ll
M llvm/test/CodeGen/XCore/exception.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips64_eh.ll.expected
Log Message:
-----------
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
This changes how LLVM constructs certain data structures that relate to
exception handling (EH) on Windows. Specifically this changes how
IP2State tables for functions are constructed. The purpose of this
change is to align LLVM to the requires of the Windows AMD64 ABI, which
requires that the IP2State table entries point to the boundaries between
instructions.
On most Windows platforms (AMD64, ARM64, ARM32, IA64, but *not* x86-32),
exception handling works by looking up instruction pointers in lookup
tables. These lookup tables are stored in `.xdata` sections in
executables. One element of the lookup tables are the `IP2State` tables
(Instruction Pointer to State).
If a function has any instructions that require cleanup during exception
unwinding, then it will have an IP2State table. Each entry in the
IP2State table describes a range of bytes in the function's instruction
stream, and associates an "EH state number" with that range of
instructions. A value of -1 means "the null state", which does not
require any code to execute. A value other than -1 is an index into the
State table.
The entries in the IP2State table contain byte offsets within the
instruction stream of the function. The Windows ABI requires that these
offsets are aligned to instruction boundaries; they are not permitted to
point to a byte that is not the first byte of an instruction.
Unfortunately, CALL instructions present a problem during unwinding.
CALL instructions push the address of the instruction after the CALL
instruction, so that execution can resume after the CALL. If the CALL is
the last instruction within an IP2State region, then the return address
(on the stack) points to the *next* IP2State region. This means that the
unwinder will use the wrong cleanup funclet during unwinding.
To fix this problem, compilers should insert a NOP after a CALL
instruction, if the CALL instruction is the last instruction within an
IP2State region. The NOP is placed within the same IP2State region as
the CALL, so that the return address points to the NOP and the unwinder
will locate the correct region.
This PR modifies LLVM so that it inserts NOP instructions after CALL
instructions, when needed. In performance tests, the NOP has no
detectable significance. The NOP is rarely inserted, since it is only
inserted when the CALL is the last instruction before an IP2State
transition or the CALL is the last instruction before the function
epilogue.
NOP padding is only necessary on Windows AMD64 targets. On ARM64 and
ARM32, instructions have a fixed size so the unwinder knows how to "back
up" by one instruction.
Interaction with Import Call Optimization (ICO):
Import Call Optimization (ICO) is a compiler + OS feature on Windows
which improves the performance and security of DLL imports. ICO relies
on using a specific CALL idiom that can be replaced by the OS DLL
loader. This removes a load and indirect CALL and replaces it with a
single direct CALL.
To achieve this, ICO also inserts NOPs after the CALL instruction. If
the end of the CALL is aligned with an EH state transition, we *also*
insert a single-byte NOP. **Both forms of NOPs must be preserved.** They
cannot be combined into a single larger NOP; nor can the second NOP be
removed.
This is necessary because, if ICO is active and the call site is
modified by the loader, the loader will end up overwriting the NOPs that
were inserted for ICO. That means that those NOPs cannot be used for the
correct termination of the exception handling region (the IP2State
transition), so we still need an additional NOP instruction. The NOPs
cannot be combined into a longer NOP (which is ordinarily desirable)
because then ICO would split one instruction, producing a malformed
instruction after the ICO call.
Commit: bbe912f1e74252f1f57b5d6c6d97a418947f4aa0
https://github.com/llvm/llvm-project/commit/bbe912f1e74252f1f57b5d6c6d97a418947f4aa0
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/DebugInfo/KeyInstructions/asm.c
Log Message:
-----------
[KeyInstr] Inline asm atoms (#149076)
Commit: 75ec7250aaede77ba540ddde61a222f39b30008a
https://github.com/llvm/llvm-project/commit/75ec7250aaede77ba540ddde61a222f39b30008a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Use SDUse::get() instead of a static_cast to SDValue. NFC (#150043)
Commit: 115f768b68d290995b3d9129f44e33cd7c8a11a6
https://github.com/llvm/llvm-project/commit/115f768b68d290995b3d9129f44e33cd7c8a11a6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV] Correct alignment of one-active (de)interleave cases (#150052)
Noticed this while going to rewrite the load case as a DAG combine. I
don't have a test case which demonstrates this leading to a miscompile,
but it seems like it could be possible.
Commit: b3e720b4deb481df11cb6be09e5a2ad7a4d4a7eb
https://github.com/llvm/llvm-project/commit/b3e720b4deb481df11cb6be09e5a2ad7a4d4a7eb
Author: Danila Malyutin <danilaml at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/PassInstrumentation.h
M llvm/lib/IR/PassInstrumentation.cpp
Log Message:
-----------
[PassInstrumentation] Don't insert extra entries in getPassNameForClassName (#150029)
Don't modify ClassToPassName map unless ClassName is found. Instead,
just return empty StringRef if there is no matching entry. This will
prevent possible dangling references in ClassToPassName map in case of
ClassName being freed.
See https://github.com/llvm/llvm-project/pull/145059/files#r2219763671
for more context.
Commit: aa1b416065ec615e93c496bbb43c7c006a04553e
https://github.com/llvm/llvm-project/commit/aa1b416065ec615e93c496bbb43c7c006a04553e
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[clang][deps] Remove dependency on `tooling::ToolAction` (#149904)
The dependency scanner was initially using a fair amount of
infrastructure provided by the `clangTooling` library. Over time, the
needs for bespoke handling of command lines grew and the overlap with
the tooling library kept shrinking. I don't think the library provides
any value anymore.
I decided to remove the dependency and only reimplement the small bits
required by the scanner.
This allowed for a nice simplification, where we no longer need to
create temporary dummy `FileManager` instances (mis-named as
`DriverFileMgr` in some parts) and `SourceManager` instances to attach
to the `DiagnosticsEngine`. That code was copied from the tooling
library to support `DiagnosticConsumers` that expect these to exist. The
scanner uses a closed set of consumers and none need these objects to
exist.
The motivation for this (hopefully NFC) patch are some new restrictions
to how VFS's can be propagated in Clang that I'm working on.
Commit: 999b35629f909d97471a8ba600e3c4cf1cbf1977
https://github.com/llvm/llvm-project/commit/999b35629f909d97471a8ba600e3c4cf1cbf1977
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/utils/gn/build/BUILD.gn
Log Message:
-----------
[gn build] Manually partially port #108276 (#149595)
Fixes windows gn clang build.
Don't worry about exporting clang symbols on windows in gn build for
now.
Commit: 9a7a6b24f8c88718ef1eea57bed07332e751c027
https://github.com/llvm/llvm-project/commit/9a7a6b24f8c88718ef1eea57bed07332e751c027
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
[clang][test] Fix failed tests on non-Windows platforms
- Use '--' to separate inputs from options due to `%clang_cl`.
Commit: c710d460a5623c8445fabccd5a88e51085541d5b
https://github.com/llvm/llvm-project/commit/c710d460a5623c8445fabccd5a88e51085541d5b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
[DAG] expandVECTOR_COMPRESS - remove superfluous getFreeze. NFC. (#150062)
freeze(freeze(extract_vector_elt(x,i))) -> freeze(extract_vector_elt(x,i))
Commit: e789f8bdf3691e8e5c4b8d0c0d90fc46cd015fee
https://github.com/llvm/llvm-project/commit/e789f8bdf3691e8e5c4b8d0c0d90fc46cd015fee
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
A libc/src/__support/FPUtil/comparison_operations.h
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/comparison_operations_test.cpp
Log Message:
-----------
[libc][math] Add Generic Comparison Operations for floating point types (#144983)
The PR implements the following generic comparison operation functions
for floating point types along with unittests:
- `fputil::equals`
- `fputil::less_than`
- `fputil::less_than_or_equals`
- `fputil::greater_than`
- `fputil::greater_than_or_equals`
---------
Signed-off-by: krishna2803 <kpandey81930 at gmail.com>
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: 7cb256bcaa6acd4805e2fdcec4bf5a3704fed7b9
https://github.com/llvm/llvm-project/commit/7cb256bcaa6acd4805e2fdcec4bf5a3704fed7b9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SelectionDAG] Remove FIXME and commented out code from 20 years ago. NFC (#150055)
Commit: 3fc723ec2cf1965aa4eec8883957fbbe1b2e7027
https://github.com/llvm/llvm-project/commit/3fc723ec2cf1965aa4eec8883957fbbe1b2e7027
Author: Deák Lajos <36414743+deaklajos at users.noreply.github.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Log Message:
-----------
[compiler-rt][sanitizer] fix msghdr for musl (#136195)
Ran into the issue on Alpine when building with TSAN that
`__sanitizer_msghdr` and the `msghdr` provided by musl did not match.
This caused lots of tsan reports and an eventual termination of the
application by the oom during a `sendmsg`.
Commit: 22b0835390516c2150c040521885c473f3a1e87e
https://github.com/llvm/llvm-project/commit/22b0835390516c2150c040521885c473f3a1e87e
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 688ea048affe8e79221ea1a8c376bcf20ef8f3bb
Commit: 0e00bc4f8324d207c1e00d27e0ebe6db67208f75
https://github.com/llvm/llvm-project/commit/0e00bc4f8324d207c1e00d27e0ebe6db67208f75
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] cleanup the print format for TensorDesc (#149182)
Commit: 006c0c876726d5c64f126af4b77ab9b1924238c1
https://github.com/llvm/llvm-project/commit/006c0c876726d5c64f126af4b77ab9b1924238c1
Author: int-zjt <zhangjiatong.0 at bytedance.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
Log Message:
-----------
[sanitizer] Fix libcxx cache existence check in symbolizer build (#149249)
The script incorrectly checked ${LLVM_BUILD}/build.ninja to determine if
cached libcxx is available, while it should be checking the actual
libcxx build directory at ${LIBCXX_BUILD}/build.ninja.
Commit: abdd654feb79f3125bcff7c939cad79b426c1aea
https://github.com/llvm/llvm-project/commit/abdd654feb79f3125bcff7c939cad79b426c1aea
Author: Matthias Braun <matze at braunis.de>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
Log Message:
-----------
build_symbolizer.sh: Ensure libcxx include path comes first (#149431)
libc++ expects to come first in the search path, before libc. See for
example:
https://github.com/llvm/llvm-project/blob/main/libcxx/include/cstddef#L45
Make sure the C++ include path comes first even if custom paths to libc
and other packages are passed in via the `FLAGS` variable.
Commit: 0d0478903474b2e53c874427e3d6eb2ed7567e50
https://github.com/llvm/llvm-project/commit/0d0478903474b2e53c874427e3d6eb2ed7567e50
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
Log Message:
-----------
[LifetimeSafety] Add language option for experimental lifetime safety (#149592)
Add a language option flag for experimental lifetime safety analysis in C++.
This change provides a language option to control the experimental lifetime safety analysis feature, making it more explicit and easier to enable/disable. Previously, the feature was controlled indirectly through a diagnostic warning flag, which we do not want to accidentally enable with `-Weverything` (atm)!
### Changes:
- Added a new language option `EnableLifetimeSafety` in `LangOptions.def` for experimental lifetime safety analysis in C++
- Added corresponding driver options `-fexperimental-lifetime-safety` and `-fno-experimental-lifetime-safety` in `Options.td`
- Modified `AnalysisBasedWarnings.cpp` to use the new language option flag instead of checking if a specific diagnostic is ignored
- Updated a test case to use the new flag instead of relying on the warning flag alone
Commit: 7234ae63e175af6bc16c87d870051d6cbd67fe7d
https://github.com/llvm/llvm-project/commit/7234ae63e175af6bc16c87d870051d6cbd67fe7d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/xtheadfmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Improves to xtheadmemidx.ll and xtheadfmemidx.ll. NFC
-Add a common check-prefix.
-Use iXLen for GEP indices except the tests for zero extended indices.
-Only extend i8/i16 load results to i32.
Commit: a0aebb1935c10ab945121d86df56914906d13cb0
https://github.com/llvm/llvm-project/commit/a0aebb1935c10ab945121d86df56914906d13cb0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
A llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
Log Message:
-----------
[AMDGPU] Select scale_offset with SMEM instructions (#150078)
Commit: d8e55c842bf4bb437c8aa94d38ef368b2f103aec
https://github.com/llvm/llvm-project/commit/d8e55c842bf4bb437c8aa94d38ef368b2f103aec
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
A libc/shared/sign.h
Log Message:
-----------
[libc] Expose the Sign type for shared use (#150083)
This patch exposes the internal `Sign` type for shared use by other LLVM
subprojects, following the pattern established by `FPBits`.
The `FPBits` utility is exposed via `libc/shared/fp_bits.h`. However,
its public interface relies on the `Sign` type for, e.g., creating
signed infinities and returning the sign of a value. Currently, users of
the shared `FPBits` have no way to access the `Sign` type.
Following the existing pattern for sharing `libc` utilities, this patch
adds a new public header `libc/shared/sign.h`. This header simply
includes the internal `src/__support/sign.h` and brings the `Sign` type
into the `shared` namespace.
Commit: 921287e126465d6850954855ded640f0f78d72fd
https://github.com/llvm/llvm-project/commit/921287e126465d6850954855ded640f0f78d72fd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M .github/workflows/premerge.yaml
M polly/CMakeLists.txt
Log Message:
-----------
[CI] Enable sccache GCS on Linux premerge (#149923)
This patch enables sccache using GCS for Linux premerge.
Commit: 4977100624c5320e50d1adce341042b966b36124
https://github.com/llvm/llvm-project/commit/4977100624c5320e50d1adce341042b966b36124
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
A mlir/test/Conversion/AMDGPUToROCDL/memory_counter_wait.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
Log Message:
-----------
[mlir][amdgpu] Add `rocdl.s.waitcnt` wrapper (#149670)
The main motivations is to pass vmcnt/expcnt/lgkmcnt values directly
(similar to the asm format) and delegate architecture-dependent
bitpacking to the amdgpu->rocdl lowering.
---------
Signed-off-by: Ivan Butygin <ivan.butygin at gmail.com>
Commit: 15715f4089878640405ac897723f24b30e5f8e03
https://github.com/llvm/llvm-project/commit/15715f4089878640405ac897723f24b30e5f8e03
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.h
A llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[WebAssembly,llvm] Add llvm.wasm.ref.test.func intrinsic (#147486)
This adds an llvm intrinsic for WebAssembly to test the type of a
function. It is intended for adding a future clang builtin
` __builtin_wasm_test_function_pointer_signature` so we can test whether
calling a function pointer will fail with function signature mismatch.
Since the type of a function pointer is just `ptr` we can't figure out
the expected type from that.
The way I figured out to encode the type was by passing 0's of the
appropriate type to the intrinsic.
The first argument gives the expected type of the return type and the
later values give the expected
type of the arguments. So
```llvm
@llvm.wasm.ref.test.func(ptr %func, float 0.000000e+00, double 0.000000e+00, i32 0)
```
tests if `%func` is of type `(double, i32) -> (i32)`. It will lower to:
```wat
local.get $func
table.get $__indirect_function_table
ref.test (double, i32) -> (i32)
```
To indicate the function should be void, I somewhat arbitrarily picked
`token poison`, so the following tests for `(i32) -> ()`:
```llvm
@llvm.wasm.ref.test.func(ptr %func, token poison, i32 0)
```
To lower this intrinsic, we need some place to put the type information.
With `encodeFunctionSignature()` we encode the signature information
into an `APInt`. We decode it in `lowerEncodedFunctionSignature` in
`WebAssemblyMCInstLower.cpp`.
Commit: 45d0750dac528ea7e1fcfda34cc9faca3c5454e6
https://github.com/llvm/llvm-project/commit/45d0750dac528ea7e1fcfda34cc9faca3c5454e6
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcscspn.cpp
M libc/src/wchar/wcsspn.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Cleaned up wcsspn and wcscspn (#147408)
created internal wcsspn to avoid duplicated code
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 32ee7daa57ba747e0777eb38352e256e0e55947b
https://github.com/llvm/llvm-project/commit/32ee7daa57ba747e0777eb38352e256e0e55947b
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/lldb-enumerations.h
Log Message:
-----------
[lldb] Remove out of date comment. NFC (#149908)
Mojo already moved to the main list in 582582fb474b8
Commit: 0df537e5a3d3985e771776d0a3ace758cc096437
https://github.com/llvm/llvm-project/commit/0df537e5a3d3985e771776d0a3ace758cc096437
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M polly/CMakeLists.txt
Log Message:
-----------
[Polly] Remove Accidental Test Comment in CMakeLists.txt
This was accidentally introduced in 921287e126465d6850954855ded640f0f78d72fd
because I forgot to remove it before merging the patch...
Commit: 16b4fb50dd05fa4b31cfe702e3b1d1e1a55398f5
https://github.com/llvm/llvm-project/commit/16b4fb50dd05fa4b31cfe702e3b1d1e1a55398f5
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/cbrt_fuzz.cpp
Log Message:
-----------
[libc] cbrt fuzz test (#150063)
Implemented fuzz test for cbrt
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 160d46d4c3f456868c41d56d5819d7ae2a1ba5d5
https://github.com/llvm/llvm-project/commit/160d46d4c3f456868c41d56d5819d7ae2a1ba5d5
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
Log Message:
-----------
[WebAssembly] Fix warnings
This patch fixes:
llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp:126:26:
error: lambda capture 'DAG' is not used
[-Werror,-Wunused-lambda-capture]
llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp:239:28:
error: unused variable 'Info' [-Werror,-Wunused-variable]
Commit: eb0d8f9272f7c734cdaf31bc33a18e1619e021e4
https://github.com/llvm/llvm-project/commit/eb0d8f9272f7c734cdaf31bc33a18e1619e021e4
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind] Fix return type of `DwarfFDECache::findFDE()` in definition (#146308)
Needed to resolve this compilation error on some systems:
lib/libunwind/src/UnwindCursor.hpp:153:38: error: return type of
out-of-line definition of 'libunwind::DwarfFDECache::findFDE' differs
from that in the declaration
typename A::pint_t DwarfFDECache<A>::findFDE(pint_t mh, pint_t pc) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^
lib/libunwind/src/libunwind.cpp:31:10: note: in file included from
lib/libunwind/src/libunwind.cpp:31:
#include "UnwindCursor.hpp"
^
lib/libunwind/src/UnwindCursor.hpp:100:17: note: previous declaration is
here
static pint_t findFDE(pint_t mh, pint_t pc);
~~~~~~~^
Commit: a0973de745837d9144b058479cd798c9de5b430f
https://github.com/llvm/llvm-project/commit/a0973de745837d9144b058479cd798c9de5b430f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
Log Message:
-----------
[AMDGPU] Select scale_offset for global instructions on gfx1250 (#150107)
Also switches immediate offset to signed for the subtarget.
Commit: 5eecbc018bfdf6f262647de739f35230596a1b8f
https://github.com/llvm/llvm-project/commit/5eecbc018bfdf6f262647de739f35230596a1b8f
Author: Slava "nerfur" Voronzoff <nerfur at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/test/Driver/openbsd.c
Log Message:
-----------
Adding Loongarch64 to OpenBSD parts (#149737)
Adding Loongarch64 to OpenBSD parts
Commit: efbe98db0029a97109ec0b4db51f46af1ce8e581
https://github.com/llvm/llvm-project/commit/efbe98db0029a97109ec0b4db51f46af1ce8e581
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
[llvm] simplify and clean-up DemangleConfig.h (#149163)
## Purpose
Simplify `DEMANGLE_` macro definitions in
`llvm/Demangle/DemangleConfig.h` for clarity/maintainability.
## Overview
* Alias `DEMANGLE_DUMP_METHOD`, `DEMANGLE_FALLTHROUGH`, and
`DEMANGLE_UNREACHABLE` macros to their `LLVM_` counterparts defined in
`llvm/Support/Compiler.h`
* Remove several `DEMANGLE_`-prefixed macros that were only used within
`DemangleConfig.h`
## Background
* It should be safe for the `Demangle` component library to depend on
`Support`, so there is no need for it to maintain copies of macros
defined in `llvm/Support/Compiler.h`.
* Since the canonical copy `llvm/Demangle/ItaniumDemangle.h` lives under
`libcxxabi`, it cannot directly reference the `LLVM_`-prefixed macros so
we define `DEMANGLE_`-prefixed aliases.
## Validation
* Built llvm-project on Windows with `clang-cl` and MSVC `cl`.
* Built llvm-project on Linux with `clang` and `gcc`.
Commit: 2e2a8992f992b185483bb1b120b30eacb30700ca
https://github.com/llvm/llvm-project/commit/2e2a8992f992b185483bb1b120b30eacb30700ca
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Remove resriction on constant masks for shuffle lowering (#150098)
The point of this change is simply to show that the constant check was
not required for correctness. The mixed intrinsic and shuffle tests are
added purely to exercise the code. An upcoming change will add support
for shuffle matching in getMask to support non-constant fixed vector
cases.
Commit: c6e560a25bcc3050ff3a02677c8bc1a6f673b36f
https://github.com/llvm/llvm-project/commit/c6e560a25bcc3050ff3a02677c8bc1a6f673b36f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
A llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
Log Message:
-----------
[AMDGPU] Select scale_offset for scratch instructions on gfx1250 (#150111)
Commit: 5ecb58058d4578dd96e41fd038cf9d985a77d7aa
https://github.com/llvm/llvm-project/commit/5ecb58058d4578dd96e41fd038cf9d985a77d7aa
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/pr126337.ll
Log Message:
-----------
[NVPTX] Fix NVPTX builder test failures.
Fixed broken 'pr126337.ll' NVPTX related test (by #149393)
Commit: b13bca7387a7aad6eaf3fa1c55bd06fe091f65ed
https://github.com/llvm/llvm-project/commit/b13bca7387a7aad6eaf3fa1c55bd06fe091f65ed
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
A llvm/test/CodeGen/WebAssembly/removed-terminator.ll
Log Message:
-----------
[WebAssembly] Unstackify registers with no uses in ExplicitLocals (#149626)
There are cases we end up removing some intructions that use stackified
registers after RegStackify. For example,
```wasm
bb.0:
%0 = ... ;; %0 is stackified
br_if %bb.1, %0
bb.1:
```
In this code, br_if will be removed in CFGSort, so we should unstackify
%0 so that it can be correctly dropped in ExplicitLocals.
Rather than handling this in case-by-case basis, this PR just
unstackifies all stackifies register with no uses in the beginning of
ExplicitLocals, so that they can be correctly dropped.
Fixes #149097.
Commit: 10812eb7c9e9822078a109a98132b829c771c1a8
https://github.com/llvm/llvm-project/commit/10812eb7c9e9822078a109a98132b829c771c1a8
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
Log Message:
-----------
[NVPTX] Assert PRMT operands are of correct type (NFC) (#150104)
Commit: 681c2ee4dfbf10b3ef74afd1a2c72f844771e602
https://github.com/llvm/llvm-project/commit/681c2ee4dfbf10b3ef74afd1a2c72f844771e602
Author: Justin King <jcking at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_malloc_mac.cpp
M compiler-rt/lib/asan/asan_malloc_win.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/asan/tests/asan_noinst_test.cpp
Log Message:
-----------
asan: refactor interceptor allocation/deallocation functions (#145087)
Do some refactoring to allocation/deallocation interceptors. Expose
explicit per-alloc_type functions and stop accepting explicit AllocType.
This ensures we do not accidentally mix.
NOTE: This change rejects attempts to call `operator new(<some_size>,
static_cast<std::align_val_t>(0))`.
For https://github.com/llvm/llvm-project/issues/144435
Signed-off-by: Justin King <jcking at google.com>
Commit: 5edb845fcaafd56110670fb2f6eeac22cbb0afff
https://github.com/llvm/llvm-project/commit/5edb845fcaafd56110670fb2f6eeac22cbb0afff
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/wchar/mbtowc.cpp
M libc/test/src/wchar/mbrtowc_test.cpp
Log Message:
-----------
[libc] Fixed mbtowc functions (#150118)
mbrtowc was not handling null destination correctly
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: dbd9eae95a5ad113d4559c07839306bf68f1925c
https://github.com/llvm/llvm-project/commit/dbd9eae95a5ad113d4559c07839306bf68f1925c
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[IA] Support vp.store in lowerinterleavedStore (#149605)
Follow up to 28417e64, and the whole line of work started with 4b81dc7.
This change merges the handling for VPStore - currently in
lowerInterleavedVPStore - into the existing dedicated routine used in
the shuffle lowering path. This removes the last use of the dedicated
lowerInterleavedVPStore and thus we can remove it.
This contains two changes which are functional.
First, like in 28417e64, merging support for vp.store exposes the
strided store optimization for code using vp.store.
Second, it seems the strided store case had a significant missed
optimization. We were performing the strided store at the full unit
strided store type width (i.e. LMUL) rather than reducing it to match
the input width. This became obvious when I tried to use the mask
created by the helper routine as it caused a type incompatibility.
Normally, I'd try not to include an optimization in an API rework, but
structuring the code to both be correct for vp.store and not optimize
the existing case turned out be more involved than seemed worthwhile. I
could pull this part out as a pre-change, but its a bit awkward on it's
own as it turns out to be somewhat of a half step on the possible
optimization; the full optimization is complex with the old code
structure.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 2cb1ecb94bb4e7f89494e59d25707fd9787ff98a
https://github.com/llvm/llvm-project/commit/2cb1ecb94bb4e7f89494e59d25707fd9787ff98a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/Core/dwarf.h
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/AppleDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFAttribute.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugMacro.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDeclContext.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBLocationToDWARFExpression.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/PostfixExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARF64UnitTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDebugNamesIndexTest.cpp
M lldb/unittests/SymbolFile/DWARF/SymbolFileDWARFTests.cpp
Log Message:
-----------
[lldb] Eliminate namespace lldb_private::dwarf (NFC) (#150073)
Eliminate the `lldb_private::dwarf` namespace, in favor of using
`llvm::dwarf` directly. The latter is shorter, and this avoids ambiguity
in the ABI plugins that define a `dwarf` namespace inside an anonymous
namespace.
Commit: 796f5512442782c7d37b8008740b3afcac1feb8b
https://github.com/llvm/llvm-project/commit/796f5512442782c7d37b8008740b3afcac1feb8b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[CI] Enable Windows Caching Through Sccache GCS (#150114)
Same as 921287e126465d6850954855ded640f0f78d72fd but for Windows.
Commit: eb554128acef5f814d02d357f10e4666e32a699b
https://github.com/llvm/llvm-project/commit/eb554128acef5f814d02d357f10e4666e32a699b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
Log Message:
-----------
[mlir][Arith] Prevent IR modification for non-matching pattern (#150103)
The F4E2M1 truncation emulation was expanding or truncating operations
to F32 even when the pattern did not apply, causing non-convergent
rewrites when operating on doubles.
Also, fix a pair of whitespace issues that snuck in.
Commit: c267928700778f01870094009fe6afdce79635a6
https://github.com/llvm/llvm-project/commit/c267928700778f01870094009fe6afdce79635a6
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Use getIntNTy routines on builder to simplify code [nfc]
Addressing a suggestion from #149605 consistently throughout file.
Commit: 5ca40fa101df2b75e10c0c260192b653120a9b1d
https://github.com/llvm/llvm-project/commit/5ca40fa101df2b75e10c0c260192b653120a9b1d
Author: yonghong-song <yhs at fb.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/BPF/BPF.h
Log Message:
-----------
[BPF] Fix build warnings due to a static var in header file (#150128)
Simon Pilgrim ([1]) and Anton reported that the following warning will
appear when building clang compiler:
```
In file included from .../llvm-project/llvm/lib/Target/BPF/BPFASpaceCastSimplifyPass.cpp:9: .../llvm-project/llvm/lib/Target/BPF/BPF.h:25:20: warning: ‘llvm::BPF_TRAP’ defined but not used [-Wunused-variable]
25 | static const char *BPF_TRAP = "__bpf_trap";
| ^~~~~~~~
...
In file included from .../llvm-project/llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp:14:
.../llvm-project/llvm/lib/Target/BPF/BPF.h:25:20: warning: ‘llvm::BPF_TRAP’ defined but not used [-Wunused-variable]
25 | static const char *BPF_TRAP = "__bpf_trap";
| ^~~~~~~~
...
```
Instead of using static const variable, use macro to silence warnings.
[1] https://github.com/llvm/llvm-project/pull/131731
Commit: b2c38f153efe96e4a1497baed9fd25faa1e058c1
https://github.com/llvm/llvm-project/commit/b2c38f153efe96e4a1497baed9fd25faa1e058c1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/MC/RISCV/rv32p-valid.s
M llvm/test/MC/RISCV/rv64p-valid.s
Log Message:
-----------
[RISCV] Correct the immediate swizzling for P-ext plui.h/w. (#149945)
If I'm reading the spec correctly, plui.h/w encode the immediate
differently from pli.h/w. pli.h/w appear to rotate the immediate
left by 1 before encoding while plui.h/w rotates the immediate right
by 1 before encoding.
Since I was splitting the classes, I made the name closer to the
instruction names since the immediate width was ambiguous. I've
added an _i suffix to make it similar to base and Zb* class names.
Commit: fbeb801a718a13ca895ed3db23c6265e93bb9185
https://github.com/llvm/llvm-project/commit/fbeb801a718a13ca895ed3db23c6265e93bb9185
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8-fake16.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp16.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_cvt_pk_bf16_f32` on gfx1250 (#150053)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 7fc65569c1d461682504a4552d872bb75b868b4f
https://github.com/llvm/llvm-project/commit/7fc65569c1d461682504a4552d872bb75b868b4f
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
Log Message:
-----------
[AMDGPU] Mark `amdgcn_tanh` as canonicalized (#150059)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: c3c72c1de9aece0b98a6f1c62d3883dde1a50fcd
https://github.com/llvm/llvm-project/commit/c3c72c1de9aece0b98a6f1c62d3883dde1a50fcd
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
A llvm/test/CodeGen/DirectX/ShaderFlags/lifetimes-noint64op.ll
M llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
A llvm/test/tools/dxil-dis/lifetimes.ll
Log Message:
-----------
[DirectX] Legalize `llvm.lifetime.*` intrinsics in EmbedDXILPass (#150100)
Fixes #147395
This PR:
- Excludes lifetime intrinsics from the Int64Ops shader flags analysis
to match DXC behavior and pass DXIL validation.
- Performs legalization of `llvm.lifetime.*` intrinsics in the
EmbedDXILPass just before invoking the DXILBitcodeWriter.
- After invoking the DXILBitcodeWriter, all lifetime intrinsics and
associated bitcasts are removed from the module to keep the Module
Verifier happy. This is fine since lifetime intrinsics are not needed by
any passes after the EmbedDXILPass.
Commit: d1ca9847575ae94049c4877812cca96b7f3058f0
https://github.com/llvm/llvm-project/commit/d1ca9847575ae94049c4877812cca96b7f3058f0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Fix unittest (#150136)
Commit: 482ec90428017f986edc67644484555a367a624c
https://github.com/llvm/llvm-project/commit/482ec90428017f986edc67644484555a367a624c
Author: aankit-ca <aankit at codeaurora.org>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonInstrFormats.td
R llvm/lib/Target/Hexagon/HexagonInstrFormatsV60.td
M llvm/lib/Target/Hexagon/HexagonInstrFormatsV65.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td
R llvm/lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td
Log Message:
-----------
[Hexagon] Remove unused td files (#150109)
Fixes https://github.com/llvm/llvm-project/issues/150094
Commit: dbc41dd5d827a3e13625a66fd2bfa83a8a4dfe83
https://github.com/llvm/llvm-project/commit/dbc41dd5d827a3e13625a66fd2bfa83a8a4dfe83
Author: Volodymyr Sapsai <vsapsai at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang][deps] Add a release note for fixing crashes in `clang-scan-deps`. (#149857)
Commit: bbbe69f5f3983e919ebceb5f702b248aff495a3a
https://github.com/llvm/llvm-project/commit/bbbe69f5f3983e919ebceb5f702b248aff495a3a
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/sinpi.f90
Log Message:
-----------
[flang] Implement `sinpi` (#149525)
Commit: 7dc9b433673e28f671894bd22c65f406ba9bea6f
https://github.com/llvm/llvm-project/commit/7dc9b433673e28f671894bd22c65f406ba9bea6f
Author: sivadeilra <arlie.davis at microsoft.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
Fix CI on non-Windows platforms, for #144745 (#150145)
Commit: e0dd22fab19df2c9370fc2e90bcf57eb0cf25bed
https://github.com/llvm/llvm-project/commit/e0dd22fab19df2c9370fc2e90bcf57eb0cf25bed
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/builtin-maximumnum-minimumnum.c
M clang/test/Sema/builtins-elementwise-math.c
Log Message:
-----------
[Clang] Add elementwise maximumnum/minimumnum builtin functions (#149775)
Addresses https://github.com/llvm/llvm-project/issues/112164. minimumnum
and maximumnum intrinsics were added in 5bf81e53dbea.
The new built-ins can be used for implementing OpenCL math function fmax
and fmin in #128506.
Commit: 726502d668d12d917411d48d0b2210f8592b23a9
https://github.com/llvm/llvm-project/commit/726502d668d12d917411d48d0b2210f8592b23a9
Author: Daniel Sanders <daniel_l_sanders at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Target/Language.cpp
Log Message:
-----------
[lldb] Fix UB cast when encountering DW_LANG_* >= eNumLanguageTypes (#150132)
LanguageType has two kinds of enumerators in it. The first is
DWARF-assigned enumerators which must be consecutive and match DW_LANG
values. The second is the vendor-assigned enumerators which must be
unique and must follow on from the DWARF-assigned values (i.e. the first
one is currently eLanguageTypeMojo + 1) even if that collides with
DWARF-assigned values that lldb is not yet aware of
Only the DWARF-assigned enumerators may be static_cast from DW_LANG
since their values match. The vendor-assigned enumerators must be
explicitly converted since their values do not match. This needs to
handle new languages added to DWARF and not yet implemented in lldb.
This fixes a crash when encountering a DW_LANG value >=
eNumLanguageTypes and wrong behaviour when encountering DW_LANG values
that have not yet been added to LanguageType but happen to coincide with
a vendor-assigned enumerator due to the consecutive values requirement
described above.
Another way to fix the crash is to add the language to LanguageType (and
fill any preceeding gaps in the number space) so that the DW_LANG being
encountered is correctly handled but this just moves the problem to a
new subset of DW_LANG values.
Also fix an unnecessary static-cast from LanguageType to LanguageType.
Commit: 8c26858f1a8bc5796c493f4f720552edbcb09fb4
https://github.com/llvm/llvm-project/commit/8c26858f1a8bc5796c493f4f720552edbcb09fb4
Author: Doug Gregor <dgregor at apple.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/swift-import-as.cpp
Log Message:
-----------
[API Notes] Attach API notes to forward declarations of tags (#149951)
Forward declarations can still have useful API notes applied to them.
When the use of the tag is not a definition, apply the API notes
immediately.
Fixes rdar://156288588.
Commit: 471e59b858b1d2ee844cb527522e60ed03a1a1dc
https://github.com/llvm/llvm-project/commit/471e59b858b1d2ee844cb527522e60ed03a1a1dc
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Basic/TargetInfo.cpp
M clang/test/Layout/ms-no-unique-address.cpp
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
Log Message:
-----------
[clang] Set correct CXXABI for UEFI (#150115)
The target triple x86_64-uefi must be assumed to have Microsft ABI by
default.
Fixes: https://github.com/llvm/llvm-project/issues/150113
Commit: 8f410b491e55f3b91587da926a7a6fee99722df3
https://github.com/llvm/llvm-project/commit/8f410b491e55f3b91587da926a7a6fee99722df3
Author: Leandro Lacerda <leandrolcampos at yahoo.com.br>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M libc/shared/sign.h
Log Message:
-----------
[libc] Fix incorrect macro usage in shared/sign.h (#150140)
This patch corrects the `using`-declaration in `libc/shared/sign.h`.
The previous change (#150083) incorrectly used the `LIBC_NAMESPACE_DECL`
macro. This is corrected to use `LIBC_NAMESPACE`.
Commit: 8c4fa11dd871ba747867d2e707d643664868837e
https://github.com/llvm/llvm-project/commit/8c4fa11dd871ba747867d2e707d643664868837e
Author: Zack Johnson <zacklj89 at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
[compiler-rt][MSVC] Update check to include clang-cl (#150108)
Follow up to #149823 to include `clang-cl` for AArch64 builtins sources.
Commit: efffa42f593739ea7d80a5be301b6f235e44f35a
https://github.com/llvm/llvm-project/commit/efffa42f593739ea7d80a5be301b6f235e44f35a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Add generated offloading Xarch args to synthesized args (#150142)
Summary:
The synthesized args contains a list of unique pointers, so this should
clean this generated argument up once created.
Commit: a69cddef43f64d5307c0d5f2f01e5176ac05729a
https://github.com/llvm/llvm-project/commit/a69cddef43f64d5307c0d5f2f01e5176ac05729a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
Log Message:
-----------
[RISCV] Add TUPLE_INSERT and TUPLE_EXTRACT to verifyTargetNode. (#150148)
Verify that the index is an i32 target constant which is what we get
from intrinsic lowering. All other inserts and extracts should be the
same.
Commit: 11fba3591692e339aa2d683c7bcc9eef66b78b88
https://github.com/llvm/llvm-project/commit/11fba3591692e339aa2d683c7bcc9eef66b78b88
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
Log Message:
-----------
[NVPTX] Add SimplifyDemandedBitsForTargetNode for PRMT (#149395)
Commit: 92858528c2db534e4101b7ac6cd263ac7884764d
https://github.com/llvm/llvm-project/commit/92858528c2db534e4101b7ac6cd263ac7884764d
Author: Alan Zhao <ayzhao at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Misc/time-passes.c
M clang/tools/driver/cc1_main.cpp
Log Message:
-----------
[clang][timers][stats] Add a flag to enable timers in the stats file (#149946)
As reported in #138173, enabling `-ftime-report` adds pass timing info
to the stats file if `-stats-file` is specified. This was determined to
be WAI. However, if one intentionally wants to put timer information in
the stats file, using `-ftime-report` may lead to a lot of logspam (that
can't be removed by directing stderr to `/dev/null` as that would also
redirect compiler errors). To address this, this PR adds a flag
`-stats-file-timers` that adds timer data to the stats file without
outputting to stderr.
Commit: 324773e238026c5d4f501213678a89bf411e1509
https://github.com/llvm/llvm-project/commit/324773e238026c5d4f501213678a89bf411e1509
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
Log Message:
-----------
[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)
This patch implement vector costs for `llvm.fptoui.sat()` in RISCV TTI.
Commit: eb0c863c447bf2ad4d35cfde39925a655c060fa5
https://github.com/llvm/llvm-project/commit/eb0c863c447bf2ad4d35cfde39925a655c060fa5
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Port #147408 (#150154)
Add deps for 45d0750dac528ea7e1fcfda34cc9faca3c5454e6
Commit: 01b47eb86c991f88d3117f494ebd1826fd3ab41e
https://github.com/llvm/llvm-project/commit/01b47eb86c991f88d3117f494ebd1826fd3ab41e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Only implicitly start lifetime of trivially-default-constructible union members (#149835)
See
https://github.com/llvm/llvm-project/commit/faee39baa87e43f4b746dd77e479268391163658
Commit: 8937b61f21fcd60ab1b19db6e755053364584d18
https://github.com/llvm/llvm-project/commit/8937b61f21fcd60ab1b19db6e755053364584d18
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Fix cast incompatible type bug in `ShuffleOp::fold` (#150037)
This PR uses `dyn_cast` instead of `cast` to avoid a crash when the
constant attribute is not a `DenseElementsAttr`. Fixes #149325.
Commit: 0eafc737248f1232309cef6824a5a95d0747626e
https://github.com/llvm/llvm-project/commit/0eafc737248f1232309cef6824a5a95d0747626e
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/include/llvm/Demangle/DemangleConfig.h
Log Message:
-----------
Revert "[llvm] simplify and clean-up DemangleConfig.h" (#150160)
Reverts llvm/llvm-project#149163 because it introduced a layering
violation.
Support depends on Demangle:
[llvm-project/llvm/lib/Support/Unix/Signals.inc](https://github.com/llvm/llvm-project/blob/324773e238026c5d4f501213678a89bf411e1509/llvm/lib/Support/Unix/Signals.inc#L38)
Line 38 in
[324773e](https://github.com/llvm/llvm-project/commit/324773e238026c5d4f501213678a89bf411e1509)
Commit: 23eef9a7c40f15fcf3cd393e7dc18f48c516bf7e
https://github.com/llvm/llvm-project/commit/23eef9a7c40f15fcf3cd393e7dc18f48c516bf7e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Activate primitive fields before initializing them (#149963)
The initializer itself might need the field to be active.
Commit: c9714d20350f5895f292794eb82bce4231b9472b
https://github.com/llvm/llvm-project/commit/c9714d20350f5895f292794eb82bce4231b9472b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Add profitability checks to SelectAddrRegRegScale. (#150135)
-Only fold if the ADD can be folded into all uses.
-Don't reassociate an ADDI if the shl+add can be a shxadd or similar
instruction.
-Only reassociate a single ADDI. If there are 2 addis it's the same
number of instructions as shl+add. If there are more than 2 that it
would increase instructions over folding the addis into the
loads/stores.
Commit: d8ea88f99a8093c018fa0680900682a562ac93a0
https://github.com/llvm/llvm-project/commit/d8ea88f99a8093c018fa0680900682a562ac93a0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[llvm] Proofread LangRef.rst (#150042)
Commit: 2edc730a687be160965e4b9026a55905f7dfeebe
https://github.com/llvm/llvm-project/commit/2edc730a687be160965e4b9026a55905f7dfeebe
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] auto update some tests to prepare for future changes
Commit: 5050a1507116735b5e7b6a6c7f7fcee49a8aa714
https://github.com/llvm/llvm-project/commit/5050a1507116735b5e7b6a6c7f7fcee49a8aa714
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Remove extra spaces from RISCVInstrInfoP.td. NFC
Commit: 7ad1d5bd34754fb909d7b58014372baddf94bfc7
https://github.com/llvm/llvm-project/commit/7ad1d5bd34754fb909d7b58014372baddf94bfc7
Author: Frank Schlimbach <frank.schlimbach at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.td
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Mesh/IR/MeshOps.cpp
M mlir/lib/Dialect/Mesh/Interfaces/ShardingInterface.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/test/Dialect/Linalg/mesh-spmdization.mlir
M mlir/test/Dialect/Mesh/forward-sharding-propagation.mlir
M mlir/test/Dialect/Mesh/invalid.mlir
M mlir/test/Dialect/Mesh/ops.mlir
M mlir/test/Dialect/Mesh/resharding-spmdization.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/Mesh/spmdization.mlir
Log Message:
-----------
[mlir][mesh] removing partial/reduction axes from mesh.sharding (#149805)
[mlir][mesh] Removing partial axes from sharding annotations (discourse 87053)
Commit: 0b3579bedcb2ac608b1a68bf967386c4600554ea
https://github.com/llvm/llvm-project/commit/0b3579bedcb2ac608b1a68bf967386c4600554ea
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-22 (Tue, 22 Jul 2025)
Changed paths:
M llvm/lib/MC/MCMachOStreamer.cpp
Log Message:
-----------
MCMachOStreamer: Call MCObjectStreamer::changeSection
We don't want to emit linker-local label `ltmpN` for addrsig and
cg_profile sections. Make the intention clear to prepare for the pending
refactoring that moves emitLabel from switchSection to changeSection.
Commit: 0f235695709d2505651a55ec7f3c8b7fba2b2dbb
https://github.com/llvm/llvm-project/commit/0f235695709d2505651a55ec7f3c8b7fba2b2dbb
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mcpu=ultrasparc3 on Solaris/SPARC (#149990)
Prompted by PR #149652, this patch changes the Solaris/SPARC default to
-mcpu, matching both the Oracle Studio 12.6 compilers and GCC 16:
[[PATCH] Default to -mcpu=ultrasparc3 on
Solaris/SPARC](https://gcc.gnu.org/pipermail/gcc-patches/2025-July/690191.html).
This is equivalent to enabling the `vis2` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: d385e9d86bce21679ac04b1c6abde0182f1d9e03
https://github.com/llvm/llvm-project/commit/d385e9d86bce21679ac04b1c6abde0182f1d9e03
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support V_PK_ADD_{MIN|MAX}_{I|U}16 and V_{MIN|MAX}3_{I|U}16 on gfx1250 (#150155)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 073460a2a35c7f0d9aa643e3043fccd62f094c9e
https://github.com/llvm/llvm-project/commit/073460a2a35c7f0d9aa643e3043fccd62f094c9e
Author: Jakub Chlanda <jakub at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/ROCm.h
Log Message:
-----------
[HIP][Clang][Driver] Move BC preference logic into ROCm detection (#149294)
This patch provides a single point for handling the logic behind
choosing common bitcode libraries. The intention is that the users of
ROCm installation detector will not have to rewrite options handling
code each time the bitcode libraries are queried. This is not too
distant from detectors for other architecture that encapsulate the
similar decision making process, providing cleaner interface. The only
flag left in `getCommonBitcodeLibs` (main point of entry) is
`NeedsASanRT`, this is deliberate, as in order to calculate it we need
to consult `ToolChain`.
Commit: 1e24b53534ed4043562ae32bb16c55b7820a3aed
https://github.com/llvm/llvm-project/commit/1e24b53534ed4043562ae32bb16c55b7820a3aed
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] Add limit for expansion of gep chains (#147065)
When converting gep subtraction / comparison to offset subtraction /
comparison, avoid expanding very long multi-use gep chains.
Commit: b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
https://github.com/llvm/llvm-project/commit/b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
Log Message:
-----------
[Sanitizers] Remove handling for lifetimes on non-alloca insts (NFC) (#149994)
After #149310 the pointer argument of lifetime.start/lifetime.end is
guaranteed to be an alloca, so we don't need to go through
findAllocaForValue() anymore, and don't have to have special handling
for the case where it fails.
Commit: 0cfea5b73cadfcf408f3549ff209fba4f56f9138
https://github.com/llvm/llvm-project/commit/0cfea5b73cadfcf408f3549ff209fba4f56f9138
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[BitcodeReader] Avoid quadratic complexity in intrinsic upgrade (#150032)
When materializing a function, we'd upgrade all calls to all upgraded
intrinsics. However, this would operate on all calls to the intrinsic
(including previously materialized ones), which leads to quadratic
complexity.
Instead, only upgrade the calls that are in the materialized function.
This fixes a compile-time regression introduced by #149310.
Commit: b7889a65a8e54f2d9c7f578a515a7bf970044bfe
https://github.com/llvm/llvm-project/commit/b7889a65a8e54f2d9c7f578a515a7bf970044bfe
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
Log Message:
-----------
[lldb][SBType] GetBasicType to unwrap canonical type (#149112)
`SBType::GetBasicType` fails on typedefs to primitive types. The docs
for `GetBasicType` state:
```
Returns the BasicType value that is most appropriate to this type
```
But, e.g., for `uint64_t` this would currently return
`eBasicTypeInvalid`.
`TypeSystemClang::GetBasicTypeEnumeration` (which is what
`SBType::GetBasicType` uses) doesn't see through typedefs. Inside LLDB
we almost always call `GetBasicTypeEnumeration` on the canonical type.
In the cases we don't I suspect those were just subtle bugs. This patch
gets the canonical type inside of `GetBasicTypeEnumeration` instead.
rdar://155829208
Commit: 7e878aaf23dd559fa491a0bf6168f15f939c5965
https://github.com/llvm/llvm-project/commit/7e878aaf23dd559fa491a0bf6168f15f939c5965
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[PatternMatch] Add support for capture-and-match (NFC) (#149825)
When using PatternMatch, there is a common problem where we want to both
match something against a pattern, but also capture the
value/instruction for various reasons (e.g. to access flags).
Currently the two ways to do that is to either capture using
m_Value/m_Instruction and do a separate match on the result, or to use
the somewhat awkward `m_CombineAnd(m_XYZ, m_Value(V))` pattern.
This PR introduces to add a variant of `m_Value`/`m_Instruction` which
does both a capture and a match. `m_Value(V, m_XYZ)` is basically
equivalent to `m_CombineAnd(m_XYZ, m_Value(V))`.
I've ported two InstCombine files to this pattern as a sample.
Commit: b17f4d3366cd3a6a276b825342c270a839b849db
https://github.com/llvm/llvm-project/commit/b17f4d3366cd3a6a276b825342c270a839b849db
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use AA during store merge (#149992)
This is a small extension of #147540, resolving one of the FIXMEs.
Instead of bailing out on any instruction that may read/write memory,
use AA to check whether it can alias the stored parts. Do this using a
crude check based on the underlying object only.
This pattern occurs rarely in practice, but at the same time it also doesn't
seem to add any compile-time cost, so it's probably worth handling.
Commit: c3a9e69737c0577cacddff1a2b4cfd2209fb3706
https://github.com/llvm/llvm-project/commit/c3a9e69737c0577cacddff1a2b4cfd2209fb3706
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/pr148084.ll
Log Message:
-----------
[RISCV] Add test coverage for #148084
Commit: 0586067cf07bef0f04fd1dc7135a9b773ebaa07a
https://github.com/llvm/llvm-project/commit/0586067cf07bef0f04fd1dc7135a9b773ebaa07a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Semantics/canonicalize-omp.cpp
Log Message:
-----------
[Flang] Build fix without precompiled headers
The header semantics.h is added implitly in the precompiled headers, but
the build was failing when precompiled headers are disabled (e.g.
using CMAKE_DISABLE_PRECOMPILE_HEADERS=ON):
```
../_src/flang/lib/Semantics/canonicalize-omp.cpp: In constructor ‘Fortran::semantics::CanonicalizationOfOmp::CanonicalizationOfOmp(Fortran::semantics::SemanticsContext&)’:
../_src/flang/lib/Semantics/canonicalize-omp.cpp:31:38: error: invalid use of incomplete type ‘class Fortran::semantics::SemanticsContext’
31 | : context_{context}, messages_{context.messages()} {}
| ^~~~~~~
In file included from ../_src/flang/lib/Semantics/canonicalize-omp.cpp:9:
../_src/flang/lib/Semantics/canonicalize-omp.h:17:7: note: forward declaration of ‘class Fortran::semantics::SemanticsContext’
17 | class SemanticsContext;
| ^~~~~~~~~~~~~~~~
compilation terminated due to -fmax-errors=1.
```
Commit: 39b9891fc9adb23a1894b2aeea1f5577892a40fe
https://github.com/llvm/llvm-project/commit/39b9891fc9adb23a1894b2aeea1f5577892a40fe
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Make RISCVVPseudo extend Pseudo. NFC (#149785)
This PR makes RISCVVPseudo extend Pseudo so that we don't forget to
define a record for RISCVVPseudo.
Commit: 6c50e2b2dda185816b3a4d65cef6771dad5113d8
https://github.com/llvm/llvm-project/commit/6c50e2b2dda185816b3a4d65cef6771dad5113d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
Log Message:
-----------
[SCEV] Don't require NUW at first add when checking A+C1 < (A+C2)<nuw> (#149795)
Relax the NUW requirements for isKnownPredicateViaNoOverflow, if the
second operand (Y) is an ADD. The code only simplifies the condition if
C1 < C2, so if the second ADD is NUW, it doesn't matter whether the
first operand also has the NUW flag, as it cannot wrap if C1 < C2.
https://alive2.llvm.org/ce/z/b3dM7N
PR: https://github.com/llvm/llvm-project/pull/149795
Commit: b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
https://github.com/llvm/llvm-project/commit/b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
Author: Ralf Jung <post at ralfj.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: allocated objects can grow (#141338)
This enables the (reasonably common) pattern of using `mmap` to reserve
but not actually map a wide range of pages, and then only adding in more
pages as memory is actually needed. Effectively, that region of memory
is one big allocated object for LLVM, but crucially, that allocated
object *changes its size*.
Having an allocated object grow seems entirely compatible with what LLVM
optimizations assume, *except* that when LLVM sees an `alloca` or
similar instruction, it will assume that a pointer that has been
`getelementptr inbounds` by more than the size of the allocated object
cannot alias that `alloca`. But for allocated objects that are created
e.g. by `mmap`, where LLVM does not know their size, this cannot happen
anyway.
The other main point to be concerned about is having a `getelementptr
inbounds` that is moved up across an operation that grows an allocated
object: this should be legal as `getelementptr` is freely reorderable.
We achieve that by saying that for allocated objects that change their
size, "inbounds" means "inbounds of their maximal size", not "inbounds
of their current size".
It would be nice to also allow shrinking allocations (e.g. by
`munmap`ing pages at the end), but that is more tricky. Consider an
example like this:
- load 4 bytes from `ptr`
- call some function
- load 1 byte from `ptr`
Right now, LLVM could argue that since `ptr` clearly has not been
deallocated, there must be at least 4 bytes of dereferenceable memory
behind `ptr` after the call. If allocations can shrink, this kind of
reasoning is no longer valid. I don't know if LLVM actually does
reasoning like that -- I think it should not, since I think it should be
possible to have allocations that shrink -- but to remain conservative I
am not proposing that as part of this patch.
Commit: 52737ea6d69d79fb104480d9cd67bf85711fc939
https://github.com/llvm/llvm-project/commit/52737ea6d69d79fb104480d9cd67bf85711fc939
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
[clang][test] Require x86 target for new Windows EH tests
Added by https://github.com/llvm/llvm-project/pull/144745.
These tests cause Clang -cc1 to generate the option
-x86-asm-syntax=intel, which is only available if you have
included the x86 target.
<<<<<<
1: clang: warning: argument unused during compilation: '-c' [-Wunused-command-line-argument]
label:38'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
label:38'1 ? possible intended match
2: clang (LLVM option parsing): Unknown command line argument '-x86-asm-syntax=intel'. Try: 'clang (LLVM option parsing) --help'
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3: clang (LLVM option parsing): Did you mean '--asan-stack=intel'?
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>
Commit: 2a5cd50c469891a0bc918b42785cbf6fd6132a50
https://github.com/llvm/llvm-project/commit/2a5cd50c469891a0bc918b42785cbf6fd6132a50
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/test/ELF/loongarch-relax-tlsdesc.s
Log Message:
-----------
[lld][LoongArch] Support relaxation during TLSDESC GD/LD to IE/LE conversion (#123730)
Complement https://github.com/llvm/llvm-project/pull/123715. When
relaxation enable, remove redundant NOPs.
Commit: c295f050633ba4feb3e2ed74811b9c9d7add758d
https://github.com/llvm/llvm-project/commit/c295f050633ba4feb3e2ed74811b9c9d7add758d
Author: Aaron Danen <aaron.danen at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Improve error message on failed undos (#149396)
Updated error message logic for undo function. Throws different errors
for the case of there being nothing to undo, and for the case of
requesting more undos than there are operations to undo.
Fixes https://github.com/llvm/llvm-project/issues/143668
Commit: 61ce6d70a2fe309d65fe3b7db5b94c17067b9628
https://github.com/llvm/llvm-project/commit/61ce6d70a2fe309d65fe3b7db5b94c17067b9628
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmNeon/Transforms.h
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/Transforms/LowerContractToNeonPatterns.cpp
R mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
A mlir/test/Dialect/ArmNeon/vector-bfmmla.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Lower vector.contract to Neon FEAT_BF16 operations (#148198)
This builds upon the framework established by
https://github.com/llvm/llvm-project/pull/149810
to add lowering to `bfmmla`.
Commit: 77b1b956da234d3b3be31c4f04e6af3173b306a1
https://github.com/llvm/llvm-project/commit/77b1b956da234d3b3be31c4f04e6af3173b306a1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[LV] Also clamp MaxVF by trip count when maximizing vector bandwidth. (#149794)
Also clamp the max VF when maximizing vector bandwidth by the maximum
trip count. Otherwise we may end up choosing a VF for which the vector
loop never executes.
PR: https://github.com/llvm/llvm-project/pull/149794
Commit: 36c37b019b5daae79785e8558d693e6ec42b0ebd
https://github.com/llvm/llvm-project/commit/36c37b019b5daae79785e8558d693e6ec42b0ebd
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
Log Message:
-----------
[flang][OpenMP] Restore reduction processor behavior broken by #145837 (#150178)
Fixes #149089 and #149700.
Before #145837, when processing a reduction symbol not yet supported by
OpenMP lowering, the reduction processor would simply skip filling in
the reduction symbols and variables. With #145837, this behvaior was
slightly changed because the reduction symbols are populated before
invoking the reduction processor (this is more convenient to shared the
code with `do concurrent`).
This PR restores the previous behavior.
Commit: 3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
https://github.com/llvm/llvm-project/commit/3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
Log Message:
-----------
[NFC][Clang][FMV] Make FMV priority data type future proof. (#150079)
FMV priority is the returned value of a polymorphic function. On RISC-V
and X86 targets a 32-bit value is enough. On AArch64 we currently need
64 bits and we will soon exceed that. APInt seems to be a suitable
replacement for uint64_t, presumably with minimal compile time overhead.
It allows bit manipulation, comparison and variable bit width.
Commit: 2726b7fb1c0768bf404a712e5940b64db9fed5e1
https://github.com/llvm/llvm-project/commit/2726b7fb1c0768bf404a712e5940b64db9fed5e1
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Event.td
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/event/olDestroyEvent.cpp
A offload/unittests/OffloadAPI/event/olSyncEvent.cpp
R offload/unittests/OffloadAPI/event/olWaitEvent.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
A offload/unittests/OffloadAPI/queue/olSyncQueue.cpp
R offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
Log Message:
-----------
[Offload] Rename olWaitEvent/Queue to olSyncEvent/Queue (#150023)
This more closely matches the nomenclature used by CUDA, AMDGPU and
the plugin interface.
Commit: ffdada166689172e54bd664ff3e43c824c22c69b
https://github.com/llvm/llvm-project/commit/ffdada166689172e54bd664ff3e43c824c22c69b
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Add loan expiry analysis (#148712)
This PR adds the `ExpiredLoansAnalysis` class to track which loans have expired. The analysis uses a dataflow lattice (`ExpiredLattice`) to maintain the set of expired loans at each program point.
This is a very light weight dataflow analysis and is expected to reach fixed point in ~2 iterations.
In principle, this does not need a dataflow analysis but is used for convenience in favour of lean code.
Commit: 5de443a4d37e1b7580f9ccee389572aef7233a85
https://github.com/llvm/llvm-project/commit/5de443a4d37e1b7580f9ccee389572aef7233a85
Author: Andrey Karlov <dein.negativ at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
Log Message:
-----------
[clang-tidy] Make copy-and-swap idiom more general for `bugprone-unhandled-self-assignment` (#147066)
This change enhances the `bugprone-unhandled-self-assignment` checker by
adding an additional matcher that generalizes the copy-and-swap idiom
pattern detection.
# What Changed
Added a new matcher that checks for:
- An instance of the current class being created in operator=
(regardless of constructor arguments)
- That instance being passed to a `swap` function call
# Problem Solved
This fix reduces false positives in PMR-like scenarios where "extended"
constructors are used (typically taking an additional allocator
argument). The checker now properly recognizes copy-and-swap
implementations that use extended copy/move constructors instead of
flagging them as unhandled self-assignment cases.
Fixes #146324
---------
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
https://github.com/llvm/llvm-project/commit/a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Optimize stripAndAccumulateConstantOffsets() for common case (NFC)
For the common case where we don't have bit width changing address
space casts, we can directly call accumulateConstantOffset() on the
original Offset. Skip the bit width reconciliation logic in that
case.
Commit: 33455825428f9e1b7998a66e228da7f6d483acf8
https://github.com/llvm/llvm-project/commit/33455825428f9e1b7998a66e228da7f6d483acf8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vec_extract.ll
Log Message:
-----------
[X86] getTargetConstantBitsFromNode - early-out if the element bitsize doesn't align with the source bitsize (#150184)
As we use getTargetConstantBitsFromNode in a wider variety of places we can't guarantee that all the sources match (or are legal) anymore - better to early out than assert.
Fixes #150117
Commit: 756ac65987b84b7427c25d76f069a04a4a817a5c
https://github.com/llvm/llvm-project/commit/756ac65987b84b7427c25d76f069a04a4a817a5c
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Passes/PassBuilder.cpp
A llvm/test/CodeGen/AMDGPU/finalizebundle.mir
Log Message:
-----------
[CodeGen] Add a pass for testing finalizeBundle (#149813)
This allows for unit testing of finalizeBundle with standard MIR tests
using update_mir_test_checks.py.
Commit: d449d3dc13daff388cbf6a7bb910e0511804eb84
https://github.com/llvm/llvm-project/commit/d449d3dc13daff388cbf6a7bb910e0511804eb84
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
Log Message:
-----------
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
Replace its only use in the AMDGPU R600 backend with a call to
finalizeBundles.
Commit: 283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
https://github.com/llvm/llvm-project/commit/283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Use get() to get raw pointer (#150205)
Fix issue reported in #150136. `createAllocatable` returns an OwingPtr.
Use `get()` to get the raw pointer has it is done in the
`flang-rt/unittests/Runtime/CUDA/Memory.cpp` tests.
Commit: f992ae4fd16357116b341a1c8291b970787dc462
https://github.com/llvm/llvm-project/commit/f992ae4fd16357116b341a1c8291b970787dc462
Author: Luke Drummond <luke.drummond at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/tools/bugpoint/bugpoint.cpp
M polly/include/polly/LinkAllPasses.h
Log Message:
-----------
Slightly improve the getenv("bar") linking problem
There's been a variation of the following in the code since 2005:
if (unoptimizable_true)
return;
use_this_symbol_to_force_linking(); // unreachable but never removed
Way back in 00d5508496c it was the win32 call `GetCurrentProcess`
but switched to `getenv("bar")` fairly soon after in 63e504ff43. While
that pulled in fewer dependencies and made the code portable, it's a
bit of a weird construct. The environment variable used for the `getenv`
call is "bar", which is particularly weird to see fly past when you run
`ltrace` on a binary linked against LLVM.
In this patch I don't try to replace this construct wholesale - it's
still required for architectural reasons I'm not able to tackle right
now, but I did try and make it slightly less weird and opaque:
- It gives the construct a name
- The environment variable hints where this comes from and that its
value is ignored
Combined, this should be a bit of improvement for the next person who
wonders what LLVM is up to when they trace their process or see
smatterings of `getenv("bar")` dotted around the source.
Commit: 3affbce84342a80a0d869720353786d0db62ff4b
https://github.com/llvm/llvm-project/commit/3affbce84342a80a0d869720353786d0db62ff4b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix a crash on invalid concept (#150186)
Fixes #149986
Commit: cc380f6e9ba48bfc7fad932d3031141ca88dde53
https://github.com/llvm/llvm-project/commit/cc380f6e9ba48bfc7fad932d3031141ca88dde53
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
Log Message:
-----------
[LLDB] Add formatters for MSVC STL map-like types (#148385)
This PR adds formatters for `std::map`, `std::set`, `std::multimap`,
`std::multiset` as well as their iterators. It's done in one PR because
the types are essentially the same (a tree) except for their value type.
The iterators are required because of the tests.
`MsvcStlTreeIterSyntheticFrontEnd` is based on the libc++ equivalent. As
opposed to `std::list`, there aren't that many duplicates, so I didn't
create a generic type.
For reference, the tree is implemented in
https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xtree.
Towards #24834.
Commit: 411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
https://github.com/llvm/llvm-project/commit/411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port cc380f6e9ba4
Commit: d65cc97ab1bdc61b22e853f3882c9ba267764e53
https://github.com/llvm/llvm-project/commit/d65cc97ab1bdc61b22e853f3882c9ba267764e53
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Fix build on 32-bit platforms after #125556
Commit: 114d74e39151ea60afd211a307011f3943ecc9a9
https://github.com/llvm/llvm-project/commit/114d74e39151ea60afd211a307011f3943ecc9a9
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Expand VPBlendRecipes to select instructions. NFC (#133993)
When looking at some EVL tail folded code in SPEC CPU 2017 I noticed we
sometimes have both VPBlendRecipes and select VPInstructions in the same
plan:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
BLEND ir<%8> = ir<%n.015> ir<%foo>/vp<%8>
EMIT vp<%9> = select vp<%active.lane.mask>, ir<%8>, ir<%n.015>
Since a blend will ultimately generate a chain of selects, we could fold
the blend into the select:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
EMIT ir<%8> = select vp<%8>, ir<%foo>, ir<%n.015>
So as a first step, this patch expands blends to a series of select
instructions, which may allow them to be simplified further with other
select instructions.
Commit: bdd638a89763046d9cbd8493c8801ef0898c8555
https://github.com/llvm/llvm-project/commit/bdd638a89763046d9cbd8493c8801ef0898c8555
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Remove handling for lifetime intrinsic on non-alloca (NFC)
After #149310 this is guaranteed to be an alloca.
Commit: 18edd82716a710e40cbed3bd81b8c9e64060c171
https://github.com/llvm/llvm-project/commit/18edd82716a710e40cbed3bd81b8c9e64060c171
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll
Log Message:
-----------
[Inline] Regenerate test checks (NFC)
Do not omit check lines for any functions, to avoid spurious diffs
on regeneration. Also update to a newer UTC version which properly
generates the metadata checks.
Commit: 2147e29f641f22822e2b0e10c978b28b06db1aeb
https://github.com/llvm/llvm-project/commit/2147e29f641f22822e2b0e10c978b28b06db1aeb
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Tests for unnecessary S_WAIT_XCNT insertion (#145688)
Hardware does an implicit "S_WAIT_XCNT 0" between SMEM and VMEM
instructions, so there will never be outstanding address translations
for both SMEM and VMEM at the same time.
Commit: efa25c4737440887772e6c6ed72029afa0bf05ca
https://github.com/llvm/llvm-project/commit/efa25c4737440887772e6c6ed72029afa0bf05ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Clang] Fix new driver device only compilation for `amdgcnspirv` target (#150110)
Summary:
This is broken with the current target because it was not bundling the
output as HIP likes and this would fail if targeting both at the same
time.
Commit: 01e23c3d626c30000820465f029793e44e2062e4
https://github.com/llvm/llvm-project/commit/01e23c3d626c30000820465f029793e44e2062e4
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
Log Message:
-----------
[HIPSTDPAR] Add support for globals (#146813)
This (mostly) removes one of the largest remaining limitations of
`hipstdpar` based algorithm acceleration, by adding support for global
variable usage in offloaded algorithms. It is mean to compose with a run
time component that will live in the support library, and fires iff a
special variable is provided by the latter. In short, things work as
follows:
- We replace uses some global `G` with an indirect access via an
implicitly created anonymous global `F`, which is of pointer type and is
expected to hold the program-wide address of `G`;
- We append 'F', alongside 'G''s name, to an table structure;
- At run-time, the support library uses the table to look-up the
program-wide address of a contained symbol based on its name, and then
stores the address via the paired pointer.
This doesn't handle internal linkage symbols (`static foo` or `namespace
{ foo }`) if they are not unique i.e. if there's a name clash that is
solved by the linker, as the resolution would not be visible. Also,
initially we will only support "true" globals in RDC mode. Things would
be much simpler if we had direct access to the accelerator loader, but
since the expectation is to compose at the HIP RT level we have to jump
through additional hoops.
Commit: 6ed921f9675b7f1bb840f115d81cede4d182cdc2
https://github.com/llvm/llvm-project/commit/6ed921f9675b7f1bb840f115d81cede4d182cdc2
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
Log Message:
-----------
Reland "[mlir][vector] Use vector.broadcast in place of vector.splat" (#150138)
This reverts commit 228c45f13dc92546661b6825b7b32c3808b0d2eb (PR
#148937) . Now that #148027 is landed, I think it is safe to "reland"
the original PR: #148028
Commit: 2c6eec219d7791cb083d8add242f0b1d2a0e3160
https://github.com/llvm/llvm-project/commit/2c6eec219d7791cb083d8add242f0b1d2a0e3160
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/GVN/lifetime-simple.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/NewGVN/verify-memoryphi.ll
M llvm/test/Transforms/SROA/alloca-address-space.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/ignore-droppable.ll
M llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/invoke_unwind_lifetime.ll
Log Message:
-----------
[Tests] Avoid lifetime intrinsics on non-allocas (NFC)
Don't rely on auto-upgrade, instead either remove unnecessary
casts or remove no longer applicable tests.
Commit: 081b74caf5fbfe04abc372c453cb1d6fc8f781a7
https://github.com/llvm/llvm-project/commit/081b74caf5fbfe04abc372c453cb1d6fc8f781a7
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/sequence.c
A offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
Log Message:
-----------
[Offload] Add olWaitEvents (#150036)
This function causes a queue to wait until all the provided events have
completed before running any future scheduled work.
Commit: 43db6c5cc1a81b540ddca49bee197895c420ec2d
https://github.com/llvm/llvm-project/commit/43db6c5cc1a81b540ddca49bee197895c420ec2d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A flang/include/flang/Parser/openmp-utils.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] General utility to get directive id from AST node (#150121)
Fortran::parser::omp::GetOmpDirectiveName(t) will get the
OmpDirectiveName object that corresponds to construct t. That object (an
AST node) contains the enum id and the source information of the
directive.
Replace uses of extractOmpDirective and getOpenMPDirectiveEnum with the
new function.
Commit: 8e072b9d495293b08d939c880d185025751b4269
https://github.com/llvm/llvm-project/commit/8e072b9d495293b08d939c880d185025751b4269
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
Log Message:
-----------
[sanitizer_common][nfc] Rename `tid_t` to avoid conflicting declarations (#149011)
`tid_t` is also defined in the AIX header `/usr/include/sys/types.h`
which is included by system `pthread.h`. The use of `tid_t` by AIX is
conforming according to
[POSIX](https://pubs.opengroup.org/onlinepubs/9799919799/functions/V2_chap02.html):
> Implementations may add symbols to the headers shown in the following
table [ ... ]
Commit: f1bb5de611922bfd76846d0b36a9b92a1dfce80e
https://github.com/llvm/llvm-project/commit/f1bb5de611922bfd76846d0b36a9b92a1dfce80e
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/tanpi.f90
Log Message:
-----------
[flang] Implement `tanpi` (#149527)
Commit: 594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
https://github.com/llvm/llvm-project/commit/594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math][c++23] Implement comparison operations operator overloads for BFloat16 (#150087)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: fc0a978327215aa8883ae6f18d1e316f3c04520a
https://github.com/llvm/llvm-project/commit/fc0a978327215aa8883ae6f18d1e316f3c04520a
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/assign-statement.f90
Log Message:
-----------
[Flang] Fix ASSIGN statement (#149941)
Handle the case where the assigned variable also has a pointer
attribute.
Fixes #121721
Commit: 8fff238b2c363b036ce9e7bf7abab3acafc87ab2
https://github.com/llvm/llvm-project/commit/8fff238b2c363b036ce9e7bf7abab3acafc87ab2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/EmptyOpPatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/ExtractSliceFromReshapeUtils.cpp
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Tensor/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
https://github.com/llvm/llvm-project/commit/c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/IO.cpp
A flang/test/Lower/equivalence-3.f
Log Message:
-----------
[Flang] Fix a crash when equivalence and namelist statements are used (#150081)
Check for equivalence when generating namelist descriptors in IO.cpp.
Fixes #124489
Commit: 72df5464eda2c0986200a4bfb30e086ee59fe1d6
https://github.com/llvm/llvm-project/commit/72df5464eda2c0986200a4bfb30e086ee59fe1d6
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math] Remove constexpr from bfloat16 comparison operations (#150227)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: dfd3935e4ff72ab85bab758e297f93e04f8effed
https://github.com/llvm/llvm-project/commit/dfd3935e4ff72ab85bab758e297f93e04f8effed
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add regbanklegalize rules for uniform global loads (#145909)
Commit: 9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
https://github.com/llvm/llvm-project/commit/9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[VPlan] Mark VPInstruction::ExplicitVectorLength as single scalar. NFC (#150221)
This allows it to be broadcasted without an explicit
VPInstruction::Broadcast in #150202
Commit: 5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
https://github.com/llvm/llvm-project/commit/5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
Log Message:
-----------
AMDGPU/GlobalISel: Add tests for missing readanylane combines (#145910)
Commit: 933ba273063f5a4289f0fce109f8f8c17124aa41
https://github.com/llvm/llvm-project/commit/933ba273063f5a4289f0fce109f8f8c17124aa41
Author: Martin Wehking <martin.wehking at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/AArch64/neon-intrinsics.c
Log Message:
-----------
Fix implicit vector conversion (#149970)
Previously, the unsigned NEON intrinsic variants of 'vqshrun_high_n' and
'vqrshrun_high_n' were using signed integer types for their first
argument and return values.
These should be unsigned according to developer.arm.com, however.
Adjust the test cases accordingly.
Commit: 4bdef46fe89a3359a2eec631c0f6722a736aae0c
https://github.com/llvm/llvm-project/commit/4bdef46fe89a3359a2eec631c0f6722a736aae0c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
Log Message:
-----------
AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (#145911)
Commit: 3564cfa211e932e4a9d19096ead9a241539e6bb9
https://github.com/llvm/llvm-project/commit/3564cfa211e932e4a9d19096ead9a241539e6bb9
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
Commit: e0a48bb256ffa380d226d9cc50b29196ef587741
https://github.com/llvm/llvm-project/commit/e0a48bb256ffa380d226d9cc50b29196ef587741
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/rounding_mode.h
Log Message:
-----------
[libc] Make FPUtils' rounding_mode.h functions constexpr. (#149167)
Commit: 5ebbc258d4f410c45f247eb53bc722798b4d4f45
https://github.com/llvm/llvm-project/commit/5ebbc258d4f410c45f247eb53bc722798b4d4f45
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
Log Message:
-----------
[mlir][ArithToAMDGPU][NFC] Add PatternBenefit (#150091)
Since there may be caseses where these patterns are run alongside the
generic patterns from ArithExpandOps, add a PatternBenefit argument to
allow these architecture-specific patterns to be prioritized.
Commit: d2dedcd11f51c23d8401b7e5eff11b23faea652b
https://github.com/llvm/llvm-project/commit/d2dedcd11f51c23d8401b7e5eff11b23faea652b
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
A llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Delete empty autoreleasepools with no autoreleases in them (#144788)
Erase empty autorelease pools that have no autorelease in them
Commit: 38a977d00c4e22f4a2a21e5f577c57df2053872e
https://github.com/llvm/llvm-project/commit/38a977d00c4e22f4a2a21e5f577c57df2053872e
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Interpreter/fail.cpp
Log Message:
-----------
[clang-repl] Always clean up scope and context for TopLevelStmtDecl (#150215)
This fixes an issue introduced by
https://github.com/llvm/llvm-project/pull/84150, where failing to pop
compound scope, function scope info, and decl context after a failed
statement could lead to an inconsistent internal state.
Commit: 06233892e84f96a3b4e05338cd4f6c12b8f5a185
https://github.com/llvm/llvm-project/commit/06233892e84f96a3b4e05338cd4f6c12b8f5a185
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mv8plus on 32-bit Solaris/SPARC (#150176)
While investigating PR #149990, I noticed that while both the Oracle
Studio compilers and GCC default to `-mv8plus` on 32-bit Solaris/SPARC,
Clang does not.
This patch fixes this by enabling the `v8plus` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: 97eec759e69e7534e020b4e2ad1858842eec50ee
https://github.com/llvm/llvm-project/commit/97eec759e69e7534e020b4e2ad1858842eec50ee
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/bitfields.c
Log Message:
-----------
[CIR] Add support for binary operations on bitfield members (#149676)
This PR introduces support for binary operations on bitfield members.
Commit: f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
https://github.com/llvm/llvm-project/commit/f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Fold icmp of gep chains (#146714)
This extends https://github.com/llvm/llvm-project/pull/144065 to the
general case of an icmp between two GEP chains that have a common base.
Commit: d5c8303af86f8f4f50320b831c027df4febcd5ea
https://github.com/llvm/llvm-project/commit/d5c8303af86f8f4f50320b831c027df4febcd5ea
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::deque (#150097)
This PR adds synthetic children for std::deque from MSVC's STL.
Similar to libstdc++ and libc++, the elements are in a `T**`, so we need
to "subscript" twice. The [NatVis for
deque](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/debugger/STL.natvis#L1103-L1112)
uses `_EEN_DS` which contains the block size. We can't access this, but
we can access the [constexpr
`_Block_size`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/deque#L641).
Towards #24834.
Commit: 05f0dd2e917e90579ac49f94b29d12099d489efd
https://github.com/llvm/llvm-project/commit/05f0dd2e917e90579ac49f94b29d12099d489efd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port d5c8303af86f
Commit: dbc63f1e3724b6f2348c431dc1216537d9c042e8
https://github.com/llvm/llvm-project/commit/dbc63f1e3724b6f2348c431dc1216537d9c042e8
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
A mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` into `amdgpu.gather_to_lds` (#149851)
This PR adds a new optimization pass to fold
`memref.subview/expand_shape/collapse_shape` ops into consumer
`amdgpu.gather_to_lds` operations.
* Implements a new pass `AmdgpuFoldMemRefOpsPass` with pattern
`FoldMemRefOpsIntoGatherToLDSOp`
* Adds corresponding folding tests
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 7dcd90df454e47a8db17c5ec956222e6b7858945
https://github.com/llvm/llvm-project/commit/7dcd90df454e47a8db17c5ec956222e6b7858945
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
[lld][ELF] Allow `data.rel.ro.hot` and `.data.rel.ro.unlikely` to be RELRO (#148920)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition a static data section (like `.data.rel.ro`) into
two sections, one grouping the cold ones and the other grouping the
rest.
lld requires all relro sections to be contiguous. To place
`.data.rel.ro.unlikely` in the middle of all relro sections, this change
proposes to add `.data.rel.ro.unlikely` explicitly as RELRO section.
---------
Co-authored-by: Sam Elliott <quic_aelliott at quicinc.com>
Commit: 97faab7bc279516a31001621203f4ff5a158ed13
https://github.com/llvm/llvm-project/commit/97faab7bc279516a31001621203f4ff5a158ed13
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Lower/Bridge.cpp:2128:10: error: unused variable 'result'
[-Werror,-Wunused-variable]
Commit: f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
https://github.com/llvm/llvm-project/commit/f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[NFC][AMDGPU] Re-run update_test_checks over some tests (#150231)
Commit: a7867fcd94555fb056bcaac66de45d4635da99bf
https://github.com/llvm/llvm-project/commit/a7867fcd94555fb056bcaac66de45d4635da99bf
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
A llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[FileCheck] Limit quadratic partial-match search behavior (#147833)
Commit: 56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
https://github.com/llvm/llvm-project/commit/56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add transformation pattern for vector.broadcast in Wg to Sg pass (#144417)
This PR adds transformation pattern for vector.broadcast op in
xegpu-wg-to-sg-distribute pass
Commit: 10c38943a074033143cfb86118e4e6251db97e9a
https://github.com/llvm/llvm-project/commit/10c38943a074033143cfb86118e4e6251db97e9a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Refactor the tablegen classes for P-ext shift instructions. NFC (#150175)
-Rename based on element size suffix rather than immediate size.
-Use _ri suffix like we do for shifts in the base ISA.
-Push some common code to the base class.
-Use shamt for the field name to enable more sharing.
-Add funct3 as a parameter which we'll need for right shifts.
Commit: b0434925c98c9a8906afea60a1304c870b1f574a
https://github.com/llvm/llvm-project/commit/b0434925c98c9a8906afea60a1304c870b1f574a
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (4/n) (#149879)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 4471d59a10f70b502b036f57f4728f2411442fc4
https://github.com/llvm/llvm-project/commit/4471d59a10f70b502b036f57f4728f2411442fc4
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/acospi.f90
Log Message:
-----------
[flang] Implement `acospi` (#150234)
Commit: 01b23c8d81662ed8383df78c2de0ea100d92d503
https://github.com/llvm/llvm-project/commit/01b23c8d81662ed8383df78c2de0ea100d92d503
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/asinpi.f90
Log Message:
-----------
[flang] Implement `asinpi` (#150238)
Commit: 90944b85c5331a4cf8b720b5a966bc2c735499d7
https://github.com/llvm/llvm-project/commit/90944b85c5331a4cf8b720b5a966bc2c735499d7
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add offset operands to load_nd/store_nd/prefetch_nd (#149424)
This PR allows load_nd/store_nd/prefetch_nd to take an additional offset
operand.
It is based on this PR https://github.com/llvm/llvm-project/pull/148335.
Now user can create a nd_tdesc with no offset, and instead set the
offset with the load_nd operation.
Commit: f97adea477069e57422a2446162fe41feb4e1277
https://github.com/llvm/llvm-project/commit/f97adea477069e57422a2446162fe41feb4e1277
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-data-section-prefix.s
R lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
ELF: Simplify isRelRoDataSection and rename the text file
PR #148920 was merged before I could share my comments.
* Fix the text filename. There are other minor suggestions, but can be
done in #148985
* Make `isRelRoDataSection` concise, to be consistent with the majority of
helper functions.
Commit: 317dae1a7e5fb81038177d8c58ee1e376d50ea5c
https://github.com/llvm/llvm-project/commit/317dae1a7e5fb81038177d8c58ee1e376d50ea5c
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
Log Message:
-----------
[mlir][xegpu] Add initial skeleton implementation for lowering ConvertLayoutOp (#146176)
This PR adds initial skeleton implementation for lowering
ConvertLayoutOp. It currently only supports cases where SLM is not
needed.
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: 5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
https://github.com/llvm/llvm-project/commit/5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
Author: Fazlay Rabbi <106703039+mdfazlay at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
Log Message:
-----------
[OpenMP 6.0] Allow only byref arguments with `need_device_addr` modifier on `adjust_args` clause (#149586)
If the need_device_addr adjust-op modifier is present, each list item
that appears in the clause must refer to an argument in the declaration
of the function variant that has a reference type.
Reference:
OpenMP 6.0 [Sec 9.6.2, page 332, line 31-33, adjust_args clause,
Restrictions]
Commit: d174743674fe06833a79d59e9ffcffb3048de524
https://github.com/llvm/llvm-project/commit/d174743674fe06833a79d59e9ffcffb3048de524
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150087 and #144983 (#150255)
Commit: ce9d515813f8e1fe8578a3f889abe5325250309e
https://github.com/llvm/llvm-project/commit/ce9d515813f8e1fe8578a3f889abe5325250309e
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Commit: 9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
https://github.com/llvm/llvm-project/commit/9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
R mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
Revert "[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` in… (#150256)
…to `amdgpu.gather_to_lds` (#149851)"
This reverts commit dbc63f1e3724b6f2348c431dc1216537d9c042e8.
Having build deps issue.
Commit: e3b79afa673a029b3b6f546ba59d2998f9cff681
https://github.com/llvm/llvm-project/commit/e3b79afa673a029b3b6f546ba59d2998f9cff681
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[WebAssembly,llvm] Fix buildbot problems with llvm.wasm.ref.test.func (#150116)
PR #147486 broke the sanitizer and expensive-checks buildbot.
These captures were needed when toWasmValType emitted a diagnostic but
are no longer needed since we changed it to an assertion failure. This
removes the unneeded captures and should fix the sanitizer-buildbot.
I also fixed the codegen in the wasm64 target: table.get requires an i32
but in wasm64 the function pointer is an i64. We need an additional
`i32.wrap_i64` to convert it. I also added `-verify-machineinstrs` to
the tests so that the test suite validates this fix.
Finally, I noticed that #150201 uses a feature of the intrinsic that is
not covered by the tests, namely `ptr` arguments. So I added one
additional test case to ensure that it works properly.
cc @dschuff
Commit: 30a6644ffbc479a9a75f840e48dc42aa29f377e5
https://github.com/llvm/llvm-project/commit/30a6644ffbc479a9a75f840e48dc42aa29f377e5
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[Interp] Mark the test unsupported with Asan (#150242)
See https://github.com/llvm/llvm-project/pull/148701
The test is very flaky with asan
Fail: https://lab.llvm.org/buildbot/#/builders/52/builds/9890
Pass: https://lab.llvm.org/buildbot/#/builders/52/builds/9891
Fail again: https://lab.llvm.org/buildbot/#/builders/52/builds/9892
Commit: 108023b7b16297291553650ea6aea809bd7eb78b
https://github.com/llvm/llvm-project/commit/108023b7b16297291553650ea6aea809bd7eb78b
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
Revert "[test][FileCheck] Disable color output in FileCheck test. NFC"
This reverts commit ce9d515813f8e1fe8578a3f889abe5325250309e.
I applied it to the wrong FileCheck invocation.
Commit: 9a12037c573e884b8f027654b56a6151bd5c0a56
https://github.com/llvm/llvm-project/commit/9a12037c573e884b8f027654b56a6151bd5c0a56
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Second try, applied it to the wrong FileCheck invocation last time:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109427750
Commit: 7baf4bdd164cad61f8f3e34ed833a695c4033250
https://github.com/llvm/llvm-project/commit/7baf4bdd164cad61f8f3e34ed833a695c4033250
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
[llvm] Add CalleeTypeIds field to CallSiteInfo
Introducing `EnableCallGraphSection` target option to add
CalleeTypeIds field in CallSiteInfo. Read the callee type ids
in and out by the MIR parser/printer.
Reviewers: ilovepi
Reviewed By: ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/87574
Commit: 8ef0c50ecac8f1e707c02bee855f43eda114f8db
https://github.com/llvm/llvm-project/commit/8ef0c50ecac8f1e707c02bee855f43eda114f8db
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/macros/attributes.h
Log Message:
-----------
[libc] Fix problem with older compilers that do not have __has_builtin. (#150264)
Fixing bot failures:
https://lab.llvm.org/buildbot/#/builders/10/builds/10025
Commit: e67f3237d6242d1c362fa52e782ddfd5ae54a8af
https://github.com/llvm/llvm-project/commit/e67f3237d6242d1c362fa52e782ddfd5ae54a8af
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
Log Message:
-----------
[mlir][armsme][vector] Replace splat with broadcast (#148024)
Part of deprecation of vector.splat
RFC: https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: eb817c7950d3f7b555034a983240a11b8c693dc4
https://github.com/llvm/llvm-project/commit/eb817c7950d3f7b555034a983240a11b8c693dc4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/complex-cast.cpp
Log Message:
-----------
[CIR] Upstream Cast kinds for ComplexType (#149717)
This change adds support for cast kinds for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 32c985485500b214d57cb25306734eb73833d59b
https://github.com/llvm/llvm-project/commit/32c985485500b214d57cb25306734eb73833d59b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
A flang/test/Transforms/external-name-interop-symref-array.fir
Log Message:
-----------
[flang] Extend symbol update to ArrayAttrext in `external-name-interop` (#150061)
In the `external-name-interop` pass, when a symbol is changed, all the
uses of the renamed symbols should also be updated. The update was only
applied to the `SymbolRefAttr` type. With this change, the update will
be applied to `ArrayAttr` containing elements of type `SymbolRefAttr`.
---------
Co-authored-by: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Commit: 81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
https://github.com/llvm/llvm-project/commit/81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Add packed fp32 instructions for gfx1250 (#150253)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
https://github.com/llvm/llvm-project/commit/5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
Log Message:
-----------
[ASan][Darwin][GCD] Add interceptor for dispatch_apply (#149238)
ASan had a gap in coverage for wqthreads blocks submitted by
dispatch_apply
This adds interceptor for dispatch_apply and dispatch_apply_f and adds a
test that a failure in a dispatch apply block contains thread and stack
info.
rdar://139660648
Commit: e89e678839f48d54dc906e8ebed370a6e304083e
https://github.com/llvm/llvm-project/commit/e89e678839f48d54dc906e8ebed370a6e304083e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
R llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
R llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
A llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
Log Message:
-----------
[test] Split SDNodeInfoEmitter tests into multiple files
To simplify updating.
Commit: a36508483e1a36612175500d2dc4754f9aadacc2
https://github.com/llvm/llvm-project/commit/a36508483e1a36612175500d2dc4754f9aadacc2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][python,CAPI] expose Op::isBeforeInBlock (#150271)
Commit: fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
https://github.com/llvm/llvm-project/commit/fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
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M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
Log Message:
-----------
[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMDGPU/*.ll` (#150024)
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
Commit: f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
https://github.com/llvm/llvm-project/commit/f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/test/MC/ELF/AArch64/cfi.s
M llvm/test/MC/ELF/cfi.s
Log Message:
-----------
Support SFrame command-line and .cfi_section syntax (#149935)
This PR adds support for the llvm-mc command-line flag "--gsframe" and
adds ".sframe" to the legal values passed ".cfi_section". It plumbs the
option through the cfi handling code a fair amount. Code to support
actual section generation follows in a future PR.
These options match the gnu-assembler's support syntax for sframes, on
both the command line and in assembly files.
First in a series of changes that will allow llvm-mc to produce sframe
.cfi sections. For more information about sframes, see
https://sourceware.org/binutils/docs-2.44/sframe-spec.html
and the llvm-RFC here:
https://discourse.llvm.org/t/rfc-adding-sframe-support-to-llvm/86900
Commit: 45d99c26c3513945a454e90b69d48257886f8284
https://github.com/llvm/llvm-project/commit/45d99c26c3513945a454e90b69d48257886f8284
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] In 6.0, can omit length in array section (#148048)
In OpenMP 6.0 specification, section 5.2.5 Array Sections, page 166,
lines 28-28:
When the length is absent and the size of the dimension is not known,
the array section is an assumed-size array.
Testing
- Updated LIT test
- check-all
- OpenMP_VV (formerly sollve) test case
tests/6.0/target/test_target_assumed_array_size.c
Commit: 65dec9956273309158f3feba6ea8f150ce995a2a
https://github.com/llvm/llvm-project/commit/65dec9956273309158f3feba6ea8f150ce995a2a
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for subgroup_id_range (#148661)
This PR adds a new attribute to the xegpu dialect called xegpu.range.
One use case of this attribute can be to attach subgroup_id_range to
scf.if of to drive the execution.
Commit: 6a9817113838a3f87e803ac71aab46b3ccf24686
https://github.com/llvm/llvm-project/commit/6a9817113838a3f87e803ac71aab46b3ccf24686
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy] Speed up `misc-header-include-cycle` (#148757)
Performance optimization of misc-header-include-cycle
based on clangd test on Sema.cpp. Check were slow due
calls to SM.translateFile. Cost reduction (+-) from 11% to 3%.
Commit: df1dd803b6a1b1dd514da5e7c1257c0b75592452
https://github.com/llvm/llvm-project/commit/df1dd803b6a1b1dd514da5e7c1257c0b75592452
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Cache the most recently used slot for a chunk size (#149751)
Summary:
This patch changes the `find_slab` logic to simply cache the most
successful slot. This means the happy fast path is now a single atomic
load on this index. I removed the SIMT shuffling logic that did slab
lookups wave-parallel. Here I am considering the actual traversal to be
comparatively unlikely, so it's not overly bad that it takes longer.
ideally one thread finds a slot and shared it with the rest so we only
pay that cost once.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
https://github.com/llvm/llvm-project/commit/ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Search empty bits after failed allocation (#149910)
Summary:
The scheme we use to find a free bit is to just do a random walk. This
works very well up until you start to completely saturate the bitfield.
Because the result of the fetch_or yields the previous value, we can
search this to go to any known empty bits as our next guess. This
effectively increases our liklihood of finding a match after two tries
by 32x since the distribution is random.
This *massively* improves performance when a lot of memory is allocated
without freeing, as it now doesn't takea one in a million shot to fill
that last bit. A further change could improve this further by only
*mostly* filling the slab, allowing 1% to be free at all times.
Commit: 17e32c921acc856498ad13ade495374bed4605b2
https://github.com/llvm/llvm-project/commit/17e32c921acc856498ad13ade495374bed4605b2
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Prefix FileCheck test with %ProtectFileCheckOutput, per post-commit review feedback
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109470352
Commit: bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
https://github.com/llvm/llvm-project/commit/bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support packed bf16 instructions on gfx1250 (#150283)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 9d11accf95db0ed08bd3181c25dd75fc793d089d
https://github.com/llvm/llvm-project/commit/9d11accf95db0ed08bd3181c25dd75fc793d089d
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
A mlir/test/Dialect/SCF/if-cond-prop.mlir
Log Message:
-----------
[mlir] move if-condition propagation to a standalone pass (#150278)
This offers a significant speedup over running this as a
canonicalizaiton pattern, up to 10x improvement when running on large
(>100k operations) inputs coming from Polygeist.
It is also not clear whether this transformation is a reasonable
canonicalization as it performs non-local rewrites.
Commit: 07af7409997887883ab701acc2dc5659144b0cf2
https://github.com/llvm/llvm-project/commit/07af7409997887883ab701acc2dc5659144b0cf2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing parse headers deps (#150295)
I believe this is from #150087 and #144983, but I didn't confirm
specific commits.
Commit: df2d2d125beffb76d5c526a5661fbb11cbcff83b
https://github.com/llvm/llvm-project/commit/df2d2d125beffb76d5c526a5661fbb11cbcff83b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
A llvm/test/Transforms/PGOProfile/prof-verify-as-needed.ll
A llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
A llvm/test/Transforms/PGOProfile/prof-verify.ll
Log Message:
-----------
[PGO] Add ProfileInjector and ProfileVerifier passes (#147388)
Adding 2 passes, one to inject `MD_prof` and one to check its presence. A subsequent patch will add these (similar to debugify) to `opt` (and, eventually, a variant of this, to `llc`)
Tracking issue: #147390
Commit: 20a79027ca58bbde563f9a914e4ada71301eb50a
https://github.com/llvm/llvm-project/commit/20a79027ca58bbde563f9a914e4ada71301eb50a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port df2d2d125bef
Commit: 478130545bc41a8bb80304e5d931559a9d2b6171
https://github.com/llvm/llvm-project/commit/478130545bc41a8bb80304e5d931559a9d2b6171
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
Log Message:
-----------
[clang-tidy] Ignore pure-virtual in portability-template... (#150290)
Ignore pure virtual member functions in
portability-template-virtual-member-function check.
Those functions will be represented in vtable
as __cxa_pure_virtual or something similar.
Fixes #139031.
Commit: 4db2f3ac89b1e62af4893b647d77f3ab1f390066
https://github.com/llvm/llvm-project/commit/4db2f3ac89b1e62af4893b647d77f3ab1f390066
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc] refactor JSON for better Mustache compatibility (#149588)
This patch contains changes for the JSON generator that will enable compatibility with Mustache templates, like booleans to check for the existence and bounds of arrays to avoid duplication.
Commit: 6925caee4bbb4f1352a347c9c05c999e86a3c61e
https://github.com/llvm/llvm-project/commit/6925caee4bbb4f1352a347c9c05c999e86a3c61e
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[Docs][DirectX] Add relevant documentation of Root Signature (#149608)
This pr adds documentation of root signatures for reference of an LLVM
user.
The target audience is an LLVM user that wants to build a custom tool,
or front-end, that requires constructing a root signature part (RTS0)
for a `DXContainer`.
With that in mind, this pr adds documentation of the metadata
representation of root signatures implemented in LLVM and utilized in
Clang.
Commit: b7ba23f91512b2e703e21e693950dc6086bb51f0
https://github.com/llvm/llvm-project/commit/b7ba23f91512b2e703e21e693950dc6086bb51f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Rename RVPUnaryWUF to RVPUnary_ri for consistency. NFC
Commit: 23469688076b334dbcf796bb2079efebf6ddf62a
https://github.com/llvm/llvm-project/commit/23469688076b334dbcf796bb2079efebf6ddf62a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
Log Message:
-----------
[AMDGPU] Add V_ADD|SUB|MUL_U64 gfx1250 opcodes (#150291)
Commit: c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
https://github.com/llvm/llvm-project/commit/c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
A llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
Log Message:
-----------
[DirectX] Support ConstExpr GEPs (#150082)
- Fixes #150050
- Address the issue of many nested geps
- Check for ConstantExpr GEP if we see it check if it needs a global
replacement with a new type. Create the new constExpr Gep and set the
pointer operand to it. Finally cleanup and remove the old nested geps.
Commit: 898bba311f180ed54de33dc09e7071c279a4942a
https://github.com/llvm/llvm-project/commit/898bba311f180ed54de33dc09e7071c279a4942a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
[SLP]Initial support for copyable elements (non-schedulable only)
Adds initial support for copyable elements. This patch only models adds
and model copyable elements as add <element>, 0, i.e. uses identity
constants for missing lanes.
Only support for elements, which do not require scheduling, is added to
reduce size of the patch.
Fixed compile time regressions, updated release notes
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/140279
Commit: 6ac764c4f92171d96e19ecdd3c5607964b0afaaa
https://github.com/llvm/llvm-project/commit/6ac764c4f92171d96e19ecdd3c5607964b0afaaa
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects.py
M .ci/compute_projects_test.py
M .ci/monolithic-linux.sh
M .github/new-prs-labeler.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/premerge.yaml
M bolt/utils/nfc-check-setup.py
M clang-tools-extra/README.txt
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/MoveForwardingReferenceCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/clang-tidy/misc/UnusedAliasDeclsCheck.cpp
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.cpp
M clang-tools-extra/clang-tidy/utils/Aliasing.h
M clang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/CodeComplete.cpp
M clang-tools-extra/clangd/DumpAST.cpp
M clang-tools-extra/clangd/FindTarget.cpp
M clang-tools-extra/clangd/IncludeFixer.cpp
M clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
M clang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
A clang-tools-extra/clangd/refactor/tweaks/OverridePureVirtuals.cpp
M clang-tools-extra/clangd/unittests/CMakeLists.txt
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/HoverTests.cpp
A clang-tools-extra/clangd/unittests/tweaks/OverridePureVirtualsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/infinite-loop.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/docs/ClangFormatStyleOptions.rst
M clang/docs/ClangTools.rst
M clang/docs/HIPSupport.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LibClang.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/docs/UsersManual.rst
M clang/include/clang-c/Index.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/AbstractBasicReader.h
M clang/include/clang/AST/AbstractBasicWriter.h
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/FormatString.h
M clang/include/clang/AST/NestedNameSpecifier.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DeclNodes.td
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/TypeNodes.td
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Interpreter/Value.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaRISCV.h
M clang/include/clang/Sema/SemaX86.h
M clang/include/clang/Serialization/TypeBitCodes.def
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/include/clang/StaticAnalyzer/Frontend/CheckerRegistry.h
M clang/include/clang/Tooling/Inclusions/IncludeStyle.h
M clang/include/clang/Tooling/Refactoring/RecursiveSymbolVisitor.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ASTStructuralEquivalence.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBlock.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/FormatString.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/ODRHash.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/QualTypeNames.cpp
M clang/lib/AST/ScanfFormatString.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Analysis/plugins/CheckerDependencyHandling/CheckerDependencyHandling.cpp
M clang/lib/Analysis/plugins/CheckerOptionHandling/CheckerOptionHandling.cpp
M clang/lib/Analysis/plugins/SampleAnalyzer/MainCallChecker.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCXXABI.h
M clang/lib/CIR/CodeGen/CIRGenCXXExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/ROCm.h
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/Format/BreakableToken.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.cpp
M clang/lib/Format/IntegerLiteralSeparatorFixer.h
M clang/lib/Format/ObjCPropertyAttributeOrderFixer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/__clang_spirv_builtins.h
M clang/lib/Index/IndexTypeSourceInfo.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/InterpreterUtils.cpp
M clang/lib/Interpreter/InterpreterUtils.h
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Interpreter/Value.cpp
M clang/lib/Lex/DependencyDirectivesScanner.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/lib/Tooling/Inclusions/Stdlib/StandardLibrary.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.apinotes
M clang/test/APINotes/Inputs/Headers/SwiftImportAs.h
M clang/test/APINotes/swift-import-as.cpp
M clang/test/AST/ByteCode/builtin-bit-cast.cpp
M clang/test/AST/ByteCode/builtin-constant-p.cpp
M clang/test/AST/ByteCode/complex.cpp
M clang/test/AST/ByteCode/const-eval.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/mutable.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/unions.cpp
M clang/test/AST/HLSL/is_structured_resource_element_compatible_concept.hlsl
M clang/test/AST/ast-dump-APValue-lvalue.cpp
M clang/test/AST/ast-dump-array.cpp
M clang/test/AST/ast-dump-expr-json.c
M clang/test/AST/ast-dump-expr-json.cpp
M clang/test/AST/ast-dump-expr.c
M clang/test/AST/ast-dump-expr.cpp
M clang/test/AST/ast-dump-openmp-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-target-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for-simd.c
M clang/test/AST/ast-dump-openmp-teams-distribute-parallel-for.c
M clang/test/AST/ast-dump-stmt-json.cpp
M clang/test/AST/ast-dump-stmt.cpp
M clang/test/AST/ast-dump-traits.cpp
M clang/test/AST/ast-dump-types-errors-json.cpp
M clang/test/Analysis/cfg.cpp
A clang/test/Analysis/div-zero-cxx20.cpp
M clang/test/Analysis/div-zero.cpp
M clang/test/Analysis/explain-svals.cpp
M clang/test/Analysis/std-c-library-functions-arg-weakdeps.c
M clang/test/Analysis/std-c-library-functions-lookup.c
M clang/test/Analysis/std-c-library-functions-vs-stream-checker.c
M clang/test/Analysis/std-c-library-functions.c
M clang/test/C/C2y/n3353.c
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
M clang/test/CIR/CodeGen/builtin_call.cpp
M clang/test/CIR/CodeGen/complex-builtins.cpp
A clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
A clang/test/CIR/CodeGen/compound_literal.cpp
M clang/test/CIR/CodeGen/destructors.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p2.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/ClangScanDeps/modules-full-named-modules.cppm
M clang/test/CodeGen/64bit-swiftcall.c
M clang/test/CodeGen/AArch64/byval-temp.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/pure-scalable-args-empty-union.c
M clang/test/CodeGen/AArch64/pure-scalable-args.c
M clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
M clang/test/CodeGen/AArch64/sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
M clang/test/CodeGen/LoongArch/bitint.c
R clang/test/CodeGen/PowerPC/ppc-dmf-future-builtin-err.c
M clang/test/CodeGen/PowerPC/ppc-dmf-mma-builtin-err.c
M clang/test/CodeGen/PowerPC/ppc64-vector.c
M clang/test/CodeGen/RISCV/riscv-abi.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/riscv32-abi.c
M clang/test/CodeGen/RISCV/riscv32-vararg.c
M clang/test/CodeGen/RISCV/riscv64-abi.c
M clang/test/CodeGen/RISCV/riscv64-vararg.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgather.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vcompress.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgather.c
M clang/test/CodeGen/SystemZ/systemz-abi-vector.c
M clang/test/CodeGen/SystemZ/systemz-abi.c
M clang/test/CodeGen/SystemZ/systemz-inline-asm.c
M clang/test/CodeGen/X86/cx-complex-range.c
A clang/test/CodeGen/X86/i128-debuginfo.c
A clang/test/CodeGen/X86/prefetchi-error.c
M clang/test/CodeGen/X86/x86_32-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments-win32.c
M clang/test/CodeGen/X86/x86_64-arguments.c
M clang/test/CodeGen/aapcs64-align.cpp
M clang/test/CodeGen/alloc-align-attr.c
M clang/test/CodeGen/arm-aapcs-vfp.c
M clang/test/CodeGen/arm-abi-vector.c
M clang/test/CodeGen/arm-swiftcall.c
M clang/test/CodeGen/arm64-abi-vector.c
M clang/test/CodeGen/arm64-arguments.c
M clang/test/CodeGen/arm64-microsoft-arguments.cpp
M clang/test/CodeGen/armv7k-abi.c
M clang/test/CodeGen/atomic-arm64.c
M clang/test/CodeGen/attr-noundef.cpp
A clang/test/CodeGen/builtin-maximumnum-minimumnum.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/ext-int-cc.c
M clang/test/CodeGen/extend-arg-64.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/math-libcalls-tbaa-indirect-args.c
M clang/test/CodeGen/mingw-long-double.c
M clang/test/CodeGen/ms_abi.c
M clang/test/CodeGen/pass-by-value-noalias.c
M clang/test/CodeGen/ptrauth-in-c-struct.c
M clang/test/CodeGen/regcall.c
M clang/test/CodeGen/regcall2.c
M clang/test/CodeGen/regcall4.c
M clang/test/CodeGen/sparcv9-abi.c
M clang/test/CodeGen/vectorcall.c
M clang/test/CodeGen/win-fp128.c
M clang/test/CodeGen/win64-i128.c
M clang/test/CodeGen/windows-swiftcall.c
M clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
M clang/test/CodeGenCXX/arm-cc.cpp
M clang/test/CodeGenCXX/attr-target-mv-inalloca.cpp
M clang/test/CodeGenCXX/copy-initialization.cpp
M clang/test/CodeGenCXX/debug-info.cpp
M clang/test/CodeGenCXX/empty-nontrivially-copyable.cpp
M clang/test/CodeGenCXX/fastcall.cpp
M clang/test/CodeGenCXX/homogeneous-aggregates.cpp
M clang/test/CodeGenCXX/inalloca-lambda.cpp
M clang/test/CodeGenCXX/inalloca-overaligned.cpp
M clang/test/CodeGenCXX/inalloca-vector.cpp
M clang/test/CodeGenCXX/inheriting-constructor.cpp
M clang/test/CodeGenCXX/member-function-pointer-calls.cpp
M clang/test/CodeGenCXX/microsoft-abi-arg-order.cpp
M clang/test/CodeGenCXX/microsoft-abi-byval-thunks.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-async.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
A clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
M clang/test/CodeGenCXX/microsoft-abi-member-pointers.cpp
M clang/test/CodeGenCXX/microsoft-abi-sret-and-byval.cpp
M clang/test/CodeGenCXX/microsoft-abi-unknown-arch.cpp
M clang/test/CodeGenCXX/ms-property.cpp
M clang/test/CodeGenCXX/nrvo.cpp
M clang/test/CodeGenCXX/pass-by-value-noalias.cpp
M clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp
M clang/test/CodeGenCXX/regparm.cpp
M clang/test/CodeGenCXX/trivial_abi.cpp
M clang/test/CodeGenCXX/uncopyable-args.cpp
M clang/test/CodeGenCXX/wasm-args-returns.cpp
M clang/test/CodeGenCXX/windows-x86-swiftcall.cpp
M clang/test/CodeGenObjC/nontrivial-c-struct-exception.m
M clang/test/CodeGenObjC/pass-by-value-noalias.m
M clang/test/CodeGenObjC/weak-in-c-struct.m
M clang/test/CodeGenObjCXX/objc-struct-cxx-abi.mm
M clang/test/CodeGenObjCXX/property-objects.mm
M clang/test/CodeGenObjCXX/ptrauth-struct-cxx-abi.mm
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
A clang/test/DebugInfo/KeyInstructions/asm.c
A clang/test/DebugInfo/KeyInstructions/goto.c
M clang/test/Driver/amdgpu-hip-system-arch.c
M clang/test/Driver/baremetal.cpp
M clang/test/Driver/cuda-phases.cu
M clang/test/Driver/hip-inputs.hip
M clang/test/Driver/hip-invalid-target-id.hip
M clang/test/Driver/hip-options.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/invalid-offload-options.cpp
M clang/test/Driver/module-fgen-reduced-bmi.cppm
M clang/test/Driver/module-output.cppm
M clang/test/Driver/modules.cpp
M clang/test/Driver/nvptx-cuda-system-arch.c
A clang/test/Driver/offload-target.c
M clang/test/Driver/openacc.c
M clang/test/Driver/openbsd.c
M clang/test/Driver/openmp-offload.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/sparc-target-features.c
M clang/test/FixIt/fixit-format-ios-nopedantic.m
M clang/test/FixIt/format.m
M clang/test/Headers/spirv_ids.cpp
M clang/test/Headers/stdarg.cpp
M clang/test/Interpreter/fail.cpp
M clang/test/Interpreter/pretty-print.c
A clang/test/Interpreter/pretty-print.cpp
M clang/test/Layout/ms-no-unique-address.cpp
M clang/test/Misc/time-passes.c
M clang/test/Modules/mingw-exceptions.cppm
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
M clang/test/OpenMP/for_firstprivate_codegen.cpp
M clang/test/OpenMP/parallel_firstprivate_codegen.cpp
M clang/test/OpenMP/sections_firstprivate_codegen.cpp
M clang/test/OpenMP/single_firstprivate_codegen.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_messages.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/Preprocessor/arm-acle-6.4.c
M clang/test/Preprocessor/init-mips.c
M clang/test/Preprocessor/openacc.c
A clang/test/Preprocessor/pragma-pushpop-macro-diag.c
M clang/test/Preprocessor/pragma-pushpop-macro.c
M clang/test/Preprocessor/stdint.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/const-eval.c
M clang/test/Sema/diagnose_if.c
M clang/test/Sema/dllexport.c
M clang/test/Sema/format-strings-fixit-ssize_t.c
M clang/test/Sema/format-strings-scanf.c
M clang/test/Sema/format-strings-size_t.c
M clang/test/Sema/matrix-type-builtins.c
M clang/test/Sema/ptrauth-atomic-ops.c
M clang/test/Sema/ptrauth.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/constexpr-never-constant.cpp
M clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
M clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
M clang/test/SemaCXX/diagnose_if-ext.cpp
M clang/test/SemaCXX/diagnose_if.cpp
M clang/test/SemaCXX/enum-scoped.cpp
M clang/test/SemaCXX/microsoft-varargs-diagnostics.cpp
M clang/test/SemaCXX/new-delete.cpp
M clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
M clang/test/SemaCXX/static-assert-cxx26.cpp
M clang/test/SemaCXX/type-aware-new-delete-basic-free-declarations.cpp
M clang/test/SemaCXX/unavailable_aligned_allocation.cpp
M clang/test/SemaHLSL/Language/AssignArray.hlsl
M clang/test/SemaHLSL/Language/InitListAST.hlsl
M clang/test/SemaObjC/matrix-type-builtins.m
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-wmma-w32-param.cl
M clang/test/SemaOpenCL/cl20-device-side-enqueue.cl
M clang/test/SemaTemplate/concepts-using-decl.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/type_pack_element.cpp
M clang/tools/driver/cc1_main.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Analysis/CMakeLists.txt
A clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Format/BracesInserterTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestComments.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestSelective.cpp
M clang/unittests/Format/IntegerLiteralSeparatorTest.cpp
M clang/unittests/Format/SortIncludesTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
M clang/unittests/StaticAnalyzer/BlockEntranceCallbackTest.cpp
M clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
M clang/unittests/StaticAnalyzer/CallDescriptionTest.cpp
M clang/unittests/StaticAnalyzer/CallEventTest.cpp
M clang/unittests/StaticAnalyzer/ConflictingEvalCallsTest.cpp
M clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp
M clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp
M clang/unittests/StaticAnalyzer/MemRegionDescriptiveNameTest.cpp
M clang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
M clang/unittests/StaticAnalyzer/ObjcBug-124477.cpp
M clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
M clang/unittests/StaticAnalyzer/SValSimplifyerTest.cpp
M clang/unittests/StaticAnalyzer/SValTest.cpp
M clang/unittests/StaticAnalyzer/TestReturnValueUnderConstruction.cpp
M clang/unittests/Tooling/RecursiveASTVisitorTests/NestedNameSpecifiers.cpp
M clang/unittests/Tooling/RefactoringTest.cpp
M compiler-rt/lib/asan/asan_allocator.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/asan/asan_descriptions.cpp
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/asan_malloc_linux.cpp
M compiler-rt/lib/asan/asan_malloc_mac.cpp
M compiler-rt/lib/asan/asan_malloc_win.cpp
M compiler-rt/lib/asan/asan_new_delete.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
M compiler-rt/lib/asan/tests/asan_noinst_test.cpp
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/tysan/lit.cfg
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
M compiler-rt/test/asan/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/asan/TestCases/Windows/lit.local.cfg.py
M compiler-rt/test/asan/lit.cfg.py
M compiler-rt/test/asan_abi/lit.cfg.py
M compiler-rt/test/builtins/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/builtins/lit.cfg.py
M compiler-rt/test/cfi/cross-dso/lit.local.cfg.py
M compiler-rt/test/ctx_profile/lit.cfg.py
M compiler-rt/test/dfsan/lit.cfg.py
M compiler-rt/test/fuzzer/lit.cfg.py
M compiler-rt/test/gwp_asan/lit.cfg.py
M compiler-rt/test/hwasan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/hwasan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/lsan/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/lsan/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/lsan/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/lsan/lit.common.cfg.py
M compiler-rt/test/memprof/lit.cfg.py
M compiler-rt/test/metadata/lit.cfg.py
M compiler-rt/test/msan/Linux/lit.local.cfg.py
M compiler-rt/test/msan/lit.cfg.py
M compiler-rt/test/nsan/lit.cfg.py
M compiler-rt/test/orc/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/FreeBSD/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/orc/TestCases/Windows/lit.local.cfg.py
M compiler-rt/test/orc/lit.cfg.py
M compiler-rt/test/orc/lit.site.cfg.py.in
M compiler-rt/test/profile/AIX/lit.local.cfg.py
M compiler-rt/test/profile/Darwin/lit.local.cfg.py
M compiler-rt/test/profile/Linux/lit.local.cfg.py
M compiler-rt/test/profile/Posix/lit.local.cfg.py
M compiler-rt/test/profile/Windows/lit.local.cfg.py
M compiler-rt/test/profile/lit.cfg.py
M compiler-rt/test/rtsan/Unit/lit.site.cfg.py.in
M compiler-rt/test/rtsan/lit.cfg.py
M compiler-rt/test/safestack/lit.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Darwin/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/FreeBSD/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Linux/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/NetBSD/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/TestCases/Posix/lit.local.cfg.py
M compiler-rt/test/sanitizer_common/lit.common.cfg.py
M compiler-rt/test/scudo/lit.cfg.py
M compiler-rt/test/shadowcallstack/lit.cfg.py
M compiler-rt/test/tsan/Darwin/lit.local.cfg.py
M compiler-rt/test/tsan/Linux/lit.local.cfg.py
M compiler-rt/test/tsan/Unit/lit.site.cfg.py.in
M compiler-rt/test/tsan/libcxx/lit.local.cfg.py
M compiler-rt/test/tsan/libdispatch/lit.local.cfg.py
M compiler-rt/test/tsan/lit.cfg.py
M compiler-rt/test/tysan/lit.cfg.py
M compiler-rt/test/ubsan/TestCases/Misc/Posix/lit.local.cfg.py
M compiler-rt/test/ubsan/TestCases/TypeCheck/Function/lit.local.cfg.py
M compiler-rt/test/ubsan/TestCases/TypeCheck/Linux/lit.local.cfg.py
M compiler-rt/test/ubsan/lit.common.cfg.py
M compiler-rt/test/ubsan_minimal/lit.common.cfg.py
M compiler-rt/test/xray/lit.cfg.py
M compiler-rt/unittests/lit.common.unit.cfg.py
M compiler-rt/unittests/lit.common.unit.configured.in
A cross-project-tests/dtlto/link-archive-thin.test
A cross-project-tests/dtlto/link-dtlto.c
M cross-project-tests/lit.cfg.py
M flang-rt/include/flang-rt/runtime/descriptor.h
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/descriptor.cpp
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/lib/runtime/pointer.cpp
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang-rt/unittests/Runtime/NumericalFormatTest.cpp
M flang/docs/Extensions.md
M flang/docs/GettingStarted.md
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Evaluate/real.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/Runtime/Intrinsics.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Parser/dump-parse-tree.h
A flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/pointer.h
M flang/include/flang/Semantics/openmp-modifiers.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertConstant.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Lower/ConvertProcedureDesignator.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HlfirIntrinsics.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/Support/PrivateReductionUtils.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Lower/Support/Utils.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/Character.cpp
M flang/lib/Optimizer/Builder/Complex.cpp
M flang/lib/Optimizer/Builder/DoLoopHelper.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/HLFIRTools.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/LowLevelIntrinsics.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/Builder/PPCIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp
M flang/lib/Optimizer/Builder/Runtime/ArrayConstructor.cpp
M flang/lib/Optimizer/Builder/Runtime/Assign.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Descriptor.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Command.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/EnvironmentDefaults.cpp
M flang/lib/Optimizer/Builder/Runtime/Exceptions.cpp
M flang/lib/Optimizer/Builder/Runtime/Execute.cpp
M flang/lib/Optimizer/Builder/Runtime/Inquiry.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Pointer.cpp
M flang/lib/Optimizer/Builder/Runtime/Ragged.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Stop.cpp
M flang/lib/Optimizer/Builder/Runtime/Support.cpp
M flang/lib/Optimizer/Builder/Runtime/TemporaryStack.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/Builder/TemporaryStorage.cpp
M flang/lib/Optimizer/CodeGen/CMakeLists.txt
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/Transforms/AbstractResult.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CharacterConversion.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SimplifyFIROperations.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/canonicalize-omp.h
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-modifiers.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/openmp-utils.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/symbol.cpp
M flang/test/Driver/cuda-option.f90
M flang/test/Driver/intrinsic-module-path.f90
M flang/test/Driver/target-cpu-features.f90
M flang/test/Driver/unparse-use-analyzed.f95
M flang/test/Driver/unparse-with-modules.f90
M flang/test/Fir/alloc-32.fir
M flang/test/Fir/alloc.fir
M flang/test/Fir/arrexp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Integration/debug-common-block-1.f90
M flang/test/Integration/debug-local-var-2.f90
M flang/test/Lower/CUDA/cuda-derived.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
M flang/test/Lower/CUDA/cuda-set-allocator.cuf
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/HLFIR/procedure-pointer-component-structure-constructor.f90
A flang/test/Lower/Intrinsics/acospi.f90
A flang/test/Lower/Intrinsics/asinpi.f90
A flang/test/Lower/Intrinsics/cospi.f90
A flang/test/Lower/Intrinsics/sinpi.f90
A flang/test/Lower/Intrinsics/tanpi.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-host-data-unwrap-defaultbounds.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-routine03.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
A flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/atomic-write.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
M flang/test/Lower/OpenMP/cray-pointers02.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/map-modifiers.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct01.f90
M flang/test/Lower/OpenMP/nested-loop-transformation-construct02.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/taskgroup02.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-3.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
A flang/test/Lower/OpenMP/unroll-heuristic01.f90
A flang/test/Lower/OpenMP/unroll-heuristic02.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-lb.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-lb2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/PowerPC/ppc-vec-extract-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-extract.f90
M flang/test/Lower/PowerPC/ppc-vec-insert-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-insert.f90
M flang/test/Lower/PowerPC/ppc-vec-splat-elem-order.f90
M flang/test/Lower/PowerPC/ppc-vec-splat.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-expression-slice-1.f90
A flang/test/Lower/assign-statement.f90
M flang/test/Lower/basic-program.f90
M flang/test/Lower/big-integer-parameter.f90
M flang/test/Lower/derived-type-finalization.f90
A flang/test/Lower/equivalence-3.f
M flang/test/Lower/forall/character-1.f90
M flang/test/Lower/location.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/test/Lower/pre-fir-tree03.f90
M flang/test/Lower/pre-fir-tree06.f90
M flang/test/Lower/program-units-fir-mangling.f90
M flang/test/Lower/return-statement.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile3.f90
A flang/test/Parser/OpenMP/map-modifiers-v60.f90
A flang/test/Parser/OpenMP/unroll-heuristic.f90
A flang/test/Parser/OpenMP/unroll-partial.f90
R flang/test/Parser/OpenMP/unroll.f90
M flang/test/Parser/acc-unparse.f90
M flang/test/Semantics/OpenACC/acc-kernels-loop.f90
M flang/test/Semantics/OpenACC/acc-symbols01.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/critical_within_default.f90
M flang/test/Semantics/OpenMP/declare-mapper-symbols.f90
M flang/test/Semantics/OpenMP/declare-reduction-mangled.f90
M flang/test/Semantics/OpenMP/declare-reduction-operators.f90
M flang/test/Semantics/OpenMP/declare-reduction-renamedop.f90
M flang/test/Semantics/OpenMP/declare-reduction.f90
M flang/test/Semantics/OpenMP/declare-target03.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do-schedule03.f90
M flang/test/Semantics/OpenMP/do01-positivecase.f90
M flang/test/Semantics/OpenMP/do04-positivecase.f90
M flang/test/Semantics/OpenMP/do05-positivecase.f90
M flang/test/Semantics/OpenMP/do06-positivecases.f90
M flang/test/Semantics/OpenMP/do11.f90
M flang/test/Semantics/OpenMP/do12.f90
M flang/test/Semantics/OpenMP/do14.f90
M flang/test/Semantics/OpenMP/do17.f90
M flang/test/Semantics/OpenMP/map-clause-symbols.f90
A flang/test/Semantics/OpenMP/map-modifiers-v60.f90
M flang/test/Semantics/OpenMP/reduction08.f90
M flang/test/Semantics/OpenMP/reduction09.f90
M flang/test/Semantics/OpenMP/reduction11.f90
M flang/test/Semantics/OpenMP/scan2.f90
M flang/test/Semantics/OpenMP/symbol01.f90
M flang/test/Semantics/OpenMP/symbol05.f90
M flang/test/Semantics/OpenMP/symbol07.f90
M flang/test/Semantics/OpenMP/symbol09.f90
M flang/test/Semantics/OpenMP/threadprivate03.f90
M flang/test/Semantics/PowerPC/ppc-vector-types01.f90
M flang/test/Semantics/PowerPC/ppc-vector-types02.f90
M flang/test/Semantics/getsymbols03-a.f90
M flang/test/Semantics/long-name.f90
M flang/test/Semantics/modproc01.f90
M flang/test/Semantics/multi-programs04.f90
M flang/test/Semantics/pointer01.f90
M flang/test/Semantics/procinterface01.f90
M flang/test/Semantics/resolve05.f90
M flang/test/Semantics/resolve125.f90
M flang/test/Semantics/resolve40.f90
M flang/test/Semantics/symbol03.f90
M flang/test/Semantics/symbol06.f90
M flang/test/Semantics/symbol07.f90
M flang/test/Semantics/symbol08.f90
M flang/test/Semantics/symbol15.f90
M flang/test/Semantics/symbol16.f90
M flang/test/Semantics/symbol17.f90
M flang/test/Semantics/symbol18.f90
M flang/test/Semantics/symbol20.f90
M flang/test/Semantics/symbol25.f90
M flang/test/Semantics/symbol26.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
A flang/test/Transforms/external-name-interop-symref-array.fir
A flang/test/Transforms/tbaa-local-alloc-threshold.fir
M flang/unittests/Optimizer/Builder/CharacterTest.cpp
M flang/unittests/Optimizer/Builder/ComplexTest.cpp
M flang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
M flang/unittests/Optimizer/Builder/HLFIRToolsTest.cpp
M flang/unittests/Optimizer/Builder/Runtime/RuntimeCallTestBase.h
M flang/unittests/Optimizer/FortranVariableTest.cpp
M libc/benchmarks/gpu/LibcGpuBenchmark.cpp
M libc/benchmarks/gpu/src/math/atan2_benchmark.cpp
A libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/src/math/sin_benchmark.cpp
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/cmake/modules/LLVMLibCFlagRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/arm/headers.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/baremetal/riscv/headers.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/aarch64/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/config/windows/entrypoints.txt
M libc/config/windows/headers.txt
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/cbrt_fuzz.cpp
M libc/hdr/types/CMakeLists.txt
M libc/include/CMakeLists.txt
R libc/include/dirent.h.def
M libc/include/dirent.yaml
R libc/include/dlfcn.h.def
M libc/include/dlfcn.yaml
R libc/include/llvm-libc-macros/dlfcn-macros.h
M libc/include/llvm-libc-macros/math-macros.h
M libc/include/math.yaml
R libc/include/search.h.def
M libc/include/search.yaml
R libc/include/setjmp.h.def
M libc/include/setjmp.yaml
R libc/include/spawn.h.def
M libc/include/spawn.yaml
R libc/include/string.h.def
M libc/include/string.yaml
R libc/include/strings.h.def
M libc/include/strings.yaml
R libc/include/sys/sendfile.h.def
M libc/include/sys/sendfile.yaml
R libc/include/sys/statvfs.h.def
M libc/include/sys/statvfs.yaml
M libc/include/sys/types.yaml
R libc/include/sys/uio.h.def
M libc/include/sys/uio.yaml
R libc/include/sys/utsname.h.def
M libc/include/sys/utsname.yaml
R libc/include/threads.h.def
M libc/include/threads.yaml
R libc/include/uchar.h.def
M libc/include/uchar.yaml
A libc/include/wctype.yaml
M libc/shared/math.h
A libc/shared/math/acos.h
A libc/shared/math/acosf.h
A libc/shared/math/acosf16.h
A libc/shared/math/acoshf.h
A libc/shared/math/acoshf16.h
A libc/shared/math/erff.h
A libc/shared/math/exp10f.h
A libc/shared/math/exp10f16.h
A libc/shared/sign.h
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/bfloat16.h
A libc/src/__support/FPUtil/comparison_operations.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/macros/attributes.h
M libc/src/__support/macros/properties/architectures.h
M libc/src/__support/macros/properties/cpu_features.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/acos.h
A libc/src/__support/math/acosf.h
A libc/src/__support/math/acosf16.h
A libc/src/__support/math/acosh_float_constants.h
A libc/src/__support/math/acoshf.h
A libc/src/__support/math/acoshf16.h
A libc/src/__support/math/acoshf_utils.h
A libc/src/__support/math/asin_utils.h
A libc/src/__support/math/erff.h
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
A libc/src/__support/math/exp10_float16_constants.h
A libc/src/__support/math/exp10f.h
A libc/src/__support/math/exp10f16.h
A libc/src/__support/math/exp10f16_utils.h
A libc/src/__support/math/exp10f_utils.h
A libc/src/__support/math/inv_trigf_utils.h
M libc/src/__support/wchar/mbrtowc.cpp
M libc/src/__support/wchar/string_converter.h
M libc/src/math/docs/add_math_function.md
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/acos.cpp
M libc/src/math/generic/acosf.cpp
M libc/src/math/generic/acosf16.cpp
M libc/src/math/generic/acoshf.cpp
M libc/src/math/generic/acoshf16.cpp
M libc/src/math/generic/asin.cpp
R libc/src/math/generic/asin_utils.h
M libc/src/math/generic/asinf.cpp
M libc/src/math/generic/asinhf.cpp
M libc/src/math/generic/asinhf16.cpp
M libc/src/math/generic/atan2f.cpp
M libc/src/math/generic/atanf.cpp
M libc/src/math/generic/atanhf.cpp
M libc/src/math/generic/common_constants.cpp
M libc/src/math/generic/common_constants.h
M libc/src/math/generic/coshf.cpp
M libc/src/math/generic/erff.cpp
M libc/src/math/generic/exp10f.cpp
M libc/src/math/generic/exp10f16.cpp
R libc/src/math/generic/exp10f_impl.h
M libc/src/math/generic/exp10m1f16.cpp
R libc/src/math/generic/explogxf.cpp
M libc/src/math/generic/explogxf.h
M libc/src/math/generic/expxf16.h
R libc/src/math/generic/inv_trigf_utils.cpp
R libc/src/math/generic/inv_trigf_utils.h
M libc/src/math/generic/log1pf.cpp
M libc/src/math/generic/powf.cpp
M libc/src/math/generic/sinhf.cpp
M libc/src/string/string_utils.h
M libc/src/sys/epoll/linux/epoll_create.cpp
M libc/src/sys/time/linux/setitimer.cpp
M libc/src/sys/time/linux/utimes.cpp
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/mbtowc.cpp
A libc/src/wchar/wchar_utils.h
M libc/src/wchar/wcscspn.cpp
M libc/src/wchar/wcsspn.cpp
A libc/src/wctype/CMakeLists.txt
A libc/src/wctype/iswalpha.cpp
A libc/src/wctype/iswalpha.h
M libc/test/CMakeLists.txt
M libc/test/UnitTest/Test.h
M libc/test/include/CMakeLists.txt
A libc/test/include/math_constants_test.c
A libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/FPUtil/CMakeLists.txt
A libc/test/src/__support/FPUtil/comparison_operations_test.cpp
M libc/test/src/__support/File/platform_file_test.cpp
M libc/test/src/__support/wchar/string_converter_test.cpp
M libc/test/src/math/cospif_test.cpp
M libc/test/src/math/explogxf_test.cpp
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/stdio/fdopen_test.cpp
M libc/test/src/stdio/fgetc_test.cpp
M libc/test/src/stdio/fgetc_unlocked_test.cpp
M libc/test/src/stdio/fgets_test.cpp
M libc/test/src/stdio/fileop_test.cpp
M libc/test/src/stdio/fopen_test.cpp
M libc/test/src/stdio/fprintf_test.cpp
M libc/test/src/stdio/fscanf_test.cpp
M libc/test/src/stdio/ftell_test.cpp
M libc/test/src/stdio/putc_test.cpp
M libc/test/src/stdio/remove_test.cpp
M libc/test/src/stdio/rename_test.cpp
M libc/test/src/stdio/setbuf_test.cpp
M libc/test/src/stdio/setvbuf_test.cpp
M libc/test/src/stdio/ungetc_test.cpp
M libc/test/src/stdio/unlocked_fileop_test.cpp
M libc/test/src/stdio/vfprintf_test.cpp
M libc/test/src/stdio/vfscanf_test.cpp
M libc/test/src/sys/epoll/linux/epoll_create_test.cpp
M libc/test/src/wchar/mbrtowc_test.cpp
A libc/test/src/wctype/CMakeLists.txt
A libc/test/src/wctype/iswalpha_test.cpp
A libclc/clc/include/clc/atomic/atomic_decl.inc
A libclc/clc/include/clc/atomic/clc_atomic_compare_exchange.h
A libclc/clc/include/clc/atomic/clc_atomic_dec.h
A libclc/clc/include/clc/atomic/clc_atomic_exchange.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_add.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_and.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_max.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_min.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_or.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_sub.h
A libclc/clc/include/clc/atomic/clc_atomic_fetch_xor.h
A libclc/clc/include/clc/atomic/clc_atomic_inc.h
A libclc/clc/include/clc/atomic/clc_atomic_load.h
A libclc/clc/include/clc/atomic/clc_atomic_store.h
A libclc/clc/include/clc/integer/clc_bit_reverse.h
A libclc/clc/include/clc/integer/clc_bitfield_extract_decl.inc
A libclc/clc/include/clc/integer/clc_bitfield_extract_signed.h
A libclc/clc/include/clc/integer/clc_bitfield_extract_unsigned.h
A libclc/clc/include/clc/integer/clc_bitfield_insert.h
A libclc/clc/include/clc/integer/clc_bitfield_insert.inc
M libclc/clc/include/clc/relational/binary_decl.inc
M libclc/clc/include/clc/relational/clc_isfinite.h
M libclc/clc/include/clc/relational/clc_isgreater.h
M libclc/clc/include/clc/relational/clc_isgreaterequal.h
M libclc/clc/include/clc/relational/clc_isless.h
M libclc/clc/include/clc/relational/clc_islessequal.h
M libclc/clc/include/clc/relational/clc_islessgreater.h
M libclc/clc/include/clc/relational/clc_isnormal.h
M libclc/clc/include/clc/relational/clc_isnotequal.h
M libclc/clc/include/clc/relational/clc_isordered.h
M libclc/clc/include/clc/relational/clc_isunordered.h
M libclc/clc/include/clc/relational/clc_signbit.h
R libclc/clc/include/clc/relational/floatn.inc
M libclc/clc/include/clc/relational/unary_decl.inc
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.cl
A libclc/clc/lib/generic/atomic/clc_atomic_compare_exchange.inc
A libclc/clc/lib/generic/atomic/clc_atomic_dec.cl
A libclc/clc/lib/generic/atomic/clc_atomic_def.inc
A libclc/clc/lib/generic/atomic/clc_atomic_exchange.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_add.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_and.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_max.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_min.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_or.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_sub.cl
A libclc/clc/lib/generic/atomic/clc_atomic_fetch_xor.cl
A libclc/clc/lib/generic/atomic/clc_atomic_inc.cl
A libclc/clc/lib/generic/atomic/clc_atomic_load.cl
A libclc/clc/lib/generic/atomic/clc_atomic_store.cl
A libclc/clc/lib/generic/integer/clc_bit_reverse.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_signed.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_signed.inc
A libclc/clc/lib/generic/integer/clc_bitfield_extract_unsigned.cl
A libclc/clc/lib/generic/integer/clc_bitfield_extract_unsigned.inc
A libclc/clc/lib/generic/integer/clc_bitfield_insert.cl
A libclc/clc/lib/generic/integer/clc_bitfield_insert.inc
M libclc/clc/lib/generic/math/clc_native_divide.inc
M libclc/clc/lib/generic/math/clc_native_recip.inc
M libclc/clc/lib/generic/math/clc_native_rsqrt.inc
M libclc/clc/lib/generic/math/clc_native_tan.inc
M libclc/cmake/modules/AddLibclc.cmake
M libclc/opencl/include/clc/opencl/atomic/atomic_add.h
M libclc/opencl/include/clc/opencl/atomic/atomic_and.h
A libclc/opencl/include/clc/opencl/atomic/atomic_compare_exchange_strong.h
A libclc/opencl/include/clc/opencl/atomic/atomic_compare_exchange_weak.h
M libclc/opencl/include/clc/opencl/atomic/atomic_decl.inc
A libclc/opencl/include/clc/opencl/atomic/atomic_decl_legacy.inc
A libclc/opencl/include/clc/opencl/atomic/atomic_exchange.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_add.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_and.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_max.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_min.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_or.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_sub.h
A libclc/opencl/include/clc/opencl/atomic/atomic_fetch_xor.h
A libclc/opencl/include/clc/opencl/atomic/atomic_load.h
M libclc/opencl/include/clc/opencl/atomic/atomic_max.h
M libclc/opencl/include/clc/opencl/atomic/atomic_min.h
M libclc/opencl/include/clc/opencl/atomic/atomic_or.h
A libclc/opencl/include/clc/opencl/atomic/atomic_store.h
M libclc/opencl/include/clc/opencl/atomic/atomic_sub.h
M libclc/opencl/include/clc/opencl/atomic/atomic_xchg.h
M libclc/opencl/include/clc/opencl/atomic/atomic_xor.h
A libclc/opencl/include/clc/opencl/integer/bit_reverse.h
A libclc/opencl/include/clc/opencl/integer/bitfield_extract_signed.h
A libclc/opencl/include/clc/opencl/integer/bitfield_extract_unsigned.h
A libclc/opencl/include/clc/opencl/integer/bitfield_insert.h
M libclc/opencl/include/clc/opencl/relational/isfinite.h
M libclc/opencl/include/clc/opencl/relational/isgreater.h
M libclc/opencl/include/clc/opencl/relational/isgreaterequal.h
M libclc/opencl/include/clc/opencl/relational/isless.h
M libclc/opencl/include/clc/opencl/relational/islessequal.h
M libclc/opencl/include/clc/opencl/relational/islessgreater.h
M libclc/opencl/include/clc/opencl/relational/isnormal.h
M libclc/opencl/include/clc/opencl/relational/isnotequal.h
M libclc/opencl/include/clc/opencl/relational/isordered.h
M libclc/opencl/include/clc/opencl/relational/isunordered.h
M libclc/opencl/include/clc/opencl/relational/signbit.h
M libclc/opencl/lib/generic/SOURCES
A libclc/opencl/lib/generic/atomic/atomic_compare_exchange_strong.cl
A libclc/opencl/lib/generic/atomic/atomic_compare_exchange_weak.cl
M libclc/opencl/lib/generic/atomic/atomic_dec.cl
A libclc/opencl/lib/generic/atomic/atomic_def.inc
A libclc/opencl/lib/generic/atomic/atomic_exchange.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_add.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_and.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_max.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_min.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_or.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_sub.cl
A libclc/opencl/lib/generic/atomic/atomic_fetch_xor.cl
M libclc/opencl/lib/generic/atomic/atomic_inc.cl
A libclc/opencl/lib/generic/atomic/atomic_inc_dec.inc
A libclc/opencl/lib/generic/atomic/atomic_load.cl
A libclc/opencl/lib/generic/atomic/atomic_store.cl
A libclc/opencl/lib/generic/integer/bit_reverse.cl
A libclc/opencl/lib/generic/integer/bitfield_extract_def.inc
A libclc/opencl/lib/generic/integer/bitfield_extract_signed.cl
A libclc/opencl/lib/generic/integer/bitfield_extract_unsigned.cl
A libclc/opencl/lib/generic/integer/bitfield_insert.cl
A libclc/opencl/lib/generic/integer/bitfield_insert.inc
M libclc/opencl/lib/generic/relational/binary_def.inc
M libclc/opencl/lib/generic/relational/isequal.cl
M libclc/opencl/lib/generic/relational/isfinite.cl
M libclc/opencl/lib/generic/relational/isgreater.cl
M libclc/opencl/lib/generic/relational/isgreaterequal.cl
M libclc/opencl/lib/generic/relational/isinf.cl
M libclc/opencl/lib/generic/relational/isless.cl
M libclc/opencl/lib/generic/relational/islessequal.cl
M libclc/opencl/lib/generic/relational/islessgreater.cl
M libclc/opencl/lib/generic/relational/isnan.cl
M libclc/opencl/lib/generic/relational/isnormal.cl
M libclc/opencl/lib/generic/relational/isnotequal.cl
M libclc/opencl/lib/generic/relational/isordered.cl
M libclc/opencl/lib/generic/relational/isunordered.cl
M libclc/opencl/lib/generic/relational/signbit.cl
M libclc/opencl/lib/generic/relational/unary_def.inc
M libclc/utils/CMakeLists.txt
M libcxx/.clang-format
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M libcxx/docs/ReleaseNotes/21.rst
A libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__config
M libcxx/include/__config_site.in
M libcxx/include/__flat_map/flat_multimap.h
M libcxx/include/__functional/bind.h
M libcxx/include/__memory/construct_at.h
M libcxx/include/__memory_resource/polymorphic_allocator.h
M libcxx/include/__mutex/once_flag.h
A libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__ranges/zip_view.h
M libcxx/include/__thread/thread.h
M libcxx/include/__tuple/make_tuple_types.h
M libcxx/include/__tuple/tuple_element.h
R libcxx/include/__tuple/tuple_indices.h
M libcxx/include/__utility/integer_sequence.h
M libcxx/include/__utility/pair.h
M libcxx/include/bitset
M libcxx/include/ext/hash_map
M libcxx/include/ext/hash_set
M libcxx/include/fstream
M libcxx/include/future
M libcxx/include/limits
M libcxx/include/module.modulemap.in
M libcxx/include/mutex
M libcxx/include/print
M libcxx/include/ranges
M libcxx/include/regex
M libcxx/include/scoped_allocator
M libcxx/include/string
M libcxx/include/string_view
M libcxx/include/tuple
M libcxx/include/variant
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M libcxx/src/random.cpp
A libcxx/test/extensions/gnu/hash_map/hash_map.pass.cpp
A libcxx/test/extensions/gnu/hash_map/hash_map_name_lookup.pass.cpp
A libcxx/test/extensions/gnu/hash_multimap/insert.pass.cpp
A libcxx/test/extensions/gnu/hash_multiset/insert.pass.cpp
A libcxx/test/extensions/gnu/hash_set/hash_set.pass.cpp
A libcxx/test/extensions/gnu/hash_set/hash_set_name_lookup.pass.cpp
A libcxx/test/extensions/libcxx/atomics/atomics.flag/init_bool.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/map/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/set/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/unord.map/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/associative/unord.set/scary.compile.pass.cpp
A libcxx/test/extensions/libcxx/containers/sequences/deque/incomplete.pass.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/extern_c.pass.cpp
A libcxx/test/extensions/libcxx/depr/depr.c.headers/include_as_c.sh.cpp
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A libcxx/test/extensions/libcxx/depr/depr.c.headers/stdint_h.xopen_source.compile.pass.cpp
R libcxx/test/extensions/libcxx/include_as_c.sh.cpp
A libcxx/test/extensions/msvc/math_h.compile.pass.cpp
A libcxx/test/libcxx/algorithms/specialized.algorithms/nonnull.verify.cpp
R libcxx/test/libcxx/atomics/atomics.flag/init_bool.pass.cpp
R libcxx/test/libcxx/containers/associative/map/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/set/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/unord.map/scary.compile.pass.cpp
R libcxx/test/libcxx/containers/associative/unord.set/scary.compile.pass.cpp
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R libcxx/test/libcxx/containers/gnu_cxx/hash_set.pass.cpp
R libcxx/test/libcxx/containers/gnu_cxx/hash_set_name_lookup.pass.cpp
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M libcxx/test/libcxx/containers/sequences/deque/spare_block_handling.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/math_h.compile.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/stdint_h.std_types_t.compile.pass.cpp
R libcxx/test/libcxx/depr/depr.c.headers/stdint_h.xopen_source.compile.pass.cpp
M libcxx/test/libcxx/fuzzing/random.pass.cpp
A libcxx/test/libcxx/input.output/iostream.format/print.fun/nonnull.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/no_unique_address.compile.pass.cpp
M libcxx/test/libcxx/strings/basic.string/nonnull.verify.cpp
M libcxx/test/libcxx/strings/string.view/assert.ctor.pointer.pass.cpp
A libcxx/test/libcxx/strings/string.view/nonnull.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.expected/transform_error.mandates.verify.cpp
M libcxx/test/libcxx/utilities/expected/expected.void/transform_error.mandates.verify.cpp
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M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/fetch_sub.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.minus_equals.pass.cpp
M libcxx/test/std/atomics/atomics.types.generic/atomics.types.float/operator.plus_equals.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/empty.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/max_size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.capacity/size.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/assign_initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/compare.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/containers.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/dtor_noexcept.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_clears.pass.cpp
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R libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/move_assign_noexcept.pass.cpp
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M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.cons/sorted_container.pass.cpp
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M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/erase_key_transparent.pass.cpp
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M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_cv.pass.cpp
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M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_iter.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_iter_rv.pass.cpp
M libcxx/test/std/containers/container.adaptors/flat.multimap/flat.multimap.modifiers/insert_range.pass.cpp
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A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/increment.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/member_types.compile.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/iterator/subscript.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/ctor.default.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/ctor.other.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/eq.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/sentinel/minus.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/size.pass.cpp
A libcxx/test/std/ranges/range.adaptors/range.zip.transform/types.h
M libcxx/test/std/ranges/range.adaptors/range.zip/begin.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/cpo.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/ctor.views.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/end.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/arithmetic.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/compare.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/ctor.default.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/decrement.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/deref.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/increment.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/iter_move.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/iter_swap.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/member_types.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/singular.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/iterator/subscript.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/range.concept.compile.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/ctor.other.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/eq.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/sentinel/minus.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.zip/size.pass.cpp
R libcxx/test/std/ranges/range.adaptors/range.zip/types.h
A libcxx/test/std/ranges/range.adaptors/range_adaptor_types.h
M libcxx/test/std/ranges/ranges_robust_against_no_unique_address.pass.cpp
M libcxx/test/std/re/re.regex/re.regex.construct/bad_range.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/shared_ptr_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.rel/is_virtual_base_of.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.comp/is_bounded_array.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.compile.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_implicit_lifetime.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_constructs_from_temporary.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/reference_converts_from_temporary.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/make_from_tuple.pass.cpp
M libcxx/utils/synchronize_csv_status_files.py
M libunwind/src/UnwindCursor.hpp
M lld/COFF/Config.h
M lld/COFF/Driver.cpp
M lld/COFF/Driver.h
M lld/COFF/InputFiles.cpp
M lld/COFF/LTO.cpp
M lld/COFF/Options.td
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/BPSectionOrderer.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
M lld/docs/DTLTO.rst
M lld/docs/ld.lld.1
A lld/test/COFF/dtlto/files.test
A lld/test/COFF/dtlto/options.test
R lld/test/COFF/exported-dllmain.test
A lld/test/COFF/imported-dllmain-i386.test
A lld/test/COFF/imported-dllmain.test
M lld/test/COFF/thin-archive.s
M lld/test/ELF/bp-section-orderer.s
R lld/test/ELF/hexagon-jump-error.s
M lld/test/ELF/hexagon-plt.s
M lld/test/ELF/hexagon-shared.s
A lld/test/ELF/hexagon-thunk-range-b22rel.s
A lld/test/ELF/hexagon-thunk-range-gdplt.s
A lld/test/ELF/hexagon-thunk-range-plt.s
A lld/test/ELF/hexagon-thunks-packets.s
A lld/test/ELF/hexagon-thunks.s
A lld/test/ELF/hexagon-tls-allocateaux-multiple.s
M lld/test/ELF/hexagon-tls-gd-xform.s
A lld/test/ELF/keep-data-section-prefix.s
M lld/test/ELF/loongarch-relax-tlsdesc.s
M lld/test/MachO/objc.s
M lldb/bindings/interface/SBSaveCoreOptionsDocstrings.i
M lldb/cmake/modules/LLDBFramework.cmake
M lldb/docs/use/formatting.rst
M lldb/docs/use/python-reference.rst
M lldb/include/lldb/API/SBMemoryRegionInfoList.h
M lldb/include/lldb/API/SBSaveCoreOptions.h
M lldb/include/lldb/Core/PluginManager.h
M lldb/include/lldb/Core/dwarf.h
M lldb/include/lldb/Symbol/SaveCoreOptions.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/Stream.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/scripts/framework-header-fix.py
M lldb/scripts/version-header-fix.py
M lldb/source/API/CMakeLists.txt
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/Commands/CommandObjectProcess.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/DataFormatters/ValueObjectPrinter.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Expression/IRExecutionUnit.cpp
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.h
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlAtomic.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlUnordered.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlVariant.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.cpp
M lldb/source/Plugins/Process/minidump/MinidumpParser.h
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/SymbolFile/CTF/SymbolFileCTF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/AppleDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFAttribute.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugMacro.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDeclContext.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/UniqueDWARFASTType.cpp
M lldb/source/Plugins/SymbolFile/PDB/PDBLocationToDWARFExpression.cpp
M lldb/source/Plugins/SymbolLocator/Debuginfod/SymbolLocatorDebuginfod.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/PostfixExpression.cpp
M lldb/source/Symbol/SaveCoreOptions.cpp
M lldb/source/Target/Language.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/atomic/TestDataFormatterStdAtomic.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/TestDataFormatterStdVariant.py
M lldb/test/API/functionalities/data-formatter/nsdictionarysynth/TestNSDictionarySynthetic.py
A lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump64b.py
M lldb/test/API/lang/cpp/frame-var-depth-and-elem-count/TestFrameVarDepthAndElemCount.py
M lldb/test/API/lit.cfg.py
M lldb/test/API/lit.site.cfg.py.in
M lldb/test/API/python_api/sbsavecoreoptions/TestSBSaveCoreOptions.py
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
M lldb/test/API/tools/lldb-dap/breakpoint/TestDAP_setBreakpoints.py
M lldb/test/API/tools/lldb-dap/breakpoint/main.cpp
A lldb/test/Shell/Minidump/missing-memory-region.yaml
M lldb/test/Shell/Scripts/TestFrameworkFixScript.test
M lldb/test/Shell/Scripts/TestFrameworkFixUnifdef.test
M lldb/test/Shell/Scripts/TestRPCFrameworkFixScript.test
A lldb/test/Shell/Settings/TestChildDepthTruncation.test
M lldb/test/Shell/SymbolFile/NativePDB/Inputs/class_layout.lldbinit
M lldb/test/Shell/SymbolFile/PDB/Inputs/UdtLayoutTest.script
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/unittests/DAP/TestBase.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Process/minidump/MinidumpParserTest.cpp
M lldb/unittests/Symbol/TestTypeSystemClang.cpp
M lldb/unittests/SymbolFile/DWARF/DWARF64UnitTest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDebugNamesIndexTest.cpp
M lldb/unittests/SymbolFile/DWARF/SymbolFileDWARFTests.cpp
M llvm/Maintainers.md
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CIBestPractices.rst
A llvm/docs/CalleeTypeMetadata.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/CommandGuide/index.rst
A llvm/docs/CommandGuide/llvm-ir2vec.rst
M llvm/docs/CommandGuide/llvm-objdump.rst
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/Extensions.rst
M llvm/docs/GettingStarted.rst
M llvm/docs/LangRef.rst
M llvm/docs/MLGO.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/Reference.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/TestingGuide.rst
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
M llvm/include/llvm/ADT/CombinationGenerator.h
M llvm/include/llvm/ADT/STLForwardCompat.h
M llvm/include/llvm/ADT/StringTable.h
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/MemoryProfileInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/SFrame.h
A llvm/include/llvm/BinaryFormat/SFrameConstants.def
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionAnalysis.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/MachineScheduler.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/IR/CallingConv.h
M llvm/include/llvm/IR/DebugInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/FixedMetadataKinds.def
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PassInstrumentation.h
M llvm/include/llvm/IR/PassManager.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCAssembler.h
M llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSectionCOFF.h
M llvm/include/llvm/MC/MCSectionELF.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/include/llvm/Object/ELFObjectFile.h
A llvm/include/llvm/Object/SFrameParser.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/include/llvm/Transforms/Utils/SSAUpdater.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemoryProfileInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/CMakeLists.txt
A llvm/lib/BinaryFormat/SFrame.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/CodeGen/AsmPrinter/PseudoProbePrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/PseudoProbePrinter.h
M llvm/lib/CodeGen/AsmPrinter/WinException.cpp
M llvm/lib/CodeGen/AsmPrinter/WinException.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineDebugify.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineFunctionAnalysis.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
A llvm/lib/CodeGen/RegAllocBasic.h
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/DebugInfo/LogicalView/Core/LVScope.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/PassInstrumentation.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCCodeView.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/MC/MCFragment.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/ELFAsmParser.cpp
M llvm/lib/MC/MCParser/MCTargetAsmParser.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/MC/MCSectionCOFF.cpp
M llvm/lib/MC/MCSectionELF.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/MC/MCXCOFFStreamer.cpp
M llvm/lib/MC/MachObjectWriter.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/Object/CMakeLists.txt
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
A llvm/lib/Object/SFrameParser.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/BLAKE3/blake3_dispatch.c
M llvm/lib/Support/BLAKE3/blake3_impl.h
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/StringMap.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/DSInstructions.td
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/BPF/BPF.h
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
M llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
M llvm/lib/Target/Hexagon/HexagonInstrFormats.td
R llvm/lib/Target/Hexagon/HexagonInstrFormatsV60.td
M llvm/lib/Target/Hexagon/HexagonInstrFormatsV65.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV5.td
R llvm/lib/Target/Hexagon/HexagonIntrinsicsV60.td
R llvm/lib/Target/Hexagon/HexagonMapAsm2IntrinV62.gen.td
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCInstrFuture.td
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/RISCVCallingConv.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVSelectionDAGInfo.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVVectorMaskDAGMutation.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/X86AsmPrinter.h
M llvm/lib/Target/X86/X86CallingConv.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InterleavedAccess.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/LowerAllowCheckPass.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/NewGVN.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LoopRotationUtils.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SSAUpdater.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Utils/ValueMapper.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/BasicAA/modref.ll
M llvm/test/Analysis/CallGraph/ignore-assumelike-calls.ll
M llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
M llvm/test/Analysis/MemorySSA/lifetime-simple.ll
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/pr43427.ll
M llvm/test/Analysis/MemorySSA/pr43438.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/Analysis/StackSafetyAnalysis/lifetime.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/Assembler/autoupgrade-lifetime-intrinsics.ll
A llvm/test/Assembler/callee-type-metadata.ll
A llvm/test/Assembler/difile-empty-source.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-split.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
M llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
M llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
A llvm/test/CodeGen/AArch64/bsp_implicit_ops.mir
M llvm/test/CodeGen/AArch64/combine-sdiv.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll
M llvm/test/CodeGen/AArch64/freeze.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/highextractbitcast.ll
M llvm/test/CodeGen/AArch64/llvm.frexp.ll
M llvm/test/CodeGen/AArch64/neon-dotreduce.ll
M llvm/test/CodeGen/AArch64/neon-saba.ll
M llvm/test/CodeGen/AArch64/nontemporal.ll
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AArch64/stack-tagging.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ldst-ext.ll
R llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-sbfx.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
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M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
A llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
A llvm/test/CodeGen/AMDGPU/bad-agpr-vgpr-regalloc-priority.mir
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M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
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M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
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M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
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M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
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M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
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A llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
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A llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
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M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
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M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
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M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
A llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
A llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dot4.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.append.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.fi.b32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.consume.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.permute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.prim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.x.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.form.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
Log Message:
-----------
Rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/dcd3e6b42485...6ac764c4f921
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