[all-commits] [llvm/llvm-project] 0f2356: [Driver] Default to -mcpu=ultrasparc3 on Solaris/S...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Wed Jul 23 19:05:32 PDT 2025
Branch: refs/heads/users/MaskRay/spr/main.goff-only-register-sections-within-mcobjectstreamerchangesection
Home: https://github.com/llvm/llvm-project
Commit: 0f235695709d2505651a55ec7f3c8b7fba2b2dbb
https://github.com/llvm/llvm-project/commit/0f235695709d2505651a55ec7f3c8b7fba2b2dbb
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mcpu=ultrasparc3 on Solaris/SPARC (#149990)
Prompted by PR #149652, this patch changes the Solaris/SPARC default to
-mcpu, matching both the Oracle Studio 12.6 compilers and GCC 16:
[[PATCH] Default to -mcpu=ultrasparc3 on
Solaris/SPARC](https://gcc.gnu.org/pipermail/gcc-patches/2025-July/690191.html).
This is equivalent to enabling the `vis2` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: d385e9d86bce21679ac04b1c6abde0182f1d9e03
https://github.com/llvm/llvm-project/commit/d385e9d86bce21679ac04b1c6abde0182f1d9e03
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support V_PK_ADD_{MIN|MAX}_{I|U}16 and V_{MIN|MAX}3_{I|U}16 on gfx1250 (#150155)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 073460a2a35c7f0d9aa643e3043fccd62f094c9e
https://github.com/llvm/llvm-project/commit/073460a2a35c7f0d9aa643e3043fccd62f094c9e
Author: Jakub Chlanda <jakub at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/ROCm.h
Log Message:
-----------
[HIP][Clang][Driver] Move BC preference logic into ROCm detection (#149294)
This patch provides a single point for handling the logic behind
choosing common bitcode libraries. The intention is that the users of
ROCm installation detector will not have to rewrite options handling
code each time the bitcode libraries are queried. This is not too
distant from detectors for other architecture that encapsulate the
similar decision making process, providing cleaner interface. The only
flag left in `getCommonBitcodeLibs` (main point of entry) is
`NeedsASanRT`, this is deliberate, as in order to calculate it we need
to consult `ToolChain`.
Commit: 1e24b53534ed4043562ae32bb16c55b7820a3aed
https://github.com/llvm/llvm-project/commit/1e24b53534ed4043562ae32bb16c55b7820a3aed
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
Log Message:
-----------
[InstCombine] Add limit for expansion of gep chains (#147065)
When converting gep subtraction / comparison to offset subtraction /
comparison, avoid expanding very long multi-use gep chains.
Commit: b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
https://github.com/llvm/llvm-project/commit/b59aaf7da7a7121bf0263243fcec6a5fd6db1a2b
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
Log Message:
-----------
[Sanitizers] Remove handling for lifetimes on non-alloca insts (NFC) (#149994)
After #149310 the pointer argument of lifetime.start/lifetime.end is
guaranteed to be an alloca, so we don't need to go through
findAllocaForValue() anymore, and don't have to have special handling
for the case where it fails.
Commit: 0cfea5b73cadfcf408f3549ff209fba4f56f9138
https://github.com/llvm/llvm-project/commit/0cfea5b73cadfcf408f3549ff209fba4f56f9138
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
Log Message:
-----------
[BitcodeReader] Avoid quadratic complexity in intrinsic upgrade (#150032)
When materializing a function, we'd upgrade all calls to all upgraded
intrinsics. However, this would operate on all calls to the intrinsic
(including previously materialized ones), which leads to quadratic
complexity.
Instead, only upgrade the calls that are in the materialized function.
This fixes a compile-time regression introduced by #149310.
Commit: b7889a65a8e54f2d9c7f578a515a7bf970044bfe
https://github.com/llvm/llvm-project/commit/b7889a65a8e54f2d9c7f578a515a7bf970044bfe
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/ValueObject/ValueObject.cpp
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
Log Message:
-----------
[lldb][SBType] GetBasicType to unwrap canonical type (#149112)
`SBType::GetBasicType` fails on typedefs to primitive types. The docs
for `GetBasicType` state:
```
Returns the BasicType value that is most appropriate to this type
```
But, e.g., for `uint64_t` this would currently return
`eBasicTypeInvalid`.
`TypeSystemClang::GetBasicTypeEnumeration` (which is what
`SBType::GetBasicType` uses) doesn't see through typedefs. Inside LLDB
we almost always call `GetBasicTypeEnumeration` on the canonical type.
In the cases we don't I suspect those were just subtle bugs. This patch
gets the canonical type inside of `GetBasicTypeEnumeration` instead.
rdar://155829208
Commit: 7e878aaf23dd559fa491a0bf6168f15f939c5965
https://github.com/llvm/llvm-project/commit/7e878aaf23dd559fa491a0bf6168f15f939c5965
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[PatternMatch] Add support for capture-and-match (NFC) (#149825)
When using PatternMatch, there is a common problem where we want to both
match something against a pattern, but also capture the
value/instruction for various reasons (e.g. to access flags).
Currently the two ways to do that is to either capture using
m_Value/m_Instruction and do a separate match on the result, or to use
the somewhat awkward `m_CombineAnd(m_XYZ, m_Value(V))` pattern.
This PR introduces to add a variant of `m_Value`/`m_Instruction` which
does both a capture and a match. `m_Value(V, m_XYZ)` is basically
equivalent to `m_CombineAnd(m_XYZ, m_Value(V))`.
I've ported two InstCombine files to this pattern as a sample.
Commit: b17f4d3366cd3a6a276b825342c270a839b849db
https://github.com/llvm/llvm-project/commit/b17f4d3366cd3a6a276b825342c270a839b849db
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
Log Message:
-----------
[AggressiveInstCombine] Use AA during store merge (#149992)
This is a small extension of #147540, resolving one of the FIXMEs.
Instead of bailing out on any instruction that may read/write memory,
use AA to check whether it can alias the stored parts. Do this using a
crude check based on the underlying object only.
This pattern occurs rarely in practice, but at the same time it also doesn't
seem to add any compile-time cost, so it's probably worth handling.
Commit: c3a9e69737c0577cacddff1a2b4cfd2209fb3706
https://github.com/llvm/llvm-project/commit/c3a9e69737c0577cacddff1a2b4cfd2209fb3706
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/RISCV/pr148084.ll
Log Message:
-----------
[RISCV] Add test coverage for #148084
Commit: 0586067cf07bef0f04fd1dc7135a9b773ebaa07a
https://github.com/llvm/llvm-project/commit/0586067cf07bef0f04fd1dc7135a9b773ebaa07a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Semantics/canonicalize-omp.cpp
Log Message:
-----------
[Flang] Build fix without precompiled headers
The header semantics.h is added implitly in the precompiled headers, but
the build was failing when precompiled headers are disabled (e.g.
using CMAKE_DISABLE_PRECOMPILE_HEADERS=ON):
```
../_src/flang/lib/Semantics/canonicalize-omp.cpp: In constructor ‘Fortran::semantics::CanonicalizationOfOmp::CanonicalizationOfOmp(Fortran::semantics::SemanticsContext&)’:
../_src/flang/lib/Semantics/canonicalize-omp.cpp:31:38: error: invalid use of incomplete type ‘class Fortran::semantics::SemanticsContext’
31 | : context_{context}, messages_{context.messages()} {}
| ^~~~~~~
In file included from ../_src/flang/lib/Semantics/canonicalize-omp.cpp:9:
../_src/flang/lib/Semantics/canonicalize-omp.h:17:7: note: forward declaration of ‘class Fortran::semantics::SemanticsContext’
17 | class SemanticsContext;
| ^~~~~~~~~~~~~~~~
compilation terminated due to -fmax-errors=1.
```
Commit: 39b9891fc9adb23a1894b2aeea1f5577892a40fe
https://github.com/llvm/llvm-project/commit/39b9891fc9adb23a1894b2aeea1f5577892a40fe
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
Log Message:
-----------
[RISCV] Make RISCVVPseudo extend Pseudo. NFC (#149785)
This PR makes RISCVVPseudo extend Pseudo so that we don't forget to
define a record for RISCVVPseudo.
Commit: 6c50e2b2dda185816b3a4d65cef6771dad5113d8
https://github.com/llvm/llvm-project/commit/6c50e2b2dda185816b3a4d65cef6771dad5113d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
Log Message:
-----------
[SCEV] Don't require NUW at first add when checking A+C1 < (A+C2)<nuw> (#149795)
Relax the NUW requirements for isKnownPredicateViaNoOverflow, if the
second operand (Y) is an ADD. The code only simplifies the condition if
C1 < C2, so if the second ADD is NUW, it doesn't matter whether the
first operand also has the NUW flag, as it cannot wrap if C1 < C2.
https://alive2.llvm.org/ce/z/b3dM7N
PR: https://github.com/llvm/llvm-project/pull/149795
Commit: b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
https://github.com/llvm/llvm-project/commit/b1aece90f32c0bb0685e1e79d6dc8e1a147bde37
Author: Ralf Jung <post at ralfj.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
LangRef: allocated objects can grow (#141338)
This enables the (reasonably common) pattern of using `mmap` to reserve
but not actually map a wide range of pages, and then only adding in more
pages as memory is actually needed. Effectively, that region of memory
is one big allocated object for LLVM, but crucially, that allocated
object *changes its size*.
Having an allocated object grow seems entirely compatible with what LLVM
optimizations assume, *except* that when LLVM sees an `alloca` or
similar instruction, it will assume that a pointer that has been
`getelementptr inbounds` by more than the size of the allocated object
cannot alias that `alloca`. But for allocated objects that are created
e.g. by `mmap`, where LLVM does not know their size, this cannot happen
anyway.
The other main point to be concerned about is having a `getelementptr
inbounds` that is moved up across an operation that grows an allocated
object: this should be legal as `getelementptr` is freely reorderable.
We achieve that by saying that for allocated objects that change their
size, "inbounds" means "inbounds of their maximal size", not "inbounds
of their current size".
It would be nice to also allow shrinking allocations (e.g. by
`munmap`ing pages at the end), but that is more tricky. Consider an
example like this:
- load 4 bytes from `ptr`
- call some function
- load 1 byte from `ptr`
Right now, LLVM could argue that since `ptr` clearly has not been
deallocated, there must be at least 4 bytes of dereferenceable memory
behind `ptr` after the call. If allocations can shrink, this kind of
reasoning is no longer valid. I don't know if LLVM actually does
reasoning like that -- I think it should not, since I think it should be
possible to have allocations that shrink -- but to remain conservative I
am not proposing that as part of this patch.
Commit: 52737ea6d69d79fb104480d9cd67bf85711fc939
https://github.com/llvm/llvm-project/commit/52737ea6d69d79fb104480d9cd67bf85711fc939
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
Log Message:
-----------
[clang][test] Require x86 target for new Windows EH tests
Added by https://github.com/llvm/llvm-project/pull/144745.
These tests cause Clang -cc1 to generate the option
-x86-asm-syntax=intel, which is only available if you have
included the x86 target.
<<<<<<
1: clang: warning: argument unused during compilation: '-c' [-Wunused-command-line-argument]
label:38'0 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
label:38'1 ? possible intended match
2: clang (LLVM option parsing): Unknown command line argument '-x86-asm-syntax=intel'. Try: 'clang (LLVM option parsing) --help'
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3: clang (LLVM option parsing): Did you mean '--asan-stack=intel'?
label:38'0 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>>>>>>
Commit: 2a5cd50c469891a0bc918b42785cbf6fd6132a50
https://github.com/llvm/llvm-project/commit/2a5cd50c469891a0bc918b42785cbf6fd6132a50
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
M lld/test/ELF/loongarch-relax-tlsdesc.s
Log Message:
-----------
[lld][LoongArch] Support relaxation during TLSDESC GD/LD to IE/LE conversion (#123730)
Complement https://github.com/llvm/llvm-project/pull/123715. When
relaxation enable, remove redundant NOPs.
Commit: c295f050633ba4feb3e2ed74811b9c9d7add758d
https://github.com/llvm/llvm-project/commit/c295f050633ba4feb3e2ed74811b9c9d7add758d
Author: Aaron Danen <aaron.danen at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Improve error message on failed undos (#149396)
Updated error message logic for undo function. Throws different errors
for the case of there being nothing to undo, and for the case of
requesting more undos than there are operations to undo.
Fixes https://github.com/llvm/llvm-project/issues/143668
Commit: 61ce6d70a2fe309d65fe3b7db5b94c17067b9628
https://github.com/llvm/llvm-project/commit/61ce6d70a2fe309d65fe3b7db5b94c17067b9628
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmNeon/Transforms.h
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/Transforms/LowerContractToNeonPatterns.cpp
R mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
A mlir/test/Dialect/ArmNeon/vector-bfmmla.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Lower vector.contract to Neon FEAT_BF16 operations (#148198)
This builds upon the framework established by
https://github.com/llvm/llvm-project/pull/149810
to add lowering to `bfmmla`.
Commit: 77b1b956da234d3b3be31c4f04e6af3173b306a1
https://github.com/llvm/llvm-project/commit/77b1b956da234d3b3be31c4f04e6af3173b306a1
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[LV] Also clamp MaxVF by trip count when maximizing vector bandwidth. (#149794)
Also clamp the max VF when maximizing vector bandwidth by the maximum
trip count. Otherwise we may end up choosing a VF for which the vector
loop never executes.
PR: https://github.com/llvm/llvm-project/pull/149794
Commit: 36c37b019b5daae79785e8558d693e6ec42b0ebd
https://github.com/llvm/llvm-project/commit/36c37b019b5daae79785e8558d693e6ec42b0ebd
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
Log Message:
-----------
[flang][OpenMP] Restore reduction processor behavior broken by #145837 (#150178)
Fixes #149089 and #149700.
Before #145837, when processing a reduction symbol not yet supported by
OpenMP lowering, the reduction processor would simply skip filling in
the reduction symbols and variables. With #145837, this behvaior was
slightly changed because the reduction symbols are populated before
invoking the reduction processor (this is more convenient to shared the
code with `do concurrent`).
This PR restores the previous behavior.
Commit: 3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
https://github.com/llvm/llvm-project/commit/3ab64c5b29643f8d10e5e6286f7a1b9f0f2c0792
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
Log Message:
-----------
[NFC][Clang][FMV] Make FMV priority data type future proof. (#150079)
FMV priority is the returned value of a polymorphic function. On RISC-V
and X86 targets a 32-bit value is enough. On AArch64 we currently need
64 bits and we will soon exceed that. APInt seems to be a suitable
replacement for uint64_t, presumably with minimal compile time overhead.
It allows bit manipulation, comparison and variable bit width.
Commit: 2726b7fb1c0768bf404a712e5940b64db9fed5e1
https://github.com/llvm/llvm-project/commit/2726b7fb1c0768bf404a712e5940b64db9fed5e1
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Event.td
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/event/olDestroyEvent.cpp
A offload/unittests/OffloadAPI/event/olSyncEvent.cpp
R offload/unittests/OffloadAPI/event/olWaitEvent.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
A offload/unittests/OffloadAPI/queue/olSyncQueue.cpp
R offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
Log Message:
-----------
[Offload] Rename olWaitEvent/Queue to olSyncEvent/Queue (#150023)
This more closely matches the nomenclature used by CUDA, AMDGPU and
the plugin interface.
Commit: ffdada166689172e54bd664ff3e43c824c22c69b
https://github.com/llvm/llvm-project/commit/ffdada166689172e54bd664ff3e43c824c22c69b
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Add loan expiry analysis (#148712)
This PR adds the `ExpiredLoansAnalysis` class to track which loans have expired. The analysis uses a dataflow lattice (`ExpiredLattice`) to maintain the set of expired loans at each program point.
This is a very light weight dataflow analysis and is expected to reach fixed point in ~2 iterations.
In principle, this does not need a dataflow analysis but is used for convenience in favour of lean code.
Commit: 5de443a4d37e1b7580f9ccee389572aef7233a85
https://github.com/llvm/llvm-project/commit/5de443a4d37e1b7580f9ccee389572aef7233a85
Author: Andrey Karlov <dein.negativ at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
Log Message:
-----------
[clang-tidy] Make copy-and-swap idiom more general for `bugprone-unhandled-self-assignment` (#147066)
This change enhances the `bugprone-unhandled-self-assignment` checker by
adding an additional matcher that generalizes the copy-and-swap idiom
pattern detection.
# What Changed
Added a new matcher that checks for:
- An instance of the current class being created in operator=
(regardless of constructor arguments)
- That instance being passed to a `swap` function call
# Problem Solved
This fix reduces false positives in PMR-like scenarios where "extended"
constructors are used (typically taking an additional allocator
argument). The checker now properly recognizes copy-and-swap
implementations that use extended copy/move constructors instead of
flagging them as unhandled self-assignment cases.
Fixes #146324
---------
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
https://github.com/llvm/llvm-project/commit/a7edc95c799c46665ecf4465a4dc7ff4bee3ced0
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Optimize stripAndAccumulateConstantOffsets() for common case (NFC)
For the common case where we don't have bit width changing address
space casts, we can directly call accumulateConstantOffset() on the
original Offset. Skip the bit width reconciliation logic in that
case.
Commit: 33455825428f9e1b7998a66e228da7f6d483acf8
https://github.com/llvm/llvm-project/commit/33455825428f9e1b7998a66e228da7f6d483acf8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vec_extract.ll
Log Message:
-----------
[X86] getTargetConstantBitsFromNode - early-out if the element bitsize doesn't align with the source bitsize (#150184)
As we use getTargetConstantBitsFromNode in a wider variety of places we can't guarantee that all the sources match (or are legal) anymore - better to early out than assert.
Fixes #150117
Commit: 756ac65987b84b7427c25d76f069a04a4a817a5c
https://github.com/llvm/llvm-project/commit/756ac65987b84b7427c25d76f069a04a4a817a5c
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Passes/PassBuilder.cpp
A llvm/test/CodeGen/AMDGPU/finalizebundle.mir
Log Message:
-----------
[CodeGen] Add a pass for testing finalizeBundle (#149813)
This allows for unit testing of finalizeBundle with standard MIR tests
using update_mir_test_checks.py.
Commit: d449d3dc13daff388cbf6a7bb910e0511804eb84
https://github.com/llvm/llvm-project/commit/d449d3dc13daff388cbf6a7bb910e0511804eb84
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
Log Message:
-----------
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
Replace its only use in the AMDGPU R600 backend with a call to
finalizeBundles.
Commit: 283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
https://github.com/llvm/llvm-project/commit/283fd3f09a3d1fac283a991d2d0f3f9cfbd69e1d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
Log Message:
-----------
[flang][cuda] Use get() to get raw pointer (#150205)
Fix issue reported in #150136. `createAllocatable` returns an OwingPtr.
Use `get()` to get the raw pointer has it is done in the
`flang-rt/unittests/Runtime/CUDA/Memory.cpp` tests.
Commit: f992ae4fd16357116b341a1c8291b970787dc462
https://github.com/llvm/llvm-project/commit/f992ae4fd16357116b341a1c8291b970787dc462
Author: Luke Drummond <luke.drummond at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/tools/bugpoint/bugpoint.cpp
M polly/include/polly/LinkAllPasses.h
Log Message:
-----------
Slightly improve the getenv("bar") linking problem
There's been a variation of the following in the code since 2005:
if (unoptimizable_true)
return;
use_this_symbol_to_force_linking(); // unreachable but never removed
Way back in 00d5508496c it was the win32 call `GetCurrentProcess`
but switched to `getenv("bar")` fairly soon after in 63e504ff43. While
that pulled in fewer dependencies and made the code portable, it's a
bit of a weird construct. The environment variable used for the `getenv`
call is "bar", which is particularly weird to see fly past when you run
`ltrace` on a binary linked against LLVM.
In this patch I don't try to replace this construct wholesale - it's
still required for architectural reasons I'm not able to tackle right
now, but I did try and make it slightly less weird and opaque:
- It gives the construct a name
- The environment variable hints where this comes from and that its
value is ignored
Combined, this should be a bit of improvement for the next person who
wonders what LLVM is up to when they trace their process or see
smatterings of `getenv("bar")` dotted around the source.
Commit: 3affbce84342a80a0d869720353786d0db62ff4b
https://github.com/llvm/llvm-project/commit/3affbce84342a80a0d869720353786d0db62ff4b
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix a crash on invalid concept (#150186)
Fixes #149986
Commit: cc380f6e9ba48bfc7fad932d3031141ca88dde53
https://github.com/llvm/llvm-project/commit/cc380f6e9ba48bfc7fad932d3031141ca88dde53
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
Log Message:
-----------
[LLDB] Add formatters for MSVC STL map-like types (#148385)
This PR adds formatters for `std::map`, `std::set`, `std::multimap`,
`std::multiset` as well as their iterators. It's done in one PR because
the types are essentially the same (a tree) except for their value type.
The iterators are required because of the tests.
`MsvcStlTreeIterSyntheticFrontEnd` is based on the libc++ equivalent. As
opposed to `std::list`, there aren't that many duplicates, so I didn't
create a generic type.
For reference, the tree is implemented in
https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/xtree.
Towards #24834.
Commit: 411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
https://github.com/llvm/llvm-project/commit/411e61db1cfd8d94760416bfa30cd9ad03a8cf3d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port cc380f6e9ba4
Commit: d65cc97ab1bdc61b22e853f3882c9ba267764e53
https://github.com/llvm/llvm-project/commit/d65cc97ab1bdc61b22e853f3882c9ba267764e53
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Fix build on 32-bit platforms after #125556
Commit: 114d74e39151ea60afd211a307011f3943ecc9a9
https://github.com/llvm/llvm-project/commit/114d74e39151ea60afd211a307011f3943ecc9a9
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Expand VPBlendRecipes to select instructions. NFC (#133993)
When looking at some EVL tail folded code in SPEC CPU 2017 I noticed we
sometimes have both VPBlendRecipes and select VPInstructions in the same
plan:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
BLEND ir<%8> = ir<%n.015> ir<%foo>/vp<%8>
EMIT vp<%9> = select vp<%active.lane.mask>, ir<%8>, ir<%n.015>
Since a blend will ultimately generate a chain of selects, we could fold
the blend into the select:
EMIT vp<%active.lane.mask> = active lane mask vp<%5>, vp<%3>
EMIT vp<%7> = icmp ...
EMIT vp<%8> = logical-and vp<%active.lane.mask>, vp<%7>
EMIT ir<%8> = select vp<%8>, ir<%foo>, ir<%n.015>
So as a first step, this patch expands blends to a series of select
instructions, which may allow them to be simplified further with other
select instructions.
Commit: bdd638a89763046d9cbd8493c8801ef0898c8555
https://github.com/llvm/llvm-project/commit/bdd638a89763046d9cbd8493c8801ef0898c8555
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Remove handling for lifetime intrinsic on non-alloca (NFC)
After #149310 this is guaranteed to be an alloca.
Commit: 18edd82716a710e40cbed3bd81b8c9e64060c171
https://github.com/llvm/llvm-project/commit/18edd82716a710e40cbed3bd81b8c9e64060c171
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll
Log Message:
-----------
[Inline] Regenerate test checks (NFC)
Do not omit check lines for any functions, to avoid spurious diffs
on regeneration. Also update to a newer UTC version which properly
generates the metadata checks.
Commit: 2147e29f641f22822e2b0e10c978b28b06db1aeb
https://github.com/llvm/llvm-project/commit/2147e29f641f22822e2b0e10c978b28b06db1aeb
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
Log Message:
-----------
[AMDGPU] Tests for unnecessary S_WAIT_XCNT insertion (#145688)
Hardware does an implicit "S_WAIT_XCNT 0" between SMEM and VMEM
instructions, so there will never be outstanding address translations
for both SMEM and VMEM at the same time.
Commit: efa25c4737440887772e6c6ed72029afa0bf05ca
https://github.com/llvm/llvm-project/commit/efa25c4737440887772e6c6ed72029afa0bf05ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Clang] Fix new driver device only compilation for `amdgcnspirv` target (#150110)
Summary:
This is broken with the current target because it was not bundling the
output as HIP likes and this would fail if targeting both at the same
time.
Commit: 01e23c3d626c30000820465f029793e44e2062e4
https://github.com/llvm/llvm-project/commit/01e23c3d626c30000820465f029793e44e2062e4
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/HIPSupport.rst
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
Log Message:
-----------
[HIPSTDPAR] Add support for globals (#146813)
This (mostly) removes one of the largest remaining limitations of
`hipstdpar` based algorithm acceleration, by adding support for global
variable usage in offloaded algorithms. It is mean to compose with a run
time component that will live in the support library, and fires iff a
special variable is provided by the latter. In short, things work as
follows:
- We replace uses some global `G` with an indirect access via an
implicitly created anonymous global `F`, which is of pointer type and is
expected to hold the program-wide address of `G`;
- We append 'F', alongside 'G''s name, to an table structure;
- At run-time, the support library uses the table to look-up the
program-wide address of a contained symbol based on its name, and then
stores the address via the paired pointer.
This doesn't handle internal linkage symbols (`static foo` or `namespace
{ foo }`) if they are not unique i.e. if there's a name clash that is
solved by the linker, as the resolution would not be visible. Also,
initially we will only support "true" globals in RDC mode. Things would
be much simpler if we had direct access to the accelerator loader, but
since the expectation is to compose at the HIP RT level we have to jump
through additional hoops.
Commit: 6ed921f9675b7f1bb840f115d81cede4d182cdc2
https://github.com/llvm/llvm-project/commit/6ed921f9675b7f1bb840f115d81cede4d182cdc2
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
Log Message:
-----------
Reland "[mlir][vector] Use vector.broadcast in place of vector.splat" (#150138)
This reverts commit 228c45f13dc92546661b6825b7b32c3808b0d2eb (PR
#148937) . Now that #148027 is landed, I think it is safe to "reland"
the original PR: #148028
Commit: 2c6eec219d7791cb083d8add242f0b1d2a0e3160
https://github.com/llvm/llvm-project/commit/2c6eec219d7791cb083d8add242f0b1d2a0e3160
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/GVN/lifetime-simple.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/NewGVN/verify-memoryphi.ll
M llvm/test/Transforms/SROA/alloca-address-space.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/ignore-droppable.ll
M llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/invoke_unwind_lifetime.ll
Log Message:
-----------
[Tests] Avoid lifetime intrinsics on non-allocas (NFC)
Don't rely on auto-upgrade, instead either remove unnecessary
casts or remove no longer applicable tests.
Commit: 081b74caf5fbfe04abc372c453cb1d6fc8f781a7
https://github.com/llvm/llvm-project/commit/081b74caf5fbfe04abc372c453cb1d6fc8f781a7
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/sequence.c
A offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
Log Message:
-----------
[Offload] Add olWaitEvents (#150036)
This function causes a queue to wait until all the provided events have
completed before running any future scheduled work.
Commit: 43db6c5cc1a81b540ddca49bee197895c420ec2d
https://github.com/llvm/llvm-project/commit/43db6c5cc1a81b540ddca49bee197895c420ec2d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A flang/include/flang/Parser/openmp-utils.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] General utility to get directive id from AST node (#150121)
Fortran::parser::omp::GetOmpDirectiveName(t) will get the
OmpDirectiveName object that corresponds to construct t. That object (an
AST node) contains the enum id and the source information of the
directive.
Replace uses of extractOmpDirective and getOpenMPDirectiveEnum with the
new function.
Commit: 8e072b9d495293b08d939c880d185025751b4269
https://github.com/llvm/llvm-project/commit/8e072b9d495293b08d939c880d185025751b4269
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
Log Message:
-----------
[sanitizer_common][nfc] Rename `tid_t` to avoid conflicting declarations (#149011)
`tid_t` is also defined in the AIX header `/usr/include/sys/types.h`
which is included by system `pthread.h`. The use of `tid_t` by AIX is
conforming according to
[POSIX](https://pubs.opengroup.org/onlinepubs/9799919799/functions/V2_chap02.html):
> Implementations may add symbols to the headers shown in the following
table [ ... ]
Commit: f1bb5de611922bfd76846d0b36a9b92a1dfce80e
https://github.com/llvm/llvm-project/commit/f1bb5de611922bfd76846d0b36a9b92a1dfce80e
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/tanpi.f90
Log Message:
-----------
[flang] Implement `tanpi` (#149527)
Commit: 594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
https://github.com/llvm/llvm-project/commit/594b6f7b3f70b26bf9c7b34d54340797e3e07a1d
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math][c++23] Implement comparison operations operator overloads for BFloat16 (#150087)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: fc0a978327215aa8883ae6f18d1e316f3c04520a
https://github.com/llvm/llvm-project/commit/fc0a978327215aa8883ae6f18d1e316f3c04520a
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
A flang/test/Lower/assign-statement.f90
Log Message:
-----------
[Flang] Fix ASSIGN statement (#149941)
Handle the case where the assigned variable also has a pointer
attribute.
Fixes #121721
Commit: 8fff238b2c363b036ce9e7bf7abab3acafc87ab2
https://github.com/llvm/llvm-project/commit/8fff238b2c363b036ce9e7bf7abab3acafc87ab2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/EmptyOpPatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/ExtractSliceFromReshapeUtils.cpp
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Tensor/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
Log Message:
-----------
[mlir][NFC] update `mlir/Dialect` create APIs (23/n) (#149930)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
https://github.com/llvm/llvm-project/commit/c1130360902082e5d11fcf9a6a4ddd5dfc1a8ec9
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/IO.cpp
A flang/test/Lower/equivalence-3.f
Log Message:
-----------
[Flang] Fix a crash when equivalence and namelist statements are used (#150081)
Check for equivalence when generating namelist descriptors in IO.cpp.
Fixes #124489
Commit: 72df5464eda2c0986200a4bfb30e086ee59fe1d6
https://github.com/llvm/llvm-project/commit/72df5464eda2c0986200a4bfb30e086ee59fe1d6
Author: Krishna Pandey <kpandey81930 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/bfloat16.h
Log Message:
-----------
[libc][math] Remove constexpr from bfloat16 comparison operations (#150227)
Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
Commit: dfd3935e4ff72ab85bab758e297f93e04f8effed
https://github.com/llvm/llvm-project/commit/dfd3935e4ff72ab85bab758e297f93e04f8effed
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add regbanklegalize rules for uniform global loads (#145909)
Commit: 9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
https://github.com/llvm/llvm-project/commit/9563e7a94095c3c55e9598b8b3d86e5ca76b3c29
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
Log Message:
-----------
[VPlan] Mark VPInstruction::ExplicitVectorLength as single scalar. NFC (#150221)
This allows it to be broadcasted without an explicit
VPInstruction::Broadcast in #150202
Commit: 5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
https://github.com/llvm/llvm-project/commit/5ae83b0ccd28e994e29dd1fa00f676eb31aa0a7a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
Log Message:
-----------
AMDGPU/GlobalISel: Add tests for missing readanylane combines (#145910)
Commit: 933ba273063f5a4289f0fce109f8f8c17124aa41
https://github.com/llvm/llvm-project/commit/933ba273063f5a4289f0fce109f8f8c17124aa41
Author: Martin Wehking <martin.wehking at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/test/CodeGen/AArch64/neon-intrinsics.c
Log Message:
-----------
Fix implicit vector conversion (#149970)
Previously, the unsigned NEON intrinsic variants of 'vqshrun_high_n' and
'vqrshrun_high_n' were using signed integer types for their first
argument and return values.
These should be unsigned according to developer.arm.com, however.
Adjust the test cases accordingly.
Commit: 4bdef46fe89a3359a2eec631c0f6722a736aae0c
https://github.com/llvm/llvm-project/commit/4bdef46fe89a3359a2eec631c0f6722a736aae0c
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
Log Message:
-----------
AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (#145911)
Commit: 3564cfa211e932e4a9d19096ead9a241539e6bb9
https://github.com/llvm/llvm-project/commit/3564cfa211e932e4a9d19096ead9a241539e6bb9
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
Log Message:
-----------
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
Add rules for G_AMDGPU_BUFFER_LOAD and implement waterfall lowering
for divergent operands that must be sgpr.
Commit: e0a48bb256ffa380d226d9cc50b29196ef587741
https://github.com/llvm/llvm-project/commit/e0a48bb256ffa380d226d9cc50b29196ef587741
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/rounding_mode.h
Log Message:
-----------
[libc] Make FPUtils' rounding_mode.h functions constexpr. (#149167)
Commit: 5ebbc258d4f410c45f247eb53bc722798b4d4f45
https://github.com/llvm/llvm-project/commit/5ebbc258d4f410c45f247eb53bc722798b4d4f45
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
Log Message:
-----------
[mlir][ArithToAMDGPU][NFC] Add PatternBenefit (#150091)
Since there may be caseses where these patterns are run alongside the
generic patterns from ArithExpandOps, add a PatternBenefit argument to
allow these architecture-specific patterns to be prioritized.
Commit: d2dedcd11f51c23d8401b7e5eff11b23faea652b
https://github.com/llvm/llvm-project/commit/d2dedcd11f51c23d8401b7e5eff11b23faea652b
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
A llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
Log Message:
-----------
[ObjCARC] Delete empty autoreleasepools with no autoreleases in them (#144788)
Erase empty autorelease pools that have no autorelease in them
Commit: 38a977d00c4e22f4a2a21e5f577c57df2053872e
https://github.com/llvm/llvm-project/commit/38a977d00c4e22f4a2a21e5f577c57df2053872e
Author: Devajith <devajith.valaparambil.sreeramaswamy at cern.ch>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Interpreter/fail.cpp
Log Message:
-----------
[clang-repl] Always clean up scope and context for TopLevelStmtDecl (#150215)
This fixes an issue introduced by
https://github.com/llvm/llvm-project/pull/84150, where failing to pop
compound scope, function scope info, and decl context after a failed
statement could lead to an inconsistent internal state.
Commit: 06233892e84f96a3b4e05338cd4f6c12b8f5a185
https://github.com/llvm/llvm-project/commit/06233892e84f96a3b4e05338cd4f6c12b8f5a185
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Driver/sparc-target-features.c
Log Message:
-----------
[Driver] Default to -mv8plus on 32-bit Solaris/SPARC (#150176)
While investigating PR #149990, I noticed that while both the Oracle
Studio compilers and GCC default to `-mv8plus` on 32-bit Solaris/SPARC,
Clang does not.
This patch fixes this by enabling the `v8plus` feature.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: 97eec759e69e7534e020b4e2ad1858842eec50ee
https://github.com/llvm/llvm-project/commit/97eec759e69e7534e020b4e2ad1858842eec50ee
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/bitfields.c
Log Message:
-----------
[CIR] Add support for binary operations on bitfield members (#149676)
This PR introduces support for binary operations on bitfield members.
Commit: f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
https://github.com/llvm/llvm-project/commit/f0f3194e198e05fe9094cfb39a2cf63f3b4a1a7d
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-gep.ll
Log Message:
-----------
[InstCombine] Fold icmp of gep chains (#146714)
This extends https://github.com/llvm/llvm-project/pull/144065 to the
general case of an icmp between two GEP chains that have a common base.
Commit: d5c8303af86f8f4f50320b831c027df4febcd5ea
https://github.com/llvm/llvm-project/commit/d5c8303af86f8f4f50320b831c027df4febcd5ea
Author: nerix <nerixdev at outlook.de>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
Log Message:
-----------
[LLDB] Add formatters for MSVC STL std::deque (#150097)
This PR adds synthetic children for std::deque from MSVC's STL.
Similar to libstdc++ and libc++, the elements are in a `T**`, so we need
to "subscript" twice. The [NatVis for
deque](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/debugger/STL.natvis#L1103-L1112)
uses `_EEN_DS` which contains the block size. We can't access this, but
we can access the [constexpr
`_Block_size`](https://github.com/microsoft/STL/blob/313964b78a8fd5a52e7965e13781f735bcce13c5/stl/inc/deque#L641).
Towards #24834.
Commit: 05f0dd2e917e90579ac49f94b29d12099d489efd
https://github.com/llvm/llvm-project/commit/05f0dd2e917e90579ac49f94b29d12099d489efd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port d5c8303af86f
Commit: dbc63f1e3724b6f2348c431dc1216537d9c042e8
https://github.com/llvm/llvm-project/commit/dbc63f1e3724b6f2348c431dc1216537d9c042e8
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
A mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
A mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` into `amdgpu.gather_to_lds` (#149851)
This PR adds a new optimization pass to fold
`memref.subview/expand_shape/collapse_shape` ops into consumer
`amdgpu.gather_to_lds` operations.
* Implements a new pass `AmdgpuFoldMemRefOpsPass` with pattern
`FoldMemRefOpsIntoGatherToLDSOp`
* Adds corresponding folding tests
---------
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Commit: 7dcd90df454e47a8db17c5ec956222e6b7858945
https://github.com/llvm/llvm-project/commit/7dcd90df454e47a8db17c5ec956222e6b7858945
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
[lld][ELF] Allow `data.rel.ro.hot` and `.data.rel.ro.unlikely` to be RELRO (#148920)
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744
proposes to partition a static data section (like `.data.rel.ro`) into
two sections, one grouping the cold ones and the other grouping the
rest.
lld requires all relro sections to be contiguous. To place
`.data.rel.ro.unlikely` in the middle of all relro sections, this change
proposes to add `.data.rel.ro.unlikely` explicitly as RELRO section.
---------
Co-authored-by: Sam Elliott <quic_aelliott at quicinc.com>
Commit: 97faab7bc279516a31001621203f4ff5a158ed13
https://github.com/llvm/llvm-project/commit/97faab7bc279516a31001621203f4ff5a158ed13
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Lower/Bridge.cpp
Log Message:
-----------
[flang] Fix a warning
This patch fixes:
flang/lib/Lower/Bridge.cpp:2128:10: error: unused variable 'result'
[-Werror,-Wunused-variable]
Commit: f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
https://github.com/llvm/llvm-project/commit/f4d0d124cb5e2157d32aef69d9ab52abcea7fb23
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Log Message:
-----------
[NFC][AMDGPU] Re-run update_test_checks over some tests (#150231)
Commit: a7867fcd94555fb056bcaac66de45d4635da99bf
https://github.com/llvm/llvm-project/commit/a7867fcd94555fb056bcaac66de45d4635da99bf
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/FileCheck/FileCheck.cpp
A llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[FileCheck] Limit quadratic partial-match search behavior (#147833)
Commit: 56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
https://github.com/llvm/llvm-project/commit/56b263b1bdd1713dd4062bfd3b3a7fce4aad4b2c
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add transformation pattern for vector.broadcast in Wg to Sg pass (#144417)
This PR adds transformation pattern for vector.broadcast op in
xegpu-wg-to-sg-distribute pass
Commit: 10c38943a074033143cfb86118e4e6251db97e9a
https://github.com/llvm/llvm-project/commit/10c38943a074033143cfb86118e4e6251db97e9a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Refactor the tablegen classes for P-ext shift instructions. NFC (#150175)
-Rename based on element size suffix rather than immediate size.
-Use _ri suffix like we do for shifts in the base ISA.
-Push some common code to the base class.
-Use shamt for the field name to enable more sharing.
-Add funct3 as a parameter which we'll need for right shifts.
Commit: b0434925c98c9a8906afea60a1304c870b1f574a
https://github.com/llvm/llvm-project/commit/b0434925c98c9a8906afea60a1304c870b1f574a
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
Log Message:
-----------
[mlir][NFC] update `Conversion` create APIs (4/n) (#149879)
See https://github.com/llvm/llvm-project/pull/147168 for more info.
Commit: 4471d59a10f70b502b036f57f4728f2411442fc4
https://github.com/llvm/llvm-project/commit/4471d59a10f70b502b036f57f4728f2411442fc4
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/acospi.f90
Log Message:
-----------
[flang] Implement `acospi` (#150234)
Commit: 01b23c8d81662ed8383df78c2de0ea100d92d503
https://github.com/llvm/llvm-project/commit/01b23c8d81662ed8383df78c2de0ea100d92d503
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/asinpi.f90
Log Message:
-----------
[flang] Implement `asinpi` (#150238)
Commit: 90944b85c5331a4cf8b720b5a966bc2c735499d7
https://github.com/llvm/llvm-project/commit/90944b85c5331a4cf8b720b5a966bc2c735499d7
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
Log Message:
-----------
[MLIR][XeGPU] Add offset operands to load_nd/store_nd/prefetch_nd (#149424)
This PR allows load_nd/store_nd/prefetch_nd to take an additional offset
operand.
It is based on this PR https://github.com/llvm/llvm-project/pull/148335.
Now user can create a nd_tdesc with no offset, and instead set the
offset with the load_nd operation.
Commit: f97adea477069e57422a2446162fe41feb4e1277
https://github.com/llvm/llvm-project/commit/f97adea477069e57422a2446162fe41feb4e1277
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-data-section-prefix.s
R lld/test/ELF/keep-text-section-prefix.s
Log Message:
-----------
ELF: Simplify isRelRoDataSection and rename the text file
PR #148920 was merged before I could share my comments.
* Fix the text filename. There are other minor suggestions, but can be
done in #148985
* Make `isRelRoDataSection` concise, to be consistent with the majority of
helper functions.
Commit: 317dae1a7e5fb81038177d8c58ee1e376d50ea5c
https://github.com/llvm/llvm-project/commit/317dae1a7e5fb81038177d8c58ee1e376d50ea5c
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
Log Message:
-----------
[mlir][xegpu] Add initial skeleton implementation for lowering ConvertLayoutOp (#146176)
This PR adds initial skeleton implementation for lowering
ConvertLayoutOp. It currently only supports cases where SLM is not
needed.
---------
Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
Commit: 5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
https://github.com/llvm/llvm-project/commit/5daaaf8d7d8dcf97b9d1bd4c697290db3760d406
Author: Fazlay Rabbi <106703039+mdfazlay at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
Log Message:
-----------
[OpenMP 6.0] Allow only byref arguments with `need_device_addr` modifier on `adjust_args` clause (#149586)
If the need_device_addr adjust-op modifier is present, each list item
that appears in the clause must refer to an argument in the declaration
of the function variant that has a reference type.
Reference:
OpenMP 6.0 [Sec 9.6.2, page 332, line 31-33, adjust_args clause,
Restrictions]
Commit: d174743674fe06833a79d59e9ffcffb3048de524
https://github.com/llvm/llvm-project/commit/d174743674fe06833a79d59e9ffcffb3048de524
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150087 and #144983 (#150255)
Commit: ce9d515813f8e1fe8578a3f889abe5325250309e
https://github.com/llvm/llvm-project/commit/ce9d515813f8e1fe8578a3f889abe5325250309e
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Commit: 9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
https://github.com/llvm/llvm-project/commit/9cb5c00bf7c69fd4da5afea7ee08c5d89bee3b5e
Author: Alan Li <me at alanli.org>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.h
M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/Utils/MemRefUtils.h
M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
R mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
M mlir/lib/Dialect/MemRef/Utils/MemRefUtils.cpp
R mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
Log Message:
-----------
Revert "[AMDGPU] fold `memref.subview/expand_shape/collapse_shape` in… (#150256)
…to `amdgpu.gather_to_lds` (#149851)"
This reverts commit dbc63f1e3724b6f2348c431dc1216537d9c042e8.
Having build deps issue.
Commit: e3b79afa673a029b3b6f546ba59d2998f9cff681
https://github.com/llvm/llvm-project/commit/e3b79afa673a029b3b6f546ba59d2998f9cff681
Author: Hood Chatham <roberthoodchatham at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
Log Message:
-----------
[WebAssembly,llvm] Fix buildbot problems with llvm.wasm.ref.test.func (#150116)
PR #147486 broke the sanitizer and expensive-checks buildbot.
These captures were needed when toWasmValType emitted a diagnostic but
are no longer needed since we changed it to an assertion failure. This
removes the unneeded captures and should fix the sanitizer-buildbot.
I also fixed the codegen in the wasm64 target: table.get requires an i32
but in wasm64 the function pointer is an i64. We need an additional
`i32.wrap_i64` to convert it. I also added `-verify-machineinstrs` to
the tests so that the test suite validates this fix.
Finally, I noticed that #150201 uses a feature of the intrinsic that is
not covered by the tests, namely `ptr` arguments. So I added one
additional test case to ensure that it works properly.
cc @dschuff
Commit: 30a6644ffbc479a9a75f840e48dc42aa29f377e5
https://github.com/llvm/llvm-project/commit/30a6644ffbc479a9a75f840e48dc42aa29f377e5
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[Interp] Mark the test unsupported with Asan (#150242)
See https://github.com/llvm/llvm-project/pull/148701
The test is very flaky with asan
Fail: https://lab.llvm.org/buildbot/#/builders/52/builds/9890
Pass: https://lab.llvm.org/buildbot/#/builders/52/builds/9891
Fail again: https://lab.llvm.org/buildbot/#/builders/52/builds/9892
Commit: 108023b7b16297291553650ea6aea809bd7eb78b
https://github.com/llvm/llvm-project/commit/108023b7b16297291553650ea6aea809bd7eb78b
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
Revert "[test][FileCheck] Disable color output in FileCheck test. NFC"
This reverts commit ce9d515813f8e1fe8578a3f889abe5325250309e.
I applied it to the wrong FileCheck invocation.
Commit: 9a12037c573e884b8f027654b56a6151bd5c0a56
https://github.com/llvm/llvm-project/commit/9a12037c573e884b8f027654b56a6151bd5c0a56
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Disable color output in FileCheck test. NFC
This broke a few of the buildbots:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109248167
Second try, applied it to the wrong FileCheck invocation last time:
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109427750
Commit: 7baf4bdd164cad61f8f3e34ed833a695c4033250
https://github.com/llvm/llvm-project/commit/7baf4bdd164cad61f8f3e34ed833a695c4033250
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
A llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
A llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
[llvm] Add CalleeTypeIds field to CallSiteInfo
Introducing `EnableCallGraphSection` target option to add
CalleeTypeIds field in CallSiteInfo. Read the callee type ids
in and out by the MIR parser/printer.
Reviewers: ilovepi
Reviewed By: ilovepi
Pull Request: https://github.com/llvm/llvm-project/pull/87574
Commit: 8ef0c50ecac8f1e707c02bee855f43eda114f8db
https://github.com/llvm/llvm-project/commit/8ef0c50ecac8f1e707c02bee855f43eda114f8db
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/macros/attributes.h
Log Message:
-----------
[libc] Fix problem with older compilers that do not have __has_builtin. (#150264)
Fixing bot failures:
https://lab.llvm.org/buildbot/#/builders/10/builds/10025
Commit: e67f3237d6242d1c362fa52e782ddfd5ae54a8af
https://github.com/llvm/llvm-project/commit/e67f3237d6242d1c362fa52e782ddfd5ae54a8af
Author: James Newling <james.newling at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
Log Message:
-----------
[mlir][armsme][vector] Replace splat with broadcast (#148024)
Part of deprecation of vector.splat
RFC: https://discourse.llvm.org/t/rfc-mlir-vector-deprecate-then-remove-vector-splat/87143/4
Commit: eb817c7950d3f7b555034a983240a11b8c693dc4
https://github.com/llvm/llvm-project/commit/eb817c7950d3f7b555034a983240a11b8c693dc4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/complex-cast.cpp
Log Message:
-----------
[CIR] Upstream Cast kinds for ComplexType (#149717)
This change adds support for cast kinds for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 32c985485500b214d57cb25306734eb73833d59b
https://github.com/llvm/llvm-project/commit/32c985485500b214d57cb25306734eb73833d59b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
A flang/test/Transforms/external-name-interop-symref-array.fir
Log Message:
-----------
[flang] Extend symbol update to ArrayAttrext in `external-name-interop` (#150061)
In the `external-name-interop` pass, when a symbol is changed, all the
uses of the renamed symbols should also be updated. The update was only
applied to the `SymbolRefAttr` type. With this change, the update will
be applied to `ArrayAttr` containing elements of type `SymbolRefAttr`.
---------
Co-authored-by: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Commit: 81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
https://github.com/llvm/llvm-project/commit/81185f7a2bd1a023ab7046a8adb4d132fdbd7ffd
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Add packed fp32 instructions for gfx1250 (#150253)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
https://github.com/llvm/llvm-project/commit/5ce04b473cd6cd3cc0c85cf21d69aa956e7ba868
Author: thetruestblue <bblueconway at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
Log Message:
-----------
[ASan][Darwin][GCD] Add interceptor for dispatch_apply (#149238)
ASan had a gap in coverage for wqthreads blocks submitted by
dispatch_apply
This adds interceptor for dispatch_apply and dispatch_apply_f and adds a
test that a failure in a dispatch apply block contains thread and stack
info.
rdar://139660648
Commit: e89e678839f48d54dc906e8ebed370a6e304083e
https://github.com/llvm/llvm-project/commit/e89e678839f48d54dc906e8ebed370a6e304083e
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
R llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
R llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
A llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
Log Message:
-----------
[test] Split SDNodeInfoEmitter tests into multiple files
To simplify updating.
Commit: a36508483e1a36612175500d2dc4754f9aadacc2
https://github.com/llvm/llvm-project/commit/a36508483e1a36612175500d2dc4754f9aadacc2
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/python/ir/operation.py
Log Message:
-----------
[mlir][python,CAPI] expose Op::isBeforeInBlock (#150271)
Commit: fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
https://github.com/llvm/llvm-project/commit/fc0653f31c2a153eaa87f7fe87bd5f1090c4c8ba
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.dot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.clamped.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.recipsqrt.ieee.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
Log Message:
-----------
[RFC][NFC][AMDGPU] Remove `-verify-machineinstrs` from `llvm/test/CodeGen/AMDGPU/*.ll` (#150024)
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
Commit: f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
https://github.com/llvm/llvm-project/commit/f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/test/MC/ELF/AArch64/cfi.s
M llvm/test/MC/ELF/cfi.s
Log Message:
-----------
Support SFrame command-line and .cfi_section syntax (#149935)
This PR adds support for the llvm-mc command-line flag "--gsframe" and
adds ".sframe" to the legal values passed ".cfi_section". It plumbs the
option through the cfi handling code a fair amount. Code to support
actual section generation follows in a future PR.
These options match the gnu-assembler's support syntax for sframes, on
both the command line and in assembly files.
First in a series of changes that will allow llvm-mc to produce sframe
.cfi sections. For more information about sframes, see
https://sourceware.org/binutils/docs-2.44/sframe-spec.html
and the llvm-RFC here:
https://discourse.llvm.org/t/rfc-adding-sframe-support-to-llvm/86900
Commit: 45d99c26c3513945a454e90b69d48257886f8284
https://github.com/llvm/llvm-project/commit/45d99c26c3513945a454e90b69d48257886f8284
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_messages.cpp
Log Message:
-----------
[clang][OpenMP] In 6.0, can omit length in array section (#148048)
In OpenMP 6.0 specification, section 5.2.5 Array Sections, page 166,
lines 28-28:
When the length is absent and the size of the dimension is not known,
the array section is an assumed-size array.
Testing
- Updated LIT test
- check-all
- OpenMP_VV (formerly sollve) test case
tests/6.0/target/test_target_assumed_array_size.c
Commit: 65dec9956273309158f3feba6ea8f150ce995a2a
https://github.com/llvm/llvm-project/commit/65dec9956273309158f3feba6ea8f150ce995a2a
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
Log Message:
-----------
[MLIR][XeGPU] Add support for subgroup_id_range (#148661)
This PR adds a new attribute to the xegpu dialect called xegpu.range.
One use case of this attribute can be to attach subgroup_id_range to
scf.if of to drive the execution.
Commit: 6a9817113838a3f87e803ac71aab46b3ccf24686
https://github.com/llvm/llvm-project/commit/6a9817113838a3f87e803ac71aab46b3ccf24686
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy] Speed up `misc-header-include-cycle` (#148757)
Performance optimization of misc-header-include-cycle
based on clangd test on Sema.cpp. Check were slow due
calls to SM.translateFile. Cost reduction (+-) from 11% to 3%.
Commit: df1dd803b6a1b1dd514da5e7c1257c0b75592452
https://github.com/llvm/llvm-project/commit/df1dd803b6a1b1dd514da5e7c1257c0b75592452
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Cache the most recently used slot for a chunk size (#149751)
Summary:
This patch changes the `find_slab` logic to simply cache the most
successful slot. This means the happy fast path is now a single atomic
load on this index. I removed the SIMT shuffling logic that did slab
lookups wave-parallel. Here I am considering the actual traversal to be
comparatively unlikely, so it's not overly bad that it takes longer.
ideally one thread finds a slot and shared it with the rest so we only
pay that cost once.
---------
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
https://github.com/llvm/llvm-project/commit/ce52f9cdc4c6873d1d5b3a970393d4b6aff12e70
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/GPU/allocator.cpp
Log Message:
-----------
[libc] Search empty bits after failed allocation (#149910)
Summary:
The scheme we use to find a free bit is to just do a random walk. This
works very well up until you start to completely saturate the bitfield.
Because the result of the fetch_or yields the previous value, we can
search this to go to any known empty bits as our next guess. This
effectively increases our liklihood of finding a match after two tries
by 32x since the distribution is random.
This *massively* improves performance when a lot of memory is allocated
without freeing, as it now doesn't takea one in a million shot to fill
that last bit. A further change could improve this further by only
*mostly* filling the slab, allowing 1% to be free at all times.
Commit: 17e32c921acc856498ad13ade495374bed4605b2
https://github.com/llvm/llvm-project/commit/17e32c921acc856498ad13ade495374bed4605b2
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/FileCheck/long-check.txt
Log Message:
-----------
[test][FileCheck] Prefix FileCheck test with %ProtectFileCheckOutput, per post-commit review feedback
https://github.com/llvm/llvm-project/pull/147833#issuecomment-3109470352
Commit: bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
https://github.com/llvm/llvm-project/commit/bc1f85d234a8e8e4d1bcfb2126e7c8ec8c8f5b3d
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support packed bf16 instructions on gfx1250 (#150283)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 9d11accf95db0ed08bd3181c25dd75fc793d089d
https://github.com/llvm/llvm-project/commit/9d11accf95db0ed08bd3181c25dd75fc793d089d
Author: Oleksandr "Alex" Zinenko <git at ozinenko.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/test/Dialect/SCF/canonicalize.mlir
A mlir/test/Dialect/SCF/if-cond-prop.mlir
Log Message:
-----------
[mlir] move if-condition propagation to a standalone pass (#150278)
This offers a significant speedup over running this as a
canonicalizaiton pattern, up to 10x improvement when running on large
(>100k operations) inputs coming from Polygeist.
It is also not clear whether this transformation is a reasonable
canonicalization as it performs non-local rewrites.
Commit: 07af7409997887883ab701acc2dc5659144b0cf2
https://github.com/llvm/llvm-project/commit/07af7409997887883ab701acc2dc5659144b0cf2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Add missing parse headers deps (#150295)
I believe this is from #150087 and #144983, but I didn't confirm
specific commits.
Commit: df2d2d125beffb76d5c526a5661fbb11cbcff83b
https://github.com/llvm/llvm-project/commit/df2d2d125beffb76d5c526a5661fbb11cbcff83b
Author: Mircea Trofin <mtrofin at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
A llvm/test/Transforms/PGOProfile/prof-verify-as-needed.ll
A llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
A llvm/test/Transforms/PGOProfile/prof-verify.ll
Log Message:
-----------
[PGO] Add ProfileInjector and ProfileVerifier passes (#147388)
Adding 2 passes, one to inject `MD_prof` and one to check its presence. A subsequent patch will add these (similar to debugify) to `opt` (and, eventually, a variant of this, to `llc`)
Tracking issue: #147390
Commit: 20a79027ca58bbde563f9a914e4ada71301eb50a
https://github.com/llvm/llvm-project/commit/20a79027ca58bbde563f9a914e4ada71301eb50a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port df2d2d125bef
Commit: 478130545bc41a8bb80304e5d931559a9d2b6171
https://github.com/llvm/llvm-project/commit/478130545bc41a8bb80304e5d931559a9d2b6171
Author: Piotr Zegar <me at piotrzegar.pl>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
Log Message:
-----------
[clang-tidy] Ignore pure-virtual in portability-template... (#150290)
Ignore pure virtual member functions in
portability-template-virtual-member-function check.
Those functions will be represented in vtable
as __cxa_pure_virtual or something similar.
Fixes #139031.
Commit: 4db2f3ac89b1e62af4893b647d77f3ab1f390066
https://github.com/llvm/llvm-project/commit/4db2f3ac89b1e62af4893b647d77f3ab1f390066
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
Log Message:
-----------
[clang-doc] refactor JSON for better Mustache compatibility (#149588)
This patch contains changes for the JSON generator that will enable compatibility with Mustache templates, like booleans to check for the existence and bounds of arrays to avoid duplication.
Commit: 6925caee4bbb4f1352a347c9c05c999e86a3c61e
https://github.com/llvm/llvm-project/commit/6925caee4bbb4f1352a347c9c05c999e86a3c61e
Author: Finn Plummer <mail at inbelic.dev>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
Log Message:
-----------
[Docs][DirectX] Add relevant documentation of Root Signature (#149608)
This pr adds documentation of root signatures for reference of an LLVM
user.
The target audience is an LLVM user that wants to build a custom tool,
or front-end, that requires constructing a root signature part (RTS0)
for a `DXContainer`.
With that in mind, this pr adds documentation of the metadata
representation of root signatures implemented in LLVM and utilized in
Clang.
Commit: b7ba23f91512b2e703e21e693950dc6086bb51f0
https://github.com/llvm/llvm-project/commit/b7ba23f91512b2e703e21e693950dc6086bb51f0
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV] Rename RVPUnaryWUF to RVPUnary_ri for consistency. NFC
Commit: 23469688076b334dbcf796bb2079efebf6ddf62a
https://github.com/llvm/llvm-project/commit/23469688076b334dbcf796bb2079efebf6ddf62a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
A llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
Log Message:
-----------
[AMDGPU] Add V_ADD|SUB|MUL_U64 gfx1250 opcodes (#150291)
Commit: c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
https://github.com/llvm/llvm-project/commit/c73c19c60efe63b2b0d171f72f1ed6f70d6c4c76
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
A llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
Log Message:
-----------
[DirectX] Support ConstExpr GEPs (#150082)
- Fixes #150050
- Address the issue of many nested geps
- Check for ConstantExpr GEP if we see it check if it needs a global
replacement with a new type. Create the new constExpr Gep and set the
pointer operand to it. Finally cleanup and remove the old nested geps.
Commit: 898bba311f180ed54de33dc09e7071c279a4942a
https://github.com/llvm/llvm-project/commit/898bba311f180ed54de33dc09e7071c279a4942a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
Log Message:
-----------
[SLP]Initial support for copyable elements (non-schedulable only)
Adds initial support for copyable elements. This patch only models adds
and model copyable elements as add <element>, 0, i.e. uses identity
constants for missing lanes.
Only support for elements, which do not require scheduling, is added to
reduce size of the patch.
Fixed compile time regressions, updated release notes
Reviewers: RKSimon, hiraditya
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/140279
Commit: d1ff9713bddf98eb5b3b751ba53e3db896f424ca
https://github.com/llvm/llvm-project/commit/d1ff9713bddf98eb5b3b751ba53e3db896f424ca
Author: David Green <david.green at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/urem-lkk.ll
Log Message:
-----------
[AArch64][GISel] Add test coverage for urem-lkk.ll. NFC
Commit: 1206a6165e372c904566163d50911f30809185f3
https://github.com/llvm/llvm-project/commit/1206a6165e372c904566163d50911f30809185f3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-phases.hip
Log Message:
-----------
[Clang] Fix new driver HIP SPIR-V compilation in device only mode (#150309)
Summary:
This should emit LLVM-IR. Add to the extremely ugly if statement so that
this happens correctly.
Commit: 203ea0a97e827f68b406ca0f350e971a132e58b9
https://github.com/llvm/llvm-project/commit/203ea0a97e827f68b406ca0f350e971a132e58b9
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
A llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
AMDGPU: Support V_PK_MAXIMUM3_F16 and V_PK_MINIMUM3_F16 on gfx1250 (#150307)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 34447efd4614cfc8f17aa5cb7305f76ebaf6eaf5
https://github.com/llvm/llvm-project/commit/34447efd4614cfc8f17aa5cb7305f76ebaf6eaf5
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Driver/offload-target.c
Log Message:
-----------
[clang][test] Specify value of `-fopenmp=libomp` for test. (#150301)
`libomp` is the default value when unconfigured in cmake, but llvm can
be configured to have `libgomp` be the default instead. Explicitly
specify this value so the test does not fail when it assumes libomp is
always the default.
Commit: 52499bbd90b13be8f1f95b980c13c0b044a1a049
https://github.com/llvm/llvm-project/commit/52499bbd90b13be8f1f95b980c13c0b044a1a049
Author: David Green <david.green at arm.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/Analysis/CostModel/ARM/arith.ll
Log Message:
-----------
[ARM] Test all cost kinds in arith.ll. NFC
Commit: 6bc54a4874eeaddf2a1f7c75aed53d9d38ed313c
https://github.com/llvm/llvm-project/commit/6bc54a4874eeaddf2a1f7c75aed53d9d38ed313c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Driver/Driver.cpp
Log Message:
-----------
[Clang] Make SPIR-V handling only for HIPSPRV
Commit: f443f561331dc54aaed6897f51d7632d62a5ea95
https://github.com/llvm/llvm-project/commit/f443f561331dc54aaed6897f51d7632d62a5ea95
Author: David Pagan <dave.pagan at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[clang][Sema][NFC] Fixed incorrect assert messages in SemaOpenMP (#150305)
Commit: 49de210d24f616d8b4eff7656be9a27d7db5135d
https://github.com/llvm/llvm-project/commit/49de210d24f616d8b4eff7656be9a27d7db5135d
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/src/__support/CPP/type_traits/is_constant_evaluated.h
M libc/src/__support/RPC/rpc_server.h
M libc/src/__support/macros/attributes.h
Log Message:
-----------
[libc] Add support for __builtin_is_constant_evaluated for GCC 9+. (#150322)
https://lab.llvm.org/buildbot/#/builders/10/builds/10047/steps/5/logs/stdio
Commit: 1b7aa4edda2b3020f0e10f5a34e707fcadc2587d
https://github.com/llvm/llvm-project/commit/1b7aa4edda2b3020f0e10f5a34e707fcadc2587d
Author: Qinkun Bao <qinkun at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang/test/Interpreter/pretty-print.c
Log Message:
-----------
[clang-repl] Disable new test after #148701 (#150294)
https://github.com/llvm/llvm-project/pull/148701 adds new tests.
However, these tests never pass on msan buildbots.
https://lab.llvm.org/buildbot/#/builders/94/builds/9132
https://lab.llvm.org/buildbot/#/builders/94/builds/9131
https://lab.llvm.org/buildbot/#/builders/94/builds/9130
Commit: ad36e4284d66c3609ef8675ef02ff1844bc1951d
https://github.com/llvm/llvm-project/commit/ad36e4284d66c3609ef8675ef02ff1844bc1951d
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCTargetOptions.h
M llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
M llvm/lib/CodeGen/AsmPrinter/ARMException.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCFIException.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/test/MC/ELF/AArch64/cfi.s
M llvm/test/MC/ELF/cfi.s
Log Message:
-----------
Revert "Support SFrame command-line and .cfi_section syntax (#149935)" (#150316)
This reverts commit f9d0bd02d966e5c28aca9a6ceadd5ffec6aa9f78.
Commit: 71c06d7a5f99ef7039b024d75cbdcddd71872602
https://github.com/llvm/llvm-project/commit/71c06d7a5f99ef7039b024d75cbdcddd71872602
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Type.cpp
Log Message:
-----------
[IR] Remove unnecessary casts from IntegerType::get. NFC (#150299)
Commit: 9a563b08e20423d848e318e0a8891205bd673724
https://github.com/llvm/llvm-project/commit/9a563b08e20423d848e318e0a8891205bd673724
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Support V_PK_MIN3/MAX3_NUM_F16 on gfx1250 (#150326)
Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Commit: 21118dbbb8718313b2dc45a7913781750edea6e1
https://github.com/llvm/llvm-project/commit/21118dbbb8718313b2dc45a7913781750edea6e1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Log Message:
-----------
[AsmPrinter] Remove an unnecessary cast (NFC) (#150257)
getTag already returns dwarf::Tag.
Commit: 31281da34b7f1445ce9e39bbb8707f4eacd24e58
https://github.com/llvm/llvm-project/commit/31281da34b7f1445ce9e39bbb8707f4eacd24e58
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[Analysis] Drop const from return types (NFC) (#150258)
We don't need const on APFloat.
Commit: 3e53d4d386626d78bf930307f0a65b6aebb48ee9
https://github.com/llvm/llvm-project/commit/3e53d4d386626d78bf930307f0a65b6aebb48ee9
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFExpression.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
Log Message:
-----------
[llvm] Remove unused includes (NFC) (#150265)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: 0925d7572acee311bf596db294bc818536722150
https://github.com/llvm/llvm-project/commit/0925d7572acee311bf596db294bc818536722150
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineParallelize.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/IRDL/IRDLVerifiers.cpp
M mlir/lib/Dialect/Index/IR/InferIntRangeInterfaceImpls.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/Transforms/ReifyResultShapes.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
Log Message:
-----------
[mlir] Remove unused includes (NFC) (#150266)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: 9d9d971f71d3659cca7b5076b7cc8861bad176bd
https://github.com/llvm/llvm-project/commit/9d9d971f71d3659cca7b5076b7cc8861bad176bd
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[llvm] Proofread AMDGPUUsage.rst (#150273)
Commit: 6d90715019d54376523163a7e1d588e1068cfca2
https://github.com/llvm/llvm-project/commit/6d90715019d54376523163a7e1d588e1068cfca2
Author: Erick Velez <erickvelez7 at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/enum-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/assets/namespace-template.mustache
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/mustache-index.cpp
M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
M clang-tools-extra/unittests/clang-doc/HTMLMustacheGeneratorTest.cpp
Log Message:
-----------
[clang-doc] integrate JSON as the source for Mustache templates (#149589)
This patch integrates JSON as the source to generate HTML Mustache templates. The Mustache generator calls the JSON generator and reads JSON files on the disk to produce HTML serially.
Commit: 11d97b3b58687bf4db978d3ba3c15fd6177549fa
https://github.com/llvm/llvm-project/commit/11d97b3b58687bf4db978d3ba3c15fd6177549fa
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Config/abi-breaking.h.cmake
Log Message:
-----------
[llvm] annotate ABIBreakingChecks symbols for DLL export (#149198)
## Purpose
This PR is a re-application of #145575 with independent definition of
`ABI_BREAKING_EXPORT_ABI` that does not depend on
`llvm/Support/Compiler.h`. It is one in a series of code-mods that
annotate LLVM’s public interface for export. This patch annotates the
ABI Breaking Checks interface in llvm/config. The annotations currently
have no meaningful impact on the LLVM build; however, they are a
prerequisite to support an LLVM Windows DLL (shared library) build.
## Background
The effort to build LLVM as a Windows DLL is tracked in #109483.
Additional context is provided in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 05e08cdb3e576cc0887d1507ebd2f756460c7db7
https://github.com/llvm/llvm-project/commit/05e08cdb3e576cc0887d1507ebd2f756460c7db7
Author: Haowei <haowei at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
R llvm/test/CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir
R llvm/test/CodeGen/MIR/X86/call-site-info-direct-calls-typeid.mir
R llvm/test/CodeGen/MIR/X86/call-site-info-typeid.mir
Log Message:
-----------
Revert "[llvm] Add CalleeTypeIds field to CallSiteInfo" (#150335)
Reverts llvm/llvm-project#87574, which breaks LLVM ::
CodeGen/MIR/X86/call-site-info-ambiguous-indirect-call-typeid.mir tests
on linux-arm64 builders.
Commit: 7b66629497ea5b6cde1772fab161c028e8c972a7
https://github.com/llvm/llvm-project/commit/7b66629497ea5b6cde1772fab161c028e8c972a7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/lib/IR/Type.cpp
Log Message:
-----------
[IR] Remove static variables from Type::getWasm_ExternrefTy/getWasm_FuncrefTy. (#150323)
These were caching pointers to memory owned by LLVMContext and can
outlive the LLVMContext. The LLVMContext already caches pointer types so
we shouldn't need any caching here.
Commit: 7ae371548f05a94f933db691424b662515afc5a7
https://github.com/llvm/llvm-project/commit/7ae371548f05a94f933db691424b662515afc5a7
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-regalloc-flags.ll
M llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
M llvm/test/CodeGen/AMDGPU/swdev503538-move-to-valu-stack-srd-physreg.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
Log Message:
-----------
[NFC][FIX] Add `-verify-machineinstrs=0` explicitly to some test files
They had it before but that was removed in #150024. They need to disable the check explicitly to pass expensive checks.
Commit: c21e2a5e24c7bc55767055e25bb2fb40cbec68c3
https://github.com/llvm/llvm-project/commit/c21e2a5e24c7bc55767055e25bb2fb40cbec68c3
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
Log Message:
-----------
[DirectX] Moving Root Signature Metadata Parsing in to Shared Root Signature Metadata lib (#149221)
This PR, moves the existing Root Signature Metadata Parsing logic used
in `DXILRootSignature` to the common library used by both frontend and
backend. Closes:
[#145942](https://github.com/llvm/llvm-project/issues/145942)
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 66603dd1f10e0f6c0510273378334971159f6b69
https://github.com/llvm/llvm-project/commit/66603dd1f10e0f6c0510273378334971159f6b69
Author: lntue <lntue at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M libc/benchmarks/gpu/BenchmarkLogger.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
M libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/CMakeLists.txt
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/config/CMakeLists.txt
M libc/config/gpu/app.h
M libc/config/linux/app.h
M libc/config/uefi/app.h
M libc/hdr/CMakeLists.txt
A libc/hdr/stdint_proxy.h
M libc/hdr/types/CMakeLists.txt
M libc/include/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/functional.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/arm/FEnvImpl.h
M libc/src/__support/FPUtil/bfloat16.h
M libc/src/__support/FPUtil/riscv/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/lseekImpl.h
M libc/src/__support/GPU/CMakeLists.txt
M libc/src/__support/GPU/allocator.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/bitmask.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/arg_list.h
M libc/src/__support/big_int.h
M libc/src/__support/block.h
M libc/src/__support/blockstore.h
M libc/src/__support/detailed_powers_of_ten.h
M libc/src/__support/endian_internal.h
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/__support/float_to_string.h
M libc/src/__support/hash.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/ryu_constants.h
M libc/src/__support/ryu_long_double_constants.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/futex_word.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/mbstate.h
M libc/src/arpa/inet/CMakeLists.txt
M libc/src/arpa/inet/htonl.h
M libc/src/arpa/inet/htons.h
M libc/src/arpa/inet/ntohl.h
M libc/src/arpa/inet/ntohs.h
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/inttypes/CMakeLists.txt
M libc/src/inttypes/strtoimax.h
M libc/src/inttypes/strtoumax.h
M libc/src/link/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_setstack.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/CMakeLists.txt
M libc/src/spawn/file_actions.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/fgets.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
M libc/src/stdlib/bsearch.cpp
M libc/src/stdlib/l64a.cpp
M libc/src/stdlib/qsort.cpp
M libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/quick_sort.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/CMakeLists.txt
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/string_utils.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/kernel_statx.h
M libc/src/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/time/linux/nanosleep.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/core_structs.h
M libc/src/time/time_constants.h
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/ftruncate.cpp
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/src/unistd/linux/truncate.cpp
M libc/startup/baremetal/CMakeLists.txt
M libc/startup/baremetal/fini.cpp
M libc/startup/baremetal/init.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/RoundingModeUtils.h
M libc/test/UnitTest/ScanfMatcher.cpp
M libc/test/UnitTest/TestLogger.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_equal_test.cpp
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/pthread/pthread_once_test.cpp
M libc/test/integration/src/pthread/pthread_test.cpp
M libc/test/integration/src/spawn/CMakeLists.txt
M libc/test/integration/src/spawn/posix_spawn_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/HashTable/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/str_to_float_comparison_test.cpp
M libc/test/src/fenv/feclearexcept_test.cpp
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf16_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/erff_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/in_float_range_test_helper.h
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log10f_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/logf_test.cpp
M libc/test/src/math/performance_testing/Timer.h
M libc/test/src/math/performance_testing/fmodf16_perf.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sdcomp26094.h
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/cospif_test.cpp
M libc/test/src/math/smoke/erff_test.cpp
M libc/test/src/math/smoke/exp10_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/exp_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
M libc/test/src/math/smoke/log10_test.cpp
M libc/test/src/math/smoke/log10f_test.cpp
M libc/test/src/math/smoke/log1pf_test.cpp
M libc/test/src/math/smoke/log2_test.cpp
M libc/test/src/math/smoke/log2f_test.cpp
M libc/test/src/math/smoke/log_test.cpp
M libc/test/src/math/smoke/logf_test.cpp
M libc/test/src/math/smoke/powf_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
M libc/test/src/math/smoke/sinpif_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/spawn/CMakeLists.txt
M libc/test/src/spawn/posix_spawn_file_actions_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/memalignment_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/string/memory_utils/CMakeLists.txt
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/protected_pages.h
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
M libc/utils/MPCWrapper/MPCUtils.h
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
Log Message:
-----------
[libc][NFC] Add stdint.h proxy header to fix dependency issue with <stdint.h> includes. (#150303)
https://github.com/llvm/llvm-project/issues/149993
Commit: fd86b2e26c0933c2af61fc50a674f668a7991f66
https://github.com/llvm/llvm-project/commit/fd86b2e26c0933c2af61fc50a674f668a7991f66
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
A llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
Log Message:
-----------
[RISCV][llvm-exegesis] Add missing operand frm for FCVT_D_W (#149989)
We encountered the index of operand out of bounds crash because FCVT_D_W
lacks frm operand.
Commit: b61695e3ebe66b96172b7f49069c8d2c26e28b23
https://github.com/llvm/llvm-project/commit/b61695e3ebe66b96172b7f49069c8d2c26e28b23
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port #149221 (#150347)
Commit: 22fef005225b129d73ade4ed995fc0ec0c7be044
https://github.com/llvm/llvm-project/commit/22fef005225b129d73ade4ed995fc0ec0c7be044
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/SemaCXX/wreturn-always-throws.cpp
Log Message:
-----------
[clang] Avoid inheriting [[noreturn]] in explicit function template specializations (#150003)
This patch fixes incorrect behavior in Clang where [[noreturn]] (either
spelled or inferred) was being inherited by explicit specializations of
function templates or member function templates, even when those
specializations returned normally.
Follow up on https://github.com/llvm/llvm-project/pull/145166
Commit: 68c8c8ceeba6da96189335236e3ec80a082e4d7b
https://github.com/llvm/llvm-project/commit/68c8c8ceeba6da96189335236e3ec80a082e4d7b
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/test/CMakeLists.txt
A lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
A lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
A lldb/test/Shell/RPC/Generator/lit.local.cfg
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/RPCCommon.cpp
A lldb/tools/lldb-rpc-gen/RPCCommon.h
A lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
A lldb/tools/lldb-rpc/CMakeLists.txt
A lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
A lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
R lldb/tools/lldb-rpc/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.h
Log Message:
-----------
Reland "[lldb][RPC] Upstream lldb-rpc-gen tool" (#146969)" Attempt 2 (#148996)
Second attempt at relanding the lldb-rpc-gen tool. This should fix 2
issues:
- An assert that was hitting when building on Linux. The assert would
hit in the server source emitter, specifically when attemping to
determine the storage size for a return type is that is a pointer, but
isn't a const char *, const char ** or void pointer.
The assert would hit when attempting to generate
SBAttachInfo::GetProcessPluginName, which returns a const char *
(meaning it shouldn't have been in the code block for the assert at
all). The reason that it was hitting the assert when generating this
function is that lldb_rpc_gen::TypeIsConstCharPtr was returning false
for this function even though it did return a const char *. This was
happening because when checking the return type for a const char *,
TypeIsConstCharPtr would only check that the underlying type was a
signed char. This failed on Linux (but was fine on Darwin), as the
underlying type also needs to be checked for being an unsigned char.
- Cross compiling support
The build for lldb-rpc-gen had no support for cross compiling and as
such, the sources generated for lldb-rpc-gen would get compiled too
early in phase 2 when cross compiling, before the Clang toolchain was
built and this led to an error when trying to include stdlib files. This
reland splits this build into 2 by building the tool first and then
compiling the sources in the second stage of the cross-compiled build.
Original PR Description:
This commit upstreams the lldb-rpc-gen tool, a ClangTool that generates
the LLDB RPC client and server interfaces. This tool, as well as LLDB
RPC itself is built by default. If it needs to be disabled, put
-DLLDB_BUILD_LLDBRPC=OFF in your CMake invocation.
https://discourse.llvm.org/t/rfc-upstreaming-lldb-rpc/85804
Original PR Link:
github.com/llvm/llvm-project/pull/138031
Commit: 2238365a6589fcdb196c850520585a8ec466e09c
https://github.com/llvm/llvm-project/commit/2238365a6589fcdb196c850520585a8ec466e09c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-24 (Thu, 24 Jul 2025)
Changed paths:
M .ci/compute_projects_test.py
M .ci/metrics/metrics.py
Log Message:
-----------
[CI] Minor script cleanups
The metrics script did not have a license header or a docstring. The
compute_projects_test.py file had a placeholder module level docstring
that I edited into something more reasonable.
Commit: f509b0c33aebc264c379fd66c25fa48ee61f7ec1
https://github.com/llvm/llvm-project/commit/f509b0c33aebc264c379fd66c25fa48ee61f7ec1
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Port #150303 (#150351)
Commit: 7f66a83c1224ccef066625f01223d8aa6c0c03c2
https://github.com/llvm/llvm-project/commit/7f66a83c1224ccef066625f01223d8aa6c0c03c2
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
[bazel] Port #149198 (#150352)
Commit: dfe9fcc9a6b40dfa01ce5884fdc185912ccda8e3
https://github.com/llvm/llvm-project/commit/dfe9fcc9a6b40dfa01ce5884fdc185912ccda8e3
Author: Chelsea Cassanova <chelsea_cassanova at apple.com>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M lldb/source/API/CMakeLists.txt
M lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
Log Message:
-----------
[lldb][headers] Fix header staging target for RPC (#150355)
This commit fixes the target that stages headers in the build dir's
include directory so that the headers are staged correctly so that the
target for liblldbrpc-headers can depend on it properly
Commit: e050f530bd110638222194ec328e70995f529c98
https://github.com/llvm/llvm-project/commit/e050f530bd110638222194ec328e70995f529c98
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-23 (Wed, 23 Jul 2025)
Changed paths:
M .ci/compute_projects_test.py
M .ci/metrics/metrics.py
M clang-tools-extra/clang-doc/BitcodeReader.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.cpp
M clang-tools-extra/clang-doc/BitcodeWriter.h
M clang-tools-extra/clang-doc/HTMLMustacheGenerator.cpp
M clang-tools-extra/clang-doc/JSONGenerator.cpp
M clang-tools-extra/clang-doc/Representation.cpp
M clang-tools-extra/clang-doc/Representation.h
M clang-tools-extra/clang-doc/Serialize.cpp
M clang-tools-extra/clang-doc/assets/class-template.mustache
M clang-tools-extra/clang-doc/assets/enum-template.mustache
M clang-tools-extra/clang-doc/assets/function-template.mustache
M clang-tools-extra/clang-doc/assets/namespace-template.mustache
M clang-tools-extra/clang-tidy/bugprone/UnhandledSelfAssignmentCheck.cpp
M clang-tools-extra/clang-tidy/misc/HeaderIncludeCycleCheck.cpp
M clang-tools-extra/clang-tidy/portability/TemplateVirtualMemberFunctionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
M clang-tools-extra/test/clang-doc/mustache-index.cpp
M clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/unhandled-self-assignment.cpp
M clang-tools-extra/test/clang-tidy/checkers/portability/template-virtual-member-function.cpp
M clang-tools-extra/unittests/clang-doc/HTMLMustacheGeneratorTest.cpp
M clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
M clang/docs/HIPSupport.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CodeGen/ABIInfo.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/ROCm.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/CIR/CodeGen/bitfields.c
A clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGenCXX/microsoft-abi-eh-disabled.cpp
M clang/test/CodeGenCXX/microsoft-abi-eh-ip2state.cpp
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/offload-target.c
M clang/test/Driver/sparc-target-features.c
M clang/test/Interpreter/fail.cpp
M clang/test/Interpreter/pretty-print.c
M clang/test/Interpreter/pretty-print.cpp
M clang/test/OpenMP/declare_variant_clauses_ast_print.cpp
M clang/test/OpenMP/declare_variant_clauses_messages.cpp
A clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_messages.cpp
M clang/test/SemaCXX/wreturn-always-throws.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M compiler-rt/lib/asan/asan_mac.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/asan/tests/asan_mac_test.cpp
M compiler-rt/lib/asan/tests/asan_mac_test.h
M compiler-rt/lib/asan/tests/asan_mac_test_helpers.mm
M compiler-rt/lib/hwasan/hwasan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_thread.h
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/lsan/lsan_common.h
M compiler-rt/lib/lsan/lsan_interceptors.cpp
M compiler-rt/lib/lsan/lsan_posix.cpp
M compiler-rt/lib/lsan/lsan_posix.h
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/lsan/lsan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_common.h
M compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_haiku.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux.h
M compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_netbsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_mac.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_netbsd_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp
M compiler-rt/lib/tsan/rtl/tsan_debugging.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/lib/tsan/rtl/tsan_interface.h
M compiler-rt/lib/tsan/rtl/tsan_report.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
M compiler-rt/lib/xray/xray_fdr_controller.h
M compiler-rt/lib/xray/xray_profile_collector.cpp
M compiler-rt/lib/xray/xray_profile_collector.h
A compiler-rt/test/asan/TestCases/Darwin/dispatch_apply_threadno.c
M flang-rt/unittests/Runtime/CUDA/AllocatorCUF.cpp
M flang/include/flang/Lower/Support/ReductionProcessor.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
A flang/include/flang/Parser/openmp-utils.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
A flang/test/Lower/Intrinsics/acospi.f90
A flang/test/Lower/Intrinsics/asinpi.f90
A flang/test/Lower/Intrinsics/tanpi.f90
A flang/test/Lower/OpenMP/wsloop-reduction-non-intrinsic.f90
A flang/test/Lower/assign-statement.f90
A flang/test/Lower/equivalence-3.f
A flang/test/Transforms/external-name-interop-symref-array.fir
M libc/benchmarks/gpu/BenchmarkLogger.cpp
M libc/benchmarks/gpu/CMakeLists.txt
M libc/benchmarks/gpu/LibcGpuBenchmark.h
M libc/benchmarks/gpu/src/math/CMakeLists.txt
M libc/benchmarks/gpu/src/math/platform.h
M libc/benchmarks/gpu/timing/amdgpu/CMakeLists.txt
M libc/benchmarks/gpu/timing/amdgpu/timing.h
M libc/benchmarks/gpu/timing/nvptx/CMakeLists.txt
M libc/benchmarks/gpu/timing/nvptx/timing.h
M libc/config/CMakeLists.txt
M libc/config/gpu/app.h
M libc/config/linux/app.h
M libc/config/uefi/app.h
M libc/hdr/CMakeLists.txt
A libc/hdr/stdint_proxy.h
M libc/hdr/types/CMakeLists.txt
M libc/include/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/bit.h
M libc/src/__support/CPP/functional.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/NormalFloat.h
M libc/src/__support/FPUtil/aarch64/FEnvImpl.h
M libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h
M libc/src/__support/FPUtil/arm/FEnvImpl.h
M libc/src/__support/FPUtil/bfloat16.h
M libc/src/__support/FPUtil/riscv/FEnvImpl.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/FPUtil/x86_64/FEnvImpl.h
M libc/src/__support/FPUtil/x86_64/NextAfterLongDouble.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/lseekImpl.h
M libc/src/__support/GPU/CMakeLists.txt
M libc/src/__support/GPU/allocator.cpp
M libc/src/__support/GPU/allocator.h
M libc/src/__support/HashTable/CMakeLists.txt
M libc/src/__support/HashTable/bitmask.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/RPC/rpc_server.h
M libc/src/__support/arg_list.h
M libc/src/__support/big_int.h
M libc/src/__support/block.h
M libc/src/__support/blockstore.h
M libc/src/__support/detailed_powers_of_ten.h
M libc/src/__support/endian_internal.h
M libc/src/__support/fixed_point/CMakeLists.txt
M libc/src/__support/fixed_point/fx_rep.h
M libc/src/__support/float_to_string.h
M libc/src/__support/hash.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/integer_literals.h
M libc/src/__support/integer_to_string.h
M libc/src/__support/macros/properties/CMakeLists.txt
M libc/src/__support/macros/properties/types.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/exp10_float16_constants.h
M libc/src/__support/ryu_constants.h
M libc/src/__support/ryu_long_double_constants.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/CndVar.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/futex_word.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/__support/wchar/CMakeLists.txt
M libc/src/__support/wchar/mbstate.h
M libc/src/arpa/inet/CMakeLists.txt
M libc/src/arpa/inet/htonl.h
M libc/src/arpa/inet/htons.h
M libc/src/arpa/inet/ntohl.h
M libc/src/arpa/inet/ntohs.h
M libc/src/compiler/generic/CMakeLists.txt
M libc/src/compiler/generic/__stack_chk_fail.cpp
M libc/src/inttypes/CMakeLists.txt
M libc/src/inttypes/strtoimax.h
M libc/src/inttypes/strtoumax.h
M libc/src/link/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
M libc/src/pthread/CMakeLists.txt
M libc/src/pthread/pthread_attr_setstack.cpp
M libc/src/sched/linux/CMakeLists.txt
M libc/src/sched/linux/sched_getaffinity.cpp
M libc/src/spawn/CMakeLists.txt
M libc/src/spawn/file_actions.h
M libc/src/stdio/gpu/CMakeLists.txt
M libc/src/stdio/gpu/fgets.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/a64l.cpp
M libc/src/stdlib/bsearch.cpp
M libc/src/stdlib/l64a.cpp
M libc/src/stdlib/qsort.cpp
M libc/src/stdlib/qsort_data.h
M libc/src/stdlib/qsort_r.cpp
M libc/src/stdlib/quick_sort.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/CMakeLists.txt
M libc/src/string/memory_utils/op_generic.h
M libc/src/string/memory_utils/utils.h
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/string_utils.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/kernel_statx.h
M libc/src/time/CMakeLists.txt
M libc/src/time/linux/CMakeLists.txt
M libc/src/time/linux/nanosleep.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/core_structs.h
M libc/src/time/time_constants.h
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/ftruncate.cpp
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/src/unistd/linux/truncate.cpp
M libc/startup/baremetal/CMakeLists.txt
M libc/startup/baremetal/fini.cpp
M libc/startup/baremetal/init.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/do_start.cpp
M libc/test/IntegrationTest/CMakeLists.txt
M libc/test/IntegrationTest/test.cpp
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunction.h
M libc/test/UnitTest/HermeticTestUtils.cpp
M libc/test/UnitTest/PrintfMatcher.cpp
M libc/test/UnitTest/RoundingModeUtils.h
M libc/test/UnitTest/ScanfMatcher.cpp
M libc/test/UnitTest/TestLogger.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_equal_test.cpp
M libc/test/integration/src/pthread/pthread_mutex_test.cpp
M libc/test/integration/src/pthread/pthread_name_test.cpp
M libc/test/integration/src/pthread/pthread_once_test.cpp
M libc/test/integration/src/pthread/pthread_test.cpp
M libc/test/integration/src/spawn/CMakeLists.txt
M libc/test/integration/src/spawn/posix_spawn_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/bit_test.cpp
M libc/test/src/__support/HashTable/CMakeLists.txt
M libc/test/src/__support/HashTable/group_test.cpp
M libc/test/src/__support/str_to_float_comparison_test.cpp
M libc/test/src/fenv/feclearexcept_test.cpp
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/acosf_test.cpp
M libc/test/src/math/acoshf16_test.cpp
M libc/test/src/math/acoshf_test.cpp
M libc/test/src/math/asinf_test.cpp
M libc/test/src/math/asinhf_test.cpp
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf16_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/coshf_test.cpp
M libc/test/src/math/erff_test.cpp
M libc/test/src/math/exp10_test.cpp
M libc/test/src/math/exp10f_test.cpp
M libc/test/src/math/exp10m1f_test.cpp
M libc/test/src/math/exp2_test.cpp
M libc/test/src/math/exp2f_test.cpp
M libc/test/src/math/exp2m1f_test.cpp
M libc/test/src/math/exp_test.cpp
M libc/test/src/math/expf_test.cpp
M libc/test/src/math/expm1_test.cpp
M libc/test/src/math/expm1f_test.cpp
M libc/test/src/math/in_float_range_test_helper.h
M libc/test/src/math/log10_test.cpp
M libc/test/src/math/log10f_test.cpp
M libc/test/src/math/log1p_test.cpp
M libc/test/src/math/log1pf_test.cpp
M libc/test/src/math/log2_test.cpp
M libc/test/src/math/log2f_test.cpp
M libc/test/src/math/log_test.cpp
M libc/test/src/math/logf_test.cpp
M libc/test/src/math/performance_testing/Timer.h
M libc/test/src/math/performance_testing/fmodf16_perf.cpp
M libc/test/src/math/powf_test.cpp
M libc/test/src/math/sdcomp26094.h
M libc/test/src/math/sincosf_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/math/sinhf_test.cpp
M libc/test/src/math/sinpif_test.cpp
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/math/smoke/acosf_test.cpp
M libc/test/src/math/smoke/acoshf_test.cpp
M libc/test/src/math/smoke/asinf_test.cpp
M libc/test/src/math/smoke/asinhf_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libc/test/src/math/smoke/cosf_test.cpp
M libc/test/src/math/smoke/coshf_test.cpp
M libc/test/src/math/smoke/cospif_test.cpp
M libc/test/src/math/smoke/erff_test.cpp
M libc/test/src/math/smoke/exp10_test.cpp
M libc/test/src/math/smoke/exp10f_test.cpp
M libc/test/src/math/smoke/exp2_test.cpp
M libc/test/src/math/smoke/exp2f_test.cpp
M libc/test/src/math/smoke/exp_test.cpp
M libc/test/src/math/smoke/expf_test.cpp
M libc/test/src/math/smoke/expm1_test.cpp
M libc/test/src/math/smoke/expm1f_test.cpp
M libc/test/src/math/smoke/log10_test.cpp
M libc/test/src/math/smoke/log10f_test.cpp
M libc/test/src/math/smoke/log1pf_test.cpp
M libc/test/src/math/smoke/log2_test.cpp
M libc/test/src/math/smoke/log2f_test.cpp
M libc/test/src/math/smoke/log_test.cpp
M libc/test/src/math/smoke/logf_test.cpp
M libc/test/src/math/smoke/powf_test.cpp
M libc/test/src/math/smoke/sincosf_test.cpp
M libc/test/src/math/smoke/sinf_test.cpp
M libc/test/src/math/smoke/sinhf_test.cpp
M libc/test/src/math/smoke/sinpif_test.cpp
M libc/test/src/math/smoke/tanf_test.cpp
M libc/test/src/math/smoke/tanhf_test.cpp
M libc/test/src/math/tanf_test.cpp
M libc/test/src/math/tanhf_test.cpp
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/sigaltstack_test.cpp
M libc/test/src/spawn/CMakeLists.txt
M libc/test/src/spawn/posix_spawn_file_actions_test.cpp
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/memalignment_test.cpp
M libc/test/src/stdlib/strtoint32_test.cpp
M libc/test/src/stdlib/strtoint64_test.cpp
M libc/test/src/string/memory_utils/CMakeLists.txt
M libc/test/src/string/memory_utils/memory_check_utils.h
M libc/test/src/string/memory_utils/protected_pages.h
M libc/utils/MPCWrapper/CMakeLists.txt
M libc/utils/MPCWrapper/MPCUtils.cpp
M libc/utils/MPCWrapper/MPCUtils.h
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPCommon.h
M libc/utils/MPFRWrapper/MPFRUtils.h
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
A lld/test/ELF/keep-data-section-prefix.s
M lld/test/ELF/loongarch-relax-tlsdesc.s
M lldb/cmake/modules/LLDBConfig.cmake
M lldb/source/API/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlDeque.cpp
A lldb/source/Plugins/Language/CPlusPlus/MsvcStlTree.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/deque/TestDataFormatterGenericDeque.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/TestDataFormatterStdMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/map/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multiset/TestDataFormatterGenericMultiSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/TestDataFormatterGenericSet.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/set/main.cpp
A lldb/test/API/python_api/sbtype_basic_type/Makefile
A lldb/test/API/python_api/sbtype_basic_type/TestSBTypeBasicType.py
A lldb/test/API/python_api/sbtype_basic_type/main.cpp
M lldb/test/CMakeLists.txt
A lldb/test/Shell/RPC/Generator/Inputs/SBDummy.h
A lldb/test/Shell/RPC/Generator/Tests/CheckRPCGenToolByproducts.test
A lldb/test/Shell/RPC/Generator/lit.local.cfg
M lldb/test/Shell/helper/toolchain.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/CMakeLists.txt
A lldb/tools/lldb-rpc-gen/RPCCommon.cpp
A lldb/tools/lldb-rpc-gen/RPCCommon.h
A lldb/tools/lldb-rpc-gen/lldb-rpc-gen.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
A lldb/tools/lldb-rpc-gen/server/RPCServerSourceEmitter.h
A lldb/tools/lldb-rpc/CMakeLists.txt
A lldb/tools/lldb-rpc/LLDBRPCGeneration.cmake
A lldb/tools/lldb-rpc/LLDBRPCHeaders.cmake
R lldb/tools/lldb-rpc/lldb-rpc-gen/lldb-rpc-gen.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerHeaderEmitter.h
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.cpp
R lldb/tools/lldb-rpc/lldb-rpc-gen/server/RPCServerSourceEmitter.h
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/DirectX/RootSignatures.rst
M llvm/docs/DirectXUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/LinkAllAsmWriterComponents.h
M llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/Config/abi-breaking.h.cmake
M llvm/include/llvm/ExecutionEngine/MCJIT.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllIR.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/MC/DXContainerRootSignature.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
A llvm/include/llvm/Support/AlwaysTrue.h
M llvm/include/llvm/TargetParser/AArch64TargetParser.h
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
A llvm/include/llvm/Transforms/Utils/ProfileVerify.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/StackLifetime.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineInstrBundle.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DebugInfo/DWARF/DWARFCFIPrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/DWARFExpression.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/Frontend/HLSL/RootSignatureMetadata.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCMachOStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
M llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp
M llvm/lib/Target/BPF/MCTargetDesc/BPFInstPrinter.cpp
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/Debugify.cpp
M llvm/lib/Transforms/Utils/LCSSA.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
A llvm/lib/Transforms/Utils/ProfileVerify.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/ARM/arith.ll
M llvm/test/Analysis/LoopAccessAnalysis/different-strides-safe-dep-due-to-backedge-taken-count.ll
M llvm/test/Analysis/LoopAccessAnalysis/positive-dependence-distance-different-access-sizes.ll
M llvm/test/Analysis/MemorySSA/pr39197.ll
M llvm/test/Analysis/MemorySSA/pr43044.ll
M llvm/test/Analysis/MemorySSA/renamephis.ll
M llvm/test/Analysis/ScalarEvolution/add-expr-pointer-operand-sorting.ll
M llvm/test/Analysis/ScalarEvolution/sdiv.ll
M llvm/test/Analysis/ScalarEvolution/srem.ll
M llvm/test/CodeGen/AArch64/urem-lkk.ll
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
A llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
A llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
A llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
A llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
A llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/known-never-nan.ll
M llvm/test/CodeGen/AMDGPU/known-never-snan.ll
M llvm/test/CodeGen/AMDGPU/lds-bounds.ll
M llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/lds-oqap-crash.ll
M llvm/test/CodeGen/AMDGPU/lds-output-queue.ll
M llvm/test/CodeGen/AMDGPU/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-size-pal-gfx950.ll
M llvm/test/CodeGen/AMDGPU/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-fp-load-invariant.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.store.dwordx3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
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M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-hi16.ll
M llvm/test/CodeGen/AMDGPU/load-lo16.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
M llvm/test/CodeGen/AMDGPU/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-assert.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/local-memory.ll
M llvm/test/CodeGen/AMDGPU/local-stack-slot-offset.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-idiom.ll
M llvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-offsets.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-table.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/lshl64-to-32.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/mai-inline.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max.i16.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/merge-store-crash.ll
M llvm/test/CodeGen/AMDGPU/merge-store-usedef.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mesa3d.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/min-waves-per-eu-not-respected.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/missing-store.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll
M llvm/test/CodeGen/AMDGPU/mixed_wave32_wave64.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-fake16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans-f16-true16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-worklist.ll
M llvm/test/CodeGen/AMDGPU/movreld-bug.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-shader-vgpr.ll
M llvm/test/CodeGen/AMDGPU/mubuf.ll
M llvm/test/CodeGen/AMDGPU/mul.i16.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nand.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/nested-calls.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/noop-shader-O0.ll
M llvm/test/CodeGen/AMDGPU/nor.ll
M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/or3.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/pack.v2f16.ll
M llvm/test/CodeGen/AMDGPU/pack.v2i16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
M llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
M llvm/test/CodeGen/AMDGPU/parallelandifcollapse.ll
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pk_max_f16_literal.ll
M llvm/test/CodeGen/AMDGPU/post-ra-soft-clause-dbg-info.ll
M llvm/test/CodeGen/AMDGPU/preload-kernargs.ll
M llvm/test/CodeGen/AMDGPU/preserve-hi16.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
M llvm/test/CodeGen/AMDGPU/private-access-no-objects.ll
M llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-to-vector.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/promote-vect3-load.ll
M llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
M llvm/test/CodeGen/AMDGPU/r600.bitcast.ll
M llvm/test/CodeGen/AMDGPU/r600.extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
M llvm/test/CodeGen/AMDGPU/r600.sub.ll
M llvm/test/CodeGen/AMDGPU/r600.work-item-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-error-all-regs-reserved.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
M llvm/test/CodeGen/AMDGPU/recursion.ll
M llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll
M llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll
M llvm/test/CodeGen/AMDGPU/rel32.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll
M llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/s_addk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/salu-to-valu.ll
M llvm/test/CodeGen/AMDGPU/save-fp.ll
M llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
M llvm/test/CodeGen/AMDGPU/sched-setprio.ll
M llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop-nested.ll
M llvm/test/CodeGen/AMDGPU/schedule-fs-loop.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-if-2.ll
M llvm/test/CodeGen/AMDGPU/schedule-if.ll
M llvm/test/CodeGen/AMDGPU/schedule-ilp.ll
M llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll
M llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll
M llvm/test/CodeGen/AMDGPU/select-i1.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-vectors.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/select64.ll
M llvm/test/CodeGen/AMDGPU/selectcc.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/set_kill_i1_for_floation_point_comparison.ll
M llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll
M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/seto.ll
M llvm/test/CodeGen/AMDGPU/setuo.ll
M llvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/sext-eliminate.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg-failure-r600.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-local-cse.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-incorrect-fi-bookkeeping-bug.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shader-addr64-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-i128.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shl_add.ll
M llvm/test/CodeGen/AMDGPU/shl_add_constant.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
M llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
M llvm/test/CodeGen/AMDGPU/shl_or.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.ll
M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
M llvm/test/CodeGen/AMDGPU/smrd.ll
M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/split-smrd.ll
M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stack-realign.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-global.ll
M llvm/test/CodeGen/AMDGPU/store-hi16.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/store-local.ll
M llvm/test/CodeGen/AMDGPU/store-private.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/store-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/sub-zext-cc-zext-cc.ll
M llvm/test/CodeGen/AMDGPU/sub.i16.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
A llvm/test/CodeGen/AMDGPU/sub_u64.ll
M llvm/test/CodeGen/AMDGPU/swdev373493.ll
M llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll
M llvm/test/CodeGen/AMDGPU/switch-unreachable.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
M llvm/test/CodeGen/AMDGPU/tail-call-uniform-target-in-vgprs-issue110930.ll
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-combine.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i64.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-vec-i16-to-i8.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/uniform-branch-intrinsic-cond.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-crash.ll
M llvm/test/CodeGen/AMDGPU/uniform-load-from-tid.ll
M llvm/test/CodeGen/AMDGPU/uniform-phi-with-undef.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unknown-processor.ll
M llvm/test/CodeGen/AMDGPU/unpack-half.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
M llvm/test/CodeGen/AMDGPU/urem.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v1024.ll
M llvm/test/CodeGen/AMDGPU/v_add_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_ashr_pk.ll
M llvm/test/CodeGen/AMDGPU/v_cmp_gfx11.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/v_mac_f16.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/v_sub_u64_pseudo_sdwa.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca.ll
M llvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vectorize-global-local.ll
M llvm/test/CodeGen/AMDGPU/vectorize-loads.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vopc_dpp.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt.mir
M llvm/test/CodeGen/AMDGPU/wait.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
M llvm/test/CodeGen/AMDGPU/waterfall_kills_scc.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-copy.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/write-register-vgpr-into-sgpr.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xnor.ll
M llvm/test/CodeGen/AMDGPU/xor3-i1-const.ll
M llvm/test/CodeGen/AMDGPU/xor3.ll
M llvm/test/CodeGen/AMDGPU/xor_add.ll
M llvm/test/CodeGen/AMDGPU/zero_extend.ll
M llvm/test/CodeGen/AMDGPU/zext-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
A llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
A llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/WebAssembly/ref-test-func.ll
M llvm/test/CodeGen/X86/vec_extract.ll
A llvm/test/FileCheck/long-check.txt
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop2_err.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop2.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
A llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-1.td
A llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
R llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints.td
R llvm/test/TableGen/SDNodeInfoEmitter/basic.td
A llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
A llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/GVN/lifetime-simple.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-0.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-1.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-2.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-member-count.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection-wrong-table-type.ll
A llvm/test/Transforms/HipStdPar/global-var-indirection.ll
M llvm/test/Transforms/HipStdPar/global-var.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/lifetime.ll
M llvm/test/Transforms/InferAddressSpaces/NVPTX/lifetime.ll
M llvm/test/Transforms/Inline/inlined-mustprogress-loop-metadata.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/sub-gep.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics.ll
M llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
M llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
M llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
M llvm/test/Transforms/NewGVN/verify-memoryphi.ll
A llvm/test/Transforms/ObjCARC/test_autorelease_pool.ll
A llvm/test/Transforms/PGOProfile/prof-verify-as-needed.ll
A llvm/test/Transforms/PGOProfile/prof-verify-existing.ll
A llvm/test/Transforms/PGOProfile/prof-verify.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/node-outside-used-only.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SROA/alloca-address-space.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/ignore-droppable.ll
M llvm/test/Transforms/SimplifyCFG/X86/empty-cleanuppad.ll
M llvm/test/Transforms/SimplifyCFG/invoke_unwind_lifetime.ll
A llvm/test/tools/llvm-exegesis/RISCV/set-reg-init-check.s
M llvm/tools/bugpoint/bugpoint.cpp
M llvm/tools/llvm-exegesis/lib/RISCV/Target.cpp
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Conversion/ArithToAMDGPU/ArithToAMDGPU.h
M mlir/include/mlir/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.td
M mlir/include/mlir/Dialect/ArmNeon/Transforms.h
M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Bindings/Python/IRCore.cpp
M mlir/lib/Bindings/Python/IRModule.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/AffineToStandard/AffineToStandard.cpp
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/ArmNeon2dToIntr/ArmNeon2dToIntr.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp
M mlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineParallelize.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/Arith/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/ArmNeon/TransformOps/ArmNeonVectorTransformOps.cpp
M mlir/lib/Dialect/ArmNeon/Transforms/CMakeLists.txt
A mlir/lib/Dialect/ArmNeon/Transforms/LowerContractToNeonPatterns.cpp
R mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
M mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
M mlir/lib/Dialect/Bufferization/Transforms/TensorCopyInsertion.cpp
M mlir/lib/Dialect/Complex/IR/ComplexOps.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/GPU/TransformOps/Utils.cpp
M mlir/lib/Dialect/GPU/Transforms/MemoryPromotion.cpp
M mlir/lib/Dialect/IRDL/IRDLVerifiers.cpp
M mlir/lib/Dialect/Index/IR/InferIntRangeInterfaceImpls.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
M mlir/lib/Dialect/Linalg/TransformOps/GPUHeuristics.cpp
M mlir/lib/Dialect/Linalg/Transforms/MeshShardingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
M mlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
M mlir/lib/Dialect/MemRef/Transforms/ReifyResultShapes.cpp
M mlir/lib/Dialect/Mesh/Transforms/Simplifications.cpp
M mlir/lib/Dialect/Mesh/Transforms/Spmdization.cpp
M mlir/lib/Dialect/Mesh/Transforms/Transforms.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Quant/IR/TypeParser.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
A mlir/lib/Dialect/SCF/Transforms/IfConditionPropagation.cpp
M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
M mlir/lib/Dialect/SCF/Utils/Utils.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
M mlir/lib/Dialect/Tensor/Extensions/MeshShardingExtensions.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/TransformOps/TensorTransformOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/EmptyOpPatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/ExtractSliceFromReshapeUtils.cpp
M mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
M mlir/lib/Dialect/Tensor/Transforms/RewriteAsConstant.cpp
M mlir/lib/Dialect/Tensor/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/Tensor/Transforms/SubsetInsertionOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/SwapExtractSliceWithProducerPatterns.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp
M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
M mlir/lib/Dialect/Transform/TuneExtension/TuneExtensionOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTranspose.cpp
M mlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUFoldAliasOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
A mlir/test/Dialect/ArmNeon/vector-bfmmla.mlir
M mlir/test/Dialect/NVGPU/transform-matmul-to-nvvm.mlir
M mlir/test/Dialect/SCF/canonicalize.mlir
A mlir/test/Dialect/SCF/if-cond-prop.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/layout.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
A mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
M mlir/test/python/ir/operation.py
M offload/liboffload/API/Event.td
M offload/liboffload/API/Queue.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/device_code/CMakeLists.txt
A offload/unittests/OffloadAPI/device_code/sequence.c
M offload/unittests/OffloadAPI/event/olDestroyEvent.cpp
A offload/unittests/OffloadAPI/event/olSyncEvent.cpp
R offload/unittests/OffloadAPI/event/olWaitEvent.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M offload/unittests/OffloadAPI/memory/olMemcpy.cpp
A offload/unittests/OffloadAPI/queue/olSyncQueue.cpp
A offload/unittests/OffloadAPI/queue/olWaitEvents.cpp
R offload/unittests/OffloadAPI/queue/olWaitQueue.cpp
M polly/include/polly/LinkAllPasses.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/libc_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPCWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/d2bf909db066...e050f530bd11
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