[all-commits] [llvm/llvm-project] 24bf4a: [RISCV][llvm] Handle vector callee saved register ...

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 24bf4aea0ca31c4733d8771751f7fb766c455aa9
      https://github.com/llvm/llvm-project/commit/24bf4aea0ca31c4733d8771751f7fb766c455aa9
  Author: Brandon Wu <songwu0813 at gmail.com>
  Date:   2025-07-21 (Mon, 21 Jul 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVCallingConv.td
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/interrupt-attr.ll
    M llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
    M llvm/test/CodeGen/RISCV/rvv/interrupt-attr-nocall.ll

  Log Message:
  -----------
  [RISCV][llvm] Handle vector callee saved register correctly (#149467)

In TargetFrameLowering::determineCalleeSaves, any vector register is
marked
as saved if any of its subregister is clobbered, this is not correct in
vector registers. We only want the vector register to be marked as saved
only if all of its subregisters are clobbered.
This patch handles vector callee saved registers in target hook.



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