[all-commits] [llvm/llvm-project] 5a9c20: [CodeGen] Fix INLINEASM regclass numbers to match ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5a9c201bc9a03064e22aff37fc60ee210990fe96
      https://github.com/llvm/llvm-project/commit/5a9c201bc9a03064e22aff37fc60ee210990fe96
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2025-07-21 (Mon, 21 Jul 2025)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
    M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
    M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
    M llvm/test/CodeGen/AMDGPU/mai-hazards.mir
    M llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir
    M llvm/test/CodeGen/X86/peephole-copy.mir

  Log Message:
  -----------
  [CodeGen] Fix INLINEASM regclass numbers to match names in tests (#142359)

INLINEASM operands like "2097162 /* regdef:SReg_32 */" tend to get
broken over time as the register class definitions get updated, so the
numbers change. Fix the numbers to match the names in the comments.



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