[all-commits] [llvm/llvm-project] b02787: [CIR] Fix alignment when lowering set/get bitfield...
Andres-Salamanca via All-commits
all-commits at lists.llvm.org
Fri Jul 18 14:13:55 PDT 2025
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: b02787d33f24d83f1d5814c578b7b0fce7156382
https://github.com/llvm/llvm-project/commit/b02787d33f24d83f1d5814c578b7b0fce7156382
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
Log Message:
-----------
[CIR] Fix alignment when lowering set/get bitfield operations (#148999)
This PR fixes incorrect alignment when lowering `set` and `getBitField`
operations to LLVM IR. The issue occurred because during lowering, the
function was being called with an alignment of 0, which caused it to
default to the alignment of the packed member. For example, if the
bitfield was packed inside a `u64i`, it would use an alignment of 8.
With this change, the generated code now matches what the classic
codegen produces.
In the assembly format, I changed to be similar to how it's done in
loadOp. If there's a better approach, please feel free to point it out.
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list