[all-commits] [llvm/llvm-project] a6bee3: [AMDGPU][SDAG] Handle ISD::PTRADD in various speci...

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/06-17-_amdgpu_sdag_handle_isd_ptradd_in_various_special_cases
  Home:   https://github.com/llvm/llvm-project
  Commit: a6bee3e460ef6b51948ab4eedbcb211d8b625a2e
      https://github.com/llvm/llvm-project/commit/a6bee3e460ef6b51948ab4eedbcb211d8b625a2e
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-07-18 (Fri, 18 Jul 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-mubuf.ll
    M llvm/test/CodeGen/AMDGPU/ptradd-sdag-optimizations.ll

  Log Message:
  -----------
  [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases

There are more places in SIISelLowering.cpp and AMDGPUISelDAGToDAG.cpp
that check for ISD::ADD in a pointer context, but as far as I can tell
those are only relevant for 32-bit pointer arithmetic (like frame
indices/scratch addresses and LDS), for which we don't enable PTRADD
generation yet.

For SWDEV-516125.


  Commit: 7e45d91d762dcfd900f33b864cc7c9f1b534ad39
      https://github.com/llvm/llvm-project/commit/7e45d91d762dcfd900f33b864cc7c9f1b534ad39
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2025-07-18 (Fri, 18 Jul 2025)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  Log Message:
  -----------
  isBaseWithConstantOffset(Addr) -> Addr->isAnyAdd()
Op->isAnyAdd() -> Op.getOpcode() != ISD::SUB


Compare: https://github.com/llvm/llvm-project/compare/4950255ab299...7e45d91d762d

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