[all-commits] [llvm/llvm-project] 5c4bf5: AMDGPU: Add pass to replace constant materialize w...
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Fri Jul 18 00:30:42 PDT 2025
Branch: refs/heads/users/arsenm/amdgpu/add-pass-replace-materialize-imm-with-av-pseudo
Home: https://github.com/llvm/llvm-project
Commit: 5c4bf5eca5928abcf639a47e8cebe42bca341d5d
https://github.com/llvm/llvm-project/commit/5c4bf5eca5928abcf639a47e8cebe42bca341d5d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
Log Message:
-----------
AMDGPU: Add pass to replace constant materialize with AV pseudos
If we have a v_mov_b32 or v_accvgpr_write_b32 with an inline immediate,
replace it with a pseudo which writes to the combined AV_* class. This
relaxes the operand constraints, which will allow the allocator to
inflate the register class to AV_* to potentially avoid spilling.
The allocator does not know how to replace an instruction to enable
the change of register class. I originally tried to do this by changing
all of the places we introduce v_mov_b32 with immediate, but it's along
tail of niche cases that require manual updating. Plus we can restrict
this to only run on functions where we know we will be allocating AGPRs.
Commit: 547f00073c1110e758b47cd09fe61f3941f5dac8
https://github.com/llvm/llvm-project/commit/547f00073c1110e758b47cd09fe61f3941f5dac8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-18 (Fri, 18 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
Log Message:
-----------
Only check immediate value for v_mov_b32
Compare: https://github.com/llvm/llvm-project/compare/2ae228f5dd2d...547f00073c11
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