[all-commits] [llvm/llvm-project] 359dca: [AMDGPU] Move class WaitcntBrackets after class SI...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Thu Jul 17 08:45:31 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/slpinitial-support-for-copyable-elements
Home: https://github.com/llvm/llvm-project
Commit: 359dca0dad72d11e41e08136bc6c6cca3f22f038
https://github.com/llvm/llvm-project/commit/359dca0dad72d11e41e08136bc6c6cca3f22f038
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Move class WaitcntBrackets after class SIInsertWaitcnts. NFC.
This is a prerequisite for "[AMDGPU] Move common fields out of WaitcntBrackets. NFC. (#148864)"
Commit: 935fd986474fa2b6fe9e424ffd5d8cbc875151be
https://github.com/llvm/llvm-project/commit/935fd986474fa2b6fe9e424ffd5d8cbc875151be
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
Log Message:
-----------
[Docs] remove beginner office hours from GettingInvolved (#149160)
These were turned down at the beginning of this year; thanks to the
folks on
https://discourse.llvm.org/t/is-the-beginner-office-hours-still-running/87398/2
for flagging this!
---
N.B., I tried testing via `ninja doxygen-llvm`, but that didn't
terminate on my machine within 30mins (either with or without this
patch). I assume it's some local config bug on my end, but it happened
on `main` and `main~1000`, so I'm not sure how to test.
Since the change is pretty trivial, still comfortable uploading for
review.
Commit: 4166df2073b6b3e5c7ab0c25d9bc73980b50ea31
https://github.com/llvm/llvm-project/commit/4166df2073b6b3e5c7ab0c25d9bc73980b50ea31
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
Log Message:
-----------
[RISCV][test] Add tests for vector subtraction if above threshold
Commit: fc5c5a934d2560559221bcb334b14ef4aa96a2dd
https://github.com/llvm/llvm-project/commit/fc5c5a934d2560559221bcb334b14ef4aa96a2dd
Author: jyli0116 <yu.li at arm.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
Log Message:
-----------
[GlobalISel] Allow expansion of srem by constant in prelegalizer (#148845)
This patch allows srem by a constant to be expanded more efficiently to
avoid the need for expensive sdiv instructions. This is the last part of
the patches which fixes #118090
Commit: 66da9f38f374e786b2f1c0ecdab0b651c94c4f27
https://github.com/llvm/llvm-project/commit/66da9f38f374e786b2f1c0ecdab0b651c94c4f27
Author: Marco Elver <elver at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/X86/pcsections-atomics.ll
Log Message:
-----------
[SelectionDAG] Fix copyExtraInfo where new node has entry as operand (#149307)
Add special case handling where a new replacement node has the entry
node as an operand i.e. does not depend on any other nodes.
This can be observed with the existing X86/pcsections-atomics.ll test
case when targeting Haswell, where certain 128-bit atomics are
transformed into arch-specific instructions, with some operands having
no other dependencies.
Commit: 0f71424280af9e3293ed481399b2b53ca708cd15
https://github.com/llvm/llvm-project/commit/0f71424280af9e3293ed481399b2b53ca708cd15
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
Log Message:
-----------
[RISCV] Teach SelectAddrRegRegScale that ADD is commutable. (#149231)
Commit: ab25de7dec2af661b66b23b9794291f2fd81b6bc
https://github.com/llvm/llvm-project/commit/ab25de7dec2af661b66b23b9794291f2fd81b6bc
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Move common fields out of WaitcntBrackets. NFC. (#148864)
WaitcntBrackets holds per-basic-block information about the state of
wait counters. It also held a bunch of fields that are constant
throughout a run of the pass. This patch moves them out into the
SIInsertWaitcnts class, for better logical separation and to save a tiny
bit of memory.
Commit: 96a7e954e1501239d1fc4bd6eba60428bd6609f7
https://github.com/llvm/llvm-project/commit/96a7e954e1501239d1fc4bd6eba60428bd6609f7
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
Log Message:
-----------
[Sema] Remove unnecessary casts (NFC) (#149253)
getParam already returns NamedDecl *.
Commit: 7fa48ce547ef9e0516564eca9c375109e83f2f71
https://github.com/llvm/llvm-project/commit/7fa48ce547ef9e0516564eca9c375109e83f2f71
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
Log Message:
-----------
[AMDGPU] Remove an unnecessary cast (NFC) (#149254)
getTargetLowering() already returns const SITargetLowering *.
Commit: 96bde11e307e53a1263ab6088f172716db7cb0d8
https://github.com/llvm/llvm-project/commit/96bde11e307e53a1263ab6088f172716db7cb0d8
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/TargetParser/Host.h
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[TargetParser] Remove const from a return type (NFC) (#149255)
getHostCPUFeatures constructs and returns a temporary instance of
StringMap<bool>. We don't need const on the return type.
Commit: 73e8ada540acbd60f916ef4b0a5a2b454c8ece44
https://github.com/llvm/llvm-project/commit/73e8ada540acbd60f916ef4b0a5a2b454c8ece44
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang/lib/Sema/AnalysisBasedWarnings.cpp
Log Message:
-----------
[Sema] Use llvm::all_of (NFC) (#149256)
We can pass a range to llvm::all_of.
Commit: 577585198637fc2ced2a4fdf20f91c58fb74c717
https://github.com/llvm/llvm-project/commit/577585198637fc2ced2a4fdf20f91c58fb74c717
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/lib/MC/MCContext.cpp
Log Message:
-----------
[llvm] Use *Map::try_emplace (NFC) (#149257)
- try_emplace(Key) is shorter than insert({Key, nullptr}).
- try_emplace performs value initialization without value parameters.
- We overwrite values on successful insertion anyway.
While we are at it, this patch simplifies the code with structured
binding.
Commit: 756e07734b4f2aa64bd1bd5b6a29389c4c642323
https://github.com/llvm/llvm-project/commit/756e07734b4f2aa64bd1bd5b6a29389c4c642323
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/test/API/python_api/type/main.cpp
Log Message:
-----------
[lldb][test] Adjust TestTypeList.py on Windows with exceptions
Since https://github.com/llvm/llvm-project/pull/148691 enabled
exceptions when compiling the tests, this test has been failing.
Much like was noted there, one of the variables disappeared
from the debug info. Giving it a non-zero size and initialising
it fixed that.
Commit: 9de32d56e4fdf08d88aca74149f5f815eb6505ec
https://github.com/llvm/llvm-project/commit/9de32d56e4fdf08d88aca74149f5f815eb6505ec
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tools-extra] Bump ReleaseNotes to 22.0.0git (#149306)
Move over change post 21.x branch cut.
Commit: 95639b75487895f7ef45c1468d4639f1544a1851
https://github.com/llvm/llvm-project/commit/95639b75487895f7ef45c1468d4639f1544a1851
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
Log Message:
-----------
[CI] Drop CLEAR_CACHE Support in monolithic-* scripts
This patch drops support for clearing the cache with the CLEAR_CACHE
environment variable. This is an artifact of the old infrastructure as
we now do not persist the cache across builds, instead redownloading the
cache directory everytime. This makes the scripts slightly simpler as we
are no longer supporting unneeded functionality.
Reviewers: Endilll, cmtice, dschuff, Keenuts, lnihlen, gburgessiv
Reviewed By: Keenuts, cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/149193
Commit: ba5f31cfaa2452a4a94a482b53d899d6f2ee0e66
https://github.com/llvm/llvm-project/commit/ba5f31cfaa2452a4a94a482b53d899d6f2ee0e66
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/test/Shell/Settings/TestChildCountTruncation.test
Log Message:
-----------
[lldb][test] Disable TestChildCountTruncation on Windows
This fails because it tells clang to use DWARF which link.exe
then discards.
The test may not need DWARF, but I'm going to confirm that in
a follow up PR review.
Test added by https://github.com/llvm/llvm-project/pull/149088.
Commit: 9fa3971fac27fbe0a6e3b9745d201c16f5f98bc2
https://github.com/llvm/llvm-project/commit/9fa3971fac27fbe0a6e3b9745d201c16f5f98bc2
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
Log Message:
-----------
[DAGCombiner] Fold vector subtraction if above threshold to `umin` (#148834)
This extends #134235 and #135194 to vectors.
Commit: 8f18dde6c0b38a67ad0f06aab79cdadb78b35d33
https://github.com/llvm/llvm-project/commit/8f18dde6c0b38a67ad0f06aab79cdadb78b35d33
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
Log Message:
-----------
[RISCV][IA] Rearrange code for readability and ease of merge [nfc]
Commit: 46357438baefbdcf630abc5d74565afcbf1c48dd
https://github.com/llvm/llvm-project/commit/46357438baefbdcf630abc5d74565afcbf1c48dd
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
Log Message:
-----------
[SCEV] Try to re-use existing LCSSA phis when expanding SCEVAddRecExpr. (#147214)
If an AddRec is expanded outside a loop with a single exit block, check
if any of the (lcssa) phi nodes in the exit block match the AddRec. If
that's the case, simply use the existing lcssa phi.
This can reduce the number of instruction created for SCEV expansions,
mainly for runtime checks generated by the loop vectorizer.
Compile-time impact should be mostly neutral
https://llvm-compile-time-tracker.com/compare.php?from=48c7a3187f9831304a38df9bdb3b4d5bf6b6b1a2&to=cf9d039a7b0db5d0d912e0e2c01b19c2a653273a&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/147214
Commit: 7817163663b3bb662a46a73cf1903ec900ba6146
https://github.com/llvm/llvm-project/commit/7817163663b3bb662a46a73cf1903ec900ba6146
Author: Jeremy Kun <jkun at google.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
[mlir] [presburger] Add IntegerRelation::rangeProduct (#148092)
This is intended to match `isl::map`'s `flat_range_product`.
---------
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: 4bf82aebc0da985cf6b2e70812714875e8fa78fa
https://github.com/llvm/llvm-project/commit/4bf82aebc0da985cf6b2e70812714875e8fa78fa
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M lldb/test/Shell/Settings/TestChildCountTruncation.test
Log Message:
-----------
[lldb][test] Fix TestChildCountTruncation on Windows (#149322)
By not forcing the DWARF debug info format. When left as the default,
the tests pass.
Test added by https://github.com/llvm/llvm-project/pull/149088.
Commit: dcd3e6b42485971348b86365124f7308312ad17b
https://github.com/llvm/llvm-project/commit/dcd3e6b42485971348b86365124f7308312ad17b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-17 (Thu, 17 Jul 2025)
Changed paths:
M .ci/monolithic-linux.sh
M .ci/monolithic-windows.sh
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M lldb/test/API/python_api/type/main.cpp
M lldb/test/Shell/Settings/TestChildCountTruncation.test
M llvm/docs/GettingInvolved.rst
M llvm/include/llvm/ADT/EquivalenceClasses.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/TargetParser/Host.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/MC/MCContext.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/AArch64/rem-by-const.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/X86/pcsections-atomics.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M mlir/include/mlir/Analysis/Presburger/IntegerRelation.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/unittests/Analysis/Presburger/IntegerRelationTest.cpp
Log Message:
-----------
Use ConstantExpr::getBinOpIdentity
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/9803edb7e45c...dcd3e6b42485
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