[all-commits] [llvm/llvm-project] f46e89: AMDGPU: Add pass to replace constant materialize w...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/add-pass-replace-materialize-imm-with-av-pseudo
  Home:   https://github.com/llvm/llvm-project
  Commit: f46e89e232948948cc6646a7e6d8adab5c278f94
      https://github.com/llvm/llvm-project/commit/f46e89e232948948cc6646a7e6d8adab5c278f94
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2025-07-17 (Thu, 17 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.cpp
    A llvm/lib/Target/AMDGPU/AMDGPUPrepareAGPRAlloc.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
    A llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
    M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.mir
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-read.mir
    M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
    M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll

  Log Message:
  -----------
  AMDGPU: Add pass to replace constant materialize with AV pseudos

If we have a v_mov_b32 or v_accvgpr_write_b32 with an inline immediate,
replace it with a pseudo which writes to the combined AV_* class. This
relaxes the operand constraints, which will allow the allocator to
inflate the register class to AV_* to potentially avoid spilling.

The allocator does not know how to replace an instruction to enable
the change of register class. I originally tried to do this by changing
all of the places we introduce v_mov_b32 with immediate, but it's along
tail of niche cases that require manual updating. Plus we can restrict
this to only run on functions where we know we will be allocating AGPRs.



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