[all-commits] [llvm/llvm-project] de4b45: [AArch64][Codegen]Transform saturating smull to sq...

[Nashe Mncube via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: de4b458aa5e52812aa9c392f62a616b6c6c1716f
      https://github.com/llvm/llvm-project/commit/de4b458aa5e52812aa9c392f62a616b6c6c1716f
  Author: Nashe Mncube <nashe.mncube at arm.com>
  Date:   2025-07-16 (Wed, 16 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    A llvm/test/CodeGen/AArch64/saturating-vec-smull.ll

  Log Message:
  -----------
  [AArch64][Codegen]Transform saturating smull to sqdmulh (#143671)

This patch adds a pattern for recognizing saturating vector
smull. Prior to this patch these were performed using a
combination of smull+smull2+uzp+smin  like the following

```
        smull2  v5.2d, v1.4s, v2.4s
        smull   v1.2d, v1.2s, v2.2s
        uzp2    v1.4s, v1.4s, v5.4s
        smin    v1.4s, v1.4s, v0.4s
```

which now optimizes to

```
    sqdmulh v0.4s, v1.4s, v0.4s
```

This only operates on vectors containing int32 and int16 types



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