[all-commits] [llvm/llvm-project] e03870: [𝘀𝗽𝗿] initial version
Tomer Shafir via All-commits
all-commits at lists.llvm.org
Sun Jul 13 06:27:20 PDT 2025
Branch: refs/heads/users/tomershafir/spr/codegen-prevent-register-coalescer-rematerialization-based-on-target
Home: https://github.com/llvm/llvm-project
Commit: e038707606dbde51ef1c1613b29d52f14bf2d62b
https://github.com/llvm/llvm-project/commit/e038707606dbde51ef1c1613b29d52f14bf2d62b
Author: tomershafir <tomer.shafir8 at gmail.com>
Date: 2025-07-13 (Sun, 13 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/test/CodeGen/AArch64/arm64-abi-varargs.ll
A llvm/test/CodeGen/AArch64/arm64-reg-coalesce-remat-zero-cycle-regmov-fpr.mir
A llvm/test/CodeGen/AArch64/arm64-reg-coalesce-remat-zero-cycle-regmov-gpr.mir
M llvm/test/CodeGen/AArch64/arm64-vshuffle.ll
M llvm/test/CodeGen/AArch64/clear-dead-implicit-def-impdef.ll
Log Message:
-----------
[𝘀𝗽𝗿] initial version
Created using spr 1.3.6
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