[all-commits] [llvm/llvm-project] cd65f8: [mlir] Fix a warning
Peter Collingbourne via All-commits
all-commits at lists.llvm.org
Fri Jul 11 16:54:27 PDT 2025
Branch: refs/heads/users/pcc/spr/elf-add-support-for-r_aarch64_inst32-relocation
Home: https://github.com/llvm/llvm-project
Commit: cd65f8bf17ecfc9896fd9913905f182ad7ce1446
https://github.com/llvm/llvm-project/commit/cd65f8bf17ecfc9896fd9913905f182ad7ce1446
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp:42:20:
error: unused variable 'kIndScale' [-Werror,-Wunused-const-variable]
Commit: 20daa73a0962efd22cee3bbf327ee35b22add39d
https://github.com/llvm/llvm-project/commit/20daa73a0962efd22cee3bbf327ee35b22add39d
Author: Mingming Liu <mingmingl at google.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/lib/ProfileData/SampleProf.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
Log Message:
-----------
[NFC]Codestyle changes for SampleFDO library (#147840)
* Introduce an error code for illegal_line_offset in sampleprof_error
namespace, and use it for line offset parsing error.
* Add `const` for `LineLocation::serialize`.
* Use structured binding, make_first/second_range in loops.
I'm working on a [sample-profile format
change](https://github.com/llvm/llvm-project/compare/users/mingmingl-llvm/samplefdo-profile-format)
to extend SampleFDO profile with vtable profiles. And this change splits
the non-functional changes.
Commit: ac4a38e9bd573a173432b89cbef7cce7a48e7907
https://github.com/llvm/llvm-project/commit/ac4a38e9bd573a173432b89cbef7cce7a48e7907
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
Log Message:
-----------
[SLP] Emit reduction instead of 2 extracts + scalar op, when vectorizing operands (#147583)
Added emission of the 2-element reduction instead of 2 extracts + scalar
op, when trying to vectorize operands of the instruction, if it is more
profitable.
Commit: d5436b0b951abe5ee724bed6617e76e736376e09
https://github.com/llvm/llvm-project/commit/d5436b0b951abe5ee724bed6617e76e736376e09
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/wchar.yaml
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslcat.cpp
A libc/src/wchar/wcslcat.h
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslcat_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/wchar/BUILD.bazel
Log Message:
-----------
[libc] wcslcat implementation (#146588)
implemented wcslcat and tests.
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 03b0ae8da8c4df28ad197ef21619288ead085687
https://github.com/llvm/llvm-project/commit/03b0ae8da8c4df28ad197ef21619288ead085687
Author: Vincent Lee <leevince at meta.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/utils/mlgo-utils/combine_training_corpus.py
A llvm/utils/mlgo-utils/extract_ir.py
A llvm/utils/mlgo-utils/make_corpus.py
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[mlgo-utils] Create symlinked entrypoints in root directory (#146981)
These scripts belong in the `mlgo-utils` directory when directly used
with python3. But since they are also used to package with pip, symlink
the entrypoint scripts to mlgo-utils directory. Adjust the bazel paths
to account for this as well. This loosely follows the same structure as lit.
Verified that I was also able to build the package successfully and use
the script.
Commit: 28aa5a64efcb34fa2814fb87ee191514157af186
https://github.com/llvm/llvm-project/commit/28aa5a64efcb34fa2814fb87ee191514157af186
Author: Wenju He <wenju.he at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A libclc/clc/include/clc/workitem/clc_get_global_id.h
A libclc/clc/include/clc/workitem/clc_get_global_offset.h
A libclc/clc/include/clc/workitem/clc_get_global_size.h
A libclc/clc/include/clc/workitem/clc_get_group_id.h
A libclc/clc/include/clc/workitem/clc_get_local_id.h
A libclc/clc/include/clc/workitem/clc_get_local_linear_id.h
A libclc/clc/include/clc/workitem/clc_get_local_size.h
A libclc/clc/include/clc/workitem/clc_get_max_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_num_groups.h
A libclc/clc/include/clc/workitem/clc_get_num_sub_groups.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_local_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_work_dim.h
M libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/workitem/clc_get_global_offset.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_global_size.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_group_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_local_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_work_dim.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/workitem/clc_get_local_linear_id.cl
A libclc/clc/lib/generic/workitem/clc_get_num_sub_groups.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/SOURCES
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_global_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_group_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_max_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_num_groups.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_sub_group_local_id.cl
A libclc/opencl/include/clc/opencl/workitem/get_local_linear_id.h
A libclc/opencl/include/clc/opencl/workitem/get_max_sub_group_size.h
A libclc/opencl/include/clc/opencl/workitem/get_num_sub_groups.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_local_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_size.h
M libclc/opencl/lib/amdgcn/workitem/get_global_offset.cl
M libclc/opencl/lib/amdgcn/workitem/get_global_size.cl
M libclc/opencl/lib/amdgcn/workitem/get_group_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_local_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_work_dim.cl
M libclc/opencl/lib/ptx-nvidiacl/SOURCES
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_global_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_group_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_linear_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_size.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_max_sub_group_size.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_sub_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_size.cl
Log Message:
-----------
[libclc] Declare workitem built-ins in clc, move ptx-nvidiacl workitem built-ins into clc (#144333)
Changes in this PR:
* Declare most of workitem functions in clc and opencl folders.
* Call clc workitem function in corresponding OpenCL workitem function.
* Move ptx-nvidiacl workitem built-in implementations into clc.
* Move a few amdgcn workitem built-in implementations into clc.
* Include only needed headers in OpenCL workitem functions.
* Implement get_local_linear_id, get_max_sub_group_size,
get_num_sub_groups,
get_sub_group_id, get_sub_group_local_id, get_sub_group_size for
ptx-nvidiacl.
llvm-diff shows this PR adds a few new symbols to nvptx64--nvidiacl.bc.
llvm-diff shows no change to amdgcn--amdhsa.bc, nvptx--.bc and
nvptx64--.bc.
Commit: d286540734fe03232d971d0e7c52f88464e98928
https://github.com/llvm/llvm-project/commit/d286540734fe03232d971d0e7c52f88464e98928
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/lsan/lsan_allocator.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
Log Message:
-----------
[sanitizer_common] Introduce SANITIZER_MMAP_BEGIN macro (#147645)
To prepare for other platforms, such as 64-bit AIX, that have a non-zero
mmap beginning address.
---------
Co-authored-by: David Justo <david.justo.1996 at gmail.com>
Commit: 75524dee18c34496b427060a5c394287f2327ddf
https://github.com/llvm/llvm-project/commit/75524dee18c34496b427060a5c394287f2327ddf
Author: Chao Chen <chao.chen at intel.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[mlir][xegpu] Relax rank restriction of TensorDescType (#145916)
Commit: 7c66099545e84374d1df18da168ac12a4a9422cb
https://github.com/llvm/llvm-project/commit/7c66099545e84374d1df18da168ac12a4a9422cb
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
Log Message:
-----------
[msan] Simplify 'maskedCheckAVXIndexShadow' (#147839)
The current instrumentation has more or and element extraction than a
coal mine:
```
[[TMP10:%.*]] = extractelement <16 x i32> [[TMP9]], i64 0
[[TMP11:%.*]] = and i32 [[TMP10]], 15
[[TMP43:%.*]] = or i32 [[TMP10]], [[TMP11]]
[[TMP12:%.*]] = extractelement <16 x i32> [[TMP9]], i64 1
[[TMP13:%.*]] = and i32 [[TMP12]], 15
[[TMP44:%.*]] = or i32 [[TMP12]], [[TMP13]]
...
[[TMP40:%.*]] = extractelement <16 x i32> [[TMP9]], i64 15
[[TMP41:%.*]] = and i32 [[TMP40]], 15
[[TMP57:%.*]] = or i32 [[TMP40]], [[TMP41]]
[[_MSCMP:%.*]] = icmp ne i32 [[TMP57]], 0
br i1 [[_MSCMP]], label [[TMP102:%.*]], label [[TMP103:%.*]], !prof [[PROF1]]
```
Simplify it to:
```
[[TMP10:%.*]] = trunc <16 x i32> [[T]] to <16 x i4>
[[TMP12:%.*]] = bitcast <16 x i4> [[TMP10]] to i64
[[_MSCMP:%.*]] = icmp ne i64 [[TMP12]], 0
br i1 [[_MSCMP]], label %[[BB13:.*]], label %[[BB14:.*]], !prof [[PROF1]]
```
Commit: e8a50a2568bf7c8d97f06290e03db3ca8eb2f2d3
https://github.com/llvm/llvm-project/commit/e8a50a2568bf7c8d97f06290e03db3ca8eb2f2d3
Author: A. Jiang <de34 at live.cn>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
Log Message:
-----------
[libc++][docs] Update paper & LWG issue lists after 2025-06 meeting (#147668)
CWG papers requiring library support are also listed.
Commit: 84eeb2348440f448c4dc9582237d1612c950572e
https://github.com/llvm/llvm-project/commit/84eeb2348440f448c4dc9582237d1612c950572e
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/Basic/riscv_andes_vector.td
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vlnu8.c
Log Message:
-----------
[RISCV] Implement intrinsics for XAndesVSIntLoad (#147767)
This patch implements clang intrinsic support for XAndesVSIntLoad.
The document for the intrinsics can be found at:
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/intrinsic_funcs/04_andes_vector_int4_load_extension.adoc
Co-authored-by: Lino Hsing-Yu Peng <linopeng at andestech.com>
Commit: 2eab6f9bb2b3dd0cf05021939accca75cfb79994
https://github.com/llvm/llvm-project/commit/2eab6f9bb2b3dd0cf05021939accca75cfb79994
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfwcvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfwcvtbf16.c
Log Message:
-----------
[RISCV] Move the intrinsic tests for vfwcvtbf16 and vfncvtbf16 to zvfbfmin directory. NFC.
A follow-up commit for #147644.
Commit: 1ae99f5894d70d11545f3a657665e5a3b8437d9a
https://github.com/llvm/llvm-project/commit/1ae99f5894d70d11545f3a657665e5a3b8437d9a
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[msan] Fix -Wunused-but-set-variable after #147839
Commit: f1c4df5b7bb79efb3e9be7fa5f8176506499d0a6
https://github.com/llvm/llvm-project/commit/f1c4df5b7bb79efb3e9be7fa5f8176506499d0a6
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M compiler-rt/lib/builtins/int_types.h
Log Message:
-----------
builtins: Speculative MSVC fix.
Attempt to fix these build failures:
https://lab.llvm.org/buildbot/#/builders/107/builds/12601
The suspected cause is that #133530 caused us to start
passing -std:c11 to MSVC, which activated this code path
that uses _Complex, which MSVC does not support. See:
https://learn.microsoft.com/en-us/cpp/c-runtime-library/complex-math-support
Fix it by also checking _MSC_VER.
Commit: c86c815fc57c098ba14576fe2bb189da1dfc820d
https://github.com/llvm/llvm-project/commit/c86c815fc57c098ba14576fe2bb189da1dfc820d
Author: Marco Vitale <53484928+mrcvtl at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Decl.h
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/range-for-lifetime-cxx23.cpp
Log Message:
-----------
[Sema] Fix lifetime extension for temporaries in range-based for loops in C++23 (#145164)
C++23 mandates that temporaries used in range-based for loops are
lifetime-extended
to cover the full loop. This patch adds a check for loop variables and
compiler-
generated `__range` bindings to apply the correct extension.
Includes test cases based on examples from CWG900/P2644R1.
Fixes https://github.com/llvm/llvm-project/issues/109793
Commit: 697beb3f174c530de2af7124cfe2dcedea11c487
https://github.com/llvm/llvm-project/commit/697beb3f174c530de2af7124cfe2dcedea11c487
Author: Boyao Wang <wangboyao at bytedance.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
Log Message:
-----------
[TargetLowering] Change getOptimalMemOpType and findOptimalMemOpLowering to take LLVM Context (#147664)
Add LLVM Context to getOptimalMemOpType and findOptimalMemOpLowering. So
that we can use EVT::getVectorVT to generate EVT type in
getOptimalMemOpType.
Related to [#146673](https://github.com/llvm/llvm-project/pull/146673).
Commit: 831b198c65ced51e084baf92e4e6de911e000857
https://github.com/llvm/llvm-project/commit/831b198c65ced51e084baf92e4e6de911e000857
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/docs/RISCV/RISCVVectorExtension.rst
Log Message:
-----------
[RISCV][Docs] Add bfloat types to RISCVVectorExtension.rst. NFC (#147867)
Commit: c4f18d6874df380eda3be224eaae6c24e996bbdf
https://github.com/llvm/llvm-project/commit/c4f18d6874df380eda3be224eaae6c24e996bbdf
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/utils/remote-exec.py
Log Message:
-----------
remote-exec: Only copy command line arguments which name files that exist.
Speculative fix for failing buildbot:
https://lab.llvm.org/buildbot/#/builders/193/builds/8961
Commit: 378e9bb7e06c67d8235a8cb5bfb325b63d2ba319
https://github.com/llvm/llvm-project/commit/378e9bb7e06c67d8235a8cb5bfb325b63d2ba319
Author: darkbuck <michael.hliao at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/CIR/Lowering/select.cir
M clang/tools/cir-translate/cir-translate.cpp
Log Message:
-----------
[cir-translate] Fix crash issue where the data layout string is missing (#147209)
- Targets like 'aarch64' or 'arm' only populate the data layout string
after the constructor. Need to call 'CreateTargetInfo' to setup them
properly.
Commit: 617af3cc50c48ec71889b893dd2658764f19abce
https://github.com/llvm/llvm-project/commit/617af3cc50c48ec71889b893dd2658764f19abce
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
A llvm/test/CodeGen/AArch64/exception-handling-windows-elf.ll
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
AArch64: Base MCAsmInfo type on binary format before OS (#147875)
Fixes asserting with windows-elf triples. Should fix regression
reported in https://github.com/llvm/llvm-project/pull/147225#issuecomment-3054190938
I'm not sure this is a valid triple, but I'm guessing the MCJIT usage
is an accident. This does change the behavior from trying to use WinEH
to DwarfCFI; however the backend crashes with WinEH so I'm assuming following
ELF is the more correct option.
Commit: fd894f6e9ed069a8baf0fc694f4063585fab9ae1
https://github.com/llvm/llvm-project/commit/fd894f6e9ed069a8baf0fc694f4063585fab9ae1
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
Log Message:
-----------
[AMDGPU] gfx1250 MC support for v_mov_b64 (#147859)
It is incomplete in terms of the DPP diagnistics, that is much
more involved change.
Commit: 69ff8537296339babc72ae075f3e78a68d1b6816
https://github.com/llvm/llvm-project/commit/69ff8537296339babc72ae075f3e78a68d1b6816
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/overloaded/vfwmaccbf16.c
Log Message:
-----------
[RISCV] Move the intrinsic tests for vfwmaccbf16 to zvfbfwma directory. NFC.
A follow-up commit for #147644.
Commit: 00a85e57049ee637a6089b2c696d5e37db8cd47b
https://github.com/llvm/llvm-project/commit/00a85e57049ee637a6089b2c696d5e37db8cd47b
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
A llvm/test/MC/AMDGPU/gfx1250_asm_salu_lit64.s
A llvm/test/MC/AMDGPU/gfx1250_asm_valu_lit64.s
A llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_salu_lit64.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_valu_lit64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
Log Message:
-----------
[AMDGPU] gfx1250: MC support for 64-bit literals (#147861)
Commit: 36cbd43ae8d5a5274ae3193b6383fff2ba9671f4
https://github.com/llvm/llvm-project/commit/36cbd43ae8d5a5274ae3193b6383fff2ba9671f4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check new/delete mismatch earlier (#147732)
This fixes a mismatch in diagnostic output with the current intepreter.
Commit: 10f782456eabbe8d36632e3ecb93436bd7ab8385
https://github.com/llvm/llvm-project/commit/10f782456eabbe8d36632e3ecb93436bd7ab8385
Author: David Green <david.green at arm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/cmp.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
Log Message:
-----------
[AArch64] Enable other cost kinds for getCmpSelInstrCost. (#144375)
This removes the CostKind == TCK_RecipThroughput limitation from
getCmpSelInstrCost, allowing it to return more accurate costs for CodeSize and
Lat / SizeLat. Especially for larger vectors under CodeSize, the returned costs
are currently 1, not the legalization cost.
Commit: b57df56b48145f0985c5cab4e4f282e512c89546
https://github.com/llvm/llvm-project/commit/b57df56b48145f0985c5cab4e4f282e512c89546
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
Log Message:
-----------
[RISCV] Add UnsupportedSchedXXX for vendor extensions package (#147666)
There will be more schedule definitions for vendor extentions and
we need to add these `UnsupportedSchedXXX` to exsiting models every
time we add new schedule definitions.
The fact is that each vendor will barely implement other vendors'
extensions, so we can package these definitions into one.
Commit: d72d84cb0df40019a0a5abaf836b38c8e46e4827
https://github.com/llvm/llvm-project/commit/d72d84cb0df40019a0a5abaf836b38c8e46e4827
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/Sema/constant_builtins_vector.cpp
Log Message:
-----------
[clang][bytecode] Implement missing elementwise builtins (#147892)
Commit: 20becf373edcf9d568f8904c2b473e6b48500787
https://github.com/llvm/llvm-project/commit/20becf373edcf9d568f8904c2b473e6b48500787
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[TTI] Move vp.{select,merge} costing from RISCV to BasicTTIImpl. NFC (#147870)
Move the costing to the generic implementation in BasicTTIImpl since it
just falls back to the non-vp costing.
Also pass through the OperandValueInfo if using value based costing, but
I don't believe this affects the result for any in-tree target
currently.
Commit: 213735487ea0c682a3e8c3d5a78a034e50fd5a0a
https://github.com/llvm/llvm-project/commit/213735487ea0c682a3e8c3d5a78a034e50fd5a0a
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
Log Message:
-----------
[TTI] Check type legalization of both src and result for fpto{u|s}i.sat. (#147657)
For the cast instructions such ass `fptoui.sat`, `fptosi.sat`, need to
check
both type of the source and the result type can be lowering legally. If
one of them is invalid, return invalid cost.
--
Fixes https://github.com/llvm/llvm-project/issues/142973.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 8b171a08db946ad382a3726d9deb9420d43a59ee
https://github.com/llvm/llvm-project/commit/8b171a08db946ad382a3726d9deb9420d43a59ee
Author: A. Jiang <de34 at live.cn>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/include/future
R libcxx/test/libcxx/thread/futures/futures.task/type.depr.verify.cpp
R libcxx/test/libcxx/thread/futures/futures.task/types.pass.cpp
A libcxx/test/std/thread/futures/futures.task/futures.task.members/type.verify.cpp
Log Message:
-----------
[libc++] Remove the `packaged_task::result_type` extension (#147671)
No escape hatch added, as there doesn't seem anyone critically relying
on this.
Commit: c8fbcb659051288adbf29aa6be43f4980b22ceb2
https://github.com/llvm/llvm-project/commit/c8fbcb659051288adbf29aa6be43f4980b22ceb2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A llvm/test/CodeGen/Hexagon/llvm.sincos.ll
Log Message:
-----------
Hexagon: Add sincos intrinsic test (#147474)
Commit: 28f093517232fd3c1dff6103e7cc944a8e8253bc
https://github.com/llvm/llvm-project/commit/28f093517232fd3c1dff6103e7cc944a8e8253bc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/include/__node_handle
Log Message:
-----------
[libc++][NFC] Remove special handling for __hash_value_type in <__node_handle> (#147271)
We're not instantiating `__hash_value_type` anymore, so we don't need
any special handling of it here.
Commit: 30f8c64b1d14269fef5d11c1be69315426025dfe
https://github.com/llvm/llvm-project/commit/30f8c64b1d14269fef5d11c1be69315426025dfe
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/include/__memory/construct_at.h
Log Message:
-----------
[libc++][NFC] Simplify std::__destroy_at a bit (#147025)
Commit: 9052977c35832776f3154bdb7a4976a253bd3fb6
https://github.com/llvm/llvm-project/commit/9052977c35832776f3154bdb7a4976a253bd3fb6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/include/__type_traits/invoke.h
Log Message:
-----------
[libc++] Implement the public invoke API in terms of the libc++-internal API (#146334)
This adds one additional variable template to the libc++-internal API.
This allows us to implement the public API once instead of twice.
Commit: afcf76bda18c09cffd88cb562768385f97ebf894
https://github.com/llvm/llvm-project/commit/afcf76bda18c09cffd88cb562768385f97ebf894
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/include/__hash_table
M libcxx/include/__tree
M libcxx/include/ext/hash_map
M libcxx/include/ext/hash_set
M libcxx/include/map
M libcxx/include/set
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/test/std/containers/map_allocator_requirement_test_templates.h
M libcxx/test/std/containers/set_allocator_requirement_test_templates.h
Log Message:
-----------
[libc++] Fix insert() calling incorrect constructors (#146231)
This fixes `insert()` calling the wrong `allocator_traits::construct` in
the associative containers by removing the special handling that lead to
the inconsistencty inside `__tree` and `__hash_table`.
Commit: cebfb75c9f02e2ef0d4deadf606299f87ec252cc
https://github.com/llvm/llvm-project/commit/cebfb75c9f02e2ef0d4deadf606299f87ec252cc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.compile.pass.cpp
Log Message:
-----------
[libc++] Temporarily disable failing test for Android CI runners
This test is currently failing in the Android CI, since the compiler
used there is too old. Once the Clang version is updated this XFAIL
should be removed again.
Commit: ed87f0afba24d56b509dfc21298b2700d886912b
https://github.com/llvm/llvm-project/commit/ed87f0afba24d56b509dfc21298b2700d886912b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-crash-splat.ll
Log Message:
-----------
[AMDGPU] Visit all PHIs in each call to optimizeLiveType (#147522)
Make the Visited set a local variable, otherwise we can reject a PHI
(those that do not have a zeroinitializer constant) but mark it as
visited,
and the rest of the function thinks the PHI is ok when it isn't.
This is a bit crude but it's the only fix that consistently worked in my
testing.
Fixes SWDEV-541767
Commit: fcd4a2fe7adfd0a58029583350692f3627d396e4
https://github.com/llvm/llvm-project/commit/fcd4a2fe7adfd0a58029583350692f3627d396e4
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A llvm/include/llvm/CodeGen/PostRAMachineSink.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/bisect-post-ra-machine-sink.mir
M llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/postra-sink-update-dependency.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
M llvm/test/CodeGen/SystemZ/no-postra-sink.mir
M llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
M llvm/test/CodeGen/X86/pr38952.mir
M llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
Log Message:
-----------
[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)
Commit: 60c14ac582bc0843df1790e0410ba41ac66393f5
https://github.com/llvm/llvm-project/commit/60c14ac582bc0843df1790e0410ba41ac66393f5
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vundefined.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/overloaded/vfwmaccbf16.c
Log Message:
-----------
[RISCV] +zve64x is sufficient for the zvfbfmin and zvfbfwma intrinsic tests. NFC.
Commit: da8d7f49fff7dd59ee42682ddf0a386ef5a54d81
https://github.com/llvm/llvm-project/commit/da8d7f49fff7dd59ee42682ddf0a386ef5a54d81
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/fround.ll
Log Message:
-----------
[RISCV] Unify non-vp and vp rounding intrinsic costing (#147872)
Currently we have slightly different costing for the vp and non-vp
version of the rounding intrinsics.
We can delete this code and use the generic BasicTTIImpl code for the vp
intrinsics which falls back to the non-vp versions.
I'm not sure if the zvfh costing is correct, this should probably be
fixed in a follow up patch. At the moment the non-vp cost is more
important since it is what the loop vectorizer will use.
Commit: f573f6b886a013c25509d86d8dfd18d378ecc309
https://github.com/llvm/llvm-project/commit/f573f6b886a013c25509d86d8dfd18d378ecc309
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/CodeGen/Inputs/stack-guard-reassign.ll
Log Message:
-----------
CodeGen: Convert test to opaque pointers (#147886)
Apparently we have this weird CodeGen/Inputs directory which
got missed
Commit: 1ccd7793247139e55aec986e6d86c50d97f9a755
https://github.com/llvm/llvm-project/commit/1ccd7793247139e55aec986e6d86c50d97f9a755
Author: Vikram Hegde <115221833+vikramRH at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/TargetPassRegistry.inc
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
[AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (#130959)
Commit: adcd1bb32a050ced58584882b405f04f42c6009b
https://github.com/llvm/llvm-project/commit/adcd1bb32a050ced58584882b405f04f42c6009b
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
Log Message:
-----------
[Clang] Fix the template argument collection after CWG2369 (#147894)
Since the function template isn't instantiated before constraint
checking, we'll not be able to find the outer template arguments through
function specialization when evaluating the inner constraint that is
nested within a larger constraint expression.
The only practical solution is to get them back through the code
synthesis context, which also allows us to eliminate an overload of
getTemplateInstantiationArgs.
No release note because it's a regression on trunk.
Fixes https://github.com/llvm/llvm-project/issues/147772
Commit: 8055c0f380323fe9e1398dcb88276fd6c92ffa5d
https://github.com/llvm/llvm-project/commit/8055c0f380323fe9e1398dcb88276fd6c92ffa5d
Author: Urvi Rav <94829943+ravurvi20 at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseOpenMP.cpp
M clang/test/OpenMP/Inputs/declare_target_include.h
M clang/test/OpenMP/declare_target_ast_print.cpp
M clang/test/OpenMP/declare_target_messages.cpp
M clang/test/OpenMP/target_ast_print.cpp
Log Message:
-----------
[OpenMP-5.2] deprecate delimited form of 'declare target' (#145854)
According to OpenMP 5.2 (Section 7.8.2), the directive name `declare
target` may be used as a synonym for `begin declare target` only when no
clauses are specified. This clause-less delimited form is now deprecated
and should emit a deprecation warning.
```
// Deprecated usage (should trigger warning):
#pragma omp declare target // deprecated in OpenMP 5.2
void foo1() {
}
#pragma omp end declare target
// Valid usage with clause (should not trigger warning):
#pragma omp declare target enter(foo2)
void foo2() {
}
```
```
// Recommended replacement for deprecated delimited form:
#pragma omp begin declare target
void foo() {
}
#pragma omp end declare target
```
---------
Co-authored-by: urvi-rav <urvi.rav at hpe.com>
Commit: 75656d8c1118ee96f09b88b1c635a5a2d4ca27e6
https://github.com/llvm/llvm-project/commit/75656d8c1118ee96f09b88b1c635a5a2d4ca27e6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr147781.ll
Log Message:
-----------
[X86] combineStore - remove rangedata when converting 64-bit copies to f64 load/store (#147904)
We're changing from i64 to f64 - we can't retain any range metadata
Fixes #147781
Commit: 63f19f1c5c5fbf539d993adeb70a531af3a1241d
https://github.com/llvm/llvm-project/commit/63f19f1c5c5fbf539d993adeb70a531af3a1241d
Author: Wendi <uwendi at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/docs/GettingInvolved.rst
M llvm/docs/QualGroup.rst
M llvm/docs/index.rst
A llvm/docs/qual-wg/slides/202507_llvm_qual_wg.pdf
Log Message:
-----------
[QualGroup] Add slides and documentation updates after July 2025 sync-up (#147196)
This patch updates the Qualification Working Group documentation with
improvements based on our first sync-up meeting in July 2025:
- Added July 2025 meeting slides to `qual-wg/slides/`
- Updated Participation section to include clickable links to Discourse
and Discord
- Clarified contributor recognition to include async contributors
- Added new sections for Meeting Minutes and Presentation Slides
- Linked to the initial RFC and Discord channel in the Contact section
- Added Code of Conduct section
- Minor formatting consistency fixes across the document
This change also updates `GettingInvolved.rst` to add the Qualification
WG with calendar links and Discourse minutes.
These updates aim to improve clarity, traceability, and contributor
onboarding.
---------
Co-authored-by: Wendi Urribarri (Woven by Toyota <wendi.urribarri at woven-planet.global>
Commit: 2e38beebcf3766200e4b0c435a5729eea347b9bf
https://github.com/llvm/llvm-project/commit/2e38beebcf3766200e4b0c435a5729eea347b9bf
Author: Christian Sigg <csigg at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[libc][bazel] Port bb7cea0
Commit: cff4a00d3f7d91c0dd3a93eb81db66be178273d3
https://github.com/llvm/llvm-project/commit/cff4a00d3f7d91c0dd3a93eb81db66be178273d3
Author: macurtis-amd <macurtis at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-runtime.ll
Log Message:
-----------
AMDGPU: Fix runtime unrolling when cascaded GEPs present (#147700)
Cascaded GEP (i.e. GEP of GEP) are not handled when determining if it is
ok to runtime unroll loops.
This change simply uses `getUnderlyingObjects` to look through cascaded
GEPs.
Commit: a709621cd545b061782b03136286227867b452a6
https://github.com/llvm/llvm-project/commit/a709621cd545b061782b03136286227867b452a6
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/Lex/TokenLexer.h
Log Message:
-----------
[Lex] Use SourceLocation::UIntTy for the MacroDefStart, NFC
Avoid using the underlying type, and be more consistent -- MacroDefStart stores
the result of SourceManager::getNextLocalOffset() which returns the
SourceLocation::UIntTy.
Commit: 96e4b50ffea9dc23d43d9ddb679acb3afae3ad14
https://github.com/llvm/llvm-project/commit/96e4b50ffea9dc23d43d9ddb679acb3afae3ad14
Author: Christian Sigg <csigg at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
A utils/bazel/llvm-project-overlay/third-party/siphash/BUILD.bazel
Log Message:
-----------
[llvm][bazel] Port 7f3afab
Commit: f7cdff7bddcb168094b569b15d2bfaef0526c244
https://github.com/llvm/llvm-project/commit/f7cdff7bddcb168094b569b15d2bfaef0526c244
Author: Takuto Ikuta <tikuta at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerIOPosix.cpp
M compiler-rt/lib/fuzzer/FuzzerRandom.h
Log Message:
-----------
[compiler-rt] Include missing headers for libFuzzer (#146828)
This is to fix modules build errors in chromium like
*
https://ci.chromium.org/ui/p/chromium/builders/try/linux-libfuzzer-asan-rel/2292144/overview
*
https://ci.chromium.org/ui/p/chromium/builders/try/linux-libfuzzer-asan-rel/2292444/overview
---------
Co-authored-by: Petr Hosek <phosek at google.com>
Commit: 8fb1699972629e899504e4d62ab79992817eadda
https://github.com/llvm/llvm-project/commit/8fb1699972629e899504e4d62ab79992817eadda
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
Log Message:
-----------
[NFC] Fix typo in comment in LowerMemIntrinsics.h (#147903)
Commit: 0f29e7dadc26a2cd41e0bc55a379049b5efd039c
https://github.com/llvm/llvm-project/commit/0f29e7dadc26a2cd41e0bc55a379049b5efd039c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
Log Message:
-----------
Fix MSVC warning - "'llvm::AMDGPUResourceUsageAnalysis': type name first seen using 'class' now seen using 'struct'". NFC.
Commit: d844384ad90aac733d0429dd25b6640570599caa
https://github.com/llvm/llvm-project/commit/d844384ad90aac733d0429dd25b6640570599caa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
Log Message:
-----------
[AMDGPU] fneg-combines.ll - regenerate test checks
Commit: d7859ed047c99561424dfe235733bb36e2b3c738
https://github.com/llvm/llvm-project/commit/d7859ed047c99561424dfe235733bb36e2b3c738
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
Log Message:
-----------
[AMDGPU][NFC] Remove unused return (#147912)
Commit: 19c2fb2325b034c743004315167e2fa202d8a5e9
https://github.com/llvm/llvm-project/commit/19c2fb2325b034c743004315167e2fa202d8a5e9
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lround.ll
A llvm/test/CodeGen/RISCV/rvv/llround-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/lround-sdnode.ll
Log Message:
-----------
[ISel/RISCV] Custom-lower vector [l]lround (#147713)
Lower it just like the vector [l]lrint, using vfcvt, with the right
rounding mode. Updating costs to account for this custom-lowering is
left to a companion patch.
Commit: 361a659796b2baa4f1479980a46c56777fad7619
https://github.com/llvm/llvm-project/commit/361a659796b2baa4f1479980a46c56777fad7619
Author: Christian Sigg <csigg at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Port ddf9b91
Commit: a446300d1bd0b97b400b2f246f1aa861d62115e6
https://github.com/llvm/llvm-project/commit/a446300d1bd0b97b400b2f246f1aa861d62115e6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
Log Message:
-----------
TargetLowering: Avoid a use of PointerType::getUnqual (#147884)
Use the default globals address space
Commit: 71150f23103a7ac5b9c2ca6d1a3ac082dcd1506a
https://github.com/llvm/llvm-project/commit/71150f23103a7ac5b9c2ca6d1a3ac082dcd1506a
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/test/CodeGen/AArch64/bsl.ll
M llvm/test/CodeGen/AArch64/eor3.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
Log Message:
-----------
[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)
We can use NBSL/BSL2N to implement the following operations via the
corresponding identities:
* EON(a, b) = BSL2N(a, a, b) = BSL2N(b, b, a)
* NAND(a, b) = NBSL(a, b, b) = NBSL(b, a, a)
* NOR(a, b) = NBSL(a, b, a) = NBSL(b, a, b)
* ORN(a, b) = BSL2N(a, b, a)
Most of these operations are currently lowered into at least two
instructions because we don't have dedicated Neon/SVE instructions
for them. With the appropriate pattern of NBSL/BSL2N we can lower
them in a single instruction.
We could also use NBSL to implement an unpredicated NOT(a) =
NBSL(a, a, a), but because of the tied register constraint, this
may not always be profitable.
Commit: 953416ae40b4d81896f5f353dc96725f8b64eb10
https://github.com/llvm/llvm-project/commit/953416ae40b4d81896f5f353dc96725f8b64eb10
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
Log Message:
-----------
ARM: Start moving runtime libcalls into tablegen (#146084)
We still need to manually set the calling conventions of
some libcalls until the lowering is separated out.
Commit: 56a8655f4a9c3992fd401dcf12b956f24f0e2606
https://github.com/llvm/llvm-project/commit/56a8655f4a9c3992fd401dcf12b956f24f0e2606
Author: Tcc100 <Tcc100 at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/docs/WritingAnLLVMPass.rst
A llvm/include/llvm/Target/RegisterTargetPassConfigCallback.h
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/Target/CMakeLists.txt
A llvm/lib/Target/RegisterTargetPassConfigCallback.cpp
A llvm/test/Other/codegen-plugin-loading.ll
A llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.cpp
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.h
A llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
A llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
Log Message:
-----------
[CodeGen] Expose the extensibility of PassConfig to plugins (#139059)
This PR exposes the backend pass config to plugins via a callback.
Plugin authors can register a callback that is being triggered before
the target backend adds their passes to the pipeline. In the callback
they then get access to the `TargetMachine`, the `PassManager`, and the
`TargetPassConfig`. This allows plugins to call
`TargetPassConfig::insertPass`, which is honored in the subsequent
`addPass` of the main backend. We implemented this using the legacy pass
manager since backends still use it as the default.
Commit: cea33304c0ea7fdcd40c7ad6cfeef813d3c9f5e5
https://github.com/llvm/llvm-project/commit/cea33304c0ea7fdcd40c7ad6cfeef813d3c9f5e5
Author: Kenneth Benzie (Benie) <k.benzie83 at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M offload/CMakeLists.txt
A offload/docs/.gitignore
A offload/docs/CMakeLists.txt
A offload/docs/conf.py
A offload/docs/index.rst
M offload/liboffload/API/Common.td
M offload/tools/offload-tblgen/APIGen.cpp
M offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/DocGen.cpp
M offload/tools/offload-tblgen/GenCommon.hpp
M offload/tools/offload-tblgen/Generators.hpp
M offload/tools/offload-tblgen/offload-tblgen.cpp
Log Message:
-----------
[Offload] Add Offload API Sphinx documentation (#147323)
* Add spec generation to offload-tblgen tool
* This patch adds generation of Sphinx compatible reStructuedText
utilizing the C domain to document the Offload API directly from the
spec definition `.td` files.
* Add Sphinx HTML documentation target
* Introduces the `docs-offload-html` target when CMake is configured
with `LLVM_ENABLE_SPHINX=ON` and `SPHINX_OUTPUT_HTML=ON`. Utilized
`offload-tblgen -gen-spen` to generate Offload API specification docs.
Commit: d3ea7f29ec50937242ae12c8cd5ce1c3f0667204
https://github.com/llvm/llvm-project/commit/d3ea7f29ec50937242ae12c8cd5ce1c3f0667204
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
Log Message:
-----------
[AMDGPU] mad-combine.ll - regenerate test checks and remove duplicate safe/unsafe RUN line
Commit: 628c7350108dbf207e22489ab2cd0324277afb2b
https://github.com/llvm/llvm-project/commit/628c7350108dbf207e22489ab2cd0324277afb2b
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
A mlir/test/Dialect/OpenMP/cli-canonical_loop-invalid.mlir
A mlir/test/Dialect/OpenMP/cli-canonical_loop.mlir
A mlir/test/Dialect/OpenMP/cli-unroll-heuristic.mlir
Log Message:
-----------
[MLIR][OpenMP] Add canonical loop operations (#147061)
Add the supporting OpenMP Dialect operations, types, and interfaces for
modelling
MLIR Operations:
* omp.newcli
* omp.canonical_loop
MLIR Types:
* !omp.cli
MLIR Interfaces:
* LoopTransformationInterface
As a first loop transformations to be able to use these new operation in
follow-up PRs (#144785)
* omp.unroll_heuristic
Commit: 343e3c6bb827fb2c969f7399bef448bd58e1e43f
https://github.com/llvm/llvm-project/commit/343e3c6bb827fb2c969f7399bef448bd58e1e43f
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
M llvm/test/CodeGen/AArch64/sve-merging-unary.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Make bf16 fabs/fneg isel consistent with fp16. (#147543)
Whilst at first glance there appears to be no native bfloat instructions
to modify the sign bit, this is only the case when FEAT_AFP is
implemented. Without this feature vector FABS/FNEG does not care about
the floating point format beyond needing to know the position of the
sign bit. From what I can see LLVM has no support for FEAT_AFP in terms
of feature detection or ACLE builtins and so I believe the compiler can
work under the assumption the feature is not enabled. In fact, if
FEAT_AFP is enabled then I believe the current isel is likely broken for
half, float and double anyway.
Commit: abb878438ae853fc068aa16e862b30c8d9ae04e1
https://github.com/llvm/llvm-project/commit/abb878438ae853fc068aa16e862b30c8d9ae04e1
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[Offload] Allow querying the size of globals (#147698)
The `GlobalTy` helper has been extended to make both the Size and Ptr be
optional. Now `getGlobalMetadataFromDevice`/`Image` is able to write the
size of the global to the struct, instead of just verifying it.
Commit: 2052d7bf9ad5f7e9fd4d2dc5bee5e6647bc58f77
https://github.com/llvm/llvm-project/commit/2052d7bf9ad5f7e9fd4d2dc5bee5e6647bc58f77
Author: David Green <david.green at arm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/fcmp.ll
A llvm/test/Analysis/CostModel/AArch64/sve-fcmp.ll
Log Message:
-----------
[AArch64] Expand fcmp cost model tests. NFC
Commit: 59a99c6f2c80af9186bedbf9a5ab997453035f6d
https://github.com/llvm/llvm-project/commit/59a99c6f2c80af9186bedbf9a5ab997453035f6d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
Log Message:
-----------
[SLP] Drop unnecessary '' from around -passes=... arg lists to appease update_test_checks.py when run on DOS. NFC.
Commit: 75f81ded8f9d558c92d92641bce3cf7ef8e13e9c
https://github.com/llvm/llvm-project/commit/75f81ded8f9d558c92d92641bce3cf7ef8e13e9c
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/include/flang-rt/runtime/internal-unit.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/non-tbp-dio.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/edit-input.h
M flang-rt/lib/runtime/edit-output.h
M flang-rt/lib/runtime/unit.h
M flang/include/flang/Decimal/decimal.h
Log Message:
-----------
[Flang][FlangRT][Runtime] Add RT_OFFLOAD_API_GROUP_BEGIN to missing symbols on AMDGPU (#147612)
After the recent move to work queues, in certain cases when linking in
the fortran runtime built for offload on AMDGPU as required in certain
cases, we'll get missing symbols when linking. This PR tries to address
this issue by encompassing more of the library in
RT_OFFLOAD_API_GROUP_BEGIN, which has the affect of compiling these
functions for AMDGPU, resolving the missing symbols.
This PR should address the following issue:
https://github.com/llvm/llvm-project/issues/145888
Commit: d0a038296ea7037454a0b1414aa38f56fbcdc759
https://github.com/llvm/llvm-project/commit/d0a038296ea7037454a0b1414aa38f56fbcdc759
Author: Shashi Shankar <shashishankar1687 at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseDeclCXX.cpp
A clang/test/SemaCXX/invalid-base-inheritance.cpp
Log Message:
-----------
[Clang] Ignore invalid base classes (#147213)
When building a RecordDecl, ignore invalid base classes. This solves crashes later on and leads to better recovery.
Fixes #147186
Commit: 1d8b51667ab3b8be039d616341470613325971f3
https://github.com/llvm/llvm-project/commit/1d8b51667ab3b8be039d616341470613325971f3
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI] Don't drop VP intrinsic args when delegating to non-vp equivalent (#147677)
Previously we only carried the type arguments which caused value-based
costs to be inadvertantly changed into type-based costs.
I'm just using vp.is.fpclass as an example intrinsic for now since the
type based cost seems to differ from the value based cost, and most
normal intrinsics e.g. min/max have the same value + type based cost.
We still need to handle the cost properly for is.fpclass in a second
patch.
This is needed for an upcoming patch to handle the cost of
llvm.experimental.vp.reverse which suffers from the same problem.
Commit: 0481d2a1614d011db022abb896eace626acd37ab
https://github.com/llvm/llvm-project/commit/0481d2a1614d011db022abb896eace626acd37ab
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/docs/WritingAnLLVMPass.rst
R llvm/include/llvm/Target/RegisterTargetPassConfigCallback.h
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/Target/CMakeLists.txt
R llvm/lib/Target/RegisterTargetPassConfigCallback.cpp
R llvm/test/Other/codegen-plugin-loading.ll
R llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
R llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
R llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.cpp
R llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.h
R llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
R llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
Log Message:
-----------
Revert "[CodeGen] Expose the extensibility of PassConfig to plugins" (#147947)
Reverts llvm/llvm-project#139059
This broke
https://lab.llvm.org/buildbot/#/builders/10/builds/9125/steps/8/logs/stdio
The bot does a SHARED_LIBS=ON build. I can reproduce locally with the
CMake cache file in offload/cmake/caches/AMDGPUBot.cmake as the build
config.
Commit: 39ea9b71d90f95a5d91d72004b37779d1ed6d72e
https://github.com/llvm/llvm-project/commit/39ea9b71d90f95a5d91d72004b37779d1ed6d72e
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/CXX/drs/cwg26xx.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Correctly handle taking the address of an explicit object member function template (#147046)
When implementing #93430, I failed to consider some cases involving
function templates.
```
struct A {
template <typename T>
void a(this T self);
};
(&A::a<A>)(A{});
```
This fixes that
Commit: 78e84e5779f4ed1de9bc29b6aae8609de2b9f8c4
https://github.com/llvm/llvm-project/commit/78e84e5779f4ed1de9bc29b6aae8609de2b9f8c4
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseTentative.cpp
M clang/test/Parser/cxx0x-lambda-expressions.cpp
Log Message:
-----------
[Clang] A lone `[` does not an attribute make (#147306)
In some tentative parses, we would always consider `[` as the start of
an attribute - only `[[` should be.
Fixes #63880
Commit: 7a089bc4c00fe35c8f07b7c420be6535ad331161
https://github.com/llvm/llvm-project/commit/7a089bc4c00fe35c8f07b7c420be6535ad331161
Author: Mészáros Gergely <gergely.meszaros at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
R libclc/.gitignore
Log Message:
-----------
[libclc] Delete .gitignore (#147939)
The file is listing build artifacts to ignore, but LLVM has long had the
policy that in-tree builds are not supported, so the ignore rules
shouldn't serve their original purpose anymore.
The rules however are annoying because although they probably intended
only to ignore top-level build artifacts, they lack the leading `/` so
they match any file with the ignored name anywhere under `libclc/`.
Commit: 7bbb65c8fee605d7c875e495d7ce14f7700ce554
https://github.com/llvm/llvm-project/commit/7bbb65c8fee605d7c875e495d7ce14f7700ce554
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Make getLibcallImplName static. NFC. (#147919)
Commit: 130e6121f5bb1a54c591133d050aa1311ce16d7f
https://github.com/llvm/llvm-project/commit/130e6121f5bb1a54c591133d050aa1311ce16d7f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Move Pointer::StorageKind above the union (#147942)
This is easier to read in debuggers and more common.
Commit: cd474bb8015cfbd9dd5e5594978eccd9bd787e60
https://github.com/llvm/llvm-project/commit/cd474bb8015cfbd9dd5e5594978eccd9bd787e60
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
Log Message:
-----------
[DA] Add test where access size differs from stride size (NFC) (#147715)
Add a test case that is mentioned in #144088 but not added yet.
Commit: 896575eb74bb59466b50fb51934596d72947ebd5
https://github.com/llvm/llvm-project/commit/896575eb74bb59466b50fb51934596d72947ebd5
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/test/lit.cfg.py
Log Message:
-----------
[clang] Prefer clang_setup over use_clang
This patch switches over uses of use_clang to clang_setup to fix a
potential race condition that has been impacting CI.
This is split from the refactoring to ensure I'm not missing anything
major here on the clang-tools-extra side.
This should fix #145703.
Reviewers: AaronBallman, HighCommander4, HerrCai0907, petrhosek, Keenuts
Reviewed By: petrhosek
Pull Request: https://github.com/llvm/llvm-project/pull/147437
Commit: 7daa1defd2426629f0642c5428a5c8de777d0d6b
https://github.com/llvm/llvm-project/commit/7daa1defd2426629f0642c5428a5c8de777d0d6b
Author: Tcc100 <Tcc100 at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/docs/WritingAnLLVMPass.rst
A llvm/include/llvm/Target/RegisterTargetPassConfigCallback.h
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/Target/CMakeLists.txt
A llvm/lib/Target/RegisterTargetPassConfigCallback.cpp
A llvm/test/Other/codegen-plugin-loading.ll
A llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.cpp
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.h
A llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
A llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
Log Message:
-----------
Reland "[CodeGen] Expose the extensibility of PassConfig to plugins (#139059)"
Add missing dependencies to unittest target
Original patch broke BUILD_SHARED bots and required revert #147947
Commit: 2877d8015587f566e64111934452845eef7b6a4a
https://github.com/llvm/llvm-project/commit/2877d8015587f566e64111934452845eef7b6a4a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M .ci/generate_test_report_github.py
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
Log Message:
-----------
[CI] Remove Remaining Buildkite References in generate_test_report_lib
This patch removes the buildkite_info object from
generate_test_report_lib as we no longer support buildkite so it is dead
code now. Eventually we should set up equivalent functionality on the
Github side for downloading the logs from a convenient link, but for now
clean up the code.
Reviewers: cmtice, DavidSpickett, lnihlen
Reviewed By: DavidSpickett
Pull Request: https://github.com/llvm/llvm-project/pull/147784
Commit: 1469c339f296b2aed037b292ffc37d19c37fbabe
https://github.com/llvm/llvm-project/commit/1469c339f296b2aed037b292ffc37d19c37fbabe
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M .ci/generate_test_report_github.py
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
Log Message:
-----------
[CI] Remove Style from generate_test_report_lib
This is another Buildkite relic that we can get rid of now to simplify
things a bit.
Reviewers: cmtice, DavidSpickett, lnihlen
Reviewed By: DavidSpickett
Pull Request: https://github.com/llvm/llvm-project/pull/147791
Commit: d14aa0cd46c652e417b5a777fe5a05c2a4df8364
https://github.com/llvm/llvm-project/commit/d14aa0cd46c652e417b5a777fe5a05c2a4df8364
Author: csstormq <swust_xiaoqiangxu at 163.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InlineSpiller.cpp
Log Message:
-----------
[InlineSpiller] Drop unused elements in Virt2SiblingsMap. NFC (#147866)
Commit: 498aeada7b8e079f5bc59bf4e9bb0c8630ee6d32
https://github.com/llvm/llvm-project/commit/498aeada7b8e079f5bc59bf4e9bb0c8630ee6d32
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
Log Message:
-----------
[CI] Generate Test Report With No Test Results
This patch makes it so that generate_test_report_github.py generates a
test report even when we don't get any test results. This otherwise
created a pretty confusing user experience on the Github side if the
build failed before any tests ran or in cases like running check-libc
where none of the tests are run through lit.
Reviewers: lnihlen, cmtice
Pull Request: https://github.com/llvm/llvm-project/pull/147871
Commit: d801b54bcd971f9415da2cce397d12d2129ea1b0
https://github.com/llvm/llvm-project/commit/d801b54bcd971f9415da2cce397d12d2129ea1b0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/issue147935-half-convert-libcall-abi.ll
Log Message:
-----------
ARM: Fix calling convention for gnu half conversion functions (#147951)
I'm surprised at how bad the test coverage is here. There is some
overlap with existing tests, but they aren't comprehensive and do
not cover all the ABIs, or all the different types.
Fixes #147935
Commit: 13ead00049e2faea57dac2d9a43f2aef5bbe3370
https://github.com/llvm/llvm-project/commit/13ead00049e2faea57dac2d9a43f2aef5bbe3370
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
Log Message:
-----------
[Flang] Fix PowerPC build failure due to the deprecation of ArrayRef(std::nullopt_t) {}. (#147816)
Our local Flang build on PowerPC was broken as
```
llvm/flang/../mlir/include/mlir/IR/ValueRange.h:401:20: error: 'ArrayRef' is deprecated: Use {} or ArrayRef<T>() instead [-Werror,-Wdeprecated-declarations]
401 | : ValueRange(ArrayRef<Value>(std::forward<Arg>(arg))) {}
| ^
llvm/flang/lib/Optimizer/CodeGen/CodeGen.cpp:2243:53: note: in instantiation of function template specialization 'mlir::ValueRange::ValueRange<const std::nullopt_t &, void>' requested here
2243 | /*cstInteriorIndices=*/std::nullopt, fieldIndices,
| ^
llvm/include/llvm/ADT/ArrayRef.h:70:18: note: 'ArrayRef' has been explicitly marked deprecated here
70 | /*implicit*/ LLVM_DEPRECATED("Use {} or ArrayRef<T>() instead", "{}")
| ^
llvm/include/llvm/Support/Compiler.h:244:50: note: expanded from macro 'LLVM_DEPRECATED'
244 | #define LLVM_DEPRECATED(MSG, FIX) __attribute__((deprecated(MSG, FIX)))
| ^
1 error generated.
```
This patch is to fix it.
Commit: 466357ab51609bceaf40daa04e2a4a9fe409939e
https://github.com/llvm/llvm-project/commit/466357ab51609bceaf40daa04e2a4a9fe409939e
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Symbol.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/kernel/olGetKernel.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
Log Message:
-----------
[Offload] Change `ol_kernel_handle_t` -> `ol_symbol_handle_t` (#147943)
In the future, we want `ol_symbol_handle_t` to represent both kernels
and global variables The first step in this process is a rename and
promotion to a "typed handle".
Commit: 18627e995c361124087480c199169e2ce000ad49
https://github.com/llvm/llvm-project/commit/18627e995c361124087480c199169e2ce000ad49
Author: Alex Bradbury <asb at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
Log Message:
-----------
Revert "[SLP] Emit reduction instead of 2 extracts + scalar op, when vectorizing operands (#147583)"
This reverts commit ac4a38e9bd573a173432b89cbef7cce7a48e7907.
This breaks the RVV builders
(MicroBenchmarks/ImageProcessing/Blur/blur.test and
MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test from llvm-test-suite)
and reportedly SPEC Accel2023
<https://github.com/llvm/llvm-project/pull/147583#issuecomment-3057183138>.
Commit: 5954e9c1a56fc313394b9dcc21f20c20c058f83d
https://github.com/llvm/llvm-project/commit/5954e9c1a56fc313394b9dcc21f20c20c058f83d
Author: Niklas Degener <niklas.degener at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/declare_func.mlir
Log Message:
-----------
[MLIR][Target/Cpp] Fix variable naming conflict for function declarations (#147927)
This is a fix for https://github.com/llvm/llvm-project/pull/136102. It
missed scoping for `DeclareFuncOps`.
In scenarios with multiple function declarations, the `valueMapper`
wasn't updated and later uses of values in other functions still used
the assigned names in prior functions.
This is visible in the reproducer here
https://github.com/iree-org/iree/issues/21303: Although the counter for
variable enumeration was reset, as it is visible for the local vars, the
function arguments were mapped to old names. Due to this mapping, the
counter was never increased, and the local variables conflicted with the
arguments.
This fix adds proper scoping for declarations and a test-case to cover
the scenario with multiple `DeclareFuncOps`.
Commit: 763db3841dba8f88f95e63e718dffea64b32044a
https://github.com/llvm/llvm-project/commit/763db3841dba8f88f95e63e718dffea64b32044a
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[TTI] Handle experimental.vp.reverse in BasicTTIImpl (#147868)
A experimental_vp_reverse isn't exactly functionally the same as
vector_reverse, so previously it wasn't getting picked up by the generic
VP costing code that reuses the non-VP equivalents.
But for costing purposes it's good enough so we can reuse it.
The type-based cost for vector_reverse is still incorrect and should be
fixed in another patch.
Commit: 1409e1a5e5f878b55441c72cb1ef384405d953c7
https://github.com/llvm/llvm-project/commit/1409e1a5e5f878b55441c72cb1ef384405d953c7
Author: Justin Cai <justin.cai at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
A llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
A llvm/test/Transforms/InferAddressSpaces/SPIRV/generic-cast-explicit.ll
Log Message:
-----------
[SPIRV] Add logic for OpGenericCastToPtrExplicit rewriting (#146596)
This PR adds overrides in `SPIRVTTIImpl` for
`collectFlatAddressOperands` and `rewriteIntrinsicWithAddressSpace` to
enable `InferAddressSpacesPass` to rewrite the
`llvm.spv.generic.cast.to.ptr.explicit` intrinsic (corresponding to
`OpGenericCastToPtrExplicit`) when the address space of the argument can
be inferred. When the destination address space of the cast matches the
inferred address space of the argument, the call is replaced with that
argument. When they do not match, the cast is replaced with a constant
null pointer.
Commit: 154de3e1bdd83ccaf7be51bb876db4593a064607
https://github.com/llvm/llvm-project/commit/154de3e1bdd83ccaf7be51bb876db4593a064607
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang/test/Driver/frontend-forwarding.f90
Log Message:
-----------
[flang] Don't check the '-mframe-pointer' flag (#147837)
The `-mframe-pointer` flag is not explicitly set in the original `flang`
invocation and so the value passed to `flang -fc1` can vary depending on
the host machine, so don't verify it in the output.
`-mframe-pointer` forwarding is already verified by
`flang/test/Driver/frame-pointer-forwarding.f90`.
Commit: f56b6ecf088ef46fe8008f294fff456805b33a07
https://github.com/llvm/llvm-project/commit/f56b6ecf088ef46fe8008f294fff456805b33a07
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM] Fix GPU build of libcxx/compiler-rt libraries
Summary:
Recent changes altered the name without updating this, add it in and
also tell the builtins build that C++ compilers work because it seems to
require that now.
Commit: 362d5ffa8d2f521fc2912665270eba15f3c1bf56
https://github.com/llvm/llvm-project/commit/362d5ffa8d2f521fc2912665270eba15f3c1bf56
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/TargetInstrInfo.cpp
A llvm/test/CodeGen/X86/coalesce-commutative-implicit-def.mir
Log Message:
-----------
[CodeGen] commuteInstruction should update implicit-def (#131361)
When the RegisterCoalescer adds an implicit-def when coalescing
a SUBREG_TO_REG (#123632), this causes issues when removing other
COPY nodes by commuting the instruction because it doesn't take
the implicit-def into consideration. This PR fixes that.
Commit: a2c0ac06ff69f37a42845217b9a8ae1cdbacd674
https://github.com/llvm/llvm-project/commit/a2c0ac06ff69f37a42845217b9a8ae1cdbacd674
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[llvm-exegesis] Fix musl build (#147954)
We should not include both linux/prctl.h and sys/prctl.h. This works
with glibc because the latter includes the former, but breaks with musl
because the latter redeclares the contents of the former, resulting in:
```
/usr/local/aarch64-linux-musl/include/sys/prctl.h:88:8: error:
redefinition of 'struct prctl_mm_map'
88 | struct prctl_mm_map {
| ^~~~~~~~~~~~
In file included from
/checkout/src/llvm-project/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp:13:
/usr/local/aarch64-linux-musl/include/linux/prctl.h:134:8: note:
previous definition of 'struct prctl_mm_map'
134 | struct prctl_mm_map {
| ^~~~~~~~~~~~
```
Fixes https://github.com/llvm/llvm-project/issues/139443.
Commit: 0227aef688f39c27ba50af2829a9805d62e74e32
https://github.com/llvm/llvm-project/commit/0227aef688f39c27ba50af2829a9805d62e74e32
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Add canonicalization for extract_strided_slice(create_mask) (#146745)
extract_strided_slice(create_mask) can be folded into create_mask by
simply subtracting the offsets from the bounds.
Commit: c8c0e90233787dba9f069d8f559dffeb31f8e357
https://github.com/llvm/llvm-project/commit/c8c0e90233787dba9f069d8f559dffeb31f8e357
Author: Asher Dobrescu <asher.dobrescu at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
A bolt/test/AArch64/cfi-state-list.test
Log Message:
-----------
[BOLT] Ensure remember and restore CFIs are in the same list (#144348)
In `addCFIInstruction`, we split the CFI information
between `CFIInstrMapType CIEFrameInstructions` and `CFIInstrMapType
FrameInstructions`. In some cases we can end up with the remember CFI in
`CIEFrameInstructions` and the restore CFI in `FrameInstructions`. This
patch adds a check to make sure we do not split remember and restore
states and fixes https://github.com/llvm/llvm-project/issues/133501.
Commit: 9b0ae6ccd6bc9c4fe05064b6e1bb192f189e8f3b
https://github.com/llvm/llvm-project/commit/9b0ae6ccd6bc9c4fe05064b6e1bb192f189e8f3b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/future-directive-spellings.f90
Log Message:
-----------
[flang][OpenMP] Issue a warning when parsing future directive spelling (#147765)
OpenMP 6.0 introduced alternative spelling for some directives, with the
previous spellings still allowed.
Warn the user when a new spelling is encountered with OpenMP version set
to an older value.
Commit: 86320e0a8f2d88877775ca685ae3d70ac954faf3
https://github.com/llvm/llvm-project/commit/86320e0a8f2d88877775ca685ae3d70ac954faf3
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[mlir] Fix warnings
This patch fixes:
mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp:3047:16: error: unused
variable 'ctx' [-Werror,-Wunused-variable]
mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp:3171:16: error: unused
variable 'ctx' [-Werror,-Wunused-variable]
Commit: f96492221d2bf272053bca6660fc4bdd86592478
https://github.com/llvm/llvm-project/commit/f96492221d2bf272053bca6660fc4bdd86592478
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/test/Dialect/AMDGPU/maskedload-to-load.mlir
Log Message:
-----------
[mlir][AMDGPU] Add better load/store lowering for full mask (#146748)
This patch adds a better maskedload/maskedstore lowering on amdgpu
backend for loads which are either fully masked or fully unmasked. For
these cases, we can either generate a oob buffer load with no if
condition, or we can generate a normal load with a if condition (if no
fat_raw_buffer space).
Commit: 4453792e8dbd861a5857b3bbe56fa73d2fdbbe39
https://github.com/llvm/llvm-project/commit/4453792e8dbd861a5857b3bbe56fa73d2fdbbe39
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/Plugin/BUILD.gn
Log Message:
-----------
[gn] port 7daa1defd2426 (CGPluginTest)
The test isn't passing for me locally yet, so it's not yet part
of the build.
Commit: 9ef0a886e621eb4202f82054983c383fa82aff9a
https://github.com/llvm/llvm-project/commit/9ef0a886e621eb4202f82054983c383fa82aff9a
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx20-using-enum.cpp
Log Message:
-----------
[Clang] fixed false positive redeclaration error for using enum in nested scopes (#147711)
Fixes #147495
---
This patch addresses the issue of false-positive redeclaration errors
that occur for `using enum` declarations in nested class scopes
```cpp
struct S {
enum class E { A };
using enum E;
struct S1 {
using enum E; // no error
};
};
```
Commit: 4e2efa55c6e5ae5a6b56a2381efebe62af6b082b
https://github.com/llvm/llvm-project/commit/4e2efa55c6e5ae5a6b56a2381efebe62af6b082b
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/Compiler.h
M llvm/lib/CodeGen/AsmPrinter/DIEHash.h
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.h
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
M llvm/lib/CodeGen/RegAllocScore.h
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.h
Log Message:
-----------
[llvm] export private symbols needed by unittests (#145767)
## Purpose
Export a small number of private LLVM symbols so that unit tests can
still build/run when LLVM is built as a Windows DLL or a shared library
with default hidden symbol visibility.
## Background
The effort to build LLVM as a WIndows DLL is tracked in #109483.
Additional context is provided in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307).
Some LLVM unit tests use internal/private symbols that are not part of
LLVM's public interface. When building LLVM as a DLL or shared library
with default hidden symbol visibility, the symbols are not available
when the unit test links against the DLL or shared library.
This problem can be solved in one of two ways:
1. Export the private symbols from the DLL.
2. Link the unit tests against the intermediate static libraries instead
of the final LLVM DLL.
This PR applies option 1. Based on the discussion of option 2 in
#145448, this option is preferable.
## Overview
* Adds a new `LLVM_ABI_FOR_TEST` export macro, which is currently just
an alias for `LLVM_ABI`.
* Annotates the sub-set of symbols under `llvm/lib` that are required to
get unit tests building using the new macro.
Commit: fa74df38ade4053534731ea1e00ffe900e9e9492
https://github.com/llvm/llvm-project/commit/fa74df38ade4053534731ea1e00ffe900e9e9492
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/Config/abi-breaking.h.cmake
Log Message:
-----------
Revert [llvm] annotate ABIBreakingChecks symbols for DLL export (#147965)
This patch reverts commit 24475409e4eac6fd60e2111424a4bef3452c8f21. The
change introduced a cyclic dependency:
```
fatal error: cyclic dependency in module 'LLVM_Utils': LLVM_Utils -> LLVM_Config_ABI_Breaking -> LLVM_Utils
```
See failure log at
https://green.lab.llvm.org/job/llvm.org/job/clang-stage2-Rthinlto/976/console.
Commit: 2f39a34673a21e3f04f3edc08bdfd1b544da0910
https://github.com/llvm/llvm-project/commit/2f39a34673a21e3f04f3edc08bdfd1b544da0910
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h
Log Message:
-----------
[ObjCARC] Check for declared intrinsics using ID instead of name (NFC)
Commit: 9bd4ab7f517a6c1feb57209b9df8d66e3c3ddf32
https://github.com/llvm/llvm-project/commit/9bd4ab7f517a6c1feb57209b9df8d66e3c3ddf32
Author: beef <ent3rm4n at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
Log Message:
-----------
[clang] fix `--unwindlib` option doc (#143497)
the values it takes should be `libunwind` and not `unwindlib`.
Commit: 8a6313341748465e80037debb1fe61708116fcd6
https://github.com/llvm/llvm-project/commit/8a6313341748465e80037debb1fe61708116fcd6
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Utils/MetaRenamer.cpp
Log Message:
-----------
[MetaRenamer] Use isIntrinsic() helper (NFC)
Commit: 09fb20ec7d81c1b370dd3d259250c20e505ebeed
https://github.com/llvm/llvm-project/commit/09fb20ec7d81c1b370dd3d259250c20e505ebeed
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M lldb/source/ValueObject/DILEval.cpp
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/Makefile
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/TestFrameVarDILNoDebugInfo.py
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/main.cpp
Log Message:
-----------
[LLDB] Check comp_unit before accessing it in DIL (#147955)
Check `symbol_context.comp_unit` before accessing it to avoid `nullptr`
dereferencing.
Commit: 77d04ffd6d4301157abfd8fae7954011d6bb6215
https://github.com/llvm/llvm-project/commit/77d04ffd6d4301157abfd8fae7954011d6bb6215
Author: Peiming Liu <geticliu at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[mlir][OpenMP] fix compilation warning (#147987)
Commit: 0354867cdea411dc74847f1e9c5d983aea5d7ea8
https://github.com/llvm/llvm-project/commit/0354867cdea411dc74847f1e9c5d983aea5d7ea8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Remove small heap allocations in SearchableTableEmitter (#147845)
Change `GenericEnum` to not heap allocate its entries. Instead stash
them directly in the `Entries` vector. Change `EntryMap` to hold an
index as opposed to a pointer to the entry (the original reason why they
were unique_ptr).
Commit: 54ec5217a07ed73877779c5ee3c744cc1aa2534c
https://github.com/llvm/llvm-project/commit/54ec5217a07ed73877779c5ee3c744cc1aa2534c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGen/complex-builtins.cpp
Log Message:
-----------
[CIR] Upstream __builtin_cimag for ComplexType (#147808)
Upstream __builtin_cimag support for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 8e7461e29a7c9f1721758b30eb99b0ccab45a7cd
https://github.com/llvm/llvm-project/commit/8e7461e29a7c9f1721758b30eb99b0ccab45a7cd
Author: Drew Kersnar <dkersnar at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
A llvm/test/Transforms/LoadStoreVectorizer/batch-aa-compile-time.ll
Log Message:
-----------
[LoadStoreVectorizer] Batch alias analysis results to improve compile time (#147555)
This should be generally good for a lot of LSV cases, but the attached
test demonstrates a specific compile time issue that appears in the
event where the `CaptureTracking` default max uses is raised.
Without using batching alias analysis, this test takes 6 seconds to
compile in a release build. With, less than a second. This is because
the mechanism that proves `NoAlias` in this case is very expensive
(`CaptureTracking.cpp`), and caching the result leads to 2 calls to that
mechanism instead of ~300,000 (run with -stats to see the difference)
This test only demonstrates the compile time issue if
`capture-tracking-max-uses-to-explore` is set to at least 1024, because
with the default value of 100, the `CaptureTracking` analysis is not
run, `NoAlias` is not proven, and the vectorizer gives up early.
Commit: 81614e5b903bc37e5f150a1fad7e362334e7cd43
https://github.com/llvm/llvm-project/commit/81614e5b903bc37e5f150a1fad7e362334e7cd43
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/sincos_fuzz.cpp
Log Message:
-----------
[libc] sincos fuzz test (#147855)
Created fuzz test for sincos
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: f60cc63e8c74763291585f6c5ecd9a9b0dfeecb9
https://github.com/llvm/llvm-project/commit/f60cc63e8c74763291585f6c5ecd9a9b0dfeecb9
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][rocdl] Add `s.sleep` intrinsic (#147936)
Commit: a9d8843d71d647afad8c1908406d210a15e5feb7
https://github.com/llvm/llvm-project/commit/a9d8843d71d647afad8c1908406d210a15e5feb7
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/acos_fuzz.cpp
A libc/fuzzing/math/atan_fuzz.cpp
Log Message:
-----------
[libc] Fuzz tests for acos and atan (#147843)
created fuzz tests for acos and atan
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 425ed22b2e58644d6e7f339e53ef1aeb71e0d308
https://github.com/llvm/llvm-project/commit/425ed22b2e58644d6e7f339e53ef1aeb71e0d308
Author: sribee8 <sriya.pratipati at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/asin_fuzz.cpp
Log Message:
-----------
[libc] asin fuzz testing (#147786)
Added fuzz test for asin
---------
Co-authored-by: Sriya Pratipati <sriyap at google.com>
Commit: 0f3bdc3e4351e948350c8c5966f62ba5e3d1965e
https://github.com/llvm/llvm-project/commit/0f3bdc3e4351e948350c8c5966f62ba5e3d1965e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
Log Message:
-----------
[TableGen] Remove the name from the union in OpData in PseudoLoweringEmitter and CompressInstEmitter (#147896)
We can use an anonymous union here, the name doesn't provide any
additional information.
Commit: 9a0e03f430dec4634086fe8315c4c3b730bd7c66
https://github.com/llvm/llvm-project/commit/9a0e03f430dec4634086fe8315c4c3b730bd7c66
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Update implicit data transfer for device component (#147882)
Update the detection of implicit data transfer when a device resident
allocatable derived-type component is involved and remove the TODOs.
Commit: ccd9e1e6beae0f785e3e9db97c64d9ee4f1d4304
https://github.com/llvm/llvm-project/commit/ccd9e1e6beae0f785e3e9db97c64d9ee4f1d4304
Author: Justin Cai <justin.cai at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A llvm/test/Transforms/InferAddressSpaces/SPIRV/lit.local.cfg
Log Message:
-----------
[SPIRV] Add lit config for InferAddressSpaces/SPIRV (#147977)
Fixes failures for #146596
Commit: 34f49aa2e916ba0cf3165ecda86219a6774292ea
https://github.com/llvm/llvm-project/commit/34f49aa2e916ba0cf3165ecda86219a6774292ea
Author: Hervé Poussineau <hpoussin at reactos.org>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_unwind_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
Log Message:
-----------
[compiler-rt][sanitizer] Add Windows MIPS32 support (#145110)
As LLVM supports mipsel-windows-gnu and mipsel-windows-msvc triples,
also support this configuration in compiler-rt
Commit: eaac713591c107f6cddb05017db5b7800b3d1ec1
https://github.com/llvm/llvm-project/commit/eaac713591c107f6cddb05017db5b7800b3d1ec1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
Log Message:
-----------
[gn build] Port 76b1dcfac5da
Commit: 8d3f497eb834a84b954241b8c4293f8387e75576
https://github.com/llvm/llvm-project/commit/8d3f497eb834a84b954241b8c4293f8387e75576
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
A llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
A llvm/test/Transforms/StructurizeCFG/hoist-zerocost.ll
Log Message:
-----------
[StructurizeCFG] Hoist and simplify zero-cost incoming else phi values (#139605)
The order of if and else blocks can introduce unnecessary VGPR copies.
Consider the case of an if-else block where the incoming phi from the
'Else block' only contains zero-cost instructions, and the 'Then' block
modifies some value. There would be no interference when coalescing
because only one value is live at any point before structurization.
However, in the structurized CFG, the Then value is live at 'Else' block
due to the path if→flow→else, leading to additional VGPR copies.
This patch addresses the issue by:
- Identifying PHI nodes with zero-cost incoming values from the Else
block and hoisting those values to the nearest common dominator of the
Then and Else blocks.
- Updating Flow PHI nodes by replacing poison entries (on the if→flow
edge) with the correct hoisted values.
Commit: 4b6e54a8cf625811f6d817cca284ad87960c2161
https://github.com/llvm/llvm-project/commit/4b6e54a8cf625811f6d817cca284ad87960c2161
Author: John Harrison <harjohn at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/JSONUtilsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
Log Message:
-----------
[lldb-dap] Migrate variables request protocol types. (#147611)
This adds new protocol types for the 'variables' request.
While implementing this, I removed the '$__lldb_extension' field we
returned on the 'variables' request, since I think all the data can be
retrieved from other DAP requests.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: ef24b4b3261fa8f391710cfd73691e97233faaa2
https://github.com/llvm/llvm-project/commit/ef24b4b3261fa8f391710cfd73691e97233faaa2
Author: Grigory Pastukhov <99913765+grigorypas at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
A llvm/test/Transforms/Coroutines/coro-split-dbg-nested-struct.ll
Log Message:
-----------
[Coroutines] Fix debug info scoping for nested structs in coroutine frames (#147622)
When generating debug info for coroutine frames, nested struct types
were incorrectly inheriting the top-level function scope instead of
having their parent struct as scope. This caused assertion failures in
DebugInfoMetadata.h during member list replacement for complex nested
struct hierarchies.
Fix by passing the parent DIStruct as scope when recursively calling
solveDIType for nested struct fields, ensuring proper debug info scoping
hierarchy.
Add regression test that validates proper nested struct scoping
hierarchy and
prevents future regressions.
Commit: d93cc7aabfaefb0cf98cbba1b466d5b1adadb93d
https://github.com/llvm/llvm-project/commit/d93cc7aabfaefb0cf98cbba1b466d5b1adadb93d
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libc/src/__support/CMakeLists.txt
A libc/src/__support/wcs_to_integer.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wcs_to_integer_test.cpp
Log Message:
-----------
[libc] WCS to integer internal function (#147857)
Duplicated str_to_integer.h and modified it to work with widechars.
A future patch will implement the public functions (wcstol, wcstoll,
etc) by calling this internal function.
Commit: ab0d11c8153740b308700dbb0ab9d63a0e85a3a2
https://github.com/llvm/llvm-project/commit/ab0d11c8153740b308700dbb0ab9d63a0e85a3a2
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
Log Message:
-----------
[Clang] Fix a crash when diagnosing wrong conversion to explicit object parameter (#147996)
When an overload is invalid, we try to initialize each conversion
sequence for the purpose of diagmostics, but we failed to initialize
explicit objects, leading to a crash
Fixes #147121
Commit: ca888f085cf31788e06a3fb68234bf61e55a3686
https://github.com/llvm/llvm-project/commit/ca888f085cf31788e06a3fb68234bf61e55a3686
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
Log Message:
-----------
[DirectX][NFC] Refactor `DXILRootSignature` to follow the same pattern as other analysis (#146783)
When implementing #146785, notice `DXILRootSignature` had some design
changes that made it harder to integrate with other analysis. This
change refactors `DXILRootSignature` to solve this issue.
---------
Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
Commit: 582cfb142c4ba0c8d8b51e2bbd87b9cb9e9ce74b
https://github.com/llvm/llvm-project/commit/582cfb142c4ba0c8d8b51e2bbd87b9cb9e9ce74b
Author: cmtice <cmtice at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
R .github/workflows/libcxx-restart-preempted-jobs.yaml
Log Message:
-----------
[libc++] Switch over to the LLVM-wide premerge test runners. (#147794)
Update the premerge testing system to use the LLVM-wide premerge
infrastructure. Also remove libcxx-restart-preempted-jobs.yaml, as this
should no longer be needed.
Commit: 8ad384ba7ff7f33a1084551bedeb8b6f25f9d726
https://github.com/llvm/llvm-project/commit/8ad384ba7ff7f33a1084551bedeb8b6f25f9d726
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
Log Message:
-----------
[mlir][xevm] Fix dialect descriptions formatting (#147729)
Fixes markdown formatting of xevm dialect docs.
Commit: dd1105bcea7a8411814586af5d58d2d3758e80c1
https://github.com/llvm/llvm-project/commit/dd1105bcea7a8411814586af5d58d2d3758e80c1
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/CodeGen/complex-arithmetic.cpp
Log Message:
-----------
[CIR] Implement AddOp for ComplexType (#147578)
This change adds support for AddOp for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: c92d5dad67aafded296653c2b9a369a7fe24ba13
https://github.com/llvm/llvm-project/commit/c92d5dad67aafded296653c2b9a369a7fe24ba13
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/test/Driver/frame-pointer-elim.c
Log Message:
-----------
[clang] Use a specific target when testing that `-fomit-frame-pointer` and `-pg` are mutually exclusive (#148000)
Some targets, such as `aarch64-pc-windows-msvc`, always require that
Frame Pointer be reserved even when `-fomit-frame-pointer` is provided,
thus it is always valid to use `-pg` on those targets.
This test didn't take these targets into account; thus it was failing on
Arm64 Windows host machines.
The fix is to explicitly set a target that doesn't require Frame
Pointers reservation.
Commit: 49b87cd7793fe529c747940f483d0d57f963b6f7
https://github.com/llvm/llvm-project/commit/49b87cd7793fe529c747940f483d0d57f963b6f7
Author: Elijah Kin <elijah.m.kin at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/unittests/ADT/DenseMapTest.cpp
Log Message:
-----------
DenseMapInfo: support std::optional<T> (#147851)
Commit: d60da27400cd96855542cd992d326c10a34dd0f7
https://github.com/llvm/llvm-project/commit/d60da27400cd96855542cd992d326c10a34dd0f7
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/test/SemaHLSL/RootSignature-err.hlsl
A clang/test/SemaHLSL/RootSignature.hlsl
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
Log Message:
-----------
[HLSL][RootSignature] Implement diagnostic for missed comma (#147350)
This pr fixes a bug that allows parameters to be specified without an
intermediate comma.
After this pr, we will correctly produce a diagnostic for (eg):
```
RootFlags(0) CBV(b0)
```
This pr updates the problematic code pattern containing a chain of 'if'
statements to a chain of 'else if' statements, to prevent parsing of an
element before checking for a comma.
This pr also does 2 small updates, while in the region:
1. Simplify the `do` loop that these `if` statements are contained in.
This helps code readability and makes it easier to improve the
diagnostics further
2. Moves the `consumeExpectedToken` function calls to be right after the
`parse.*Params` invocation. This will ensure that the comma or invalid
token error is presented before a "missed mandatory param" diagnostic.
- Updates all occurrences of the if chains with an else-if chain
- Simplifies the surrounding `do` loop to be an easier to understand
`while` loop
- Moves the `consumeExpectedToken` diagnostic right after the loop so
that the missing comma diagnostic is produce before checking for any
missed mandatory arguments
- Adds unit tests for this scenario
- Small fix to the diagnostic of `RootDescriptors` to use their
respective `Token` instead of `RootConstants`
Resolves: https://github.com/llvm/llvm-project/issues/147337
Commit: ce571c90a08a03ef7ea7ddb9e7b72c8949414479
https://github.com/llvm/llvm-project/commit/ce571c90a08a03ef7ea7ddb9e7b72c8949414479
Author: James Y Knight <jyknight at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
Revert "[bazel] Update after 24475409e4eac6fd60e2111424a4bef3452c8f21"
This reverts commit f71b188fbb256ab84aebfba9f7870c04b3a3d44d.
The corresponding commit was reverted by fa74df38ade4053534731ea1e00ffe900e9e9492.
Commit: 25c3f64105e8d74fd39cc15831e70621a0cf4c31
https://github.com/llvm/llvm-project/commit/25c3f64105e8d74fd39cc15831e70621a0cf4c31
Author: Vigneshwar Jayakumar <vigneshwar.jayakumar at amd.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
R llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
R llvm/test/Transforms/StructurizeCFG/hoist-zerocost.ll
Log Message:
-----------
Revert "[StructurizeCFG] Hoist and simplify zero-cost incoming else phi values" (#148016)
reverting to fix Buildbot failures.
Commit: 8a7c973f64e923d4a60308e1a805720289b6716c
https://github.com/llvm/llvm-project/commit/8a7c973f64e923d4a60308e1a805720289b6716c
Author: Matheus Izvekov <mizvekov at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M .github/workflows/premerge.yaml
Log Message:
-----------
[ci] premerge: upload artifacts even on failure (#147999)
This makes sure we upload the artifacts even if the previous step
failed.
This is helpful because we wish to upload crash reproducers, which the
scritps are already prepared to do.
Example:
https://github.com/llvm/llvm-project/actions/runs/16180778101/job/45676677544?pr=147835
Commit: a7091951f0bbdeb78a76f933394a7754c5990371
https://github.com/llvm/llvm-project/commit/a7091951f0bbdeb78a76f933394a7754c5990371
Author: Artem Chikin <achikin at apple.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/APINotes/APINotesManager.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/Sema.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/versioned-version-independent.m
Log Message:
-----------
[APINotes] Add support for capturing all possible versioned APINotes without applying them
Swift-versioned API notes get applied at PCM constrution time relying on
'-fapinotes-swift-version=X' argument to pick the appropriate version.
This change adds a new APINotes application mode with
'-fswift-version-independent-apinotes' which causes *all* versioned API
notes to get recorded into the PCM wrapped in 'SwiftVersionedAttr'
instances. The expectation in this mode is that the Swift client will
perform the required transformations as per the API notes on the client
side, when loading the PCM, instead of them getting applied on the
producer side. This will allow the same PCM to be usable by Swift
clients building with different language versions.
In addition to versioned-wrapping the various existing API notes
annotations which are carried in declaration attributes, this change
adds a new attribute for two annotations which were previously applied
directly to the declaration at the PCM producer side: 1) Type and 2)
Nullability annotations with 'SwiftTypeAttr' and 'SwiftNullabilityAttr',
respectively. The logic to apply these two annotations to a declaration
is refactored into API.
Commit: 9320d1d48410aeedc477bed501d038cad9917ffa
https://github.com/llvm/llvm-project/commit/9320d1d48410aeedc477bed501d038cad9917ffa
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
Log Message:
-----------
[compiler-rt] Don't handle Linux-specific shmctl commands in sanitizer (#143116)
Despite being defined in the system headers, these commands are not in
fact part of the FreeBSD system call interface. They exist solely for
the Linuxulator, i.e. running Linux binaries on FreeBSD, and any attempt
to use them from a FreeBSD binary will return EINVAL. The fact we needed
to define _KERNEL (which, as the name implies, means we are compiling
the kernel) to even get the definition of shminfo should have been a
strong indicator that IPC_INFO at least was not a userspace interface.
Commit: 03f6f48b73725279f35ec05a5235dda793328e1c
https://github.com/llvm/llvm-project/commit/03f6f48b73725279f35ec05a5235dda793328e1c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A libcxx/test/extensions/all/cstddef.compile.pass.cpp
A libcxx/test/extensions/clang/clang_modules_include.gen.py
A libcxx/test/extensions/clang/lit.local.cfg
A libcxx/test/extensions/libcxx/include_as_c.sh.cpp
A libcxx/test/extensions/libcxx/libcpp_version.gen.py
A libcxx/test/extensions/libcxx/lit.local.cfg
A libcxx/test/extensions/libcxx/no_assert_include.gen.py
R libcxx/test/libcxx/clang_modules_include.gen.py
R libcxx/test/libcxx/double_include.gen.py
R libcxx/test/libcxx/header_inclusions.gen.py
R libcxx/test/libcxx/include_as_c.sh.cpp
R libcxx/test/libcxx/language.support/support.types/cstddef.compile.pass.cpp
R libcxx/test/libcxx/libcpp_version.gen.py
R libcxx/test/libcxx/no_assert_include.gen.py
R libcxx/test/selftest/lit.local.cfg
A libcxx/test/std/double_include.gen.py
A libcxx/test/std/header_inclusions.gen.py
Log Message:
-----------
[libc++] Move a few tests into more correct places (#147557)
Commit: 00dd6660c2bfdb024159aa9a0a69a29cdffe1a64
https://github.com/llvm/llvm-project/commit/00dd6660c2bfdb024159aa9a0a69a29cdffe1a64
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M third-party/siphash/include/siphash/SipHash.h
Log Message:
-----------
Add back fallthrough annotations removed by 7f3afab (#148032)
The original commit removed them to avoid the dependency on llvm Support
because of LLVM_FALLTHROUGH, but this triggers `-Wimplicit-fallthrough`
warnings.
LLVM requires a C++17 compiler now, so we should be able to use the
standard [[fallthrough]] attribute.
Commit: 922fca5cc9671b9bb4ed160d0937509e97f4fafb
https://github.com/llvm/llvm-project/commit/922fca5cc9671b9bb4ed160d0937509e97f4fafb
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
Log Message:
-----------
[RISCV][VLOPT] Pre-commit tests for adding more instruction to vlopt
Signed-off-by: Mikhail R. Gadelha <mikhail at igalia.com>
Commit: 682d6c494222452ca236dc993bd5321eb7fc80f1
https://github.com/llvm/llvm-project/commit/682d6c494222452ca236dc993bd5321eb7fc80f1
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/unittests/ADT/DenseMapTest.cpp
Log Message:
-----------
[ADT] Fix a warning
This patch fixes:
llvm/unittests/ADT/DenseMapTest.cpp:94:25: error: unused function
'getTestValue' [-Werror,-Wunused-function]
Commit: 4b30bf0ee9bc0131fadda9fdb8675010d9c6081b
https://github.com/llvm/llvm-project/commit/4b30bf0ee9bc0131fadda9fdb8675010d9c6081b
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/docs/Remarks.rst
Log Message:
-----------
[NFC] [docs] point users towards clang remark flags (#147820)
Commit: c452de1715657ed24e77f6d8fda57be26d7359d8
https://github.com/llvm/llvm-project/commit/c452de1715657ed24e77f6d8fda57be26d7359d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
Log Message:
-----------
Reapply "[VPlan] Allow derived IVs and scalar-steps in narrowing interleave."
This reverts commit f5ed863176dd286462cd5558723dfe445967fedf.
Recommit patch now that the crash exposed by the change has been fixed.
Commit: dd60663b9bfaab15362a850ba7f63bafc11a56d4
https://github.com/llvm/llvm-project/commit/dd60663b9bfaab15362a850ba7f63bafc11a56d4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
Log Message:
-----------
[SLP] Emit reduction instead of 2 extracts + scalar op, when vectorizing operands (#147583)
Added emission of the 2-element reduction instead of 2 extracts + scalar
op, when trying to vectorize operands of the instruction, if it is more
profitable.
Commit: 0736f330b06db85cf9322296eec44e07fe604789
https://github.com/llvm/llvm-project/commit/0736f330b06db85cf9322296eec44e07fe604789
Author: David Green <david.green at arm.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
M llvm/test/CodeGen/AArch64/sve-fptoui-sat.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/X86/pr78897.ll
Log Message:
-----------
[DAG] Handle truncated splat in isBoolConstant (#145473)
This allows truncated splat / buildvector in isBoolConstant, to allow
certain not instructions to be recognized post-legalization, and allow
vselect to optimize.
An override for x86 avx512 predicated vectors is required to avoid an
infinite recursion from the code that detects zero vectors. From:
```
// Check if the first operand is all zeros and Cond type is vXi1.
// If this an avx512 target we can improve the use of zero masking by
// swapping the operands and inverting the condition.
```
Commit: 0edc98cd6d310f78be14f7629d3a341551f90b36
https://github.com/llvm/llvm-project/commit/0edc98cd6d310f78be14f7629d3a341551f90b36
Author: AZero13 <gfunni234 at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/min-max-combine.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-unknown-lanes.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll
Log Message:
-----------
[ARM] Copy SMAX(lhs, 0) and SMIN(lhs, 0) patterns from AArch64 to ARM (#146565)
They work on ARM too.
Commit: d8a2141ff98ee35cd1886f536ccc3548b012820b
https://github.com/llvm/llvm-project/commit/d8a2141ff98ee35cd1886f536ccc3548b012820b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Support/StringRef.cpp
Log Message:
-----------
[NFC][LLVM][ADT] Simplify `StringRef` case insensitive compare (#147994)
Change `ascii_strncasecmp` to use a range for loop and use StringRef
parameters.
Commit: 3d08a409593e8fc44bd2142a0aa1819cd37b6e73
https://github.com/llvm/llvm-project/commit/3d08a409593e8fc44bd2142a0aa1819cd37b6e73
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
Log Message:
-----------
[CIR] Upstream new SetBitfieldOp for handling C and C++ struct bitfields (#147609)
This PR upstreams the `set_bitfield` operation used to assign values to
bitfield members in C and C++ struct types.
Handling of AAPCS-specific volatile bitfield semantics will be addressed
in a future PR.
Commit: 0c0aa56cdcf1fe3970a5f3875db412530512fc07
https://github.com/llvm/llvm-project/commit/0c0aa56cdcf1fe3970a5f3875db412530512fc07
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/builtin-config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
R compiler-rt/lib/builtins/aarch64/emupac.cpp
M compiler-rt/lib/builtins/int_types.h
R compiler-rt/test/builtins/Unit/aarch64/emupac.c
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/sources.gni
M llvm/utils/gn/secondary/compiler-rt/test/builtins/BUILD.gn
Log Message:
-----------
Revert "compiler-rt: Introduce runtime functions for emulated PAC."
As well as followup "builtins: Speculative MSVC fix."
This reverts commits 5b1db59fb87b4146f827d17396f54ef30ae0dc40 and
f1c4df5b7bb79efb3e9be7fa5f8176506499d0a6.
Needs fixes for failing tests which will take time to implement.
Commit: 61004b7eb5bf63d813118753727e02be13d1e9e0
https://github.com/llvm/llvm-project/commit/61004b7eb5bf63d813118753727e02be13d1e9e0
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/lib/Dialect/GPU/CMakeLists.txt
A mlir/lib/Dialect/GPU/Transforms/XeVMAttachTarget.cpp
M mlir/test/Dialect/LLVMIR/attach-targets.mlir
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
Log Message:
-----------
[MLIR][GPU] Add xevm-attach-target transform pass. (#147372)
Add xevm-attach-target transform pass and unit-tests.
Co-authored-by: by Sang Ik Lee sang.ik.lee at intel.com.
Co-authored-by: Artem Kroviakov artem.kroviakov at intel.com
Commit: 74a6e5cf91aa2c19696bf59bf0d6ecf7346e0968
https://github.com/llvm/llvm-project/commit/74a6e5cf91aa2c19696bf59bf0d6ecf7346e0968
Author: WhatAmISupposedToPutHere <css7o4rrtol2 at opayq.co>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M lld/Common/DriverDispatcher.cpp
M lld/MinGW/Driver.cpp
M lld/test/MinGW/driver.test
Log Message:
-----------
[LLD][MinGW] Support machine:arm64x when invoked in MinGW mode. (#145343)
Mingw mode already supports building machine:arm64ec arm64x binaries,
support machine:arm64x ones too.
Signed-off-by: Sasha Finkelstein <fnkl.kernel at gmail.com>
Commit: 838701a5403efbaf6e25254377a6f033acee6681
https://github.com/llvm/llvm-project/commit/838701a5403efbaf6e25254377a6f033acee6681
Author: Teresa Johnson <tejohnson at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
Log Message:
-----------
MemProf: Add minimum count threshold for inlining of promoted calls (#148001)
Allow users to set the minimum absolute count for inlining of indirect
calls promoted during cloning. This is primarily meant to enable
generation of synthetic vp metadata introduced in PR141164 when
profiling memprof-optimized binaries.
Commit: 88ba06d6fc36c2c817eb208d06f408afa7373be8
https://github.com/llvm/llvm-project/commit/88ba06d6fc36c2c817eb208d06f408afa7373be8
Author: Uzair Nawaz <uzairnawaz at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
Log Message:
-----------
[libc] Addressed todo to make first_non_whitespace to return an idx instead of ptr (#148004)
Addressed todo to make first_non_whitespace to return an idx instead of
ptr
Commit: 7920dff39406c2af3859d8e316c8f098526d6af3
https://github.com/llvm/llvm-project/commit/7920dff39406c2af3859d8e316c8f098526d6af3
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
A llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd3.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd_features.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3.txt
Log Message:
-----------
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
Commit: 3076794e924f30ae21d1a12f27b1e6349dfa5fc4
https://github.com/llvm/llvm-project/commit/3076794e924f30ae21d1a12f27b1e6349dfa5fc4
Author: Utkarsh Saxena <usx at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
A clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/Sema/warn-lifetime-safety-dataflow.cpp
Log Message:
-----------
[LifetimeSafety] Introduce intra-procedural analysis in Clang (#142313)
This patch introduces the initial implementation of the
intra-procedural, flow-sensitive lifetime analysis for Clang, as
proposed in the recent RFC:
https://discourse.llvm.org/t/rfc-intra-procedural-lifetime-analysis-in-clang/86291
The primary goal of this initial submission is to establish the core
dataflow framework and gather feedback on the overall design, fact
representation, and testing strategy. The focus is on the dataflow
mechanism itself rather than exhaustively covering all C++ AST edge
cases, which will be addressed in subsequent patches.
#### Key Components
* **Conceptual Model:** Introduces the fundamental concepts of `Loan`,
`Origin`, and `Path` to model memory borrows and the lifetime of
pointers.
* **Fact Generation:** A frontend pass traverses the Clang CFG to
generate a representation of lifetime-relevant events, such as pointer
assignments, taking an address, and variables going out of scope.
* **Testing:** `llvm-lit` tests validate the analysis by checking the
generated facts.
### Next Steps
*(Not covered in this PR but planned for subsequent patches)*
The following functionality is planned for the upcoming patches to build
upon this foundation and make the analysis usable in practice:
* **Dataflow Lattice:** A dataflow lattice used to map each pointer's
symbolic `Origin` to the set of `Loans` it may contain at any given
program point.
* **Fixed-Point Analysis:** A worklist-based, flow-sensitive analysis
that propagates the lattice state across the CFG to a fixed point.
* **Placeholder Loans:** Introduce placeholder loans to represent the
lifetimes of function parameters, forming the basis for analysis
involving function calls.
* **Annotation and Opaque Call Handling:** Use placeholder loans to
correctly model **function calls**, both by respecting
`[[clang::lifetimebound]]` annotations and by conservatively handling
opaque/un-annotated functions.
* **Error Reporting:** Implement the final analysis phase that consumes
the dataflow results to generate user-facing diagnostics. This will
likely require liveness analysis to identify live origins holding
expired loans.
* **Strict vs. Permissive Modes:** Add the logic to support both
high-confidence (permissive) and more comprehensive (strict) warning
levels.
* **Expanded C++ Coverage:** Broaden support for common patterns,
including the lifetimes of temporary objects and pointers within
aggregate types (structs/containers).
* Performance benchmarking
* Capping number of iterations or number of times a CFGBlock is
processed.
---------
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: b6a4621f3b6e7c59a6c6fe8a37f161d687ea441c
https://github.com/llvm/llvm-project/commit/b6a4621f3b6e7c59a6c6fe8a37f161d687ea441c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Minor code cleanup in SearchableTableEmitter (#147856)
- Add braces around if/else bodies per LLVM coding standards.
- Use range for loops and structured bindings.
- use auto for variables initialized with `dyn_cast`.
- Refactor `compareBy` to also use early return in the comparison loop
by extracting the comparison into lambdas.
Commit: 78eb92b383b13c0f4e22e17a35f9eabd4832a409
https://github.com/llvm/llvm-project/commit/78eb92b383b13c0f4e22e17a35f9eabd4832a409
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port 3076794e924f
Commit: 4859b92b7f4e0365517acd464cec29721f469461
https://github.com/llvm/llvm-project/commit/4859b92b7f4e0365517acd464cec29721f469461
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/RegisterOpenACCExtensions.cpp
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-class.f90
M flang/test/Fir/OpenACC/openacc-type-categories.f90
M flang/test/lib/OpenACC/TestOpenACCInterfaces.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[flang][acc] Update FIR ref, heap, and pointer to be MappableType (#147834)
The MappableType OpenACC type interface is a richer interface that
allows OpenACC dialect to be capable to better interact with a source
dialect, FIR in this case. fir.box and fir.class types already
implemented this interface. Now the same is being done with the other
FIR types that represent variables.
One additional notable change is that fir.array no longer implements
this interface. This is because MappableType is primarily intended for
variables - and FIR variables of this type have storage associated and
thus there's a pointer-like type (fir.ref/heap/pointer) that holds the
array type.
The end goal of promoting these FIR types to MappableType is that we
will soon implement ability to generate recipes outside of the frontend
via this interface.
Commit: f28a497a06c2d9202638d753e1cd2e247814d180
https://github.com/llvm/llvm-project/commit/f28a497a06c2d9202638d753e1cd2e247814d180
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointOptions.h
A lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/StopInfo.cpp
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
A lldb/test/Shell/Breakpoint/condition-lang.test
Log Message:
-----------
[lldb] Support specifying a language for breakpoint conditions (#147603)
LLDB breakpoint conditions take an expression that's evaluated using the
language of the code where the breakpoint is located. Users have asked
to have an option to tell it to evaluate the expression in a specific
language.
This is feature is especially helpful for Swift, for example for a
condition based on the value in memory at an offset from a register.
Such a condition is pretty difficult to write in Swift, but easy in C.
This PR adds a new argument (-Y) to specify the language of the
condition expression. We can't reuse the current -L option, since you
might want to break on only Swift symbols, but run a C expression there
as per the example above.
rdar://146119507
Commit: 545b075a87300306658a3c0cbc224bc2e9764457
https://github.com/llvm/llvm-project/commit/545b075a87300306658a3c0cbc224bc2e9764457
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dep after 61004b7eb5bf63d813118753727e02be13d1e9e0
Commit: 14b2d2cc3a5418d88f98b2f1ec4568e69e8fdb04
https://github.com/llvm/llvm-project/commit/14b2d2cc3a5418d88f98b2f1ec4568e69e8fdb04
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-11 (Fri, 11 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
Log Message:
-----------
RuntimeLibcalls: Add entries for objc runtime calls (#147920)
Stop emitting these calls by name in PreISelIntrinsicLowering. This
is still kind of a hack. We should be going through the abstract
RTLIB:Libcall, and then checking if the call is really supported in
this module. Do this as a placeholder until RuntimeLibcalls is a
module analysis.
Commit: 76eead1bd700e165c7dcfcb6a0998d31b1782e68
https://github.com/llvm/llvm-project/commit/76eead1bd700e165c7dcfcb6a0998d31b1782e68
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
A mlir/include/mlir/Conversion/XeVMToLLVM/XeVMToLLVM.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/XeVMToLLVM/CMakeLists.txt
A mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
A mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
[MLIR][Conversion] Add convert-xevm-to-llvm pass. (#147375)
Although XeVM is an LLVM extension dialect,
SPIR-V backend relies on [function
calls](https://llvm.org/docs/SPIRVUsage.html#instructions-as-function-calls)
instead of defining LLVM intrinsics to represent SPIR-V instructions.
convert-xevm-to-llvm pass lowers xevm ops to function declarations and
calls using the above naming convention.
In the future, most part of the pass should be replaced with llvmBuilder
and handled as part of translation to LLVM instead.
---------
Co-authored-by: Artem Kroviakov <artem.kroviakov at intel.com>
Commit: 78e0c767897ebb5bd8ccc87ab55a5ebd1397d77b
https://github.com/llvm/llvm-project/commit/78e0c767897ebb5bd8ccc87ab55a5ebd1397d77b
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/test/CIR/CodeGen/bitfields.c
Log Message:
-----------
[CIR][NFC] Add example for get_bitfield with volatile qualifier (#147828)
The example demonstrates how `get_bitfield` is emitted when accessing a
bitfield declared as `volatile`.
Commit: b415db02e7c2b5ae86fdae25f84e646917617818
https://github.com/llvm/llvm-project/commit/b415db02e7c2b5ae86fdae25f84e646917617818
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/enum.cpp
M clang/test/CIR/CodeGen/namespace.cpp
Log Message:
-----------
[CIR] Add handlers for 'using enum' and namespace alias (#148011)
These decl types don't require any code generation, though when debug
info is implemented, we will need to add handling for that. Until then,
we just need to have a handler so they don't generate an NYI error.
Commit: eb97422e002c0523a7f220cf2fc6c75be920dd6a
https://github.com/llvm/llvm-project/commit/eb97422e002c0523a7f220cf2fc6c75be920dd6a
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx1250_err.s
Log Message:
-----------
[AMDGPU] Disable DPP with v_mov_b64 on gfx1250 (#148054)
Commit: da608271ae7ae7d62d82060357cb01d714ae1dbc
https://github.com/llvm/llvm-project/commit/da608271ae7ae7d62d82060357cb01d714ae1dbc
Author: Charitha Saumya <136391709+charithaintc at users.noreply.github.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
R mlir/include/mlir/Conversion/XeVMToLLVM/XeVMToLLVM.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Conversion/CMakeLists.txt
R mlir/lib/Conversion/XeVMToLLVM/CMakeLists.txt
R mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
R mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
Log Message:
-----------
Revert "[MLIR][Conversion] Add convert-xevm-to-llvm pass." (#148081)
Reverts llvm/llvm-project#147375
Commit: 6fc3b40b2cfc33550dd489072c01ffab16535840
https://github.com/llvm/llvm-project/commit/6fc3b40b2cfc33550dd489072c01ffab16535840
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-10 (Thu, 10 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/abs-vector.ll
Log Message:
-----------
[msan] Model is_int_min_poison to avoid false negative in abs (#148069)
Note: since this patch reduces false negatives, buggy code that formerly
passed with MSan may start failing.
The current MSan handler for abs, like Hercules' in New York, ignores
is_int_min_poison. This patch fixes the issue by poisoning the shadow
corresponding to each int_min input value if is_int_min_poison.
Commit: 41e42c02c38422a7dd38b61f09e61ee0dfdb7a2e
https://github.com/llvm/llvm-project/commit/41e42c02c38422a7dd38b61f09e61ee0dfdb7a2e
Author: Peter Collingbourne <pcc at google.com>
Date: 2025-07-11 (Fri, 11 Jul 2025)
Changed paths:
M .ci/generate_test_report_github.py
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
M .github/workflows/libcxx-build-and-test.yaml
R .github/workflows/libcxx-restart-preempted-jobs.yaml
M .github/workflows/premerge.yaml
M bolt/include/bolt/Core/BinaryFunction.h
A bolt/test/AArch64/cfi-state-list.test
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/test/lit.cfg.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang/APINotes/APINotesManager.h
M clang/include/clang/AST/Decl.h
A clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/riscv_andes_vector.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/TokenLexer.h
M clang/include/clang/Sema/Sema.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/APINotes/versioned-version-independent.m
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
A clang/test/CIR/CodeGen/complex-arithmetic.cpp
M clang/test/CIR/CodeGen/complex-builtins.cpp
M clang/test/CIR/CodeGen/enum.cpp
M clang/test/CIR/CodeGen/namespace.cpp
M clang/test/CIR/Lowering/select.cir
M clang/test/CXX/drs/cwg26xx.cpp
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vlnu8.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vundefined.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/overloaded/vfwmaccbf16.c
M clang/test/Driver/frame-pointer-elim.c
M clang/test/OpenMP/Inputs/declare_target_include.h
M clang/test/OpenMP/declare_target_ast_print.cpp
M clang/test/OpenMP/declare_target_messages.cpp
M clang/test/OpenMP/target_ast_print.cpp
M clang/test/Parser/cxx0x-lambda-expressions.cpp
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/cxx20-using-enum.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
A clang/test/SemaCXX/invalid-base-inheritance.cpp
A clang/test/SemaCXX/range-for-lifetime-cxx23.cpp
M clang/test/SemaHLSL/RootSignature-err.hlsl
A clang/test/SemaHLSL/RootSignature.hlsl
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/builtins/aarch64/emupac.cpp
M compiler-rt/lib/builtins/int_types.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerIOPosix.cpp
M compiler-rt/lib/fuzzer/FuzzerRandom.h
M compiler-rt/lib/lsan/lsan_allocator.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_unwind_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/test/builtins/Unit/aarch64/emupac.c
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/include/flang-rt/runtime/internal-unit.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/non-tbp-dio.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/edit-input.h
M flang-rt/lib/runtime/edit-output.h
M flang-rt/lib/runtime/unit.h
M flang/include/flang/Decimal/decimal.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/RegisterOpenACCExtensions.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Driver/frontend-forwarding.f90
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-class.f90
M flang/test/Fir/OpenACC/openacc-type-categories.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Semantics/OpenMP/future-directive-spellings.f90
M flang/test/lib/OpenACC/TestOpenACCInterfaces.cpp
M libc/config/linux/x86_64/entrypoints.txt
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/acos_fuzz.cpp
A libc/fuzzing/math/asin_fuzz.cpp
A libc/fuzzing/math/atan_fuzz.cpp
A libc/fuzzing/math/sincos_fuzz.cpp
M libc/include/wchar.yaml
M libc/src/__support/CMakeLists.txt
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
A libc/src/__support/wcs_to_integer.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslcat.cpp
A libc/src/wchar/wcslcat.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wcs_to_integer_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslcat_test.cpp
R libclc/.gitignore
A libclc/clc/include/clc/workitem/clc_get_global_id.h
A libclc/clc/include/clc/workitem/clc_get_global_offset.h
A libclc/clc/include/clc/workitem/clc_get_global_size.h
A libclc/clc/include/clc/workitem/clc_get_group_id.h
A libclc/clc/include/clc/workitem/clc_get_local_id.h
A libclc/clc/include/clc/workitem/clc_get_local_linear_id.h
A libclc/clc/include/clc/workitem/clc_get_local_size.h
A libclc/clc/include/clc/workitem/clc_get_max_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_num_groups.h
A libclc/clc/include/clc/workitem/clc_get_num_sub_groups.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_local_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_work_dim.h
M libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/workitem/clc_get_global_offset.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_global_size.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_group_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_local_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_work_dim.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/workitem/clc_get_local_linear_id.cl
A libclc/clc/lib/generic/workitem/clc_get_num_sub_groups.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/SOURCES
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_global_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_group_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_max_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_num_groups.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_sub_group_local_id.cl
A libclc/opencl/include/clc/opencl/workitem/get_local_linear_id.h
A libclc/opencl/include/clc/opencl/workitem/get_max_sub_group_size.h
A libclc/opencl/include/clc/opencl/workitem/get_num_sub_groups.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_local_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_size.h
M libclc/opencl/lib/amdgcn/workitem/get_global_offset.cl
M libclc/opencl/lib/amdgcn/workitem/get_global_size.cl
M libclc/opencl/lib/amdgcn/workitem/get_group_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_local_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_work_dim.cl
M libclc/opencl/lib/ptx-nvidiacl/SOURCES
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_global_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_group_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_linear_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_size.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_max_sub_group_size.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_sub_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_size.cl
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__hash_table
M libcxx/include/__memory/construct_at.h
M libcxx/include/__node_handle
M libcxx/include/__tree
M libcxx/include/__type_traits/invoke.h
M libcxx/include/ext/hash_map
M libcxx/include/ext/hash_set
M libcxx/include/future
M libcxx/include/map
M libcxx/include/set
M libcxx/include/unordered_map
M libcxx/include/unordered_set
A libcxx/test/extensions/all/cstddef.compile.pass.cpp
A libcxx/test/extensions/clang/clang_modules_include.gen.py
A libcxx/test/extensions/clang/lit.local.cfg
A libcxx/test/extensions/libcxx/include_as_c.sh.cpp
A libcxx/test/extensions/libcxx/libcpp_version.gen.py
A libcxx/test/extensions/libcxx/lit.local.cfg
A libcxx/test/extensions/libcxx/no_assert_include.gen.py
R libcxx/test/libcxx/clang_modules_include.gen.py
R libcxx/test/libcxx/double_include.gen.py
R libcxx/test/libcxx/header_inclusions.gen.py
R libcxx/test/libcxx/include_as_c.sh.cpp
R libcxx/test/libcxx/language.support/support.types/cstddef.compile.pass.cpp
R libcxx/test/libcxx/libcpp_version.gen.py
R libcxx/test/libcxx/no_assert_include.gen.py
R libcxx/test/libcxx/thread/futures/futures.task/type.depr.verify.cpp
R libcxx/test/libcxx/thread/futures/futures.task/types.pass.cpp
R libcxx/test/selftest/lit.local.cfg
M libcxx/test/std/containers/map_allocator_requirement_test_templates.h
M libcxx/test/std/containers/set_allocator_requirement_test_templates.h
A libcxx/test/std/double_include.gen.py
A libcxx/test/std/header_inclusions.gen.py
A libcxx/test/std/thread/futures/futures.task/futures.task.members/type.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.compile.pass.cpp
M lld/Common/DriverDispatcher.cpp
M lld/MinGW/Driver.cpp
M lld/test/MinGW/driver.test
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointOptions.h
A lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/StopInfo.cpp
M lldb/source/ValueObject/DILEval.cpp
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/Makefile
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M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
A lldb/test/Shell/Breakpoint/condition-lang.test
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/JSONUtilsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M llvm/docs/GettingInvolved.rst
M llvm/docs/QualGroup.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/Remarks.rst
M llvm/docs/WritingAnLLVMPass.rst
M llvm/docs/index.rst
A llvm/docs/qual-wg/slides/202507_llvm_qual_wg.pdf
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/PostRAMachineSink.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/abi-breaking.h.cmake
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/TargetPassRegistry.inc
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Support/Compiler.h
A llvm/include/llvm/Target/RegisterTargetPassConfigCallback.h
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/AsmPrinter/DIEHash.h
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RegAllocScore.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/SampleProf.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/lib/Target/RegisterTargetPassConfigCallback.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
A llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/MetaRenamer.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/cmp.ll
A llvm/test/Analysis/CostModel/AArch64/fcmp.ll
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A llvm/test/Analysis/CostModel/AArch64/sve-fcmp.ll
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A llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
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M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
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M llvm/test/CodeGen/AArch64/eor3.ll
A llvm/test/CodeGen/AArch64/exception-handling-windows-elf.ll
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M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
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M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-merging-unary.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-crash-splat.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/postra-sink-update-dependency.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
A llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
A llvm/test/CodeGen/ARM/issue147935-half-convert-libcall-abi.ll
A llvm/test/CodeGen/ARM/min-max-combine.ll
A llvm/test/CodeGen/Hexagon/llvm.sincos.ll
M llvm/test/CodeGen/Inputs/stack-guard-reassign.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
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M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/SystemZ/no-postra-sink.mir
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M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
A llvm/test/MC/AMDGPU/gfx1250_asm_salu_lit64.s
A llvm/test/MC/AMDGPU/gfx1250_asm_valu_lit64.s
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M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
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M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
A llvm/test/Transforms/Coroutines/coro-split-dbg-nested-struct.ll
A llvm/test/Transforms/InferAddressSpaces/SPIRV/generic-cast-explicit.ll
A llvm/test/Transforms/InferAddressSpaces/SPIRV/lit.local.cfg
A llvm/test/Transforms/LoadStoreVectorizer/batch-aa-compile-time.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-runtime.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
A llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.cpp
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.h
A llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
A llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/Plugin/BUILD.gn
A llvm/utils/mlgo-utils/combine_training_corpus.py
A llvm/utils/mlgo-utils/extract_ir.py
A llvm/utils/mlgo-utils/make_corpus.py
M llvm/utils/remote-exec.py
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/GPU/CMakeLists.txt
A mlir/lib/Dialect/GPU/Transforms/XeVMAttachTarget.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Dialect/AMDGPU/maskedload-to-load.mlir
M mlir/test/Dialect/LLVMIR/attach-targets.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Dialect/OpenMP/cli-canonical_loop-invalid.mlir
A mlir/test/Dialect/OpenMP/cli-canonical_loop.mlir
A mlir/test/Dialect/OpenMP/cli-unroll-heuristic.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Target/Cpp/declare_func.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M offload/CMakeLists.txt
A offload/docs/.gitignore
A offload/docs/CMakeLists.txt
A offload/docs/conf.py
A offload/docs/index.rst
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Symbol.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/tools/offload-tblgen/APIGen.cpp
M offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/DocGen.cpp
M offload/tools/offload-tblgen/GenCommon.hpp
M offload/tools/offload-tblgen/Generators.hpp
M offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/kernel/olGetKernel.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M third-party/siphash/include/siphash/SipHash.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/wchar/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
A utils/bazel/llvm-project-overlay/third-party/siphash/BUILD.bazel
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.6-beta.1
[skip ci]
Commit: ab863bfd30742285c07ee4af66ce75e565f9508e
https://github.com/llvm/llvm-project/commit/ab863bfd30742285c07ee4af66ce75e565f9508e
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2025-07-11 (Fri, 11 Jul 2025)
Changed paths:
M .ci/generate_test_report_github.py
M .ci/generate_test_report_lib.py
M .ci/generate_test_report_lib_test.py
M .github/workflows/libcxx-build-and-test.yaml
R .github/workflows/libcxx-restart-preempted-jobs.yaml
M .github/workflows/premerge.yaml
M bolt/include/bolt/Core/BinaryFunction.h
A bolt/test/AArch64/cfi-state-list.test
M clang-tools-extra/clangd/test/lit.cfg.py
M clang-tools-extra/test/lit.cfg.py
M clang/docs/ReleaseNotes.rst
M clang/include/clang/APINotes/APINotesManager.h
M clang/include/clang/AST/Decl.h
A clang/include/clang/Analysis/Analyses/LifetimeSafety.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/riscv_andes_vector.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/TokenLexer.h
M clang/include/clang/Sema/Sema.h
M clang/lib/APINotes/APINotesManager.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Analysis/CMakeLists.txt
A clang/lib/Analysis/LifetimeSafety.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/APINotes/versioned-version-independent.m
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
A clang/test/CIR/CodeGen/complex-arithmetic.cpp
M clang/test/CIR/CodeGen/complex-builtins.cpp
M clang/test/CIR/CodeGen/enum.cpp
M clang/test/CIR/CodeGen/namespace.cpp
M clang/test/CIR/Lowering/select.cir
M clang/test/CXX/drs/cwg26xx.cpp
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/non-policy/overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/non-overloaded/nds_vlnu8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vln8.c
A clang/test/CodeGen/RISCV/andes-intrinsics/policy/overloaded/nds_vlnu8.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vundefined.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslideup.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfncvtbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgatherei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslidedown.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/non-policy/overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/non-overloaded/vfwmaccbf16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfwma/policy/overloaded/vfwmaccbf16.c
M clang/test/Driver/frame-pointer-elim.c
M clang/test/OpenMP/Inputs/declare_target_include.h
M clang/test/OpenMP/declare_target_ast_print.cpp
M clang/test/OpenMP/declare_target_messages.cpp
M clang/test/OpenMP/target_ast_print.cpp
M clang/test/Parser/cxx0x-lambda-expressions.cpp
M clang/test/Sema/constant_builtins_vector.cpp
A clang/test/Sema/warn-lifetime-safety-dataflow.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/cxx20-using-enum.cpp
M clang/test/SemaCXX/cxx2b-deducing-this.cpp
A clang/test/SemaCXX/invalid-base-inheritance.cpp
A clang/test/SemaCXX/range-for-lifetime-cxx23.cpp
M clang/test/SemaHLSL/RootSignature-err.hlsl
A clang/test/SemaHLSL/RootSignature.hlsl
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/tools/cir-translate/cir-translate.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M compiler-rt/lib/asan/asan_allocator.h
M compiler-rt/lib/builtins/aarch64/emupac.cpp
M compiler-rt/lib/builtins/int_types.h
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerIOPosix.cpp
M compiler-rt/lib/fuzzer/FuzzerRandom.h
M compiler-rt/lib/lsan/lsan_allocator.h
M compiler-rt/lib/msan/msan_allocator.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform.h
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_freebsd.h
M compiler-rt/lib/sanitizer_common/sanitizer_stoptheworld_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_unwind_win.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/test/builtins/Unit/aarch64/emupac.c
M flang-rt/include/flang-rt/runtime/format.h
M flang-rt/include/flang-rt/runtime/internal-unit.h
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/non-tbp-dio.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/edit-input.h
M flang-rt/lib/runtime/edit-output.h
M flang-rt/lib/runtime/unit.h
M flang/include/flang/Decimal/decimal.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/OpenACC/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/OpenACC/RegisterOpenACCExtensions.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Driver/frontend-forwarding.f90
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-class.f90
M flang/test/Fir/OpenACC/openacc-type-categories.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Semantics/OpenMP/future-directive-spellings.f90
M flang/test/lib/OpenACC/TestOpenACCInterfaces.cpp
M libc/config/linux/x86_64/entrypoints.txt
M libc/fuzzing/math/CMakeLists.txt
A libc/fuzzing/math/acos_fuzz.cpp
A libc/fuzzing/math/asin_fuzz.cpp
A libc/fuzzing/math/atan_fuzz.cpp
A libc/fuzzing/math/sincos_fuzz.cpp
M libc/include/wchar.yaml
M libc/src/__support/CMakeLists.txt
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
A libc/src/__support/wcs_to_integer.h
M libc/src/wchar/CMakeLists.txt
A libc/src/wchar/wcslcat.cpp
A libc/src/wchar/wcslcat.h
M libc/test/src/__support/CMakeLists.txt
A libc/test/src/__support/wcs_to_integer_test.cpp
M libc/test/src/wchar/CMakeLists.txt
A libc/test/src/wchar/wcslcat_test.cpp
R libclc/.gitignore
A libclc/clc/include/clc/workitem/clc_get_global_id.h
A libclc/clc/include/clc/workitem/clc_get_global_offset.h
A libclc/clc/include/clc/workitem/clc_get_global_size.h
A libclc/clc/include/clc/workitem/clc_get_group_id.h
A libclc/clc/include/clc/workitem/clc_get_local_id.h
A libclc/clc/include/clc/workitem/clc_get_local_linear_id.h
A libclc/clc/include/clc/workitem/clc_get_local_size.h
A libclc/clc/include/clc/workitem/clc_get_max_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_num_groups.h
A libclc/clc/include/clc/workitem/clc_get_num_sub_groups.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_local_id.h
A libclc/clc/include/clc/workitem/clc_get_sub_group_size.h
A libclc/clc/include/clc/workitem/clc_get_work_dim.h
M libclc/clc/lib/amdgcn/SOURCES
A libclc/clc/lib/amdgcn/workitem/clc_get_global_offset.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_global_size.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_group_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_local_id.cl
A libclc/clc/lib/amdgcn/workitem/clc_get_work_dim.cl
M libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/workitem/clc_get_local_linear_id.cl
A libclc/clc/lib/generic/workitem/clc_get_num_sub_groups.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_id.cl
A libclc/clc/lib/generic/workitem/clc_get_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/SOURCES
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_global_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_group_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_id.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_local_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_max_sub_group_size.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_num_groups.cl
A libclc/clc/lib/ptx-nvidiacl/workitem/clc_get_sub_group_local_id.cl
A libclc/opencl/include/clc/opencl/workitem/get_local_linear_id.h
A libclc/opencl/include/clc/opencl/workitem/get_max_sub_group_size.h
A libclc/opencl/include/clc/opencl/workitem/get_num_sub_groups.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_local_id.h
A libclc/opencl/include/clc/opencl/workitem/get_sub_group_size.h
M libclc/opencl/lib/amdgcn/workitem/get_global_offset.cl
M libclc/opencl/lib/amdgcn/workitem/get_global_size.cl
M libclc/opencl/lib/amdgcn/workitem/get_group_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_local_id.cl
M libclc/opencl/lib/amdgcn/workitem/get_work_dim.cl
M libclc/opencl/lib/ptx-nvidiacl/SOURCES
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_global_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_group_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_linear_id.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_local_size.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_max_sub_group_size.cl
M libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_num_sub_groups.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_local_id.cl
A libclc/opencl/lib/ptx-nvidiacl/workitem/get_sub_group_size.cl
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M libcxx/docs/ReleaseNotes/21.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/__hash_table
M libcxx/include/__memory/construct_at.h
M libcxx/include/__node_handle
M libcxx/include/__tree
M libcxx/include/__type_traits/invoke.h
M libcxx/include/ext/hash_map
M libcxx/include/ext/hash_set
M libcxx/include/future
M libcxx/include/map
M libcxx/include/set
M libcxx/include/unordered_map
M libcxx/include/unordered_set
A libcxx/test/extensions/all/cstddef.compile.pass.cpp
A libcxx/test/extensions/clang/clang_modules_include.gen.py
A libcxx/test/extensions/clang/lit.local.cfg
A libcxx/test/extensions/libcxx/include_as_c.sh.cpp
A libcxx/test/extensions/libcxx/libcpp_version.gen.py
A libcxx/test/extensions/libcxx/lit.local.cfg
A libcxx/test/extensions/libcxx/no_assert_include.gen.py
R libcxx/test/libcxx/clang_modules_include.gen.py
R libcxx/test/libcxx/double_include.gen.py
R libcxx/test/libcxx/header_inclusions.gen.py
R libcxx/test/libcxx/include_as_c.sh.cpp
R libcxx/test/libcxx/language.support/support.types/cstddef.compile.pass.cpp
R libcxx/test/libcxx/libcpp_version.gen.py
R libcxx/test/libcxx/no_assert_include.gen.py
R libcxx/test/libcxx/thread/futures/futures.task/type.depr.verify.cpp
R libcxx/test/libcxx/thread/futures/futures.task/types.pass.cpp
R libcxx/test/selftest/lit.local.cfg
M libcxx/test/std/containers/map_allocator_requirement_test_templates.h
M libcxx/test/std/containers/set_allocator_requirement_test_templates.h
A libcxx/test/std/double_include.gen.py
A libcxx/test/std/header_inclusions.gen.py
A libcxx/test/std/thread/futures/futures.task/futures.task.members/type.verify.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/has_unique_object_representations.compile.pass.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Relocations.h
M lld/MinGW/Driver.cpp
M lld/test/ELF/aarch64-patchinst.s
M lld/test/MinGW/driver.test
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointOptions.h
A lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/StopInfo.cpp
M lldb/source/ValueObject/DILEval.cpp
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/Makefile
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/TestFrameVarDILNoDebugInfo.py
A lldb/test/API/commands/frame/var-dil/basics/NoDebugInfo/main.cpp
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
M lldb/test/API/tools/lldb-dap/optimized/TestDAP_optimized.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
A lldb/test/Shell/Breakpoint/condition-lang.test
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/Handler/VariablesRequestHandler.cpp
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/JSONUtilsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
M llvm/docs/GettingInvolved.rst
M llvm/docs/QualGroup.rst
M llvm/docs/RISCV/RISCVVectorExtension.rst
M llvm/docs/Remarks.rst
M llvm/docs/WritingAnLLVMPass.rst
M llvm/docs/index.rst
A llvm/docs/qual-wg/slides/202507_llvm_qual_wg.pdf
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/include/llvm/Analysis/ObjCARCAnalysisUtils.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
A llvm/include/llvm/CodeGen/PostRAMachineSink.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/abi-breaking.h.cmake
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/TargetPassRegistry.inc
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Support/Compiler.h
A llvm/include/llvm/Target/RegisterTargetPassConfigCallback.h
M llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
M llvm/lib/CodeGen/AsmPrinter/DIEHash.h
M llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
M llvm/lib/CodeGen/InlineSpiller.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
M llvm/lib/CodeGen/RegAllocScore.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetInstrInfo.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/FileCheck/FileCheckImpl.h
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/SampleProf.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPDInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/BPF/BPFISelLowering.h
M llvm/lib/Target/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.cpp
M llvm/lib/Target/DirectX/DXILRootSignature.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVSchedAndes45.td
M llvm/lib/Target/RISCV/RISCVSchedGenericOOO.td
M llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP500.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP800.td
M llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR345.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVSchedTTAscalonD8.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/lib/Target/RegisterTargetPassConfigCallback.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
A llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/MetaRenamer.cpp
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanSLP.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.h
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/CostModel/AArch64/cmp.ll
A llvm/test/Analysis/CostModel/AArch64/fcmp.ll
M llvm/test/Analysis/CostModel/AArch64/select.ll
A llvm/test/Analysis/CostModel/AArch64/sve-fcmp.ll
M llvm/test/Analysis/CostModel/AArch64/vector-select.ll
A llvm/test/Analysis/CostModel/RISCV/cast-sat.ll
M llvm/test/Analysis/CostModel/RISCV/fround.ll
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
M llvm/test/Analysis/DependenceAnalysis/DifferentOffsets.ll
M llvm/test/CodeGen/AArch64/bisect-post-ra-machine-sink.mir
M llvm/test/CodeGen/AArch64/bsl.ll
M llvm/test/CodeGen/AArch64/eor3.ll
A llvm/test/CodeGen/AArch64/exception-handling-windows-elf.ll
M llvm/test/CodeGen/AArch64/post-ra-machine-sink.mir
M llvm/test/CodeGen/AArch64/sve-bf16-arith.ll
M llvm/test/CodeGen/AArch64/sve-fptosi-sat.ll
M llvm/test/CodeGen/AArch64/sve-fptoui-sat.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
M llvm/test/CodeGen/AArch64/sve-llrint.ll
M llvm/test/CodeGen/AArch64/sve-lrint.ll
M llvm/test/CodeGen/AArch64/sve-merging-unary.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop3.ll
M llvm/test/CodeGen/AArch64/sve2-bsl.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-crash-splat.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/postra-machine-sink.mir
M llvm/test/CodeGen/AMDGPU/postra-sink-update-dependency.mir
M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
A llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
A llvm/test/CodeGen/ARM/issue147935-half-convert-libcall-abi.ll
A llvm/test/CodeGen/ARM/min-max-combine.ll
A llvm/test/CodeGen/Hexagon/llvm.sincos.ll
M llvm/test/CodeGen/Inputs/stack-guard-reassign.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
A llvm/test/CodeGen/RISCV/rvv/llround-sdnode.ll
A llvm/test/CodeGen/RISCV/rvv/lround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/SystemZ/no-postra-sink.mir
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-unknown-lanes.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll
A llvm/test/CodeGen/X86/coalesce-commutative-implicit-def.mir
M llvm/test/CodeGen/X86/postra-ignore-dbg-instrs.mir
A llvm/test/CodeGen/X86/pr147781.ll
M llvm/test/CodeGen/X86/pr38952.mir
M llvm/test/CodeGen/X86/pr78897.ll
M llvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir
M llvm/test/Instrumentation/MemorySanitizer/X86/avx-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
M llvm/test/Instrumentation/MemorySanitizer/abs-vector.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx-intrinsics-i386.ll
A llvm/test/MC/AMDGPU/gfx1250_asm_salu_lit64.s
A llvm/test/MC/AMDGPU/gfx1250_asm_valu_lit64.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd3.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd_errs.s
A llvm/test/MC/AMDGPU/gfx1250_asm_vopd_features.s
A llvm/test/MC/AMDGPU/gfx1250_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_salu_lit64.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_valu_lit64.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vopd3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
A llvm/test/Other/codegen-plugin-loading.ll
M llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
M llvm/test/TableGen/RuntimeLibcallEmitter.td
M llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
A llvm/test/Transforms/Coroutines/coro-split-dbg-nested-struct.ll
A llvm/test/Transforms/InferAddressSpaces/SPIRV/generic-cast-explicit.ll
A llvm/test/Transforms/InferAddressSpaces/SPIRV/lit.local.cfg
A llvm/test/Transforms/LoadStoreVectorizer/batch-aa-compile-time.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-runtime.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-min-max.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
A llvm/unittests/CodeGen/CGPluginTest/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.cpp
A llvm/unittests/CodeGen/CGPluginTest/Plugin/CodeGenTestPass.h
A llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
A llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/clang/lib/Analysis/BUILD.gn
M llvm/utils/gn/secondary/lldb/tools/lldb-dap/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/Plugin/BUILD.gn
A llvm/utils/mlgo-utils/combine_training_corpus.py
A llvm/utils/mlgo-utils/extract_ir.py
A llvm/utils/mlgo-utils/make_corpus.py
M llvm/utils/remote-exec.py
M mlir/include/mlir/Dialect/GPU/Transforms/Passes.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpBase.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/AMDGPU/Transforms/MaskedloadToLoad.cpp
M mlir/lib/Dialect/GPU/CMakeLists.txt
A mlir/lib/Dialect/GPU/Transforms/XeVMAttachTarget.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorToFromElementsToShuffleTree.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Conversion/VectorToXeGPU/load-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
M mlir/test/Dialect/AMDGPU/maskedload-to-load.mlir
M mlir/test/Dialect/LLVMIR/attach-targets.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Dialect/OpenMP/cli-canonical_loop-invalid.mlir
A mlir/test/Dialect/OpenMP/cli-canonical_loop.mlir
A mlir/test/Dialect/OpenMP/cli-unroll-heuristic.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/Dialect/XeGPU/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Target/Cpp/declare_func.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/lib/Dialect/GPU/CMakeLists.txt
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
M offload/CMakeLists.txt
A offload/docs/.gitignore
A offload/docs/CMakeLists.txt
A offload/docs/conf.py
A offload/docs/index.rst
M offload/liboffload/API/Common.td
M offload/liboffload/API/Kernel.td
M offload/liboffload/API/OffloadAPI.td
A offload/liboffload/API/Symbol.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/GlobalHandler.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/tools/offload-tblgen/APIGen.cpp
M offload/tools/offload-tblgen/CMakeLists.txt
A offload/tools/offload-tblgen/DocGen.cpp
M offload/tools/offload-tblgen/GenCommon.hpp
M offload/tools/offload-tblgen/Generators.hpp
M offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/OffloadAPI/common/Fixtures.hpp
M offload/unittests/OffloadAPI/kernel/olGetKernel.cpp
M offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
M third-party/siphash/include/siphash/SipHash.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/wchar/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
A utils/bazel/llvm-project-overlay/third-party/siphash/BUILD.bazel
M utils/bazel/llvm_configs/abi-breaking.h.cmake
Log Message:
-----------
Address review comments
Created using spr 1.3.6-beta.1
Compare: https://github.com/llvm/llvm-project/compare/efb98de67423...ab863bfd3074
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