[all-commits] [llvm/llvm-project] 585154: [AArch64][SME] Support split ZPR and PPR area allo...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/users/MacDue/split_pprs
  Home:   https://github.com/llvm/llvm-project
  Commit: 5851544d4484f373045dac52f7bf45e32ba5cdb9
      https://github.com/llvm/llvm-project/commit/5851544d4484f373045dac52f7bf45e32ba5cdb9
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h
    M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
    A llvm/test/CodeGen/AArch64/framelayout-split-sve.mir
    M llvm/test/CodeGen/AArch64/spill-fill-zpr-predicates.mir
    A llvm/test/CodeGen/AArch64/split-sve-stack-frame-layout.ll
    M llvm/test/CodeGen/AArch64/stack-hazard.ll
    M llvm/test/CodeGen/AArch64/sve-stack-frame-layout.ll

  Log Message:
  -----------
  [AArch64][SME] Support split ZPR and PPR area allocation

For a while we have supported the `-aarch64-stack-hazard-size=<size>`
option, which adds "hazard padding" between GPRs and FPR/ZPRs. However,
there is currently a hole in this mitigation as PPR and FPR/ZPR accesses
to the same area also cause streaming memory hazards (this is noted by
`-pass-remarks-analysis=sme -aarch64-stack-hazard-remark-size=<val>`),
and the current stack layout places PPRs and ZPRs within the same area.

Which looks like:

------------------------------------  Higher address
| callee-saved gpr registers        |
|---------------------------------- |
| lr,fp  (a.k.a. "frame record")    |
|-----------------------------------| <- fp(=x29)
|   <hazard padding>                |
|-----------------------------------|
| callee-saved fp/simd/SVE regs     |
|-----------------------------------|
|        SVE stack objects          |
|-----------------------------------|
| local variables of fixed size     |
|   <FPR>                           |
|   <hazard padding>                |
|   <GPR>                           |
------------------------------------| <- sp
                                    | Lower address

With this patch the stack (and hazard padding) is rearranged so that
hazard padding is placed between the PPRs and ZPRs rather than within
the (fixed size) callee-save region. Which looks something like this:

------------------------------------  Higher address
| callee-saved gpr registers        |
|---------------------------------- |
| lr,fp  (a.k.a. "frame record")    |
|-----------------------------------| <- fp(=x29)
|        callee-saved PPRs          |
|        PPR stack objects          | (These are SVE predicates)
|-----------------------------------|
|   <hazard padding>                |
|-----------------------------------|
|       callee-saved ZPR regs       | (These are SVE vectors)
|        ZPR stack objects          | Note: FPRs are promoted to ZPRs
|-----------------------------------|
| local variables of fixed size     |
|   <FPR>                           |
|   <hazard padding>                |
|   <GPR>                           |
------------------------------------| <- sp
                                    | Lower address

This layout is only enabled if:

 * SplitSVEObjects are enabled (`-aarch64-split-sve-objects`)
   - (This may be enabled by default in a later patch)
 * Streaming memory hazards are present
   - (`-aarch64-stack-hazard-size=<val>` != 0)
 * PPRs and FPRs/ZPRs are on the stack
 * There's no stack realignment or variable-sized objects
   - This is left as a TODO for now

Additionally, any FPR callee-saves that are present will be promoted to
ZPRs. This is to prevent stack hazards between FPRs and GRPs in the
fixed size callee-save area (which would otherwise require more hazard
padding, or moving the FPR callee-saves).

This layout should resolve the hole in the hazard padding mitigation,
and is not intended change codegen for non-SME code.


  Commit: caf0b2be00437577a1ff2e6fed51fe7323fe8f56
      https://github.com/llvm/llvm-project/commit/caf0b2be00437577a1ff2e6fed51fe7323fe8f56
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/lib/Target/AArch64/AArch64FrameLowering.h

  Log Message:
  -----------
  Remove default


  Commit: ca74899e2786f8801558ff1931d458a6751abcd9
      https://github.com/llvm/llvm-project/commit/ca74899e2786f8801558ff1931d458a6751abcd9
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Tidy PPR/ZPR check

Change-Id: I30e2cf5ea7a1df932f145e685a3fbd39cd974d4d


  Commit: 7ac674c4f1f0b65934d9894e06abcb810d10aed7
      https://github.com/llvm/llvm-project/commit/7ac674c4f1f0b65934d9894e06abcb810d10aed7
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Rename StackID

Change-Id: I5c7b5c731ef030fbd8580ae8e55e896f9927741c


  Commit: 18e44c24ef010ca5c59f69410d9ff292685d054e
      https://github.com/llvm/llvm-project/commit/18e44c24ef010ca5c59f69410d9ff292685d054e
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2025-07-10 (Thu, 10 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

  Log Message:
  -----------
  Rebase

Change-Id: I1208aebeabbc4df1c81f1c8f5a222688c28ef985


Compare: https://github.com/llvm/llvm-project/compare/9131d7dac7a6...18e44c24ef01

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