[all-commits] [llvm/llvm-project] b44c50: [NVPTX] Rework and cleanup FTZ ISel (#146410)

[Alex MacLean via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b44c50d41626b7b81da7cdfb2292a0b58fcc838f
      https://github.com/llvm/llvm-project/commit/b44c50d41626b7b81da7cdfb2292a0b58fcc838f
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2025-07-09 (Wed, 09 Jul 2025)

  Changed paths:
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
    M llvm/test/CodeGen/NVPTX/atomics-sm70.ll
    M llvm/test/CodeGen/NVPTX/atomics-sm90.ll
    M llvm/test/CodeGen/NVPTX/atomics.ll
    M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
    M llvm/test/CodeGen/NVPTX/branch-fold.mir
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg.ll
    M llvm/test/CodeGen/NVPTX/compare-int.ll
    M llvm/test/CodeGen/NVPTX/distributed-shared-cluster.ll
    M llvm/test/CodeGen/NVPTX/extractelement.ll
    M llvm/test/CodeGen/NVPTX/f16-instructions.ll
    M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/fast-math.ll
    M llvm/test/CodeGen/NVPTX/i1-select.ll
    M llvm/test/CodeGen/NVPTX/i128.ll
    M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test1.ll
    M llvm/test/CodeGen/NVPTX/inline-asm-b128-test3.ll
    M llvm/test/CodeGen/NVPTX/jump-table.ll
    M llvm/test/CodeGen/NVPTX/load-with-non-coherent-cache.ll
    M llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll
    M llvm/test/CodeGen/NVPTX/sext-setcc.ll
    M llvm/test/CodeGen/NVPTX/tid-range.ll

  Log Message:
  -----------
  [NVPTX] Rework and cleanup FTZ ISel (#146410)

This change cleans up DAG-to-DAG instruction selection around FTZ and
SETP comparison mode. Largely these changes do not impact functionality
though support for `{sin.cos}.approx.ftz.f32` is added.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications