[all-commits] [llvm/llvm-project] 8e104d: [Offload] Provide proper memory management for Ima...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Wed Jul 9 08:03:44 PDT 2025
Branch: refs/heads/users/alexey-bataev/spr/slp-emit-reduction-instead-of-2-extracts-scalar-op-when-vectorizing-operands
Home: https://github.com/llvm/llvm-project
Commit: 8e104d69fc4a7fa6e93fd543208f184628d1d2ae
https://github.com/llvm/llvm-project/commit/8e104d69fc4a7fa6e93fd543208f184628d1d2ae
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[Offload] Provide proper memory management for Images on host device (#146066)
The `unloadBinaryImpl` method on the host plugin is now implemented
properly (rather than just being a stub). When an image is unloaded,
it is deallocated and the library associated with it is closed.
Commit: 71f6bfebc2cf36c87910e6e12b3ae3f564db0bc5
https://github.com/llvm/llvm-project/commit/71f6bfebc2cf36c87910e6e12b3ae3f564db0bc5
Author: David Green <david.green at arm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir
Log Message:
-----------
[AArch64] Add mir test coverage for madd imm combine. NFC
Commit: 0ff01ef9d457820eb5c670461b15084e2ac962a0
https://github.com/llvm/llvm-project/commit/0ff01ef9d457820eb5c670461b15084e2ac962a0
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
Log Message:
-----------
[clang-tidy] support ak_attr_info in diagnostic forwarding (#147503)
This patch addresses missing support for forwarding `ak_attr_info`
diagnostic arguments in `ClangTidyDiagnosticConsumer`
Commit: 2d3d0e502dfdf697f552ddb61268be860e2a5be6
https://github.com/llvm/llvm-project/commit/2d3d0e502dfdf697f552ddb61268be860e2a5be6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lld/test/wasm/lto/Inputs/libcall-archive.ll
M lld/test/wasm/lto/libcall-archive.ll
M llvm/include/llvm/IR/RuntimeLibcalls.h
Log Message:
-----------
RuntimeLibcalls: Fix dropping first libcall entry (#147461)
Fixes regression reported after #144973, which happened to
be acosf.
Commit: 0f391d6f51217de5cb6735b17f359eb078bbe94e
https://github.com/llvm/llvm-project/commit/0f391d6f51217de5cb6735b17f359eb078bbe94e
Author: Ritanya-B-Bharadwaj <ritanya.b.bharadwaj at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp.h
Log Message:
-----------
[OpenMP] OpenMP ThreadSet clause - basic runtime (#144409)
Initial runtime support for threadset clause in task and taskloop
directives [Section 14.8 in in OpenMP 6.0 spec]
Frontend PR- https://github.com/llvm/llvm-project/pull/135807
Commit: 6c8c836b4f5a0b519db6f97c4882c6c061edd004
https://github.com/llvm/llvm-project/commit/6c8c836b4f5a0b519db6f97c4882c6c061edd004
Author: Tom Natan <tomnatan at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/CommandLine.h
Log Message:
-----------
Add an llvm::cl::opt::operator=(T &&Val) (#147502)
Add an llvm::cl::opt::operator= that takes an rvalue reference of value,
to avoid an unecessary copy for types with memory allocation (string,
vector, etc).
Commit: 889854bef14a7a9df4a730b20abc3cad3140f644
https://github.com/llvm/llvm-project/commit/889854bef14a7a9df4a730b20abc3cad3140f644
Author: Nikita Popov <npopov at redhat.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add4.ll
Log Message:
-----------
[InstCombine] Avoid unprofitable add with remainder transform (#147319)
If C1 is 1 and we're working with a power of two divisor, this will end
up replacing the `and` for the remainder with a multiply and a longer
dependency chain.
Fixes https://github.com/llvm/llvm-project/issues/147176.
Commit: f1e1b480238e83db62b383cfd88fb1b96804cec0
https://github.com/llvm/llvm-project/commit/f1e1b480238e83db62b383cfd88fb1b96804cec0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
Log Message:
-----------
[LV] Strip redundant fn in VPBuilder (NFC) (#147499)
Commit: f1451e9f0706316af8e0a537870407284fb920c8
https://github.com/llvm/llvm-project/commit/f1451e9f0706316af8e0a537870407284fb920c8
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Improve code using drop_{begin,end} (NFC) (#147504)
Commit: e4d00683c3285ccd1f8d5053efe691e980a54576
https://github.com/llvm/llvm-project/commit/e4d00683c3285ccd1f8d5053efe691e980a54576
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/lib/Sema/SemaARM.cpp
M clang/utils/TableGen/SveEmitter.cpp
Log Message:
-----------
[Clang][SME] Refactor checkArmStreamingBuiltin. (#145941)
Rather than filtering the calling function's features the PR splits the
builtin guard into distinct non-streaming and streaming guards that are
compared to the active features in full.
Commit: d9b208b4d31d863c86e27e8889a521a82385f1a7
https://github.com/llvm/llvm-project/commit/d9b208b4d31d863c86e27e8889a521a82385f1a7
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/TestDataFormatterStdVariant.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/TestDataFormatterLibcxxVariant.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/TestDataFormatterInvalidStdVariant.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/TestDataFormatterLibStdcxxVariant.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/main.cpp
Log Message:
-----------
[lldb][test] Combine libstdc++ and libc++ std::variant tests into generic test (#147253)
This combines the libc++ and libstdc++ test cases. The libstdc++ test
had an additional test-case for "reference to typedef". So I added those
to the generic test. The rest of the tests was the same as libc++.
I also moved the test-case for checking invalid variant indexes into a
separate libstdcpp test because it relied on the layout of the libstdc++
type. We should probably rewrite it in the "simulator" style. But for
now I just moved it.
This also removes some redundant checks for libc++ versions and
existence of the `variant` header, which at this point should be
available anywhere these tests are run.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: 1f28da60d5dfa51b1e623fdd168fbb3ea85f6ac9
https://github.com/llvm/llvm-project/commit/1f28da60d5dfa51b1e623fdd168fbb3ea85f6ac9
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/TestDataFormatterStdString.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/TestDataFormatterLibcxxString.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/TestDataFormatterStdString.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/main.cpp
Log Message:
-----------
[lldb][test] Combine libstdc++ and libc++ std::string tests into generic test (#147355)
This combines the libc++ and libstdc++ test cases. The main difference
was that the libstdcpp tests had additional tests for
references/pointers to std::string. I moved those over.
The libstdc++ formatters don't support `std::u16string`/`std::u32string`
yet, so I extracted those into XFAILed test cases.
There were also two test assertions that failed for libstdc++:
1. libstdc++ doesn't obey the capped/uncapped summary options
2. When a summary isn't available for a std::string, libc++ would print
"Summary Unavailable", whereas libstdc++ just prints "((null))". This
may be better suited for the STL-specific subdirectories, but left it
here for now.
I put those in separate XFAILed test-cases.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: 77ea912a796e00f86a6a114de45c01017a9d51d3
https://github.com/llvm/llvm-project/commit/77ea912a796e00f86a6a114de45c01017a9d51d3
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/Basic/DiagnosticCommentKinds.td
M clang/lib/AST/CommentSema.cpp
Log Message:
-----------
[clang][diagnostics] Refactor "warn_doc_container_decl_mismatch" to use enum_select (#147120)
Related: https://github.com/llvm/llvm-project/issues/123121
This patch refactors the `warn_doc_container_decl_mismatch` diagnostic
to use `enum_select` instead of `select`. This gets rid of magic numbers
and improves readability in the caller site.
@cor3ntin @erichkeane
Commit: 9006bc87170e347a776f34439fe1884d719e0861
https://github.com/llvm/llvm-project/commit/9006bc87170e347a776f34439fe1884d719e0861
Author: Kajetan Puchalski <kajetan.puchalski at arm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-parallel-do-simd.mlir
A mlir/test/Target/LLVMIR/openmp-teams-distribute-parallel-do-simd.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[OpenMP] Enable simd in non-reduction composite constructs (#146097)
Despite currently being ignored with a warning, simd as a leaf in
composite constructs behaves as expected when the construct does not
contain a reduction. Enable it for those non-reduction constructs.
---------
Signed-off-by: Kajetan Puchalski <kajetan.puchalski at arm.com>
Commit: 31786ee89f683721248ef6c41d347a00a5e619f6
https://github.com/llvm/llvm-project/commit/31786ee89f683721248ef6c41d347a00a5e619f6
Author: David Spickett <david.spickett at linaro.org>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M flang/include/flang/Common/interval.h
Log Message:
-----------
[flang] Avoid undefined behaviour in Interval::Contains (#147505)
If the size of the other Interval was 0, (that.size_ - 1) would wrap
below zero.
I've fixed this so that a zero size interval A is within interval B if
the start of A is within B. There's a few ways you could handle zero
sized intervals in theory but this one passes all tests so I assume it's
the intention.
This fixes the following tests when ubsan is enabled:
Flang :: Lower/OpenMP/PFT/sections-pft.f90
Flang :: Lower/OpenMP/derived-type-allocatable.f90
Flang :: Lower/OpenMP/privatization-proc-ptr.f90
Flang :: Lower/OpenMP/sections.f90
Flang :: Parser/OpenMP/sections.f90
Flang :: Semantics/OpenMP/clause-validity01.f90
Flang :: Semantics/OpenMP/if-clause.f90
Flang :: Semantics/OpenMP/parallel-sections01.f90
Flang :: Semantics/OpenMP/private-assoc.f90
Commit: 1693ac35aa294837cfddad065e426127b1c33fd0
https://github.com/llvm/llvm-project/commit/1693ac35aa294837cfddad065e426127b1c33fd0
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
Log Message:
-----------
[ValueTracking] Improve code using dropSameSign (NFC) (#147367)
Commit: f9999184ddde1bc5de1bba0e25780cb25f435909
https://github.com/llvm/llvm-project/commit/f9999184ddde1bc5de1bba0e25780cb25f435909
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
A lldb/source/Plugins/Language/CPlusPlus/Generic.cpp
M lldb/source/Plugins/Language/CPlusPlus/Generic.h
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/shared_ptr/TestDataFormatterStdSharedPtr.py
Log Message:
-----------
[lldb][Formatters] Consistently unwrap pointer element_type in std::shared_ptr formatters (#147340)
Follow-up to
https://github.com/llvm/llvm-project/pull/147165#pullrequestreview-2992585513
Currently when we explicitly dereference a std::shared_ptr, both the
libstdc++ and libc++ formatters will cast the type of the synthetic
pointer child to whatever the `std::shared_ptr::element_type` is aliased
to. E.g.,
```
(lldb) v p
(std::shared_ptr<int>) p = 10 strong=1 weak=0 {
pointer = 0x000000010016c6a0
}
(lldb) v *p
(int) *p = 10
```
However, when we print (or dereference) `p.pointer`, the type devolves
to something less user-friendly:
```
(lldb) v p.pointer
(std::shared_ptr<int>::element_type *) p.pointer = 0x000000010016c6a0
(lldb) v *p.pointer
(std::shared_ptr<int>::element_type) *p.pointer = 10
```
This patch changes both formatters to store the casted type. Then
`GetChildAtIndex` will consistently use the unwrapped type.
Commit: b0790e04a370b8dbee9f839983641820c1b1b844
https://github.com/llvm/llvm-project/commit/b0790e04a370b8dbee9f839983641820c1b1b844
Author: woruyu <99597449+woruyu at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/vselect-constants.ll
Log Message:
-----------
[DAG] combineVSelectWithAllOnesOrZeros - fold select Cond, 0, x -> and not(Cond), x (#147472)
### Summary
This patch extends the work from
[#145298](https://github.com/llvm/llvm-project/pull/145298) by removing
the now-unnecessary X86-specific combineVSelectWithLastZeros logic. That
combine is now correctly and more generally handled in the
target-independent combineVSelectWithAllOnesOrZeros.
This simplifies the X86 DAG combine logic and avoids duplication.
Fixes: [#144513](https://github.com/llvm/llvm-project/issues/144513)
Related for reference:
[#146831](https://github.com/llvm/llvm-project/pull/146831)
Commit: 324ff67d6bca4bc6a3bb739d13befcd4c6e98dc6
https://github.com/llvm/llvm-project/commit/324ff67d6bca4bc6a3bb739d13befcd4c6e98dc6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
Log Message:
-----------
[AMDGPU] load-global-i8.ll - regenerate test checks
Commit: 39bc0529b018a89b4b6a21aaabe240cd3a65c44d
https://github.com/llvm/llvm-project/commit/39bc0529b018a89b4b6a21aaabe240cd3a65c44d
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.h
M clang/test/Analysis/new.cpp
A clang/test/Analysis/test-member-invalidation.cpp
Log Message:
-----------
[analyzer] Conversion to CheckerFamily: MallocChecker (#147080)
This commit converts MallocChecker to the new checker family framework
that was introduced in the recent commit
6833076a5d9f5719539a24e900037da5a3979289 -- and gets rid of some awkward
unintended interactions between the checker frontends.
Commit: f72e53f35070140cbd6d4acdf7f8bc37f72d0445
https://github.com/llvm/llvm-project/commit/f72e53f35070140cbd6d4acdf7f8bc37f72d0445
Author: kadir çetinkaya <kadircet at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
A clang/test/AST/static-compound-literals-crash.cpp
A clang/test/AST/static-compound-literals-reeval.cpp
A clang/test/AST/static-compound-literals.cpp
Log Message:
-----------
[clang][CompundLiteralExpr] Don't defer evaluation for CLEs (#137163)
Previously we would defer evaluation of CLEs until LValue to RValue
conversions, which would result in creating values within wrong scope
and triggering use-after-frees.
This patch instead eagerly evaluates CLEs, within the scope requiring
them. This requires storing an extra pointer for CLE expressions with
static storage.
Fixes https://github.com/llvm/llvm-project/issues/137165
Commit: b84696db745e127cc6fb1d49bbf39f3c0819b6d9
https://github.com/llvm/llvm-project/commit/b84696db745e127cc6fb1d49bbf39f3c0819b6d9
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/type-info.cpp
Log Message:
-----------
Fix the type of offset that broke 32-bit flang-rt build to use `uint64_t` consistently (#147359)
The recent change of `flang-rt` has code like `std::size_t
offset{offset_};`.
It broke the 32-bit `flang-rt` build because `Component::offset_` is of
type `uint64_t` but `size_t` varies.
Clang complains
```
error: non-constant-expression cannot be narrowed from type 'std::uint64_t' (aka 'unsigned long long') to 'std::size_t' (aka 'unsigned long') in initializer list [-Wc++11-narrowing]
143 | std::size_t offset{offset_};
| ^~~~~~~
```
This patch is to use the consistent `uint64_t` for offset.
Commit: 875581b3ca150b4bd837b0505927639326f40e05
https://github.com/llvm/llvm-project/commit/875581b3ca150b4bd837b0505927639326f40e05
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
A compiler-rt/lib/asan/AIX/asan.link_with_main_exec.txt
A compiler-rt/lib/asan/AIX/asan_cxx.link_with_main_exec.txt
R compiler-rt/lib/asan/asan.link_with_main_exec.txt
R compiler-rt/lib/asan/asan_cxx.link_with_main_exec.txt
Log Message:
-----------
[asan][AIX] Move import/export lists to an AIX-specific subdirectory (#145936)
This makes it more clear that these lists are AIX-specific.
Commit: d338d197e7ee6e6f8986e14b2aec9d4c368d8a9e
https://github.com/llvm/llvm-project/commit/d338d197e7ee6e6f8986e14b2aec9d4c368d8a9e
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/TestDataFormatterStdQueue.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/TestDataFormatterLibcxxQueue.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/main.cpp
Log Message:
-----------
[lldb][test] Move std::queue from libcxx to generic directory (#147529)
This just moves the test from `libcxx` to `generic`. There are currently
no `std::queue` formatters for libstdc++ so I didn't add a test-case for
it.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: 4b2212322f307a78865fe7f47694654ff57e975a
https://github.com/llvm/llvm-project/commit/4b2212322f307a78865fe7f47694654ff57e975a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
Log Message:
-----------
[gn build] Port f9999184ddde
Commit: d440809f4e555f8c16835bc07b9509deefc354c4
https://github.com/llvm/llvm-project/commit/d440809f4e555f8c16835bc07b9509deefc354c4
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Improve code using DenseMap::lookup (NFC) (#147507)
Commit: 517cda12e5091216645903ec85087b0b2f8239c4
https://github.com/llvm/llvm-project/commit/517cda12e5091216645903ec85087b0b2f8239c4
Author: lonely eagle <2020382038 at qq.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Add foldInsertUseChain folder function to insert op (#147045)
When the result of an insert op is used by an insert op, and the
subsequent insert op is inserted at the same location as the previous
insert op, replaces the dest of the subsequent insert op with the dest
of the previous insert op.This is because the previous insert op does
not affect subsequent insert ops.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 4a68562e9aef03b7ffcc1761809522d71e965835
https://github.com/llvm/llvm-project/commit/4a68562e9aef03b7ffcc1761809522d71e965835
Author: Darren Wihandi <65404740+fairywreath at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
Log Message:
-----------
[mlir][spirv] Reject coop matrix operands on unsupported arithmetic ops (#147230)
Cooperative matrix operands are only supported for `add/sub/mul/div`
binary arithmetic ops, but currently all binary arithmetic ops accept
cooperative matrix operands, including `mod/rem`. This change fixes this
behaviour.
Commit: 653f81587fd2756b90a856ec8079f95b57d66cc3
https://github.com/llvm/llvm-project/commit/653f81587fd2756b90a856ec8079f95b57d66cc3
Author: Roman Beliaev <belyaevrd at yandex.ru>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
Log Message:
-----------
[llvm-cov] Add FileID to MCDC records of the json code coverage export (#145236)
At the moment MCDC Record contains ExpandedFileID. If FileID !=
ExpandedFileID, the record's lines LineStart and LineEnd relate to the
`FileID` file, but the record doesn't contain this id. So we can't
distinguish multiple MCDC records with the same lines and columns, but
different FileIDs.
This adds FileID to MCDC records as it is done for regions and branches.
Commit: 67076dd79fb4387ab0663154b7b82e4f8f2a5377
https://github.com/llvm/llvm-project/commit/67076dd79fb4387ab0663154b7b82e4f8f2a5377
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
Log Message:
-----------
AMDGPU: Fix atomic expand tests accidentally underaligning (#147299)
Commit: acdf1c75269b6c55cf1a994a289595a3a3f41caf
https://github.com/llvm/llvm-project/commit/acdf1c75269b6c55cf1a994a289595a3a3f41caf
Author: Dominik Steenken <dost at de.ibm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
A llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
Log Message:
-----------
[DAG] Add generic expansion for ISD::FCANONICALIZE nodes (#142105)
This PR takes the work previously done by @pawan-nirpal-031 on X86 in
#106370, and makes it available in common code. This should enable all
targets to use `__builtin_canonicalize` for all `f(16|32|64|128)` data
types.
Canonicalization is implemented here as multiplication by `1.0`, as
suggested in [the
docs](https://llvm.org/docs/LangRef.html#llvm-canonicalize-intrinsic).
Commit: 65f94d75187bdab5c853e31fbf35267258f0be67
https://github.com/llvm/llvm-project/commit/65f94d75187bdab5c853e31fbf35267258f0be67
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Don't crash on erroneous switch conditions (#147533)
Not attaching a test since I've only seen this when compiling a large
c++26 test case as c++17.
Commit: 5cefb9a367c80a69a6d80956bf8822ee0e5dd766
https://github.com/llvm/llvm-project/commit/5cefb9a367c80a69a6d80956bf8822ee0e5dd766
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Fix __builtin_is_within_lifetime in initializers (#147480)
Commit: 2fd37c9f33f24dda4125fe9c7cfc4002f6e37922
https://github.com/llvm/llvm-project/commit/2fd37c9f33f24dda4125fe9c7cfc4002f6e37922
Author: Jay Foad <jay.foad at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Remove RegUnitIterator. NFC. (#147483)
TableGen's RegUnitIterator is a strange contraption that iterates over a
range of registers as well as the regunits of each register. Since it is
only used in one place in a `for` loop, it is much simpler to use two
nested loops instead.
Commit: 02aacc4cef65387161a91399561ea7eaf2b27e8d
https://github.com/llvm/llvm-project/commit/02aacc4cef65387161a91399561ea7eaf2b27e8d
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M openmp/runtime/src/kmp_runtime.cpp
Log Message:
-----------
Reland: [OpenMP][clang] 6.0: num_threads strict (part 1: host runtime) (#147532)
OpenMP 6.0 12.1.2 specifies the behavior of the strict modifier for the
num_threads clause on parallel directives, along with the message and
severity clauses. This commit implements necessary host runtime changes.
Reland https://github.com/llvm/llvm-project/pull/146403. After manual
testing on a gfx90a machine, I could not reproduce the failing test,
which makes it even more likely that the test has just been flaky. (Or
at least that it's not an issue related to this patch.)
Commit: fcc09b6f02676e2a0a2c75460ec0dacc89de7525
https://github.com/llvm/llvm-project/commit/fcc09b6f02676e2a0a2c75460ec0dacc89de7525
Author: itrofimow <i.trofimow at yandex.ru>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M libcxx/include/__exception/exception_ptr.h
A libcxx/test/std/language.support/support.exception/propagation/make_exception_ptr.objc.pass.mm
Log Message:
-----------
[libc++] Fix std::make_exception_ptr interaction with ObjC (#135386)
Clang treats throwing/catching ObjC types differently from C++ types,
and omitting the `throw` in `std::make_exception_ptr` breaks ObjC
invariants about how types are thrown/caught.
Fixes #135089
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: bbefd33ae619977d44b221e9917143e7f92aab94
https://github.com/llvm/llvm-project/commit/bbefd33ae619977d44b221e9917143e7f92aab94
Author: Amr Hesham <amr96 at programmer.net>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/complex.cpp
Log Message:
-----------
[CIR] Implement CXXScalarValueInitExpr for ComplexType (#147143)
Implement CXXScalarValueInitExpr support for ComplexType
https://github.com/llvm/llvm-project/issues/141365
Commit: 5adb9a2936855a27d4325a7a73b691f8aa67f35c
https://github.com/llvm/llvm-project/commit/5adb9a2936855a27d4325a7a73b691f8aa67f35c
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenCXX/cxx0x-initializer-scalars.cpp
Log Message:
-----------
[Clang] Fix crash on `void{}` (#147514)
Caused by an incorrect assertion.
Fixes #116440
Commit: e29ac9bc2e0ae8871dccea939554b39589cc07bd
https://github.com/llvm/llvm-project/commit/e29ac9bc2e0ae8871dccea939554b39589cc07bd
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/partial-order.cpp
Log Message:
-----------
[Clang] Do not mark ambiguous specialization invalid. (#147275)
When a specialization was ambiguous, we would mark it as invalid, even
if the specialization occured in an immediate context.
This would subsequently lead to scenarios where invalid specialization
produced no diagnostics, causing crashes during codegen.
Fixes #51866
Commit: ee2d2bda71fcb4cf65f9f2dbca2d72132ea7e880
https://github.com/llvm/llvm-project/commit/ee2d2bda71fcb4cf65f9f2dbca2d72132ea7e880
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/unittests/tools/llvm-mca/CMakeLists.txt
Log Message:
-----------
[lllvm] add Passes to LLVM_LINK_COMPONENTS for LLVMMCATests (#145617)
## Purpose
Add `Passes` to `LLVM_LINK_COMPONENTS` for `LLVMMCATests` so that it
links properly when LLVM is built as a Windows DLL.
## Background
`LLVPasses` appears to be a missing dependency from `LLVMMCATests`, but
when LLVM is built statically it picks-up the required `LLVMPasses`
symbols from a transitive dependency (presumably). When LLVM is built as
a Windows DLL, `LLVMMCATests` fails to link 4 symbols from `LLVMPasses`
without this change:
```
LLVMX86CodeGen.lib(X86CodeGenPassBuilder.cpp.obj) : error LNK2019: unresolved external symbol "public: __cdecl llvm::ModuleInlinerWrapperPass::ModuleInlinerWrapperPass(struct llvm::InlineParams,bool,struct llvm::InlineContext,enum llvm::InliningAdvisorMode,unsigned int)" (??0ModuleInlinerWrapperPass at llvm@@QEAA at UInlineParams@1 at _NUInlineContext@1 at W4InliningAdvisorMode@1 at I@Z) referenced in function "public: void __cdecl llvm::ModuleInlinerWrapperPass::`default constructor closure'(void)" (??_FModuleInlinerWrapperPass at llvm@@QEAAXXZ)
LLVMX86CodeGen.lib(X86CodeGenPassBuilder.cpp.obj) : error LNK2019: unresolved external symbol "public: __cdecl llvm::PipelineTuningOptions::PipelineTuningOptions(void)" (??0PipelineTuningOptions at llvm@@QEAA at XZ) referenced in function "public: void __cdecl llvm::PassBuilder::`default constructor closure'(void)" (??_FPassBuilder at llvm@@QEAAXXZ)
LLVMX86CodeGen.lib(X86CodeGenPassBuilder.cpp.obj) : error LNK2019: unresolved external symbol "public: __cdecl llvm::PassBuilder::PassBuilder(class llvm::TargetMachine *,class llvm::PipelineTuningOptions,class std::optional<struct llvm::PGOOptions>,class llvm::PassInstrumentationCallbacks *)" (??0PassBuilder at llvm@@QEAA at PEAVTargetMachine@1 at VPipelineTuningOptions@1 at V?$optional at UPGOOptions@llvm@@@std@@PEAVPassInstrumentationCallbacks at 1@@Z) referenced in function "public: void __cdecl llvm::PassBuilder::`default constructor closure'(void)" (??_FPassBuilder at llvm@@QEAAXXZ)
LLVMX86CodeGen.lib(X86InsertPrefetch.cpp.obj) : error LNK2019: unresolved external symbol "public: __cdecl llvm::SampleProfileLoaderPass::SampleProfileLoaderPass(class std::basic_string<char,struct std::char_traits<char>,class std::allocator<char> >,class std::basic_string<char,struct std::char_traits<char>,class std::allocator<char> >,enum llvm::ThinOrFullLTOPhase,class llvm::IntrusiveRefCntPtr<class llvm::vfs::FileSystem>,bool,bool)" (??0SampleProfileLoaderPass at llvm@@QEAA at V?$basic_string at DU?$char_traits at D@std@@V?$allocator at D@2@@std@@0W4ThinOrFullLTOPhase at 1@V?$IntrusiveRefCntPtr at VFileSystem@vfs at llvm@@@1 at _N3@Z) referenced in function "public: void __cdecl llvm::SampleProfileLoaderPass::`default constructor closure'(void)" (??_FSampleProfileLoaderPass at llvm@@QEAAXXZ)
unittests\tools\llvm-mca\LLVMMCATests.exe : fatal error LNK1120: 4 unresolved externals
```
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 0dcf924f37269295b505a16176008503159b9860
https://github.com/llvm/llvm-project/commit/0dcf924f37269295b505a16176008503159b9860
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/tools/obj2yaml/CMakeLists.txt
M llvm/tools/yaml2obj/CMakeLists.txt
Log Message:
-----------
[llvm] add ProfileData to yaml2obj and obj2yaml LLVM_LINK_COMPONENTS (#147344)
## Purpose
Add `ProfileData` to `LLVM_LINK_COMPONENTS` for the `yaml2obj` and
`obj2yaml` tools so they link properly when LLVM is built as a Windows
DLL.
## Background
`ProfileData` appears to be a missing dependency from `yaml2obj` and
`obj2yaml`, but when LLVM is built statically it picks-up the required
`LLVMPasses` symbols from a transitive dependency (presumably). When
LLVM is built as a Windows DLL, `yaml2obj` and `obj2yaml` fail to link 3
symbols from `ProfileData` without this change:
```
LLVMCore.lib(Verifier.cpp.obj) : error LNK2019: unresolved external symbol "class std::error_category const & __cdecl llvm::instrprof_category(void)" (?instrprof_category at llvm@@YAAEBVerror_category at std@@XZ) referenced in function "public: virtual class std::error_code __cdecl llvm::InstrProfError::convertToErrorCode(void)const " (?convertToErrorCode at InstrProfError@llvm@@UEBA?AVerror_code at std@@XZ)
LLVMCore.lib(Verifier.cpp.obj) : error LNK2001: unresolved external symbol "public: virtual class std::basic_string<char,struct std::char_traits<char>,class std::allocator<char> > __cdecl llvm::InstrProfError::message(void)const " (?message at InstrProfError@llvm@@UEBA?AV?$basic_string at DU?$char_traits at D@std@@V?$allocator at D@2@@std@@XZ)
LLVMCore.lib(Verifier.cpp.obj) : error LNK2019: unresolved external symbol "public: static char llvm::InstrProfError::ID" (?ID at InstrProfError@llvm@@2DA) referenced in function "void __cdecl llvm::handleAllErrors<class `public: static struct std::pair<enum llvm::instrprof_error,class std::basic_string<char,struct std::char_traits<char>,class std::allocator<char> > > __cdecl llvm::InstrProfError::take(class llvm::Error)'::`2'::<lambda_1> >(class llvm::Error,class `public: static struct std::pair<enum llvm::instrprof_error,class std::basic_string<char,struct std::char_traits<char>,class std::allocator<char> > > __cdecl llvm::InstrProfError::take(class llvm::Error)'::`2'::<lambda_1> &&)" (??$handleAllErrors at V<lambda_1>@?1??take at InstrProfError@llvm@@SA?AU?$pair at W4instrprof_error@llvm@@V?$basic_string at DU?$char_traits at D@std@@V?$allocator at D@2@@std@@@std@@VError at 4@@Z@@llvm@@YAXVError at 0@$$QEAV<lambda_1>@?1??take at InstrProfError@0 at SA?AU?$pair at W4instrprof_error@llvm@@V?$basic_string at DU?$char_traits at D@std@@V?$allocator at D@2@@std@@@std@@0 at Z@@Z)
bin\yaml2obj.exe : fatal error LNK1120: 3 unresolved externals
```
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 24475409e4eac6fd60e2111424a4bef3452c8f21
https://github.com/llvm/llvm-project/commit/24475409e4eac6fd60e2111424a4bef3452c8f21
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/Config/abi-breaking.h.cmake
Log Message:
-----------
[llvm] annotate ABIBreakingChecks symbols for DLL export (#145575)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the ABI Breaking Checks
interface in llvm/config. The annotations currently have no meaningful
impact on the LLVM build; however, they are a prerequisite to support an
LLVM Windows DLL (shared library) build.
## Background
The effort to build LLVM as a Windows DLL is tracked in #109483.
Additional context is provided in [this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: f00a7a49bde2504a08777bffdb85bce0c4bff83c
https://github.com/llvm/llvm-project/commit/f00a7a49bde2504a08777bffdb85bce0c4bff83c
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
Log Message:
-----------
[DAG] Fold insert_subvector (splat X), (splat X), N2 - > splat X (#147380)
If we're inserting a splat into a splat of the same value, then
regardless of the index, the result is simply a splat of that value.
Commit: 058056329982db13d513bc05d3c98f6558418242
https://github.com/llvm/llvm-project/commit/058056329982db13d513bc05d3c98f6558418242
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/CMakeLists.txt
M llvm/include/llvm-c/Analysis.h
M llvm/include/llvm-c/BitReader.h
M llvm/include/llvm-c/BitWriter.h
M llvm/include/llvm-c/Comdat.h
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm-c/Disassembler.h
M llvm/include/llvm-c/Error.h
M llvm/include/llvm-c/ErrorHandling.h
M llvm/include/llvm-c/ExecutionEngine.h
M llvm/include/llvm-c/IRReader.h
M llvm/include/llvm-c/LLJIT.h
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm-c/Linker.h
M llvm/include/llvm-c/Object.h
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm-c/OrcEE.h
M llvm/include/llvm-c/Remarks.h
M llvm/include/llvm-c/Support.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/include/llvm-c/Transforms/PassBuilder.h
A llvm/include/llvm-c/Visibility.h
M llvm/include/llvm-c/blake3.h
M llvm/include/llvm/Config/llvm-config.h.cmake
M llvm/include/llvm/Support/Compiler.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
Log Message:
-----------
[llvm] annotate interfaces in llvm-c for DLL export (#141701)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `llvm-c` interface with a
new `LLVM_C_ABI` annotation, which behaves like the `LLVM_ABI`. This
annotation currently has no meaningful impact on the LLVM build;
however, it is a prerequisite to support an LLVM Windows DLL (shared
library) build.
## Overview
1. Add a new `llvm-c/Visibility.h` header file that defines a new
`LLVM_C_ABI` macro. The macro resolves to the proper DLL export/import
annotation on Windows and a "default" visibility annotation elsewhere.
2. Add a new `LLVM_ENABLE_LLVM_C_EXPORT_ANNOTATIONS` `#cmakedefine` that
is used to gate the definition of `LLVM_C_ABI`.
3. Remove the existing `LLVM_C_ABI` definition from
`llvm/Support/Compiler.h`. Update the small number of `LLVM_C_ABI`
references to get it from the new `llvm-c/Visibility.h` header.
4. Code-mod annotate the public `llvm-c` interface using the [Interface
Definition Scanner (IDS)](https://github.com/compnerd/ids) tool.
5. Format the changes with `clang-format`.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: 1915fa15c39e056a44d9c866d1e8dde4211d774d
https://github.com/llvm/llvm-project/commit/1915fa15c39e056a44d9c866d1e8dde4211d774d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/include/llvm/Transforms/Utils/DeclareRuntimeLibcalls.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/DeclareRuntimeLibcalls.cpp
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
Utils: Add pass to declare runtime libcalls (#147534)
This will be useful for testing the set of calls for different systems,
and eventually the product of context specific modifiers applied. In
the future we should also know the type signatures, and be able to
emit the correct one.
Commit: 7e928f9d37788a8143c7704c98133f107612b87d
https://github.com/llvm/llvm-project/commit/7e928f9d37788a8143c7704c98133f107612b87d
Author: Andrew Rogers <andrurogerz at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDataExtractor.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/Frontend/OpenMP/DirectiveNameParser.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
Log Message:
-----------
[llvm] fix missing and incorrect LLVM_ABI annotations (#147399)
## Purpose
This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch adds `LLVM_ABI` annotations to some
recently added symbols that were previously missed. It also removes
`LLVM_ABI` from symbols where it is problematic. The LLVM annotation
currently has no meaningful impact on the LLVM build; however, it is a
prerequisite to support an LLVM Windows DLL (shared library) build.
## Overview
These changes were generated automatically using the [Interface
Definition Scanner (IDS)](https://github.com/compnerd/ids) tool,
followed formatting with `git clang-format`.
NOTE: I am using a modified version of IDS with local patches so it
removes unnecessary export annotations. These local IDS changes
generated all of the `LLVM_ABI` deletions in this PR.
## Background
This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).
## Validation
Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:
- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
Commit: b9d7513bf134febe72c05a04ff20f87191d7213a
https://github.com/llvm/llvm-project/commit/b9d7513bf134febe72c05a04ff20f87191d7213a
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/CodeGen/RISCV/xqcicm.ll
Log Message:
-----------
[RISCV] Correct immediate operand type in QC_MVLTUI ISel pattern (#147509)
The pattern was incorrectly using simm5 for QC_MVLTUI when it should
have been uimm5.
Commit: bd6e9047dda95f0acf0207094bbc8c0f6ce27eb7
https://github.com/llvm/llvm-project/commit/bd6e9047dda95f0acf0207094bbc8c0f6ce27eb7
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-enabled-extensions/aarch64-gb10.c
M clang/test/Driver/print-enabled-extensions/aarch64-grace.c
M clang/test/Driver/print-enabled-extensions/aarch64-olympus.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/test/CodeGen/AArch64/sve2-intrinsics-sm4.ll
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/sm4e.s
M llvm/test/MC/AArch64/SVE2/sm4ekey.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[LLVM][AArch64] Relax SVE codegen predicates for sm4 instructions (#147524)
Adds sve-sm4 to reference FEAT_SVE_SM4 without specifically enabling
SVE2.
Commit: 8aa9e5aa7f068a7012dcf15295abc4146932d4db
https://github.com/llvm/llvm-project/commit/8aa9e5aa7f068a7012dcf15295abc4146932d4db
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
Log Message:
-----------
[NFC][AMDGPU] Add missing test cases for gfx1250 (#147521)
That was caused by mistake when bringing up changes to upstream.
Commit: f271c6dc8724577bd1667c5fffaeee3f9a0a6dbe
https://github.com/llvm/llvm-project/commit/f271c6dc8724577bd1667c5fffaeee3f9a0a6dbe
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
Log Message:
-----------
[NVPTX][Tests-only] Update TMA intrinsic tests (#147364)
The TMA intrinsic tests use undef for the
multicast/cache_hint operands when their
corresponding flags are 0. (i.e. when they
are ignored by the backend while lowering).
These need not be undef and hence this
patch migrates the remaining tests to
use values instead.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: 708c0fe3df41852941bd17acc779efa4bda6c996
https://github.com/llvm/llvm-project/commit/708c0fe3df41852941bd17acc779efa4bda6c996
Author: Connector Switch <c8ef at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M libc/utils/MPFRWrapper/MPCommon.cpp
Log Message:
-----------
[libc] Simplify the version guard for mpfr. (#146354)
Instead of manually calculating the major and minor version numbers, we
can directly use `MPFR_VERSION_NUM` to simplify this.
Commit: dcf485609c5c4fd01045876e630dbd5ba220543e
https://github.com/llvm/llvm-project/commit/dcf485609c5c4fd01045876e630dbd5ba220543e
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M llvm/include/llvm/MC/MCValue.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
M llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
M llvm/test/CodeGen/X86/absolute-cmp.ll
M llvm/test/CodeGen/X86/apx/and.ll
M llvm/test/CodeGen/X86/apx/ccmp.ll
M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
M llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
M llvm/test/CodeGen/X86/avx512vl-arith.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
M llvm/test/CodeGen/X86/bmi.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/fma-scalar-combine.ll
M llvm/test/CodeGen/X86/fma.ll
M llvm/test/CodeGen/X86/fold-rmw-ops.ll
M llvm/test/CodeGen/X86/pr38865.ll
M llvm/test/CodeGen/X86/pr61384.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/vec_fpext.ll
M llvm/test/CodeGen/X86/x86-interrupt_cc.ll
M llvm/test/MC/ELF/mc-dump.s
Log Message:
-----------
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
Move the X86 PC-relative fixup adjustment from
X86MCCodeEmitter::emitImmediate to MCAssembler, leveraging a generalized
evaluateFixup. This saves a MCBinaryExpr. For `call foo`, the fixup
expression is now `foo` instead of `foo-4`. There is no change in
generated relocations.
In bolt/lib/Target/X86/X86MCPlusBuilder.cpp, createRelocation needs to
decrease the addend.
Both max-rss and instructions:u show a minor decrease.
https://llvm-compile-time-tracker.com/compare.php?from=ea600576a6f94d6f28925c4b99962cc26b463c29&to=016e8fd4ddf851e5555f606c6394241d68f1a7bb&stat=max-rss&linkStats=on
Next: Update targets that use FKF_IsAlignedDownTo32Bits to define
`evaluateFixup` and remove FKF_IsAlignedDownTo32Bits from the generic
code.
Pull Request: https://github.com/llvm/llvm-project/pull/147113
Commit: ed06de45f34e7c1b7172f9c8ca964cba91ea69ee
https://github.com/llvm/llvm-project/commit/ed06de45f34e7c1b7172f9c8ca964cba91ea69ee
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
Log Message:
-----------
[test] Fix `coro-split-dbg-labels.ll` for non-x86 (#147087)
This test case was recently introduced in 24b3c1f680446f87a. It was
meant to be target-independent, but the function attributes still
contained x86-specific attributes. This commit removes those attributes.
Commit: a7a7e95720226da2e78b87dbd9006bd4113c85ea
https://github.com/llvm/llvm-project/commit/a7a7e95720226da2e78b87dbd9006bd4113c85ea
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.h
A clang/test/CodeGen/AMDGPU/full-bf16.c
Log Message:
-----------
[AMDGPU][Clang] Support bfloat16 arithmetic. (#147541)
Co-authored-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
Commit: ddb018f8d3ed3213c786720459daedb3c831c697
https://github.com/llvm/llvm-project/commit/ddb018f8d3ed3213c786720459daedb3c831c697
Author: Joseph Huber <huberjn at outlook.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
A clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906
M clang/test/Driver/openmp-system-arch.c
Log Message:
-----------
[Clang][NFC] Add alias target for amdgpu-arch-tool and nvptx-arch-tool (#147558)
Summary:
These commands both do the same thing and behave like the same tool.
Now, the `nvptx-arch` and `amdgpu-arch` tools cause it to only emit
architectures for that name.
Commit: 6f748fdca5b3a99a69ba9bb60ff83994bf61dd6c
https://github.com/llvm/llvm-project/commit/6f748fdca5b3a99a69ba9bb60ff83994bf61dd6c
Author: Philip Reames <preames at rivosinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[RISCV] Add coverage for optimizations in deinterleave load lowering
Commit: de732df5515bd8ee901fe6692a522ced204c2eb8
https://github.com/llvm/llvm-project/commit/de732df5515bd8ee901fe6692a522ced204c2eb8
Author: pkarveti <quic_pkarveti at quicinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
Log Message:
-----------
[Hexagon] Handle Call Operand vxi1 in Hexagon without HVX Enabled (#136546)
This commit updates the Hexagon backend to handle vxi1 call operands
Without HVX enabled. It ensures compatibility for vector types of sizes
4, 8, 16, 32, 64, and 128 x i1 when HVX is not enabled.
Commit: 0393084adc9028c6babb95fb48d4ef1897093412
https://github.com/llvm/llvm-project/commit/0393084adc9028c6babb95fb48d4ef1897093412
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCInst.h
M llvm/include/llvm/MC/MCSection.h
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
Log Message:
-----------
MC: Store MCRelaxableFragment MCInst out-of-line
Follow-up to #146307
Moved MCInst storage to MCSection, enabling trivial ~MCRelaxableFragment
and eliminating the need for a fragment walk in ~MCSection.
Updated MCRelaxableFragment::getInst to construct an MCInst on demand.
Modified MCAssembler::relaxInstruction's mayNeedRelaxation to accept
opcode and operands instead of an MCInst, avoiding redundant MCInst
creation. Note that MCObjectStreamer::emitInstructionImpl calls
mayNeedRelaxation before determining the target fragment for the MCInst.
Unfortunately, we also have to encode `MCInst::Flags` to support
the EVEX prefix, e.g. `{evex} xorw $foo, %ax`
There is a small decrease in max-rss (stage1-ReleaseLTO-g (link only))
with negligible instructions:u change.
https://llvm-compile-time-tracker.com/compare.php?from=0b533f2d9f0551aaffb13dcac8e0fd0a952185b5&to=f26b57f33bc7ccae749a57dfc841de7ce2acc2ef&stat=max-rss&linkStats=on
Next: Enable MCFragment to store fixed-size data (was MCDataFragment's job)
and optional Opcode/Operands data (was MCRelaxableFragment's job),
and delete MCDataFragment/MCRelaxableFragment.
This will allow re-encoding of Data+Relax+Data+Relax sequences as
Frag+Frag. The saving should outweigh the downside of larger
MCFragment.
Pull Request: https://github.com/llvm/llvm-project/pull/147229
Commit: 4a507b1f56d19c35edd465e808222f646c25f778
https://github.com/llvm/llvm-project/commit/4a507b1f56d19c35edd465e808222f646c25f778
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/test/CodeGen/WebAssembly/llvm.sincos.ll
Log Message:
-----------
WebAssembly: Add test for sincos intrinsic (#147467)
Commit: 3697d6dd98a4537fcc5694842453764bf644406e
https://github.com/llvm/llvm-project/commit/3697d6dd98a4537fcc5694842453764bf644406e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/CodeGen/AVR/sincos-soften-error.ll
M llvm/test/CodeGen/WebAssembly/llvm.sincos.ll
Log Message:
-----------
DAG: Fall back to separate sin and cos when softening sincos (#147468)
Fix asserting in the error case.
Commit: 36dbe517a04619629587925772201e745effdf28
https://github.com/llvm/llvm-project/commit/36dbe517a04619629587925772201e745effdf28
Author: Florian Mayer <fmayer at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[NFC] [MSAN] disambiguate insertShadowCheck (#146616)
One of them operates on values, the other on shadows. It is confusing
for both of them to have the same name but only different number of
parameters.
Commit: 3dec46d9bfbad045cfeb66c8a5a96d32c4dd09bb
https://github.com/llvm/llvm-project/commit/3dec46d9bfbad045cfeb66c8a5a96d32c4dd09bb
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/Lex/LexHLSLRootSignature.h
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/lib/Lex/LexHLSLRootSignature.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/test/SemaHLSL/RootSignature-err.hlsl
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
Log Message:
-----------
[HLSL][RootSignature] Correct `RootSignatureParser` to use correct `SourceLocation` in diagnostics (#147084)
The `SourceLocation` of a `RootSignatureToken` is incorrectly set to be
the "offset" into the concatenated string that denotes the
rootsignature. This causes an issue when the `StringLiteral` is a
multi-line expansion macro, since the offset will not account for the
characters between `StringLiteral` tokens.
This pr resolves this by retaining the `SourceLocation` information that
is kept in `StringLiteral` and then converting the offset in the
concatenated string into the proper `SourceLocation` using the
`StringLiteral::getLocationOfByte` interface. To do so, we will need to
adjust the `RootSignatureToken` to only hold its offset into the root
signature string. Then when the parser will use the token, it will need
to compute its actual `SourceLocation`.
See linked issue for more context.
For example:
```
#define DemoRootSignature \
"CBV(b0)," \
"RootConstants(num32BitConstants = 3, b0, invalid)"
expected caret location ---------------^
actual caret location ------------^
```
The caret points 5 characters early because the current offset did not
account for the characters:
```
'"' ' ' '\' ' ' '"'
1 2 3 4 5
```
- Updates `RootSignatureParser` to retain `SourceLocation` information
by retaining the `StringLiteral` and passing the underlying `StringRef`
to the `Lexer`
- Updates `RootSignatureLexer` so that the constructed tokens only
reflect an offset into the `StringRef`
- Updates `RootSignatureParser` to directly construct its used `Lexer`
so that the `StringLiteral` is directly tied with the string used in the
`RootSignatureLexer`
- Updates `RootSignatureParser` to use
`StringLiteral::getLocationOfByte` to get the actual token location for
diagnostics
- Updates `ParseHLSLRootSignatureTest` to construct a phony
`AST`/`StringLiteral` for the test cases
- Adds a test to `RootSignature-err.hlsl` showing that the
`SourceLocation` is correctly set for diagnostics in a multi-line macro
expansion
Resolves: https://github.com/llvm/llvm-project/issues/146967
Commit: 3614d49499d3bf56fca43214c12402107e66a46f
https://github.com/llvm/llvm-project/commit/3614d49499d3bf56fca43214c12402107e66a46f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/test/CodeGen/LoongArch/llvm.sincos.ll
Log Message:
-----------
LoongArch: Add test for sincos intrinsic (#147471)
Commit: 64c3ba8263b73f0d54c6aab518d0432ab06df6e5
https://github.com/llvm/llvm-project/commit/64c3ba8263b73f0d54c6aab518d0432ab06df6e5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/X86/sad.ll
Log Message:
-----------
[X86] Add test coverage for #143456
Commit: 320f6820e33cef944200723e308a20438fad62ca
https://github.com/llvm/llvm-project/commit/320f6820e33cef944200723e308a20438fad62ca
Author: Victor Lomuller <victor at codeplay.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
Log Message:
-----------
[NFC][SPIRV] Fix test after spirv-val update (#147523)
ptr-annotation.ll was incorrectly applying a decoration to an unsuitable
target.
The patch changes the decoration to a valid one for the test.
Commit: b4b150f8c9a2c84a4831224b1209d1ca4824dbcb
https://github.com/llvm/llvm-project/commit/b4b150f8c9a2c84a4831224b1209d1ca4824dbcb
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A clang/test/Driver/aix-default-target-triple.c
M llvm/lib/TargetParser/Unix/Host.inc
Log Message:
-----------
[PowerPC][clang] Fix triple constructor ambiguity causing "unknown" target triple on AIX (#147488)
PR #145685 introduced constructor overload ambiguity in the Triple
class, causing `updateTripleOSVersion()` to construct Triple objects
with `unknown` instead of the configured target triple (e.g.,
`powerpc-ibm-aix7.3.0.0`). This results in Clang driver errors like
`error: unknown target triple 'unknown'`.
Used `Twine` constructor with braced initialization to bypass ambiguity.
---------
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 9a8d45f6268112dce4950cd2f21628963546082f
https://github.com/llvm/llvm-project/commit/9a8d45f6268112dce4950cd2f21628963546082f
Author: Jack Styles <jack.styles at arm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M flang/lib/Semantics/canonicalize-omp.cpp
A flang/test/Parser/OpenMP/loop-transformation-construct03.f90
Log Message:
-----------
[Flang][OpenMP] Fix crash when block.end() is missed (#147519)
As reported in #145917 and #147309, there are situation's where flang
may crash. This is because `nextIt` in
`RewriteOpenMPLoopConstruct` gets re-assigned when an iterator is erased
from the block. If this is missed, Flang may attempt to access a
location in memory that is not accessable and cause a compiler crash.
This adds protection where the crash can occur, and a test with a
reproducer that can trigger the crash.
Fixes #147309
Commit: adaa4099d3923d4b6cb4c631f44fa347c3c6c4e1
https://github.com/llvm/llvm-project/commit/adaa4099d3923d4b6cb4c631f44fa347c3c6c4e1
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/neon-sad.ll
Log Message:
-----------
[AArch64] Expand UADDLV patterns to handle two-step i8->i16->i32 extends (#146078)
Closes #142961
Commit: 71783fea2c1af3257d49e57ed9c5a7e543a44bbc
https://github.com/llvm/llvm-project/commit/71783fea2c1af3257d49e57ed9c5a7e543a44bbc
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[Flang][OpenMP][MLIR] Fix regression by #146653 by adding address space cast to getRefPtrIfDeclareTarget
The patch introduced changes to add address spaces to a wider array of MLIR/LLVM values, however,
it was missing an address space cast that exists in our downstream implementation that's required
for declare target to work correctly.
Commit: eb2b63c72218d120cf05189c9137a2eaa462e7c4
https://github.com/llvm/llvm-project/commit/eb2b63c72218d120cf05189c9137a2eaa462e7c4
Author: Sirraide <aeternalmail at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[Clang] [Docs] Add release notes for #143514 and #143520 (#147562)
I forgot to include a release note in #143520, and it also ocurred to me
that while #143514 is technically a bugfix in LLVM/Support, I think we
should have one for it as well.
Commit: e976eaf3037a1c0fe68432ae60a503bf144a1c30
https://github.com/llvm/llvm-project/commit/e976eaf3037a1c0fe68432ae60a503bf144a1c30
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/test/HLFIR/opt-scalar-assign.fir
Log Message:
-----------
[flang] Fix optimization of array assignments after #146408 (#147371)
Host associated variables were not being handled properly.
For array references, get the fixed shape extents from the value
type instead, that works correctly in all cases.
Commit: 1e3f6a6c4fd8dafb208216ffcabe31fa978ca502
https://github.com/llvm/llvm-project/commit/1e3f6a6c4fd8dafb208216ffcabe31fa978ca502
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/abseil/AbseilMatcher.h
M clang-tools-extra/clang-tidy/bugprone/ComparePointerToMemberVirtualFunctionCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseUsingCheck.cpp
Log Message:
-----------
[clang-tidy][NFC] Prefer `constexpr llvm::StringLiteral` over `const char *` (#147301)
Some of these are even global mutable state — probably not what was
intended!
```cpp
static const char *AnalyzerCheckNamePrefix = "clang-analyzer-";
```
Commit: 46caad52ac14cefd6f9cf3188863818e330f3844
https://github.com/llvm/llvm-project/commit/46caad52ac14cefd6f9cf3188863818e330f3844
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/assignment.h
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang][cuda] Do not produce data transfer in offloaded do concurrent (#147435)
If a `do concurrent` loop is offloaded then there should be no CUDA data
transfer in it. Update the semantic and lowering to take that into
account.
`AssignmentChecker` has to be put into a separate pass because the
checkers in `SemanticsVisitor` cannot have the same `Enter/Leave`
functions. The `DoForallChecker` already has `Eneter/Leave` functions
for the `DoConstruct`.
Commit: 8b65c9d1ed298a9f4be675d1da9d678fd61ff2b0
https://github.com/llvm/llvm-project/commit/8b65c9d1ed298a9f4be675d1da9d678fd61ff2b0
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M compiler-rt/lib/scudo/standalone/allocator_common.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
Log Message:
-----------
[scudo] Make block storage in TransferBatch trailing objects (#144204)
This allows us to change the number of blocks stored according to the
size of BatchClass.
Also change the name `TransferBatch` to `Batch` given that it's never
the unit of transferring blocks.
Commit: 2485c51715415cfbbd92a9544c4c03565bfe2788
https://github.com/llvm/llvm-project/commit/2485c51715415cfbbd92a9544c4c03565bfe2788
Author: Nico Weber <thakis at chromium.org>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
Log Message:
-----------
[gn] port 058056329982d
Commit: c44c142afc93d88f65d45dfed5fcb5faf44be558
https://github.com/llvm/llvm-project/commit/c44c142afc93d88f65d45dfed5fcb5faf44be558
Author: AmirHossein PashaeeHir <42866056+amsen20 at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h
A llvm/include/llvm/DebugInfo/DWARF/DWARFUnwindTablePrinter.h
A llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.h
M llvm/lib/DebugInfo/DWARF/CMakeLists.txt
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
A llvm/lib/DebugInfo/DWARF/DWARFUnwindTablePrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/CMakeLists.txt
A llvm/lib/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
Log Message:
-----------
[NFC] Separate UnwindTable from DebugFrame into a different type (#142521)
By separating the Unwind table into a different file, this functionality
can be a part of the DWARF library with no dependency on MC, which makes
it usable in the MC layer.
This is a continuation of
[PR#14520](https://github.com/llvm/llvm-project/pull/142520).
Commit: 0863979e8440e47d4a5a3fea27347f6a6e509397
https://github.com/llvm/llvm-project/commit/0863979e8440e47d4a5a3fea27347f6a6e509397
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/DWARF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/DWARF/LowLevel/BUILD.gn
Log Message:
-----------
[gn build] Port c44c142afc93
Commit: bc8aa974c05b35e8895086d499abb7b1b36b88fb
https://github.com/llvm/llvm-project/commit/bc8aa974c05b35e8895086d499abb7b1b36b88fb
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
Log Message:
-----------
[libc++][z/OS] XFAIL thread_create_failure.pass.cpp on z/OS (#147520)
Number of threads on z/OS are controlled at the system level and thus we eed to XFAIL this test.
Commit: 093afed9697d858a661d6689f35e2834bd069e49
https://github.com/llvm/llvm-project/commit/093afed9697d858a661d6689f35e2834bd069e49
Author: James Y Knight <jyknight at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
Log Message:
-----------
[VPlan] Fix miscompile after PR #142433. (#147398)
This fixes a bug introduced by aa2402931908317f5cc19b164ef17c5a74f2ae67,
"[VPlan] Unroll VPReplicateRecipe by VF", which cloned a
VPReplicateRecipe without transferring the flags from the original.
That can cause incorrect nsw/nuw flags to be emitted on the new
instructions, which may result in miscompiles.
It turns out there were no test-cases in the repo which end up hitting
the situation where the recipe requires instruction clones to have
different flags from the underlying instruction. The existing tests
covered the flags being correct when the replacement instruction is a
vectorized version of the initial instruction, but not when it required
clones. A new test is added covering this.
Commit: 1762b3043c5ec58cfb2be8911535c3cd4d1f64b0
https://github.com/llvm/llvm-project/commit/1762b3043c5ec58cfb2be8911535c3cd4d1f64b0
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/frame-pointer-elim.c
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
M llvm/test/CodeGen/AArch64/win-sve.ll
M llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
M llvm/test/CodeGen/AArch64/wineh-frame5.mir
M llvm/test/CodeGen/AArch64/wineh-frame7.mir
Log Message:
-----------
[win][aarch64] Always reserve frame pointers for Arm64 Windows, take 2 (#147354)
Re-land #146582 now that the Flang bugs have been fixed.
There is no way in Arm64 Windows to indicate that a given function has
used the Frame Pointer as a General Purpose Register, as such stack
walks will always assume that the frame chain is valid and will follow
whatever value has been saved for the Frame Pointer (even if it is
pointing to data, etc.).
This change makes the Frame Pointer always reserved when building for
Arm64 Windows to avoid this issue.
We will be updating the official Windows ABI documentation to reflect
this requirement, and I will provide a link once it's available.
Commit: d09984e18ca795906952ba9321d45b238517ac6e
https://github.com/llvm/llvm-project/commit/d09984e18ca795906952ba9321d45b238517ac6e
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/test/CIR/IR/struct.cir
Log Message:
-----------
[CIR] Add support for parsing complete records (#147403)
When complete record support was initially added, the parsing support
was left incomplete. This change adds the necessary parsing.
Commit: c8048e78ca2b85101197dd3472de21feff930078
https://github.com/llvm/llvm-project/commit/c8048e78ca2b85101197dd3472de21feff930078
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
Log Message:
-----------
[NFCI][msan] Add avx512bw-intrinsics, avx512bw-intrinsics-upgrade tests (#147566)
Forked from llvm/test/CodeGen/X86.
Commit: 08ac3b39d463b39860f3230933d5d72541368bd5
https://github.com/llvm/llvm-project/commit/08ac3b39d463b39860f3230933d5d72541368bd5
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/wineh-aligned-stack-obj.ll
A llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/AArch64/wineh-try-catch.ll
Log Message:
-----------
[win][aarch64] Place catch objects in the fixed object area (#147421)
Fixes #146973
When an object with alignment requirements is placed on the stack, this
causes a stack realignment which causes AArch64 to use x19 to refer to
objects on the stack as there may be a gap between local variables and
the Stack Pointer. This causes issues with the MSVC C++ exception
personality as the offset to the catch object recorded in the handler
table no longer matches the object being used in the catch block itself.
The fix for this is to place catch objects into the fixed object area.
Commit: 6f291cb099e54af8ebcb68a622c81206ba94abe5
https://github.com/llvm/llvm-project/commit/6f291cb099e54af8ebcb68a622c81206ba94abe5
Author: Tim Gymnich <tim at gymni.ch>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
A mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
A mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
Log Message:
-----------
[mlir][amdgpu] Add conversion from arith.scaling_extf / arith.scaling_truncf to amdgpu (#146372)
- add conversion from arith.scaling_extf to amdgpu.scaled_ext_packed
- add conversion from arith.scaling_truncf to amdgpu.packed_scaled_trunc
Commit: d0c1f148ced2a599dc36046f3bd46af64e3f5ed0
https://github.com/llvm/llvm-project/commit/d0c1f148ced2a599dc36046f3bd46af64e3f5ed0
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Log Message:
-----------
[Sema] Remove an unnecessary cast (NFC) (#147546)
D is already of CXXMethodDecl *.
Commit: 1a4d983cb78da1d5d8e66b9476020ea5de13dc12
https://github.com/llvm/llvm-project/commit/1a4d983cb78da1d5d8e66b9476020ea5de13dc12
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Log Message:
-----------
[AArch64] Remove an unnecessary cast (NFC) (#147547)
AfterCSRPopSize is already of int64_t.
Commit: 75b989ec73ea7645e9044fd03929663cea12b964
https://github.com/llvm/llvm-project/commit/75b989ec73ea7645e9044fd03929663cea12b964
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Support/JSON.cpp
Log Message:
-----------
[Support] Remove an unnecessary cast (NFC) (#147548)
I is already of int64_t.
Commit: 57d2d89241b65ab0af33c62ad5828c6b81190698
https://github.com/llvm/llvm-project/commit/57d2d89241b65ab0af33c62ad5828c6b81190698
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/NestedMatcher.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineScalarReplacement.cpp
M mlir/lib/Dialect/Affine/Transforms/DecomposeAffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopCoalescing.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnrollAndJam.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferDeallocationOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferViewFlowOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorToAllocTensor.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OptimizeAllocationLiveness.cpp
Log Message:
-----------
[mlir] Remove unused includes (NFC) (#147549)
These are identified by misc-include-cleaner. I've filtered out those
that break builds. Also, I'm staying away from llvm-config.h,
config.h, and Compiler.h, which likely cause platform- or
compiler-specific build failures.
Commit: d258457d42a35ee2d234e3e028fc97752f652cf6
https://github.com/llvm/llvm-project/commit/d258457d42a35ee2d234e3e028fc97752f652cf6
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU] Add support for `v_cvt_f32_fp8` on gfx1250 (#147579)
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 9be7194aa5c01df6241580199ab494314d5b41f3
https://github.com/llvm/llvm-project/commit/9be7194aa5c01df6241580199ab494314d5b41f3
Author: John Harrison <harjohn at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Improving synchronization of MainLoopWindows. (#147438)
This should improve synchronizing the MainLoopWindows monitor thread
with the main loop state.
This uses the `m_ready` and `m_event` event handles to manage when the
Monitor thread continues and adds new tests to cover additional use
cases.
I believe this should fix #147291 but it is hard to ensure a race
condition is fixed without running the CI on multiple
machines/configurations.
---------
Co-authored-by: Pavel Labath <pavel at labath.sk>
Commit: d3270adcb5b2eccbdac66e193603ac8e3818d309
https://github.com/llvm/llvm-project/commit/d3270adcb5b2eccbdac66e193603ac8e3818d309
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] SDPatternMatch - add matching for SELECT_CC patterns to min/max like matchers (#147071)
Fixes #147083
Commit: d3d77f71aaf46ec705abdf80db37725dd0c03659
https://github.com/llvm/llvm-project/commit/d3d77f71aaf46ec705abdf80db37725dd0c03659
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Transforms/Scalar/EarlyCSE.cpp
M llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
Log Message:
-----------
[EarlyCSE,TTI] Don't create new, unused, instructions. (#134534)
getOrCreateResultFromMemIntrinsic can modify the current function by
inserting new instructions without EarlyCSE keeping track of the
changes.
Introduce a new CanCreate argument, and update the function to only create
new instructions when CanCreate = true. Use it when appropriate.
Fixes https://github.com/llvm/llvm-project/issues/145183
Commit: 6ee87759e3ddcaca0cda3d9fd53e69cff7315c1d
https://github.com/llvm/llvm-project/commit/6ee87759e3ddcaca0cda3d9fd53e69cff7315c1d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
M llvm/test/Verifier/invalid-vp-intrinsics.ll
Log Message:
-----------
[RISCV][IR] Implement verifier check for llvm.experimental.vp.splice immediate. (#147458)
This applies the same check as llvm.vector.splice which checks that the immediate is in the range [-VL, VL-1] where VL is the minimum vector length. If vscale_range is available, the lower bound is used to increase the known minimum vector length for this check. This ensures the immediate is in range for any possible value of vscale that satisfies the vscale_range.
Commit: cdf5707bcb92b1f8e5feaae9502e34acb51c55b0
https://github.com/llvm/llvm-project/commit/cdf5707bcb92b1f8e5feaae9502e34acb51c55b0
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Update after 058056329982db13d513bc05d3c98f6558418242 (#147597)
Commit: 5b87718788388e582c31c719850f08be20a46154
https://github.com/llvm/llvm-project/commit/5b87718788388e582c31c719850f08be20a46154
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb] Fix warnings
This patch fixes:
third-party/unittest/googletest/include/gtest/gtest.h:1379:11:
error: comparison of integers of different signs: 'const unsigned
long' and 'const int' [-Werror,-Wsign-compare]
Commit: d0a4af725ea246545b41626df859bc42d79814c6
https://github.com/llvm/llvm-project/commit/d0a4af725ea246545b41626df859bc42d79814c6
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Add FeatureIEEEMinimumMaximumInsts. NFCI. (#147594)
Co-authored-by: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Commit: 03a27230c9b1b3a209a16bd8f82167527674d34d
https://github.com/llvm/llvm-project/commit/03a27230c9b1b3a209a16bd8f82167527674d34d
Author: Ebuka Ezike <yerimyah1 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/test/API/tools/lldb-dap/module-event/TestDAP_module_event.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/JSONUtilsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
A lldb/unittests/DAP/ProtocolUtilsTest.cpp
Log Message:
-----------
[lldb-dap] Use protocol types for modules request and events. (#146966)
Update tests to fix silently failing test and handle when a module is
removed.
Commit: d47c126fbf7915c01ea112ae372fe8835df4379f
https://github.com/llvm/llvm-project/commit/d47c126fbf7915c01ea112ae372fe8835df4379f
Author: Deric C. <cheung.deric at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
Log Message:
-----------
[DirectX] Lower `llvm.lifetime.*` intrinsics to stores when DXIL version is lower than 1.6 (#147432)
Fixes #147394
References DXC for the implementation logic:
https://github.com/microsoft/DirectXShaderCompiler/blob/d751c827ed3b61e87fdf57d0f424cb2d7af30cd0/lib/HLSL/DxilPreparePasses.cpp#L693-L699
If DXIL Version < 1.6 then replace lifetime intrinsics with stores
- For validator version >= 1.6, store an undef
- For validator version < 1.6, store zeros
else keep the lifetime intrinsics in the DXIL.
After this PR, the number of DML shaders failing validation due to
#146974 is reduced from 157 to 50.
Commit: 6a993264ee0105da32a6a57fb077796076cf6bf4
https://github.com/llvm/llvm-project/commit/6a993264ee0105da32a6a57fb077796076cf6bf4
Author: Eli Friedman <efriedma at quicinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
Log Message:
-----------
[clang] Consistently handle consteval constructors for variables. (#144970)
443377a9d1a8d4a69a317a1a892184c59dd0aec6 handled simple variable
definitions, but it didn't handle uninitialized variables with a
consteval constructor, and it didn't handle template instantiation.
Fixes #135281 .
Commit: 4647398d6a44d4596c6716875d8d92750f731f90
https://github.com/llvm/llvm-project/commit/4647398d6a44d4596c6716875d8d92750f731f90
Author: Kazu Hirata <kazu at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/tools/lldb-dap/ProtocolUtils.cpp
Log Message:
-----------
[lldb] Fix a warning
This patch fixes:
lldb/tools/lldb-dap/ProtocolUtils.cpp:77:22: error: implicit
instantiation of undefined template 'std::basic_ostringstream<char>'
Commit: 9293b65a616b8de432a654d046e802540b146372
https://github.com/llvm/llvm-project/commit/9293b65a616b8de432a654d046e802540b146372
Author: alex-t <alex-t at users.noreply.github.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
A llvm/test/CodeGen/AMDGPU/test_isel_single_lane.ll
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[AMDGPU] SelectionDAG divergence tracking should take into account Target divergency. (#147560)
This is the next attempt to upstream this:
https://github.com/llvm/llvm-project/pull/144947
The las one caused build errors in AArch64.
Issue was resolved.
Commit: 5cf4537fe1b13f2b74cc0228d23d455ccfab2c86
https://github.com/llvm/llvm-project/commit/5cf4537fe1b13f2b74cc0228d23d455ccfab2c86
Author: Justin King <jcking at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M compiler-rt/lib/hwasan/hwasan_new_delete.cpp
Log Message:
-----------
hwasan: refactor new/delete interceptor macros (#146698)
Same as #146696 but for #145357.
---------
Signed-off-by: Justin King <jcking at google.com>
Commit: d9060794c20e9446f66be7c20d3c9fe57ba6d382
https://github.com/llvm/llvm-project/commit/d9060794c20e9446f66be7c20d3c9fe57ba6d382
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointName.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
M lldb/include/lldb/Breakpoint/Watchpoint.h
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Breakpoint/BreakpointLocationCollection.cpp
M lldb/source/Breakpoint/BreakpointName.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
Log Message:
-----------
[lldb] Fix trailing whitespace in Breakpoint (NFC)
Working in the Breakpoint library is a minefield if you have your editor
configured to trim trailing whitespace. Remove it and format the
affected lines.
Commit: 8461c004358fd8b89ea1a947348e5440a914af52
https://github.com/llvm/llvm-project/commit/8461c004358fd8b89ea1a947348e5440a914af52
Author: Jason Molenda <jmolenda at apple.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/test/API/macosx/arm-corefile-regctx/TestArmMachoCorefileRegctx.py
M lldb/test/API/macosx/arm-corefile-regctx/create-arm-corefiles.cpp
Log Message:
-----------
[lldb] Pass address expression command args through FixAnyAddress (#147011)
Commands that take an address expression/address through the
OptionArgParser::ToAddress method, which has filtered this
user-specified address through one of the Process Fix methods to clear
non-addressable bits (MTE, PAC, top byte ignore, etc). We don't know
what class of address this is, IMEM or DMEM, but this method is passing
the addresses through Process::FixCodeAddress, and on at least one
target, FixCodeAddress clears low bits which are invalid for
instructions.
Correct this to use FixAnyAddress, which doesn't make alignment
assumptions.
The actual issue found was by people debugging on a 32-bit ARM Cortex-M
part, who tried to do a memory read from an odd address, and lldb
returned results starting at the next lower even address.
rdar://154885727
Commit: 55e1e9c96f90dee9ff053c31962fde2b80a2e594
https://github.com/llvm/llvm-project/commit/55e1e9c96f90dee9ff053c31962fde2b80a2e594
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
Log Message:
-----------
[mlir][llvm] Fix typo
Commit: ce7851f6b7d59e50f92cb4e8dbfd801576c8b641
https://github.com/llvm/llvm-project/commit/ce7851f6b7d59e50f92cb4e8dbfd801576c8b641
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
Log Message:
-----------
[AMDGPU][MC] Allow op_sel in v_alignbit_b32 etc in GFX9 and GFX10 (#142188)
In GFX9 and GFX10, the op_sel modifier should be allowed in the
instructions v_align_bit_b32 and v_alignbyte_b32.
Commit: d151f1be41b65bfce76791711758498fe28cd7e0
https://github.com/llvm/llvm-project/commit/d151f1be41b65bfce76791711758498fe28cd7e0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/test/CodeGen/SPARC/llvm.sincos.ll
Log Message:
-----------
SPARC: Add sincos intrinsic test (#147464)
Commit: 1e26443cf91939898cd284901bb255d75f68a8df
https://github.com/llvm/llvm-project/commit/1e26443cf91939898cd284901bb255d75f68a8df
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/select-splat-vector.ll
M llvm/test/CodeGen/AArch64/dump-schedule-trace.mir
M llvm/test/CodeGen/AArch64/force-enable-intervals.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir
M llvm/test/CodeGen/ARM/misched-prevent-erase-history-of-subunits.mir
M llvm/test/CodeGen/SystemZ/systemz-large-stack-frames.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/WebAssembly/expand-variadic-call.ll
M llvm/test/CodeGen/WebAssembly/vararg-frame.ll
Log Message:
-----------
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
These are already applied to all the tests in the target subdirectory
Commit: 026307958b3ff767e513498170469c1ade513b2a
https://github.com/llvm/llvm-project/commit/026307958b3ff767e513498170469c1ade513b2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/test/CodeGen/SystemZ/systemz-large-stack-frames.ll
Log Message:
-----------
SystemZ: Remove unnecessary requires asserts from test (#147477)
Commit: d64faec94071e67c2318712bc3f61734e28f4e2a
https://github.com/llvm/llvm-project/commit/d64faec94071e67c2318712bc3f61734e28f4e2a
Author: Shilei Tian <i at tianshilei.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU] Add support for `v_cvt_f32_bf8` on gfx1250 (#147600)
This PR doesn't really need to change anything else, since the
instruction is
already supported, but just not tested.
Co-authored-by: Mekhanoshin, Stanislav <Stanislav.Mekhanoshin at amd.com>
Commit: 78039e12473fff3c655870c3bb369e6dd1b46444
https://github.com/llvm/llvm-project/commit/78039e12473fff3c655870c3bb369e6dd1b46444
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/lit/lit/llvm/config.py
Log Message:
-----------
[lit][NFC] Refactor use_clang into two functions
This patch refactors use_clang into two functions. This is intended for
use within the clang-tools-extra test suite to avoid a race condition
where the clang binary exists but is not yet ready for execution which
results in a lit configuration failure.
Details are in #145703.
Reviewers: Keenuts, pogo59, AaronBallman, DavidSpickett
Reviewed By: pogo59
Pull Request: https://github.com/llvm/llvm-project/pull/147436
Commit: 191386fcd3335c5b7194da209d71d16549a2bb2f
https://github.com/llvm/llvm-project/commit/191386fcd3335c5b7194da209d71d16549a2bb2f
Author: yronglin <yronglin777 at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Parse/ParseStmt.cpp
M clang/test/Parser/statements.c
M clang/test/Sema/c2x-fallthrough.c
Log Message:
-----------
[C23][Parser] Diagnostic for attribute declaration where statement is required (#146224)
Fixes: https://github.com/llvm/llvm-project/issues/141659
In C23, something like [[/*possible attributes*/]]; is an attribute
declaration, not a statement. So it is not allowed by the syntax in
places where a statement is required, specifically as the secondary
block of a selection or iteration statement.
Therefore, code like the following should give a diagnostic (at least
with -std=c23 -pedantic), but Clang currently does not produce one:
```cpp
int main(void) {
if (1)
[[]];
}
```
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Signed-off-by: Wang, Yihan <yronglin777 at gmail.com>
Co-authored-by: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Commit: aa1829df02b24cb8f4a1846348b5a7b4e0be62f8
https://github.com/llvm/llvm-project/commit/aa1829df02b24cb8f4a1846348b5a7b4e0be62f8
Author: Finn Plummer <finn.c.plum at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
Log Message:
-----------
[NFC][HLSL] Move resource range logic from `SemaHLSL` to `RootSignatureValidations` (#147117)
This pr abstracts out the logic of detecting resource range overlap from
`SemaHLSL` into the `RootSignatureValidations` library.
For more context see linked issue.
- Moves the validation logic from `SemaHLSL` to
`RootSignatureValidations`
- Updates `SemaHLSL` to use the new interface for the validations
Resolves: https://github.com/llvm/llvm-project/issues/146393
Commit: be19a27cc5b15c712186010132705296ebc74c58
https://github.com/llvm/llvm-project/commit/be19a27cc5b15c712186010132705296ebc74c58
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
Log Message:
-----------
[RISCV] Correct stride for strided load/store of vectors of pointers in lowerInterleavedLoad/lowerInterleavedStore. (#147598)
We need to use DataLayout to get the size if the element type
is a pointer.
Commit: db03408b24459f0ba9f320509c7f8b3ec128e4b4
https://github.com/llvm/llvm-project/commit/db03408b24459f0ba9f320509c7f8b3ec128e4b4
Author: AmirHossein PashaeeHir <42866056+amsen20 at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIAnalysis.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameReceiver.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIState.h
M llvm/lib/CMakeLists.txt
A llvm/lib/DWARFCFIChecker/CMakeLists.txt
A llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
A llvm/lib/DWARFCFIChecker/Registers.h
A llvm/test/DWARFCFIChecker/X86/cfa-corner-cases.s
A llvm/test/DWARFCFIChecker/X86/empty-nested-frames.s
A llvm/test/DWARFCFIChecker/X86/empty-section.s
A llvm/test/DWARFCFIChecker/X86/multiple-sections.s
A llvm/test/DWARFCFIChecker/X86/nested-frames.s
A llvm/test/DWARFCFIChecker/X86/single-func-cfa-mistake.s
A llvm/test/DWARFCFIChecker/X86/single-func-missed-cfi-directive.s
A llvm/test/DWARFCFIChecker/X86/single-func.s
A llvm/test/DWARFCFIChecker/X86/spill-two-reg-reversed.s
A llvm/test/DWARFCFIChecker/X86/spill-two-reg.s
A llvm/test/DWARFCFIChecker/X86/unsupported-directives.s
A llvm/test/DWARFCFIChecker/X86/update-with-no-cfi.s
M llvm/tools/llvm-mc/CMakeLists.txt
M llvm/tools/llvm-mc/llvm-mc.cpp
Log Message:
-----------
Minimal unwinding information (DWARF CFI) checker (#145633)
This PR adds a minimal version of `UnwindInfoChecker` described in
[here](https://discourse.llvm.org/t/rfc-dwarf-cfi-validation/86936).
This implementation looks into the modified registers by each
instruction and checks:
- If one of them is the CFA register, and it informs the user if the CFA
data is not modified as well.
- If one of them is used in another register's unwinding rule, it
informs the user if the unwind info is not modified after this
instruction.
This implementation does not support DWARF expressions and treats them
as unknown unwinding rules.
Commit: a8280c4be4cec474eea839bf4caf91b0d071d45b
https://github.com/llvm/llvm-project/commit/a8280c4be4cec474eea839bf4caf91b0d071d45b
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/test/Transforms/LoopInterchange/legality-check.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization-heuristic.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
Log Message:
-----------
[LoopInterchange] Fix incorrect GEPs in tests (NFC) (#147223)
These tests were missing the leading zero(s) in the GEP.
Commit: 7c812ea01a2d11545033bbed8f5094c4a4763124
https://github.com/llvm/llvm-project/commit/7c812ea01a2d11545033bbed8f5094c4a4763124
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
Log Message:
-----------
[RISCV] Avoid vl toggles when lowering vector_splice/experimental_vp_splice and add +vl-dependent-latency tuning feature (#146746)
When vectorizing a loop with a fixed-order recurrence we use a splice,
which gets lowered to a vslidedown and vslideup pair.
However with the way we lower it today we end up with extra vl toggles
in the loop, especially with EVL tail folding, e.g:
.LBB0_5: # %vector.body
# =>This Inner Loop Header: Depth=1
sub a5, a2, a3
sh2add a6, a3, a1
zext.w a7, a4
vsetvli a4, a5, e8, mf2, ta, ma
vle32.v v10, (a6)
addi a7, a7, -1
vsetivli zero, 1, e32, m2, ta, ma
vslidedown.vx v8, v8, a7
sh2add a6, a3, a0
vsetvli zero, a5, e32, m2, ta, ma
vslideup.vi v8, v10, 1
vadd.vv v8, v10, v8
add a3, a3, a4
vse32.v v8, (a6)
vmv2r.v v8, v10
bne a3, a2, .LBB0_5
Because the vslideup overwrites all but UpOffset elements from the
vslidedown, we currently set the vslidedown's AVL to said offset.
But in the vslideup we use either VLMAX or the EVL which causes a
toggle.
This increases the AVL of the vslidedown so it matches vslideup, even if
the extra elements are overridden, to avoid the toggle.
A new tuning feature +vl-dependent-latency has been added which keeps
the old behaviour for microarchitectures that dynamically dispatch uops
based on vl, e.g. sifive-x280.
+vl-dependent-latency can be reused for the recently proposed Ovlt
optimization directive if/when it's ratified:
https://lists.riscv.org/g/tech-privileged/message/2487
If we wanted to aggressively optimise for vl at the expense of
introducing more toggles we could probably look at doing this in
RISCVVLOptimizer.
Commit: 0819fec61a4e6189bae11d1dbbd0a8794321c746
https://github.com/llvm/llvm-project/commit/0819fec61a4e6189bae11d1dbbd0a8794321c746
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
Log Message:
-----------
[RISCV] Add back -verify-machineinstrs to some tests. NFC
These were accidentally removed in 7c812ea01a2d11545033bbed8f5094c4a4763124
Commit: cc95e4039b75c931f928464dd248e0d3712d7643
https://github.com/llvm/llvm-project/commit/cc95e4039b75c931f928464dd248e0d3712d7643
Author: Thurston Dang <thurston at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
Log Message:
-----------
[msan] Handle AVX512 vector down convert (non-mem) intrinsics (#147606)
This handles `llvm.x86.avx512.mask.pmov{,s,us}.*.512` using
`handleIntrinsicByApplyingToShadow()` where possible, otherwise using a
customized slow-path handler, `handleAVX512VectorDownConvert()`.
Note that shadow propagation of `pmov{s,us}` (signed/unsigned
saturation) are approximated using truncation. Future work could extend
`handleAVX512VectorDownConvert()` to use `GetMinMaxUnsigned()` to handle
saturation precisely.
Commit: 18b409558a9936cc7367f9cc59eaae4867a31e2b
https://github.com/llvm/llvm-project/commit/18b409558a9936cc7367f9cc59eaae4867a31e2b
Author: Menooker <myjisgreat at live.cn>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
Log Message:
-----------
[mlir] [scf-to-cf] attach the loop annotation to latch block (#147462)
As [required by LLVM](https://llvm.org/docs/LangRef.html#llvm-loop), the
loop annotation (loop metadata) should be attached on the ["latch"
block](https://llvm.org/docs/LoopTerminology.html). Otherwise, the
annotation might be ignored by LLVM. This PR fixes this issue.
Commit: d14062ee7a5b1c97f2a1d98f52c7a9d178cbceff
https://github.com/llvm/llvm-project/commit/d14062ee7a5b1c97f2a1d98f52c7a9d178cbceff
Author: Murat Toprak <64306017+toprakmurat at users.noreply.github.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/docs/CMake.rst
Log Message:
-----------
docs: Add documentation for LLVM_ENABLE_LIBEDIT CMake flag (#147112)
This adds missing documentation for the LLVM_ENABLE_LIBEDIT flag to the
CMake documentation page, addressing the issue that this flag was
undocumented despite being used in the build system.
The documentation explains:
- Purpose: Controls libedit support for command-line editing
- Supported values: ON, OFF, or auto-detection
- Default behavior: Auto-detection when not specified
Fixes: #146477
Commit: 6ee375147b0b70cd44d06b83dc366c5862599280
https://github.com/llvm/llvm-project/commit/6ee375147b0b70cd44d06b83dc366c5862599280
Author: Brandon Wu <songwu0813 at gmail.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
Log Message:
-----------
[RISCV] Correct type lowering of struct of fixed-vector array in VLS (#147173)
Currently, struct of fixed-vector array is flattened and lowered to
scalable vector. However only struct of 1-element-fixed-vector array
should be lowered that way, struct of fixed-vector array of length >1
should be lowered to vector tuple type.
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/418/files#diff-3a934f00cffdb3e509722753126a2cf6082a7648ab3b9ca8cbb0e84f8a6a12edR555-R558
Commit: 15e7753ababb60f95489154a32c7824a5e6972f9
https://github.com/llvm/llvm-project/commit/15e7753ababb60f95489154a32c7824a5e6972f9
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/utils/mlgo-utils/pyproject.toml
Log Message:
-----------
[MLGO] Use SPDX License Expression (#147646)
Using license classifiers and a text based license was deprecated at
some point and now gives a warning saying it is unsupported. The text
that we had was just the SPDX expression, although misplaced apparently.
Use the SPDX expression properly.
Commit: bccd34f32342e0f299d528ffbb70c825eee983d5
https://github.com/llvm/llvm-project/commit/bccd34f32342e0f299d528ffbb70c825eee983d5
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Log Message:
-----------
[SelectionDAG] Correctly Mark Required Analyses (#147649)
llvm/llvm-project#147560 changed when the legacy SelectionDAG pass needs
TargetTransformInfoWrapperPass to always require it (rather than only
when assertions are enabled). `SelectionDAGISelLegacy::getAnalysisUsage`
was not updated in that PR, which was causing crashes on
assertions-disabled builds, which are hard to track down.
This makes the required update, which should avoid crashes being seen on
some buildbots and by some users.
Commit: c9900015a9a0bc2ccadae5e24b63ddbfe4d508fd
https://github.com/llvm/llvm-project/commit/c9900015a9a0bc2ccadae5e24b63ddbfe4d508fd
Author: Shunsuke Watanabe <watanabe.shu-06 at fujitsu.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/docs/ComplexOperations.md
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
A flang/test/Driver/complex-range.f90
A flang/test/Integration/complex-div-to-llvm-kind10.f90
A flang/test/Integration/complex-div-to-llvm-kind16.f90
A flang/test/Integration/complex-div-to-llvm.f90
A flang/test/Lower/HLFIR/complex-div-to-hlfir-kind10.f90
A flang/test/Lower/HLFIR/complex-div-to-hlfir-kind16.f90
A flang/test/Lower/HLFIR/complex-div-to-hlfir.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang] Add -fcomplex-arithmetic= option and select complex division algorithm (#146641)
This patch adds an option to select the method for computing complex
number division. It uses `LoweringOptions` to determine whether to lower
complex division to a runtime function call or to MLIR's `complex.div`,
and `CodeGenOptions` to select the computation algorithm for
`complex.div`. The available option values and their corresponding
algorithms are as follows:
- `full`: Lower to a runtime function call. (Default behavior)
- `improved`: Lower to `complex.div` and expand to Smith's algorithm.
- `basic`: Lower to `complex.div` and expand to the algebraic algorithm.
See also the discussion in the following discourse post:
https://discourse.llvm.org/t/optimization-of-complex-number-division/83468
---------
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: b7248b5cd464a1ce8f445c71f538c067dfaad9ac
https://github.com/llvm/llvm-project/commit/b7248b5cd464a1ce8f445c71f538c067dfaad9ac
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Use cast instead of dyn_cast to MemSDNode in RISCVISelDAGToDAG.cpp. (#147643)
All of these are guaranteed to be MemSDNode. The only intrinsics that
aren't are vlm and vsm. We should add those to
RISCVTargetLowering::getTgtMemIntrinsic to fix that.
Commit: 5776915d0f83642b7ce54ace0c320bed4770987c
https://github.com/llvm/llvm-project/commit/5776915d0f83642b7ce54ace0c320bed4770987c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
Log Message:
-----------
[InterleavedAccessPass] Add skipFunction check for opt-bisect-limit (#147629)
Commit: 4d0c25f4a637e49abff8cbaffe70cf179b955ea9
https://github.com/llvm/llvm-project/commit/4d0c25f4a637e49abff8cbaffe70cf179b955ea9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
Log Message:
-----------
[RISCV] Select disjoint_or+not as xnor. (#147636)
A disjoint OR can be converted to XOR. And a XOR+NOT is XNOR. Idea
taken from #147279.
I changed the existing xnor pattern to have the not on the outside
instead of the inside. These are equivalent for xor since xor is
associative. Tablegen was already generating multiple variants
of the isel pattern using associativity.
There are some issues here. The disjoint flag isn't preserved
through type legalization. I was hoping we could recover it
manually for the masked merge cases, but that doesn't work either.
Commit: 68494ae072676726722d87af6d9fd9e7c8b808bb
https://github.com/llvm/llvm-project/commit/68494ae072676726722d87af6d9fd9e7c8b808bb
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/test/CodeGen/PowerPC/xray-attribute-instrumentation.ll
M llvm/test/CodeGen/SystemZ/xray.ll
M llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
Log Message:
-----------
[XRay] xray_fn_idx: fix alignment directive
Use `emitValueToAlignment` as the section does not contain code.
`emitCodeAlignment` would lead to ALIGN relocations on RISC-V and
LoongArch with linker relaxation.
In addition, change the alignment to wordsize, sufficient for the
runtime requirement (`XRayFunctionSledIndex`).
Related to #147322
Commit: 7a6568dcd5d471d5f836e5a7c810aff658e1d605
https://github.com/llvm/llvm-project/commit/7a6568dcd5d471d5f836e5a7c810aff658e1d605
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCVXAndes.td
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
A llvm/test/CodeGen/RISCV/rvv/xandesvsinload-vln8.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvsinload-vlnu8.ll
Log Message:
-----------
[RISCV] Support LLVM IR intrinsics for XAndesVSIntLoad (#147493)
This patch adds LLVM IR intrinsic support for XAndesVSIntLoad.
The document for the intrinsics can be found at:
https://github.com/andestech/andes-vector-intrinsic-doc/blob/ast-v5_4_0-release-v5/auto-generated/andes-v5/intrinsic_funcs/04_andes_vector_int4_load_extension.adoc
The clang part will be added in a later patch.
---------
Co-authored-by: Lino Hsing-Yu Peng <linopeng at andestech.com>
Commit: fbc4255ffcb8412a098926c7fc1ede823d6fb0e5
https://github.com/llvm/llvm-project/commit/fbc4255ffcb8412a098926c7fc1ede823d6fb0e5
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/TypeTraitsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/type-traits.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/type-traits.cpp
Log Message:
-----------
[clang-tidy] Teach `modernize-type-traits` about more type traits (#147074)
These new traits come from various standard versions:
C++14:
- `tuple_element_t`
C++17:
- `is_placeholder_v`
- `is_bind_expression_v`
- `ratio_equal_v`
- `ratio_not_equal_v`
- `ratio_less_v`
- `ratio_less_equal_v`
- `ratio_greater_v`
- `ratio_greater_equal_v`
- `is_error_code_enum_v`
- `is_error_condition_enum_v`
- `is_execution_policy_v`
- `tuple_size_v`
- `variant_size_v`
- `uses_allocator_v`
- `variant_alternative_t`
C++20:
- `compare_three_way_result_t`
- `common_comparison_category_t`
- `unwrap_ref_decay_t`
- `unwrap_reference_t`
C++23:
- `is_implicit_lifetime_v`
C++26:
- `is_nothrow_relocatable_v`
- `is_replaceable_v`
- `is_trivially_relocatable_v`
- `is_virtual_base_of_v`
This doesn't add `treat_as_floating_point_v` or `is_clock_v` because
they require more invasive changes; instead I've opened #147072 to track
them.
Commit: 337bc916435f40b0e6f32e197237f007a4c6ee57
https://github.com/llvm/llvm-project/commit/337bc916435f40b0e6f32e197237f007a4c6ee57
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/StackColoring.cpp
Log Message:
-----------
[NPM] StackColoring: Preserve function analyses (#147500)
Commit: f7a09222f42a3fbb44ecbf8b1dd52583fb60efa8
https://github.com/llvm/llvm-project/commit/f7a09222f42a3fbb44ecbf8b1dd52583fb60efa8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
Log Message:
-----------
[clang][test] Fix RUN lines in cxx2a-constexpr-dynalloc.cpp (#147590)
These were added in https://github.com/llvm/llvm-project/pull/147303,
but the -fexperimental-new-constant-interpreter was missing.
Commit: f78691630ae38a2663e9349a181ad7765c7be769
https://github.com/llvm/llvm-project/commit/f78691630ae38a2663e9349a181ad7765c7be769
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
A llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[CodeGen][NPM] Support CodeGenSCCOrder in pipeline (#136818)
Wrap passes into Post order CGSCC pass manager in codegen pass builder.
I am adding the pipeline test in this but it is not yet complete.
Commit: 4aa23ccd14d9425674bdb7b5aa5f97594d3dd96b
https://github.com/llvm/llvm-project/commit/4aa23ccd14d9425674bdb7b5aa5f97594d3dd96b
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
MCAsmInfo: Explicitly set AllowDollarAtStartOfIdentifier to false for some targets
The default AllowDollarAtStartOfIdentifier will be changed to true to
align better with GNU Assembler where $ is a valid initial identifier
char.
Commit: 356dcf25265048ce688c2814a752ccd866acd359
https://github.com/llvm/llvm-project/commit/356dcf25265048ce688c2814a752ccd866acd359
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_ext_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_trunc_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vreinterpret.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vset.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vundefined.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_ext_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_trunc_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vreinterpret.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vset.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vreinterpret.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vset.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vundefined.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vget.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_ext_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_trunc_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vreinterpret.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vset.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslideup.c
Log Message:
-----------
[RISCV] Split out the intrinsic tests for bfloat16 into a separate directory named zvfbfmin. NFC. (#147644)
To improve organization and maintainability, I'd like to split out the
intrinsic tests for zvfh, zvfhmin, zvfbfmin and zvfbfwma into separate
directories.
Commit: ed1ee9a9bf6deb5ec147e79a156e2f8d9465616d
https://github.com/llvm/llvm-project/commit/ed1ee9a9bf6deb5ec147e79a156e2f8d9465616d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/AtomicExpandPass.cpp
R llvm/test/CodeGen/AMDGPU/atomic-oversize.ll
A llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-expand.err.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
R llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-fp128.ll
R llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i128.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
Log Message:
-----------
AtomicExpand: Stop using report_fatal_error (#147300)
Emit a context error and delete the instruction. This
allows removing the AMDGPU hack where some atomic libcalls
are falsely added. NVPTX also later copied the same hack,
so remove it there too.
For now just emit the generic error, which is not good. It's
missing any useful context information (despite taking the instruction).
It's also confusing in the failed atomicrmw case, since it's reporting
failure at the intermediate failed cmpxchg instead of the original
atomicrmw.
Commit: 9c12931b70e182cb83f0e5f7dcdb835d825a6b2e
https://github.com/llvm/llvm-project/commit/9c12931b70e182cb83f0e5f7dcdb835d825a6b2e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/SemaCXX/discrim-union.cpp
Log Message:
-----------
[clang][test] Avoid some C++14 warnings in discrim-union.cpp (#146829)
Before this patch, we emitted a bunch of irrelevant (to this test)
warnings:
```
../clang/test/SemaCXX/discrim-union.cpp:49:24: warning: 'constexpr' non-static member function will not be implicitly 'const' in C++14; add 'const' to avoid a change in behavior [-Wconstexpr-not-const]
49 | constexpr const T &get(select<0>) { return val; }
| ^
| const
../clang/test/SemaCXX/discrim-union.cpp:50:104: warning: 'constexpr' non-static member function will not be implicitly 'const' in C++14; add 'const' to avoid a change in behavior [-Wconstexpr-not-const]
50 | template<unsigned N> constexpr const decltype(static_cast<const rest_t&>(rest).get(select<N-1>{})) get(select<N>) {
| ^
| const
../clang/test/SemaCXX/discrim-union.cpp:82:22: warning: 'constexpr' non-static member function will not be implicitly 'const' in C++14; add 'const' to avoid a change in behavior [-Wconstexpr-not-const]
82 | constexpr unsigned index() noexcept { return elem; }
| ^
| const
../clang/test/SemaCXX/discrim-union.cpp:88:33: warning: 'constexpr' non-static member function will not be implicitly 'const' in C++14; add 'const' to avoid a change in behavior [-Wconstexpr-not-const]
88 | constexpr const_get_result<N> get() {
| ^
| const
../clang/test/SemaCXX/discrim-union.cpp:96:22: warning: 'constexpr' non-static member function will not be implicitly 'const' in C++14; add 'const' to avoid a change in behavior [-Wconstexpr-not-const]
96 | constexpr const U &get() {
| ^
| const
5 warnings generated.
```
Commit: 58e38b8cf0de871aa30378d1dea9a1d2af6235ae
https://github.com/llvm/llvm-project/commit/58e38b8cf0de871aa30378d1dea9a1d2af6235ae
Author: AmirHossein PashaeeHir <42866056+amsen20 at users.noreply.github.com>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/test/DWARFCFIChecker/X86/cfa-corner-cases.s
M llvm/test/DWARFCFIChecker/X86/empty-nested-frames.s
M llvm/test/DWARFCFIChecker/X86/empty-section.s
A llvm/test/DWARFCFIChecker/X86/lit.local.cfg
M llvm/test/DWARFCFIChecker/X86/multiple-sections.s
M llvm/test/DWARFCFIChecker/X86/nested-frames.s
M llvm/test/DWARFCFIChecker/X86/single-func-cfa-mistake.s
M llvm/test/DWARFCFIChecker/X86/single-func-missed-cfi-directive.s
M llvm/test/DWARFCFIChecker/X86/single-func.s
M llvm/test/DWARFCFIChecker/X86/spill-two-reg-reversed.s
M llvm/test/DWARFCFIChecker/X86/spill-two-reg.s
M llvm/test/DWARFCFIChecker/X86/unsupported-directives.s
M llvm/test/DWARFCFIChecker/X86/update-with-no-cfi.s
Log Message:
-----------
[NFC] Fix DWARF CFI checker tests execution on Mac (#147638)
Commit: 0b49f2f485a8b2a2b45b899febb8b06c6aa4caa7
https://github.com/llvm/llvm-project/commit/0b49f2f485a8b2a2b45b899febb8b06c6aa4caa7
Author: Fangrui Song <i at maskray.me>
Date: 2025-07-08 (Tue, 08 Jul 2025)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
Log Message:
-----------
MCSpecifierExpr: Use SubclassData to encode the relocation specifier
Commit: f0bc41181c0fd03069ca63a3b8b0f85e3c7cb477
https://github.com/llvm/llvm-project/commit/f0bc41181c0fd03069ca63a3b8b0f85e3c7cb477
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/sad.ll
Log Message:
-----------
[X86] combineBasicSADPattern - pattern match various vXi8 ABDU patterns (#147570)
We were previously limited to abs(sub(zext(),zext()) patterns, but add
handling for a number of other abdu patterns until a topological sorted
dag allows us to rely on a ABDU node having already been created.
Now that we don't just match zext() sources, I've generalised the
createPSADBW helper to explicitly zext/truncate to the expected vXi8
source type - it still assumes the sources are correct for a PSADBW
node.
Fixes #143456
Commit: cd561bf1f17941a875c9319cf728ff9fc13f0a5a
https://github.com/llvm/llvm-project/commit/cd561bf1f17941a875c9319cf728ff9fc13f0a5a
Author: Pavel Labath <pavel at labath.sk>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/unittests/Support/ScopedPrinterTest.cpp
Log Message:
-----------
[support] Make ScopedPrinter compatible with bitmask enums (#147512)
.. produced by ADT/BitmaskEnum.h.
These aren't implicitly convertible to an integer, so I needed to tweak
a couple of bitwise operations and add an explicit constructor for
HexNumber and FlagEntry.
Motivation: I'd like to use this in the SFrame data structures (#147264)
Commit: 16b8fb1b4a8344136e8f1b29a143ad9cb2a09edd
https://github.com/llvm/llvm-project/commit/16b8fb1b4a8344136e8f1b29a143ad9cb2a09edd
Author: Kadir Cetinkaya <kadircet at google.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/AST/static-compound-literals-crash.cpp
Log Message:
-----------
[clang] Make test work on read-only fileystems
Commit: 2d424e633349fc0e22a1242978989c82aa4895d4
https://github.com/llvm/llvm-project/commit/2d424e633349fc0e22a1242978989c82aa4895d4
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/eon.ll
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
Log Message:
-----------
[AArch64] Lower disjoint_or+not to eon. (#147279)
A disjoint OR can be transformed to an EOR.
We already lower EOR+NOT to EON, but not DisjointOR+NOT.
Commit: 9d3b60dea7ad81f6cb0d9f2e51bb6c80c03fa2d4
https://github.com/llvm/llvm-project/commit/9d3b60dea7ad81f6cb0d9f2e51bb6c80c03fa2d4
Author: Petr Hosek <phosek at google.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M libcxx/CMakeLists.txt
R libcxx/cmake/Modules/HandleLibC.cmake
M libcxx/include/CMakeLists.txt
M libcxx/src/CMakeLists.txt
M libcxxabi/CMakeLists.txt
M libcxxabi/src/CMakeLists.txt
M libunwind/CMakeLists.txt
M libunwind/src/CMakeLists.txt
A runtimes/cmake/Modules/HandleLibC.cmake
Log Message:
-----------
[libcxxabi][libunwind] Support for using LLVM libc (#134893)
This generalizes the support added in #99287 renaming the option to
RUNTIMES_USE_LIBC and integrating the module into libc++abi and
libunwind as well.
Commit: 4581e5ad0f32d4c371b90c677d4c70b8a4019ac5
https://github.com/llvm/llvm-project/commit/4581e5ad0f32d4c371b90c677d4c70b8a4019ac5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Don't push anything in OffsetHelper (#147550)
Instead, return the new Pointer. This was weird before because some
callers had to get the value from the stack again to perform further
operations.
Commit: 755b8f914b8aa4159e76c0e3490e1887623512a6
https://github.com/llvm/llvm-project/commit/755b8f914b8aa4159e76c0e3490e1887623512a6
Author: Tony Varghese <tonypalampalliyil at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/Driver/aix-default-target-triple.c
Log Message:
-----------
[NFC][PowerPC][clang] Update clang/test/Driver/aix-default-target-triple.c for AIX specific targets (#147584)
This is a followup on the [[PowerPC][clang] Fix triple constructor
ambiguity causing "unknown" target triple on
AIX](https://github.com/llvm/llvm-project/pull/147488#top) to address
the [post-commit review
comment](https://github.com/llvm/llvm-project/pull/147488#discussion_r2193111845).
---------
Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
Commit: 603354417375394eb5a9bab2780b6e585da3f628
https://github.com/llvm/llvm-project/commit/603354417375394eb5a9bab2780b6e585da3f628
Author: zbenzion <zbenzion at mobileye.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/test/Dialect/Linalg/collapse-dim.mlir
Log Message:
-----------
[mlir][linalg] Fix memref type verification in CollapseLinalgDimensions (#147245)
When collapsing linalg dimensions we check if its memref operands are
guaranteed to be collapsible. However, we currently assume that the
matching indexing map is the identity map.
This commit modifies this behavior and checks if the memref is
collapsible on the transformed dimensions.
Commit: 1d3b2c562e45ff4b586accb630c538c0e511900c
https://github.com/llvm/llvm-project/commit/1d3b2c562e45ff4b586accb630c538c0e511900c
Author: Jim Lin <jim at andestech.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
Log Message:
-----------
[RISCV] Replace undef with poison for the XAndesVBFHCvt and XAndesVPackFPH intrinsic tests
Commit: dc69b00b0aaebb88af820c575a138397498f1105
https://github.com/llvm/llvm-project/commit/dc69b00b0aaebb88af820c575a138397498f1105
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
RuntimeLibcalls: Remove table of soft float compare cond codes (#146082)
Previously we had a table of entries for every Libcall for
the comparison to use against an integer 0 if it was a soft
float compare function. This was only relevant to a handful of
opcodes, so it was wasteful. Now that we can distinguish the
abstract libcall for the compare with the concrete implementation,
we can just directly hardcode the comparison against the libcall
impl without this configuration system.
Commit: deade03910b21d22ceb4c90786201ec68d6fadda
https://github.com/llvm/llvm-project/commit/deade03910b21d22ceb4c90786201ec68d6fadda
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
ARM: Unconditionally set eabi libcall calling convs in RuntimeLibcalls (#146083)
This fully consolidates all the calling convention configuration into
RuntimeLibcallInfo. I'm assuming that __aeabi functions have a universal
calling convention, and on other ABIs just don't use them. This will
enable splitting of RuntimeLibcallInfo into the ABI and lowering component.
Commit: b02920f36970264d7cbddbe2d432c2d3a8361f1a
https://github.com/llvm/llvm-project/commit/b02920f36970264d7cbddbe2d432c2d3a8361f1a
Author: Luke Lau <luke at igalia.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
Log Message:
-----------
[RISCV] Don't increase vslide or splat vl if +vl-dependent-latency is present (#147089)
If the subtarget's latency is dependent on vl, then we shouldn't try to
fold away vsetvli toggles if it means increasing vl.
Commit: d45d20e871fa745c63d5c920482874502230772d
https://github.com/llvm/llvm-project/commit/d45d20e871fa745c63d5c920482874502230772d
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/lib/CodeGen/Targets/SPIR.cpp
Log Message:
-----------
[OpenCL] Remove image dimensionality comments; NFC (#147312)
The code is correct as it aligns with the SPIR-V Specification, but the
comment was incorrect.
Commit: 962c4217bc68c7b9a138b92dd7a30e2a277e479b
https://github.com/llvm/llvm-project/commit/962c4217bc68c7b9a138b92dd7a30e2a277e479b
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-setArmVLBits.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
Log Message:
-----------
[MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506)
This change only applies to functions the can be reasonably expected to
use SVE registers.
Modifying vector length in the middle of a function might cause
incorrect stack deallocation if there are callee-saved SVE registers or
incorrect access to SVE stack slots.
Addresses (non-issue) https://github.com/llvm/llvm-project/issues/143670
Commit: ecac4e807b4dfd6e7efab1fe942d65763a2a1a89
https://github.com/llvm/llvm-project/commit/ecac4e807b4dfd6e7efab1fe942d65763a2a1a89
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/test/Analysis/new.cpp
R clang/test/Analysis/test-member-invalidation.cpp
Log Message:
-----------
[analyzer][NFC] Remove irrelevant overcomplicated test (#147536)
This commit removes the test file test-member-invalidation.cpp which was
recently introduced in 39bc0529b018a89b4b6a21aaabe240cd3a65c44d by
splitting off a test case from new.cpp.
In that commit I preserved that test in a slightly modified setting to
demonstrate that it wasn't broken by the change; but in this separate
commit I'm removing it because I don't think that it "deserves a place"
among our tests.
The primary issue is that this test examines the values of data members
of a deleted object -- which is irrelevant, because code that relies on
the value of these members should be reported as a use-after-free bug.
(In fact, cplusplus.NewDelete reports it as a use-after-free bug, and
the checker family `MallocChecker` sinks the execution path even if that
particular frontend is not enabled.)
Moreover, a comment claimed that this tests "Invalidate Region even in
case of default destructor" while in fact it tested a situaton where the
destructor is a plain declared-but-not-defined method. The invalidation
of `this` is done by the conservative evaluation, and we don't need this
overcomplicated test to validate that very basic behavior.
Commit: 415733bac40b78d37cb419a3862f3907c5e7bedd
https://github.com/llvm/llvm-project/commit/415733bac40b78d37cb419a3862f3907c5e7bedd
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
Log Message:
-----------
[AMDGPU][NPM] Complete optimized regalloc pipeline (#138491)
Also fill in some other passes.
Commit: 7d92756a4cadab10c6461c061e6e6111445daec5
https://github.com/llvm/llvm-project/commit/7d92756a4cadab10c6461c061e6e6111445daec5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
Log Message:
-----------
DWARFCFIAnalysis.cpp - fix MSVC "not all control paths return a value" warning. NFC.
Commit: 7ea371443b83f20edadb538c4b6ea19ee4de1094
https://github.com/llvm/llvm-project/commit/7ea371443b83f20edadb538c4b6ea19ee4de1094
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
Log Message:
-----------
[AArch64] Extend performActiveLaneMaskCombine for more than two extracts (#146725)
The combine was added to find a get.active.lane.mask used by two
extract subvectors and try to replace it with the paired whilelo
instruction. This extends the combine to cover cases where there
are more than two extracts.
Commit: edaf656d5e17799208118069e8b64ee286621f2c
https://github.com/llvm/llvm-project/commit/edaf656d5e17799208118069e8b64ee286621f2c
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/test/tools/llc/new-pm/start-stop.ll
Log Message:
-----------
[CodeGen][NPM] Differentiate pipeline-required and opt-required passes (#135752)
"Required" passes relate to actually running the pass on the IR,
regardless of whether they are in the pipeline.
CGPassBuilder was mistakenly still adding them to the pipeline.
The test `llc -stop-after=greedy -enable-new-pm` would still add
`greedy` to the pipeline otherwise.
Commit: 9c97b38d44c5dfcab6e97b5177ebcc7b978fb476
https://github.com/llvm/llvm-project/commit/9c97b38d44c5dfcab6e97b5177ebcc7b978fb476
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-sdnode.ll
Log Message:
-----------
[ISel/RISCV] Custom-promote [b]f16 in [l]lrint (#146507)
Extend lowerVectorXRINT to also do a FP_EXTEND_VL when the source
element type is [b]f16, and wire up this custom-promote. Updating the
cost-model to not give these an invalid cost is left to a companion
patch.
Commit: 7edf6bfb54736ea040246e16ece9c784832a4062
https://github.com/llvm/llvm-project/commit/7edf6bfb54736ea040246e16ece9c784832a4062
Author: woruyu <99597449+woruyu at users.noreply.github.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[DAG][X86] Use pattern matching to simplify PSADBW+ADD combine (#147637)
This patch refactors the add(psadbw(x, 0), psadbw(y, 0)) -> psadbw(x + y, 0) combine to use SDPatternMatch matchers instead of manually checking opcodes and operands.
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 50facad7fc9fc1c33f06b575c3ee51b5a49ca5c4
https://github.com/llvm/llvm-project/commit/50facad7fc9fc1c33f06b575c3ee51b5a49ca5c4
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/revec-insertelement.ll
Log Message:
-----------
[SLP][REVEC] Fix insertelement legality checks (#146921)
The current code assumes that all the values in VL are valid
instructions, while it is possible to get poison.
Commit: d3d4066409c4da9e002a41c03ce226fea3e6dc00
https://github.com/llvm/llvm-project/commit/d3d4066409c4da9e002a41c03ce226fea3e6dc00
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Log Message:
-----------
DAG: Remove dead declaration of ExpandSinCosLibCall (#147673)
Commit: c3d9f31b11eb3db5591e21cb9d6def98d39c1cb1
https://github.com/llvm/llvm-project/commit/c3d9f31b11eb3db5591e21cb9d6def98d39c1cb1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
Log Message:
-----------
[AArch64][SVE] Avoid using the SVE stack size before it is determined (#147561)
This patch adds asserts to `getStackSizeSVE()` and
`getSVECalleeSavedStackSize()` to check they are only called after the
SVE stack size has been determined.
This patch then fixes issues in three places:
* `AArch64FrameLowering::homogeneousPrologEpilog()`
- This function is called before callee saves or SVE stack sizes have
been determined
- This check has been updated to use `isLikelyToHaveSVEStack()`
- `isLikelyToHaveSVEStack()` conservatively returns if a function is
likely to have an SVE stack
* `produceCompactUnwindFrame()`
- This function checked the SVE CS stack size before callee-saves had
been determined
- This has been replaced with a more conservative `isSVECC()` check
* `AArch64FrameLowering::resolveFrameOffsetReference()`
- This was hit by some post-PEI MIR tests
- This case was fixed by adding "stackSizeSVE" to the YAML for
`AArch64FunctionInfo`
Commit: b33d95fb8a873d1bd4d41323873e93d8c3cbd2a5
https://github.com/llvm/llvm-project/commit/b33d95fb8a873d1bd4d41323873e93d8c3cbd2a5
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/include/llvm/CodeGen/InitUndef.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AArch64/init-undef.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
Log Message:
-----------
[CodeGen][NPM] Port InitUndef to NPM (#138495)
Commit: f6760149556b0a092e1cdd047c84b03b5c5df116
https://github.com/llvm/llvm-project/commit/f6760149556b0a092e1cdd047c84b03b5c5df116
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
M clang/test/Sema/aarch64-streaming-sme-or-nonstreaming-sve-builtins.c
Log Message:
-----------
[Clang][AArch64] Fix feature guards for SVE2p1 builtins available in SME{2}. (#147086)
Builtins that are enabled via +sve2p1 in non-streaming mode and +sme{2}
in streaming mode should also be enabled via +sve+sme{2} in
non-streaming mode and +sme+sve2p1 in streaming mode.
Commit: 8c06d0e547709f3701051b220241b82d8e926342
https://github.com/llvm/llvm-project/commit/8c06d0e547709f3701051b220241b82d8e926342
Author: Ross Brunton <ross at codeplay.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M offload/liboffload/API/Device.td
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/tools/offload-tblgen/Generators.hpp
M offload/tools/offload-tblgen/MiscGen.cpp
M offload/tools/offload-tblgen/offload-tblgen.cpp
Log Message:
-----------
[Offload] Generate OffloadInfo.inc (#147316)
This is a generated file which contains a macro for all Device Info
keys. This is visible to the plugin interface so that it can use the
definitions in a future patch.
Commit: 69835d8f6d5b343306fbbb401af85fdd891be794
https://github.com/llvm/llvm-project/commit/69835d8f6d5b343306fbbb401af85fdd891be794
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A clang/test/Driver/Inputs/cpunative/grace
R clang/test/Driver/Inputs/cpunative/neoverse-v2
M clang/test/Driver/aarch64-mcpu-native.c
M clang/test/Driver/print-enabled-extensions/aarch64-grace.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[clang][AArch64] Parse more features in getHostCPUFeatures (#146323)
Add parsing of some crypto features to display them properly when
-mcpu=native is used
Commit: fbb2fa92cb72e426c942d48f0189b70bbd8e476a
https://github.com/llvm/llvm-project/commit/fbb2fa92cb72e426c942d48f0189b70bbd8e476a
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M mlir/lib/Target/LLVM/NVVM/Target.cpp
Log Message:
-----------
[MLIR] Add missing includes
The build was broken when MLIR_NVVM_EMBED_LIBDEVICE was enabled.
Commit: 4be3e95284a028bca54f08ded6dc2e8d4ac2ec75
https://github.com/llvm/llvm-project/commit/4be3e95284a028bca54f08ded6dc2e8d4ac2ec75
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/test/CMakeLists.txt
M flang-rt/unittests/CMakeLists.txt
M offload/CMakeLists.txt
M offload/unittests/CMakeLists.txt
M third-party/unittest/CMakeLists.txt
Log Message:
-----------
[Flang-RT][Offload] Always use LLVM-built GTest (#143682)
The Offload and Flang-RT had the ability to compile GTest themselves.
But in bootstrapping builds, LLVM_LIBRARY_OUTPUT_INTDIR points to the
same location as the stage1 build. If both are building GTest, they
everwrite each others `libllvm_gtest.a` and `libllvm_test_main.a` which
causes #143134.
This PR removes the ability for the Offload/Flang-RT runtimes to build
their own GTest and instead relies on the stage1 build of GTest. This
was already the case with LLVM_INSTALL_GTEST=ON configurations. For
LLVM_INSTALL_GTEST=OFF configurations, we now also export gtest into the
buildtree configuration. Ultimately, this reduces combinatorial
explosion of configurations in which unittests could be built
(LLVM_INSTALL_GTEST=ON, GTest built by Offload, GTest built by Flang-RT,
GTest built by Offload and also used by Flang-RT).
GTest and therefore Offload/Runtime unittests will not be available if
the runtimes are configured against an LLVM install tree. Since llvm-lit
isn't available in the install tree either, it doesn't matter.
Note that compiler-rt and libc also use GTest in non-default
configrations. libc also depends on LLVM's GTest build (and would
error-out if unavailable), but compiler-rt builds it completely
different.
Fixes #143134
Commit: ff05d26a29739e9c8dbb41d88840261ca6e13f83
https://github.com/llvm/llvm-project/commit/ff05d26a29739e9c8dbb41d88840261ca6e13f83
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/TestDataFormatterStdStringView.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/TestDataFormatterLibcxxStringView.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/main.cpp
Log Message:
-----------
[lldb][test] Move std::string_view from libcxx to generic directory (#147563)
This just moves the test from `libcxx` to `generic`. There are currently
no `std::string_view` formatters for libstdc++ so I didn't add a
test-case for it.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: a4d95c27171ede81cd4100ca24ad1512ab1a4bee
https://github.com/llvm/llvm-project/commit/a4d95c27171ede81cd4100ca24ad1512ab1a4bee
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
Log Message:
-----------
[Clang][AArch64] Add missing builtins for __ARM_FEATURE_SME2p1. (#147362)
The quadword vector instructions introduced by SVE2p1/SME2p1 but the
builtins were not available to streaming mode.
RAX1 is available in streaming mode when SME2p1 is available.
Commit: b0cc1867a3b84867db5add7d631d4b0c1c10b13b
https://github.com/llvm/llvm-project/commit/b0cc1867a3b84867db5add7d631d4b0c1c10b13b
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/TestDataFormatterStdSpan.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/TestDataFormatterLibcxxSpan.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/main.cpp
Log Message:
-----------
[lldb][test] Move std::span from libcxx to generic directory (#147680)
This just moves the test from `libcxx` to `generic`. There are currently
no `std::span` formatters for libstdc++ so I didn't add a test-case for
it.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: ba6f87248b948e019cbb2d31099d410e3c0f20d0
https://github.com/llvm/llvm-project/commit/ba6f87248b948e019cbb2d31099d410e3c0f20d0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/TestDataFormatterStdUnorderedMap.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/TestDataFormatterLibccUnorderedMap.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/main.cpp
Log Message:
-----------
[lldb][test] Move std::unordered_map::iterator from libcxx to generic… (#147703)
… directory
This just moves the test from `libcxx` to `generic`. There are currently
no `std::unordered_map::iterator` formatters for libstdc++ so I didn't
add a test-case for it.
Split out from https://github.com/llvm/llvm-project/pull/146740
Commit: 64686c59c376902a4328d7759b2db860d11a5650
https://github.com/llvm/llvm-project/commit/64686c59c376902a4328d7759b2db860d11a5650
Author: Florian Hahn <flo at fhahn.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
Log Message:
-----------
[VPlan] Connect (MemRuntime|SCEV)Check blocks as VPlan transform (NFC). (#143879)
Connect SCEV and memory runtime check block directly in VPlan as
VPIRBasicBlocks, removing ILV::emitSCEVChecks and
ILV::emitMemRuntimeChecks.
The new logic is currently split across
LoopVectorizationPlanner::addRuntimeChecks which collects a list of
{Condition, CheckBlock} pairs and performs some checks and emits remarks
if needed. The list of checks is then added to VPlan in
VPlanTransforms::connectCheckBlocks.
PR: https://github.com/llvm/llvm-project/pull/143879
Commit: 62e537ae4fc3ea2ea087847b02543e619b24470b
https://github.com/llvm/llvm-project/commit/62e537ae4fc3ea2ea087847b02543e619b24470b
Author: Paul Walker <paul.walker at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
A llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
Log Message:
-----------
[NFC][LLVM][SVE] Add bfloat predicated binop and FMA tests.
This is a bfloat clone of sve-fp-combine.ll that only tests
sve-b16b16 because without this feature all binops are expanded to
float.
Commit: b041a589891e07fc4c6fe38e12faed17e2633c55
https://github.com/llvm/llvm-project/commit/b041a589891e07fc4c6fe38e12faed17e2633c55
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang-tools-extra/clang-tidy/ClangTidy.cpp
Log Message:
-----------
[clang-tidy][NFC] concat static-analyzer name at compilation time (#147406)
```cpp
for (std::string OptionName : {
#define GET_CHECKER_OPTIONS
#define CHECKER_OPTION(TYPE, CHECKER, OPTION_NAME, DESCRIPTION, DEFAULT, \
RELEASE, HIDDEN) \
Twine(AnalyzerCheckNamePrefix).concat(CHECKER ":" OPTION_NAME).str(),
#include "clang/StaticAnalyzer/Checkers/Checkers.inc"
#undef CHECKER_OPTION
#undef GET_CHECKER_OPTIONS
}) {
Result.Options.insert(OptionName);
}
```
This code is doing a lot of unnecessary work at runtime. For each of the
(currently) 59 checker options, it runs
`Twine(AnalyzerCheckNamePrefix).concat(CHECKER ":" OPTION_NAME).str(),`,
which allocates a string (all of this is unrolled, leading to code
bloat). Then it copies all those strings (because `std::string
OptionName`, not `const std::string& OptionName`). All of this can be
done at compile time!
Commit: fe5d94d85dbea482cdedc9c8392240545aca5bac
https://github.com/llvm/llvm-project/commit/fe5d94d85dbea482cdedc9c8392240545aca5bac
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/time-intrinsic.cpp
Log Message:
-----------
[flang-rt] Match compiler-rt's default macos version (#147273)
Followup to https://github.com/llvm/llvm-project/pull/143508
This required adding another alternative implementation of time
intrinsics to match what is available in older MacOS.
With this change, flang can be used to build programs for older versions
of MacOS.
Co-authored-by: David Truby <david.truby at arm.com>
Commit: bdc8736b2d4ade1bee2f815286353312942a579c
https://github.com/llvm/llvm-project/commit/bdc8736b2d4ade1bee2f815286353312942a579c
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
R llvm/test/Analysis/ScalarEvolution/guards.ll
A llvm/test/Transforms/IndVarSimplify/guards.ll
Log Message:
-----------
[SCEV] Move a test into IndVars (#147360)
Move the guards.ll into IndVars, as it is really an IndVars test.
Commit: 9e132f50684b3b8d18460ea69a7cbe3964c125cb
https://github.com/llvm/llvm-project/commit/9e132f50684b3b8d18460ea69a7cbe3964c125cb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Move function SLPVectorizerPass::tryToVectorize around, NFC
Commit: 376b3f70492b9ad610a64d787441a1a6a17a4d7a
https://github.com/llvm/llvm-project/commit/376b3f70492b9ad610a64d787441a1a6a17a4d7a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Devirtualize calls during con- and destruction (#147685)
When compiliung compiling a ctor or dtor, we need to devirtualize the
virtual function calls so we always call the implementation of the
current class.
Commit: 0c24c4bac83e31fe55f3f47f8729b1b73a5b5ef8
https://github.com/llvm/llvm-project/commit/0c24c4bac83e31fe55f3f47f8729b1b73a5b5ef8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2025-07-09 (Wed, 09 Jul 2025)
Changed paths:
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
M clang-tools-extra/clang-tidy/ClangTidy.cpp
M clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
M clang-tools-extra/clang-tidy/abseil/AbseilMatcher.h
M clang-tools-extra/clang-tidy/bugprone/ComparePointerToMemberVirtualFunctionCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
M clang-tools-extra/clang-tidy/modernize/TypeTraitsCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseUsingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/type-traits.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/type-traits.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticCommentKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/Driver/CommonArgs.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Lex/LexHLSLRootSignature.h
M clang/include/clang/Parse/ParseHLSLRootSignature.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/CommentSema.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/SPIR.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Lex/LexHLSLRootSignature.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseHLSLRootSignature.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/NoOwnershipChangeVisitor.h
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/AST/static-compound-literals-crash.cpp
A clang/test/AST/static-compound-literals-reeval.cpp
A clang/test/AST/static-compound-literals.cpp
M clang/test/Analysis/new.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/IR/struct.cir
M clang/test/CodeGen/AArch64/fmv-dependencies.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_rax1.c
M clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_bfmlsl.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_create4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fp_reduce.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_get4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_int_reduce.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_load_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_loads.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_pred.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_pmov_to_vector.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_psel.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qcvtn.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_qrshr.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set2_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_set4_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store.c
A clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_store_struct.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uclamp.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_undef_bool.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_while_x2.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c
A clang/test/CodeGen/AMDGPU/full-bf16.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_ext_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_trunc_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vreinterpret.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vset.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vundefined.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_ext_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_trunc_v.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vreinterpret.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vset.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vslideup.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlse16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg2e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg3e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg4e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg5e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg6e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg7e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg8e16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg3ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg4ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg5ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg6ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg7ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg8ei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vrgatherei16.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vslidedown.c
R clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vcreate.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vget.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_ext_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlmul_trunc_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vreinterpret.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vset.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsoxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vssseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/non-overloaded/vundefined.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vget.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_ext_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlmul_trunc_v.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vreinterpret.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vset.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsoxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vssseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/non-policy/overloaded/vsuxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/non-overloaded/vslideup.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vle16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vloxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlse16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg2e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg3e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg4e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg5e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg6e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg7e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlseg8e16ff.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg2e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg3e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg4e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg5e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg6e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg7e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vlsseg8e16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg2ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg3ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg4ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg5ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg6ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg7ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vluxseg8ei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vrgatherei16.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslidedown.c
A clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvfbfmin/policy/overloaded/vslideup.c
M clang/test/CodeGenCXX/cxx0x-initializer-scalars.cpp
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
A clang/test/Driver/Inputs/cpunative/grace
R clang/test/Driver/Inputs/cpunative/neoverse-v2
A clang/test/Driver/Inputs/offload-arch/offload_arch_sm_70_gfx906
M clang/test/Driver/aarch64-implied-sve-features.c
M clang/test/Driver/aarch64-mcpu-native.c
A clang/test/Driver/aix-default-target-triple.c
M clang/test/Driver/frame-pointer-elim.c
M clang/test/Driver/openmp-system-arch.c
M clang/test/Driver/print-enabled-extensions/aarch64-fujitsu-monaka.c
M clang/test/Driver/print-enabled-extensions/aarch64-gb10.c
M clang/test/Driver/print-enabled-extensions/aarch64-grace.c
M clang/test/Driver/print-enabled-extensions/aarch64-olympus.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M clang/test/Parser/statements.c
M clang/test/Sema/aarch64-streaming-sme-or-nonstreaming-sve-builtins.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
M clang/test/Sema/c2x-fallthrough.c
M clang/test/SemaCXX/cxx2a-constexpr-dynalloc.cpp
M clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
M clang/test/SemaCXX/discrim-union.cpp
M clang/test/SemaHLSL/RootSignature-err.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
M clang/test/SemaTemplate/partial-order.cpp
M clang/unittests/Lex/LexHLSLRootSignatureTest.cpp
M clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp
M clang/utils/TableGen/SveEmitter.cpp
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
A compiler-rt/lib/asan/AIX/asan.link_with_main_exec.txt
A compiler-rt/lib/asan/AIX/asan_cxx.link_with_main_exec.txt
R compiler-rt/lib/asan/asan.link_with_main_exec.txt
R compiler-rt/lib/asan/asan_cxx.link_with_main_exec.txt
M compiler-rt/lib/hwasan/hwasan_new_delete.cpp
M compiler-rt/lib/scudo/standalone/allocator_common.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/assign.cpp
M flang-rt/lib/runtime/time-intrinsic.cpp
M flang-rt/lib/runtime/type-info.cpp
M flang-rt/test/CMakeLists.txt
M flang-rt/unittests/CMakeLists.txt
M flang/docs/ComplexOperations.md
M flang/include/flang/Common/interval.h
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/include/flang/Support/Fortran-features.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExprToHLFIR.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/assignment.h
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
A flang/test/Driver/complex-range.f90
M flang/test/HLFIR/opt-scalar-assign.fir
A flang/test/Integration/complex-div-to-llvm-kind10.f90
A flang/test/Integration/complex-div-to-llvm-kind16.f90
A flang/test/Integration/complex-div-to-llvm.f90
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
A flang/test/Lower/HLFIR/complex-div-to-hlfir-kind10.f90
A flang/test/Lower/HLFIR/complex-div-to-hlfir-kind16.f90
A flang/test/Lower/HLFIR/complex-div-to-hlfir.f90
A flang/test/Parser/OpenMP/loop-transformation-construct03.f90
M flang/tools/bbc/bbc.cpp
M libc/utils/MPFRWrapper/MPCommon.cpp
M libcxx/CMakeLists.txt
R libcxx/cmake/Modules/HandleLibC.cmake
M libcxx/include/CMakeLists.txt
M libcxx/include/__exception/exception_ptr.h
M libcxx/src/CMakeLists.txt
A libcxx/test/std/language.support/support.exception/propagation/make_exception_ptr.objc.pass.mm
M libcxx/test/std/thread/futures/futures.async/thread_create_failure.pass.cpp
M libcxxabi/CMakeLists.txt
M libcxxabi/src/CMakeLists.txt
M libunwind/CMakeLists.txt
M libunwind/src/CMakeLists.txt
M lld/test/wasm/lto/Inputs/libcall-archive.ll
M lld/test/wasm/lto/libcall-archive.ll
M lldb/include/lldb/Breakpoint/BreakpointName.h
M lldb/include/lldb/Breakpoint/BreakpointResolverScripted.h
M lldb/include/lldb/Breakpoint/Watchpoint.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/Breakpoint/BreakpointIDList.cpp
M lldb/source/Breakpoint/BreakpointLocationCollection.cpp
M lldb/source/Breakpoint/BreakpointName.cpp
M lldb/source/Breakpoint/BreakpointOptions.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/OptionArgParser.cpp
M lldb/source/Plugins/Language/CPlusPlus/CMakeLists.txt
A lldb/source/Plugins/Language/CPlusPlus/Generic.cpp
M lldb/source/Plugins/Language/CPlusPlus/Generic.h
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/TestDataFormatterStdQueue.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/queue/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/shared_ptr/TestDataFormatterStdSharedPtr.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/TestDataFormatterStdSpan.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/span/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/TestDataFormatterStdString.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/TestDataFormatterStdStringView.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string_view/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/TestDataFormatterStdUnorderedMap.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered_map-iterator/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/TestDataFormatterStdVariant.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/variant/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/TestDataFormatterLibcxxQueue.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/queue/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/TestDataFormatterLibcxxSpan.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/span/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/TestDataFormatterLibcxxString.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/TestDataFormatterLibcxxStringView.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/string_view/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/TestDataFormatterLibccUnorderedMap.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered_map-iterator/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/TestDataFormatterLibcxxVariant.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/variant/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/TestDataFormatterInvalidStdVariant.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/invalid-variant/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/TestDataFormatterStdString.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/string/main.cpp
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/Makefile
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/TestDataFormatterLibStdcxxVariant.py
R lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/main.cpp
M lldb/test/API/macosx/arm-corefile-regctx/TestArmMachoCorefileRegctx.py
M lldb/test/API/macosx/arm-corefile-regctx/create-arm-corefiles.cpp
M lldb/test/API/tools/lldb-dap/module-event/TestDAP_module_event.py
M lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/ModulesRequestHandler.cpp
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/JSONUtils.h
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolEvents.h
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp
M lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
M lldb/tools/lldb-dap/ProtocolUtils.cpp
M lldb/tools/lldb-dap/ProtocolUtils.h
M lldb/unittests/DAP/CMakeLists.txt
M lldb/unittests/DAP/JSONUtilsTest.cpp
M lldb/unittests/DAP/ProtocolTypesTest.cpp
A lldb/unittests/DAP/ProtocolUtilsTest.cpp
M lldb/unittests/Host/MainLoopTest.cpp
M llvm/CMakeLists.txt
M llvm/docs/CMake.rst
M llvm/include/llvm-c/Analysis.h
M llvm/include/llvm-c/BitReader.h
M llvm/include/llvm-c/BitWriter.h
M llvm/include/llvm-c/Comdat.h
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm-c/Disassembler.h
M llvm/include/llvm-c/Error.h
M llvm/include/llvm-c/ErrorHandling.h
M llvm/include/llvm-c/ExecutionEngine.h
M llvm/include/llvm-c/IRReader.h
M llvm/include/llvm-c/LLJIT.h
M llvm/include/llvm-c/LLJITUtils.h
M llvm/include/llvm-c/Linker.h
M llvm/include/llvm-c/Object.h
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm-c/OrcEE.h
M llvm/include/llvm-c/Remarks.h
M llvm/include/llvm-c/Support.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/include/llvm-c/Transforms/PassBuilder.h
A llvm/include/llvm-c/Visibility.h
M llvm/include/llvm-c/blake3.h
M llvm/include/llvm/Analysis/FunctionPropertiesAnalysis.h
M llvm/include/llvm/Analysis/IR2Vec.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
A llvm/include/llvm/CodeGen/InitUndef.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/abi-breaking.h.cmake
M llvm/include/llvm/Config/llvm-config.h.cmake
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIAnalysis.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameReceiver.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.h
A llvm/include/llvm/DWARFCFIChecker/DWARFCFIState.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDataExtractor.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h
A llvm/include/llvm/DebugInfo/DWARF/DWARFUnwindTablePrinter.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFCFIProgram.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
A llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureValidations.h
M llvm/include/llvm/Frontend/OpenMP/DirectiveNameParser.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsRISCVXAndes.td
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCAsmBackend.h
M llvm/include/llvm/MC/MCContext.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/MC/MCFixup.h
M llvm/include/llvm/MC/MCInst.h
M llvm/include/llvm/MC/MCSection.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/MC/MCValue.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/Transforms/IPO/Attributor.h
A llvm/include/llvm/Transforms/Utils/DeclareRuntimeLibcalls.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CMakeLists.txt
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/InterleavedAccessPass.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/lib/DWARFCFIChecker/CMakeLists.txt
A llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIFunctionFrameAnalyzer.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.cpp
A llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
A llvm/lib/DWARFCFIChecker/Registers.h
M llvm/lib/DebugInfo/DWARF/CMakeLists.txt
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
A llvm/lib/DebugInfo/DWARF/DWARFUnwindTablePrinter.cpp
M llvm/lib/DebugInfo/DWARF/LowLevel/CMakeLists.txt
A llvm/lib/DebugInfo/DWARF/LowLevel/DWARFUnwindTable.cpp
M llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCSection.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Support/JSON.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.h
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
M llvm/lib/Target/AArch64/AArch64Processors.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCAsmInfo.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
M llvm/lib/Target/X86/MCA/X86CustomBehaviour.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
M llvm/lib/TargetParser/AArch64TargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/TargetParser/Unix/Host.inc
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/EarlyCSE.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/DeclareRuntimeLibcalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
R llvm/test/Analysis/ScalarEvolution/guards.ll
M llvm/test/CodeGen/AArch64/GlobalISel/select-splat-vector.ll
M llvm/test/CodeGen/AArch64/dump-schedule-trace.mir
M llvm/test/CodeGen/AArch64/eon.ll
M llvm/test/CodeGen/AArch64/force-enable-intervals.mir
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract.ll
M llvm/test/CodeGen/AArch64/init-undef.mir
A llvm/test/CodeGen/AArch64/machine-combiner-maddimm.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
M llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
M llvm/test/CodeGen/AArch64/misched-sort-resource-in-trace.mir
M llvm/test/CodeGen/AArch64/neon-sad.ll
M llvm/test/CodeGen/AArch64/regress-w29-reserved-with-fp.ll
A llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
M llvm/test/CodeGen/AArch64/sve2-intrinsics-sm4.ll
M llvm/test/CodeGen/AArch64/vselect-constants.ll
M llvm/test/CodeGen/AArch64/win-sve.ll
M llvm/test/CodeGen/AArch64/wincfi-missing-seh-directives.ll
A llvm/test/CodeGen/AArch64/wineh-aligned-stack-obj.ll
M llvm/test/CodeGen/AArch64/wineh-frame5.mir
M llvm/test/CodeGen/AArch64/wineh-frame7.mir
A llvm/test/CodeGen/AArch64/wineh-reuse-catch-alloca.ll
M llvm/test/CodeGen/AArch64/wineh-try-catch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
R llvm/test/CodeGen/AMDGPU/atomic-oversize.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
A llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
A llvm/test/CodeGen/AMDGPU/test_isel_single_lane.ll
A llvm/test/CodeGen/AMDGPU/unsupported-atomics.ll
M llvm/test/CodeGen/ARM/misched-prevent-erase-history-of-subunits.mir
A llvm/test/CodeGen/AVR/sincos-soften-error.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.5.ll
A llvm/test/CodeGen/DirectX/legalize-lifetimes-valver-1.6.ll
R llvm/test/CodeGen/DirectX/legalize-lifetimes.ll
M llvm/test/CodeGen/Hexagon/calloperand-v128i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v16i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v32i1.ll
M llvm/test/CodeGen/Hexagon/calloperand-v64i1.ll
A llvm/test/CodeGen/LoongArch/llvm.sincos.ll
A llvm/test/CodeGen/NVPTX/atomicrmw-expand.err.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-expand.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-g2s.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-prefetch.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-reduce.ll
M llvm/test/CodeGen/NVPTX/cp-async-bulk-tensor-s2g.ll
M llvm/test/CodeGen/PowerPC/xray-attribute-instrumentation.ll
M llvm/test/CodeGen/RISCV/features-info.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfncvt-bf16-s.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadb.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvpackfph-vfpmadt.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvsinload-vln8.ll
A llvm/test/CodeGen/RISCV/rvv/xandesvsinload-vlnu8.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
A llvm/test/CodeGen/SPARC/llvm.sincos.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ptr-annotation.ll
A llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
M llvm/test/CodeGen/SystemZ/systemz-large-stack-frames.ll
M llvm/test/CodeGen/SystemZ/xray.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/WebAssembly/expand-variadic-call.ll
A llvm/test/CodeGen/WebAssembly/llvm.sincos.ll
M llvm/test/CodeGen/WebAssembly/vararg-frame.ll
M llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
M llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
M llvm/test/CodeGen/X86/absolute-cmp.ll
M llvm/test/CodeGen/X86/apx/and.ll
M llvm/test/CodeGen/X86/apx/ccmp.ll
M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
M llvm/test/CodeGen/X86/apx/or.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/apx/xor.ll
M llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
M llvm/test/CodeGen/X86/avx512vl-arith.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
M llvm/test/CodeGen/X86/bmi.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/fma-scalar-combine.ll
M llvm/test/CodeGen/X86/fma.ll
M llvm/test/CodeGen/X86/fold-rmw-ops.ll
M llvm/test/CodeGen/X86/pr38865.ll
M llvm/test/CodeGen/X86/pr61384.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
M llvm/test/CodeGen/X86/sse41.ll
M llvm/test/CodeGen/X86/vec_fpext.ll
M llvm/test/CodeGen/X86/x86-interrupt_cc.ll
M llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
A llvm/test/DWARFCFIChecker/X86/cfa-corner-cases.s
A llvm/test/DWARFCFIChecker/X86/empty-nested-frames.s
A llvm/test/DWARFCFIChecker/X86/empty-section.s
A llvm/test/DWARFCFIChecker/X86/lit.local.cfg
A llvm/test/DWARFCFIChecker/X86/multiple-sections.s
A llvm/test/DWARFCFIChecker/X86/nested-frames.s
A llvm/test/DWARFCFIChecker/X86/single-func-cfa-mistake.s
A llvm/test/DWARFCFIChecker/X86/single-func-missed-cfi-directive.s
A llvm/test/DWARFCFIChecker/X86/single-func.s
A llvm/test/DWARFCFIChecker/X86/spill-two-reg-reversed.s
A llvm/test/DWARFCFIChecker/X86/spill-two-reg.s
A llvm/test/DWARFCFIChecker/X86/unsupported-directives.s
A llvm/test/DWARFCFIChecker/X86/update-with-no-cfi.s
M llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
M llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
A llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/sm4e.s
M llvm/test/MC/AArch64/SVE2/sm4ekey.s
M llvm/test/MC/AMDGPU/gfx10_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx7_err_pos.s
M llvm/test/MC/AMDGPU/gfx8_err_pos.s
M llvm/test/MC/AMDGPU/gfx9_asm_vop3_e64.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
M llvm/test/MC/ELF/mc-dump.s
M llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
M llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
R llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-fp128.ll
R llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i128.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-mmra.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
M llvm/test/Transforms/Coroutines/coro-split-dbg-labels.ll
M llvm/test/Transforms/EarlyCSE/AArch64/intrinsics.ll
A llvm/test/Transforms/IndVarSimplify/guards.ll
M llvm/test/Transforms/InstCombine/add4.ll
M llvm/test/Transforms/LoopInterchange/legality-check.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization-heuristic.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
A llvm/test/Transforms/SLPVectorizer/revec-insertelement.ll
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/basic.ll
M llvm/test/Verifier/invalid-vp-intrinsics.ll
M llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/test/tools/llvm-cov/Inputs/binary-formats.canonical.json
M llvm/test/tools/llvm-cov/mcdc-export-json.test
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-mc/CMakeLists.txt
M llvm/tools/llvm-mc/llvm-mc.cpp
M llvm/tools/obj2yaml/CMakeLists.txt
M llvm/tools/yaml2obj/CMakeLists.txt
M llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
M llvm/unittests/Support/ScopedPrinterTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/tools/llvm-mca/CMakeLists.txt
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/gn/secondary/lldb/source/Plugins/Language/CPlusPlus/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/DWARF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/DebugInfo/DWARF/LowLevel/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/lit/lit/llvm/config.py
M llvm/utils/mlgo-utils/pyproject.toml
M mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
M mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/NestedMatcher.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineExpandIndexOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineScalarReplacement.cpp
M mlir/lib/Dialect/Affine/Transforms/DecomposeAffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopCoalescing.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnrollAndJam.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineMinMax.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferDeallocationOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferViewFlowOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferUtils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferViewFlowAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
M mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorToAllocTensor.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/LowerDeallocations.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OptimizeAllocationLiveness.cpp
M mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/ExecutionEngine/ArmRunnerUtils.cpp
M mlir/lib/Target/LLVM/NVVM/Target.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Conversion/ArithToAMDGPU/scaling-extf.mlir
A mlir/test/Conversion/ArithToAMDGPU/scaling-truncf.mlir
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Dialect/Linalg/collapse-dim.mlir
M mlir/test/Dialect/SPIRV/IR/khr-cooperative-matrix-ops.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-scalable-deinterleave.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-setArmVLBits.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir
M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
A mlir/test/Target/LLVMIR/openmp-parallel-do-simd.mlir
A mlir/test/Target/LLVMIR/openmp-teams-distribute-parallel-do-simd.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M offload/CMakeLists.txt
M offload/liboffload/API/Device.td
M offload/plugins-nextgen/common/CMakeLists.txt
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/tools/offload-tblgen/Generators.hpp
M offload/tools/offload-tblgen/MiscGen.cpp
M offload/tools/offload-tblgen/offload-tblgen.cpp
M offload/unittests/CMakeLists.txt
M openmp/runtime/src/kmp.h
M openmp/runtime/src/kmp_runtime.cpp
A runtimes/cmake/Modules/HandleLibC.cmake
M third-party/unittest/CMakeLists.txt
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Rebase
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/85f3eab645d9...0c24c4bac83e
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