[all-commits] [llvm/llvm-project] 6ee877: [RISCV][IR] Implement verifier check for llvm.expe...

Craig Topper via All-commits all-commits at lists.llvm.org
Tue Jul 8 13:54:32 PDT 2025


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6ee87759e3ddcaca0cda3d9fd53e69cff7315c1d
      https://github.com/llvm/llvm-project/commit/6ee87759e3ddcaca0cda3d9fd53e69cff7315c1d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M llvm/lib/IR/Verifier.cpp
    M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
    M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
    M llvm/test/Verifier/invalid-vp-intrinsics.ll

  Log Message:
  -----------
  [RISCV][IR] Implement verifier check for llvm.experimental.vp.splice immediate. (#147458)

This applies the same check as llvm.vector.splice which checks that the immediate is in the range [-VL, VL-1] where VL is the minimum vector length. If vscale_range is available, the lower bound is used to increase the known minimum vector length for this check. This ensures the immediate is in range for any possible value of vscale that satisfies the vscale_range.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list