[all-commits] [llvm/llvm-project] b9d751: [RISCV] Correct immediate operand type in QC_MVLTU...

[Sudharsan Veeravalli via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b9d7513bf134febe72c05a04ff20f87191d7213a
      https://github.com/llvm/llvm-project/commit/b9d7513bf134febe72c05a04ff20f87191d7213a
  Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
  Date:   2025-07-08 (Tue, 08 Jul 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/test/CodeGen/RISCV/xqcicm.ll

  Log Message:
  -----------
  [RISCV] Correct immediate operand type in QC_MVLTUI ISel pattern (#147509)

The pattern was incorrectly using simm5 for QC_MVLTUI when it should
have been uimm5.



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