[all-commits] [llvm/llvm-project] b9257a: RISCVMCCodeEmitter: Set PCRel at fixup creation

[Fangrui Song via All-commits]

  Branch: refs/heads/users/MaskRay/spr/mc-centralize-x86-pc-relative-fixup-adjustment-in-mcassembler
  Home:   https://github.com/llvm/llvm-project
  Commit: b9257a34a9e02bdc0ea19d9ac67294f788ab0b9b
      https://github.com/llvm/llvm-project/commit/b9257a34a9e02bdc0ea19d9ac67294f788ab0b9b
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

  Log Message:
  -----------
  RISCVMCCodeEmitter: Set PCRel at fixup creation

Avoid reliance on the MCAssembler::evaluateFixup workaround that checks
MCFixupKindInfo::FKF_IsPCRel. Additionally, standardize how fixups are
appended. This helper will facilitate future fixup data structure
optimizations.


  Commit: 43397e5fe3debd779d82ee13a685113b41eb8ccf
      https://github.com/llvm/llvm-project/commit/43397e5fe3debd779d82ee13a685113b41eb8ccf
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp

  Log Message:
  -----------
  LoongArchMCCodeEmitter: Set PCRel at fixup creation

Avoid reliance on the MCAssembler::evaluateFixup workaround that checks
MCFixupKindInfo::FKF_IsPCRel. Additionally, standardize how fixups are
appended. This helper will facilitate future fixup data structure
optimizations.


  Commit: 955c04862e99baed1ec96de8e4e8248ba9a3d739
      https://github.com/llvm/llvm-project/commit/955c04862e99baed1ec96de8e4e8248ba9a3d739
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp

  Log Message:
  -----------
  AArch64MCCodeEmitter: Standardize how fixups are appended

This helper will facilitate future fixup data structure optimizations.


  Commit: 2bfc488d34ef54d6d1b30facddcb097a953a6dfd
      https://github.com/llvm/llvm-project/commit/2bfc488d34ef54d6d1b30facddcb097a953a6dfd
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

  Log Message:
  -----------
  X86MCCodeEmitter: Remove unneeded MCFixupKindInfo::FKF_IsPCRel


  Commit: 7f477b9cbaba00fc2515c6671cfcfbd5c118d99f
      https://github.com/llvm/llvm-project/commit/7f477b9cbaba00fc2515c6671cfcfbd5c118d99f
  Author: Fangrui Song <i at maskray.me>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
    M llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
    M llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
    M llvm/test/CodeGen/X86/absolute-cmp.ll
    M llvm/test/CodeGen/X86/apx/and.ll
    M llvm/test/CodeGen/X86/apx/ccmp.ll
    M llvm/test/CodeGen/X86/apx/kmov-postrapseudos.ll
    M llvm/test/CodeGen/X86/apx/or.ll
    M llvm/test/CodeGen/X86/apx/sub.ll
    M llvm/test/CodeGen/X86/apx/xor.ll
    M llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
    M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
    M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
    M llvm/test/CodeGen/X86/avx512-vec-cmp.ll
    M llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
    M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
    M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
    M llvm/test/CodeGen/X86/avx512vl-arith.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
    M llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
    M llvm/test/CodeGen/X86/bmi.ll
    M llvm/test/CodeGen/X86/cmp.ll
    M llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
    M llvm/test/CodeGen/X86/conditional-tailcall.ll
    M llvm/test/CodeGen/X86/fma-scalar-combine.ll
    M llvm/test/CodeGen/X86/fma.ll
    M llvm/test/CodeGen/X86/fold-rmw-ops.ll
    M llvm/test/CodeGen/X86/pr38865.ll
    M llvm/test/CodeGen/X86/pr61384.ll
    M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
    M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
    M llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
    M llvm/test/CodeGen/X86/sse41.ll
    M llvm/test/CodeGen/X86/vec_fpext.ll
    M llvm/test/CodeGen/X86/x86-interrupt_cc.ll

  Log Message:
  -----------
  rebase. update codegen test

Created using spr 1.3.5-bogner


Compare: https://github.com/llvm/llvm-project/compare/a7f6b4148d78...7f477b9cbaba

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