[all-commits] [llvm/llvm-project] a438c6: [X86][FP16] Do not customize WidenLowerNode for ha...

[Phoebe Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a438c609978681d73598e1c2b02a4e63f5617995
      https://github.com/llvm/llvm-project/commit/a438c609978681d73598e1c2b02a4e63f5617995
  Author: Phoebe Wang <phoebe.wang at intel.com>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
    M llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll

  Log Message:
  -----------
  [X86][FP16] Do not customize WidenLowerNode for half if VLX not enabled (#146994)

The #142763 tried to reuse ISD node to workaround the non-VLX lowering
problem, but it caused a new problem: https://godbolt.org/z/1hEGnddhY



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