[all-commits] [llvm/llvm-project] 45909e: [PowePC] using MTVSRBMI instruction instead of con...

[zhijian lin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 45909ec469cea4bc479d5c7d0731dec8e8e91112
      https://github.com/llvm/llvm-project/commit/45909ec469cea4bc479d5c7d0731dec8e8e91112
  Author: zhijian lin <zhijian at ca.ibm.com>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/test/CodeGen/PowerPC/mtvsrbmi.ll

  Log Message:
  -----------
  [PowePC] using MTVSRBMI instruction instead of constant pool in power10+ (#144084)

The instruction MTVSRBMI set 0x00(or 0xFF) to each byte of VSR based on
the bits mask. Using the instruction instead of constant pool can reduce
the asm code size and instructions in power10.



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