[all-commits] [llvm/llvm-project] c87e3c: [MLIR][AArch64] Lower `vector.contract` to SVE FEA...

[Momchil Velikov via All-commits]

  Branch: refs/heads/users/momchil-velikov/vector-contract-bfmmla-sve
  Home:   https://github.com/llvm/llvm-project
  Commit: c87e3c0bfc75d941af4748ee4d804ddb4f08ced3
      https://github.com/llvm/llvm-project/commit/c87e3c0bfc75d941af4748ee4d804ddb4f08ced3
  Author: Momchil Velikov <momchil.velikov at arm.com>
  Date:   2025-07-04 (Fri, 04 Jul 2025)

  Changed paths:
    M mlir/include/mlir/Conversion/Passes.td
    M mlir/include/mlir/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.td
    M mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
    M mlir/lib/Dialect/ArmNeon/Transforms/LowerContractionToNeonI8MMPattern.cpp
    M mlir/lib/Dialect/ArmSVE/TransformOps/ArmSVEVectorTransformOps.cpp
    M mlir/lib/Dialect/ArmSVE/Transforms/CMakeLists.txt
    A mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
    R mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp
    A mlir/test/Dialect/Vector/CPU/ArmSVE/vector-bfmmla.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
    M mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir

  Log Message:
  -----------
  [MLIR][AArch64] Lower `vector.contract` to SVE FEAT_BF16 operations

This patch adds lowering of Bfloat16 widening matrix multiply and
accumulate `vector.contract`, by parametrising and
refactoring the pattern for 8-bit integers.



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