[all-commits] [llvm/llvm-project] a1d833: [AArch64] Change IssueWidth to 5 in AArch64SchedNe...

[Simon Wallis via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a1d83311c89276e02508183c220a241bec28bf61
      https://github.com/llvm/llvm-project/commit/a1d83311c89276e02508183c220a241bec28bf61
  Author: Simon Wallis <simon.wallis2 at arm.com>
  Date:   2025-06-30 (Mon, 30 Jun 2025)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
    M llvm/test/CodeGen/AArch64/machine-combiner.ll
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-writeback.s

  Log Message:
  -----------
  [AArch64] Change IssueWidth to 5 in AArch64SchedNeoverseN2.td (#145717)

It has been observed that the issue width for neoverse-n2 CPUs is set
too high, and does not properly reflect the dispatch constraints.

I tested various values of IssueWidth (10, 8, 6, 5, 4) with runs of
various workloads on a neoverse-n2 machine and I got the highest overall
geomean score with an issue width of 5.

If this patch were to cause any major regression post-commit, it could
be easily reverted, but it is likely to show an overall improvement.

Related Neoverse-V2 PR: https://github.com/llvm/llvm-project/pull/142565



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